[PATCH] drm/i915/selftests: Unconditionally do a chipset flush before emit_bb_start

[PATCH] drm/i915/selftests: Unconditionally do a chipset flush before emit_bb_start

[Chris Wilson]

Experience teaches us over and over again that coherency on Baytrail
requires the odd heavy hammer, and in particular clflush alone is not
enough to guarrantee that writes from the CPU are picked up by the CS.
Do as we do elsewhere and ensure we have an unconditional
i915_gem_chipset_flush() after writing to memory and submitting a batch
to HW.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107499
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
---
 drivers/gpu/drm/i915/selftests/huge_pages.c | 11 ++++++-----
 1 file changed, 6 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/i915/selftests/huge_pages.c b/drivers/gpu/drm/i915/selftests/huge_pages.c
index 7efb326badcd..e272127783fe 100644
--- a/drivers/gpu/drm/i915/selftests/huge_pages.c
+++ b/drivers/gpu/drm/i915/selftests/huge_pages.c
@@ -906,7 +906,11 @@ gpu_write_dw(struct i915_vma *vma, u64 offset, u32 val)
 	if (IS_ERR(obj))
 		return ERR_CAST(obj);
 
-	cmd = i915_gem_object_pin_map(obj, I915_MAP_WB);
+	err = i915_gem_object_set_to_wc_domain(obj, true);
+	if (err)
+		goto err;
+
+	cmd = i915_gem_object_pin_map(obj, I915_MAP_WC);
 	if (IS_ERR(cmd)) {
 		err = PTR_ERR(cmd);
 		goto err;
@@ -936,13 +940,10 @@ gpu_write_dw(struct i915_vma *vma, u64 offset, u32 val)
 	}
 
 	*cmd = MI_BATCH_BUFFER_END;
+	i915_gem_chipset_flush(i915);
 
 	i915_gem_object_unpin_map(obj);
 
-	err = i915_gem_object_set_to_gtt_domain(obj, false);
-	if (err)
-		goto err;
-
 	batch = i915_vma_instance(obj, vma->vm, NULL);
 	if (IS_ERR(batch)) {
 		err = PTR_ERR(batch);
-- 
2.18.0

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✓ Fi.CI.BAT: success for drm/i915/selftests: Unconditionally do a chipset flush before emit_bb_start

[Patchwork]

== Series Details ==

Series: drm/i915/selftests: Unconditionally do a chipset flush before emit_bb_start
URL   : https://patchwork.freedesktop.org/series/47767/
State : success

== Summary ==

= CI Bug Log - changes from CI_DRM_4621 -> Patchwork_9859 =

== Summary - SUCCESS ==

  No regressions found.

  External URL: https://patchwork.freedesktop.org/api/1.0/series/47767/revisions/1/mbox/

== Known issues ==

  Here are the changes found in Patchwork_9859 that come from known issues:

  === IGT changes ===

    ==== Issues hit ====

    igt@drv_selftest@live_hangcheck:
      fi-skl-guc:         PASS -> DMESG-FAIL (fdo#107174)

    igt@drv_selftest@live_workarounds:
      {fi-cfl-8109u}:     PASS -> DMESG-FAIL (fdo#107292)

    igt@kms_pipe_crc_basic@nonblocking-crc-pipe-a-frame-sequence:
      {fi-byt-clapper}:   PASS -> FAIL (fdo#107362, fdo#103191)

    
    ==== Possible fixes ====

    igt@debugfs_test@read_all_entries:
      fi-snb-2520m:       INCOMPLETE (fdo#103713) -> PASS

    igt@kms_chamelium@dp-crc-fast:
      fi-kbl-7500u:       FAIL (fdo#103841) -> PASS

    igt@kms_frontbuffer_tracking@basic:
      {fi-byt-clapper}:   FAIL (fdo#103167) -> PASS

    
    ==== Warnings ====

    {igt@kms_psr@primary_page_flip}:
      fi-cnl-psr:         DMESG-WARN (fdo#107372) -> DMESG-FAIL (fdo#107372)

    
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  fdo#103167 https://bugs.freedesktop.org/show_bug.cgi?id=103167
  fdo#103191 https://bugs.freedesktop.org/show_bug.cgi?id=103191
  fdo#103713 https://bugs.freedesktop.org/show_bug.cgi?id=103713
  fdo#103841 https://bugs.freedesktop.org/show_bug.cgi?id=103841
  fdo#107174 https://bugs.freedesktop.org/show_bug.cgi?id=107174
  fdo#107292 https://bugs.freedesktop.org/show_bug.cgi?id=107292
  fdo#107362 https://bugs.freedesktop.org/show_bug.cgi?id=107362
  fdo#107372 https://bugs.freedesktop.org/show_bug.cgi?id=107372


== Participating hosts (53 -> 48) ==

  Missing    (5): fi-ctg-p8600 fi-ilk-m540 fi-byt-squawks fi-bsw-cyan fi-hsw-4200u 


== Build changes ==

    * Linux: CI_DRM_4621 -> Patchwork_9859

  CI_DRM_4621: b35c6b4ccdc1e9b386d5679282123099cf83adf1 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_4587: 5d78c73d871525ec9caecd88ad7d9abe36637314 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_9859: fa416c07d00be1452692bb7aec9c0dd6f12052c3 @ git://anongit.freedesktop.org/gfx-ci/linux


== Linux commits ==

fa416c07d00b drm/i915/selftests: Unconditionally do a chipset flush before emit_bb_start

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_9859/issues.html
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✓ Fi.CI.IGT: success for drm/i915/selftests: Unconditionally do a chipset flush before emit_bb_start

[Patchwork]

== Series Details ==

Series: drm/i915/selftests: Unconditionally do a chipset flush before emit_bb_start
URL   : https://patchwork.freedesktop.org/series/47767/
State : success

== Summary ==

= CI Bug Log - changes from CI_DRM_4621_full -> Patchwork_9859_full =

== Summary - WARNING ==

  Minor unknown changes coming with Patchwork_9859_full need to be verified
  manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_9859_full, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  

== Possible new issues ==

  Here are the unknown changes that may have been introduced in Patchwork_9859_full:

  === IGT changes ===

    ==== Warnings ====

    igt@pm_rc6_residency@rc6-accuracy:
      shard-kbl:          SKIP -> PASS

    
== Known issues ==

  Here are the changes found in Patchwork_9859_full that come from known issues:

  === IGT changes ===

    ==== Issues hit ====

    igt@gem_ppgtt@blt-vs-render-ctx0:
      shard-kbl:          PASS -> INCOMPLETE (fdo#106023, fdo#103665)

    igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-pwrite:
      shard-snb:          NOTRUN -> INCOMPLETE (fdo#105411)

    igt@kms_setmode@basic:
      shard-hsw:          PASS -> FAIL (fdo#99912)

    
    ==== Possible fixes ====

    igt@drv_selftest@live_workarounds:
      shard-kbl:          DMESG-FAIL (fdo#107292) -> PASS

    igt@kms_cursor_crc@cursor-128x128-suspend:
      shard-kbl:          INCOMPLETE (fdo#103665) -> PASS

    igt@kms_flip@2x-flip-vs-expired-vblank:
      shard-glk:          FAIL (fdo#105363) -> PASS

    igt@perf_pmu@busy-accuracy-50-bcs0:
      shard-snb:          INCOMPLETE (fdo#105411) -> SKIP

    
  fdo#103665 https://bugs.freedesktop.org/show_bug.cgi?id=103665
  fdo#105363 https://bugs.freedesktop.org/show_bug.cgi?id=105363
  fdo#105411 https://bugs.freedesktop.org/show_bug.cgi?id=105411
  fdo#106023 https://bugs.freedesktop.org/show_bug.cgi?id=106023
  fdo#107292 https://bugs.freedesktop.org/show_bug.cgi?id=107292
  fdo#99912 https://bugs.freedesktop.org/show_bug.cgi?id=99912


== Participating hosts (5 -> 5) ==

  No changes in participating hosts


== Build changes ==

    * Linux: CI_DRM_4621 -> Patchwork_9859

  CI_DRM_4621: b35c6b4ccdc1e9b386d5679282123099cf83adf1 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_4587: 5d78c73d871525ec9caecd88ad7d9abe36637314 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_9859: fa416c07d00be1452692bb7aec9c0dd6f12052c3 @ git://anongit.freedesktop.org/gfx-ci/linux
  piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_9859/shards.html
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Re: [PATCH] drm/i915/selftests: Unconditionally do a chipset flush before emit_bb_start

[Matthew Auld]

On 6 August 2018 at 15:46, Chris Wilson <chris@chris-wilson.co.uk> wrote:
> Experience teaches us over and over again that coherency on Baytrail
> requires the odd heavy hammer, and in particular clflush alone is not
> enough to guarrantee that writes from the CPU are picked up by the CS.
> Do as we do elsewhere and ensure we have an unconditional
> i915_gem_chipset_flush() after writing to memory and submitting a batch
> to HW.
>
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107499
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Matthew Auld <matthew.auld@intel.com>
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Re: [PATCH] drm/i915/selftests: Unconditionally do a chipset flush before emit_bb_start

[Chris Wilson]

Quoting Matthew Auld (2018-08-06 19:53:47)
> On 6 August 2018 at 15:46, Chris Wilson <chris@chris-wilson.co.uk> wrote:
> > Experience teaches us over and over again that coherency on Baytrail
> > requires the odd heavy hammer, and in particular clflush alone is not
> > enough to guarrantee that writes from the CPU are picked up by the CS.
> > Do as we do elsewhere and ensure we have an unconditional
> > i915_gem_chipset_flush() after writing to memory and submitting a batch
> > to HW.
> >
> > Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107499
> > Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> Reviewed-by: Matthew Auld <matthew.auld@intel.com>

Ta. Thanks for checking it over, pushed.
-Chris
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