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From: David Miller <davem@davemloft.net>
To: mr.nuke.me@gmail.com
Cc: linux-pci@vger.kernel.org, bhelgaas@google.com,
	jakub.kicinski@netronome.com, keith.busch@intel.com,
	alex_gagniuc@dellteam.com, austin_bolen@dell.com,
	shyam_iyer@dell.com, ariel.elior@cavium.com,
	everest-linux-l2@cavium.com, michael.chan@broadcom.com,
	ganeshgr@chelsio.com, jeffrey.t.kirsher@intel.com,
	tariqt@mellanox.com, saeedm@mellanox.com, leon@kernel.org,
	dirk.vandermerwe@netronome.com, netdev@vger.kernel.org,
	linux-kernel@vger.kernel.org, intel-wired-lan@lists.osuosl.org,
	linux-rdma@vger.kernel.org, oss-drivers@netronome.com
Subject: Re: [PATCH v6 1/9] PCI: Check for PCIe downtraining conditions
Date: Tue, 07 Aug 2018 12:44:48 -0700 (PDT)	[thread overview]
Message-ID: <20180807.124448.1502585319140215353.davem@davemloft.net> (raw)
In-Reply-To: <20180806232600.25694-1-mr.nuke.me@gmail.com>

From: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Date: Mon,  6 Aug 2018 18:25:35 -0500

> PCIe downtraining happens when both the device and PCIe port are
> capable of a larger bus width or higher speed than negotiated.
> Downtraining might be indicative of other problems in the system, and
> identifying this from userspace is neither intuitive, nor
> straightforward.
> 
> The easiest way to detect this is with pcie_print_link_status(),
> since the bottleneck is usually the link that is downtrained. It's not
> a perfect solution, but it works extremely well in most cases.
> 
> Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>

Feel free to merge this entire series via the PCI tree.

For the series:

Acked-by: David S. Miller <davem@davemloft.net>

WARNING: multiple messages have this Message-ID (diff)
From: David Miller <davem@davemloft.net>
To: intel-wired-lan@osuosl.org
Subject: [Intel-wired-lan] [PATCH v6 1/9] PCI: Check for PCIe downtraining conditions
Date: Tue, 07 Aug 2018 12:44:48 -0700 (PDT)	[thread overview]
Message-ID: <20180807.124448.1502585319140215353.davem@davemloft.net> (raw)
In-Reply-To: <20180806232600.25694-1-mr.nuke.me@gmail.com>

From: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Date: Mon,  6 Aug 2018 18:25:35 -0500

> PCIe downtraining happens when both the device and PCIe port are
> capable of a larger bus width or higher speed than negotiated.
> Downtraining might be indicative of other problems in the system, and
> identifying this from userspace is neither intuitive, nor
> straightforward.
> 
> The easiest way to detect this is with pcie_print_link_status(),
> since the bottleneck is usually the link that is downtrained. It's not
> a perfect solution, but it works extremely well in most cases.
> 
> Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>

Feel free to merge this entire series via the PCI tree.

For the series:

Acked-by: David S. Miller <davem@davemloft.net>

  parent reply	other threads:[~2018-08-07 19:44 UTC|newest]

Thread overview: 73+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-06-04 15:55 [PATCH v3] PCI: Check for PCIe downtraining conditions Alexandru Gagniuc
2018-06-05 12:27 ` Andy Shevchenko
2018-06-05 13:04   ` Andy Shevchenko
2018-07-16 21:17 ` Bjorn Helgaas
2018-07-16 22:28   ` Alex_Gagniuc
2018-07-16 22:28     ` Alex_Gagniuc
2018-07-18 21:53     ` Bjorn Helgaas
2018-07-19 15:46       ` Alex G.
2018-07-19 17:07         ` Deucher, Alexander
2018-07-23 20:01       ` [PATCH v2] PCI/AER: Do not clear AER bits if we don't own AER Alexandru Gagniuc
2018-07-25  1:24         ` kbuild test robot
2018-07-23 20:03       ` [PATCH v5] PCI: Check for PCIe downtraining conditions Alexandru Gagniuc
2018-07-23 21:01         ` Jakub Kicinski
2018-07-23 21:52           ` Tal Gilboa
2018-07-23 22:14             ` Jakub Kicinski
2018-07-23 23:59               ` Alex G.
2018-07-24 13:39                 ` Tal Gilboa
2018-07-30 23:26                   ` Alex_Gagniuc
2018-07-30 23:26                     ` Alex_Gagniuc
2018-07-31  6:40             ` Tal Gilboa
2018-07-31 15:10               ` Alex G.
2018-08-05  7:05                 ` Tal Gilboa
2018-08-06 18:39                   ` Alex_Gagniuc
2018-08-06 18:39                     ` Alex_Gagniuc
2018-08-06 19:46                     ` Bjorn Helgaas
2018-08-06 23:25                       ` [PATCH v6 1/9] " Alexandru Gagniuc
2018-08-06 23:25                         ` [Intel-wired-lan] " Alexandru Gagniuc
2018-08-06 23:25                         ` [PATCH v6 2/9] bnx2x: Do not call pcie_print_link_status() Alexandru Gagniuc
2018-08-06 23:25                           ` [Intel-wired-lan] " Alexandru Gagniuc
2018-08-06 23:25                         ` [PATCH v6 3/9] bnxt_en: " Alexandru Gagniuc
2018-08-06 23:25                           ` [Intel-wired-lan] " Alexandru Gagniuc
2018-08-06 23:25                         ` [PATCH v6 4/9] cxgb4: " Alexandru Gagniuc
2018-08-06 23:25                           ` [Intel-wired-lan] " Alexandru Gagniuc
2018-08-06 23:25                         ` [PATCH v6 5/9] fm10k: " Alexandru Gagniuc
2018-08-06 23:25                           ` [Intel-wired-lan] " Alexandru Gagniuc
2018-08-07 17:52                           ` Jeff Kirsher
2018-08-07 17:52                             ` [Intel-wired-lan] " Jeff Kirsher
2018-08-06 23:25                         ` [PATCH v6 6/9] ixgbe: " Alexandru Gagniuc
2018-08-06 23:25                           ` [Intel-wired-lan] " Alexandru Gagniuc
2018-08-07 17:51                           ` Jeff Kirsher
2018-08-07 17:51                             ` [Intel-wired-lan] " Jeff Kirsher
2018-08-06 23:25                         ` [PATCH v6 7/9] net/mlx4: " Alexandru Gagniuc
2018-08-06 23:25                           ` [Intel-wired-lan] " Alexandru Gagniuc
2018-08-08  6:10                           ` Leon Romanovsky
2018-08-08  6:10                             ` [Intel-wired-lan] " Leon Romanovsky
2018-08-06 23:25                         ` [PATCH v6 8/9] net/mlx5: " Alexandru Gagniuc
2018-08-06 23:25                           ` [Intel-wired-lan] " Alexandru Gagniuc
2018-08-08  6:08                           ` Leon Romanovsky
2018-08-08  6:08                             ` [Intel-wired-lan] " Leon Romanovsky
2018-08-08 14:23                             ` Tal Gilboa
2018-08-08 14:23                               ` [Intel-wired-lan] " Tal Gilboa
2018-08-08 14:23                               ` Tal Gilboa
2018-08-08 15:41                               ` Leon Romanovsky
2018-08-08 15:41                                 ` [Intel-wired-lan] " Leon Romanovsky
2018-08-08 15:56                                 ` Tal Gilboa
2018-08-08 15:56                                   ` [Intel-wired-lan] " Tal Gilboa
2018-08-08 16:33                                   ` Alex G.
2018-08-08 16:33                                     ` [Intel-wired-lan] " Alex G.
2018-08-08 17:27                                     ` Leon Romanovsky
2018-08-08 17:27                                       ` [Intel-wired-lan] " Leon Romanovsky
2018-08-09 14:02                                       ` Bjorn Helgaas
2018-08-09 14:02                                         ` [Intel-wired-lan] " Bjorn Helgaas
2018-08-06 23:25                         ` [PATCH v6 9/9] nfp: " Alexandru Gagniuc
2018-08-06 23:25                           ` [Intel-wired-lan] " Alexandru Gagniuc
2018-08-07 19:44                         ` David Miller [this message]
2018-08-07 19:44                           ` [Intel-wired-lan] [PATCH v6 1/9] PCI: Check for PCIe downtraining conditions David Miller
2018-08-07 21:41                         ` Bjorn Helgaas
2018-08-07 21:41                           ` [Intel-wired-lan] " Bjorn Helgaas
2018-07-18 13:38   ` [PATCH v3] " Tal Gilboa
2018-07-19 15:49     ` Alex G.
2018-07-23  5:21       ` Tal Gilboa
2018-07-23 17:01         ` Alex G.
2018-07-23 21:35           ` Tal Gilboa

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