[PATCH 1/3] drm/i915: Warn if we hit the timeout for wait-for-idle

[PATCH 1/3] drm/i915: Warn if we hit the timeout for wait-for-idle

[Chris Wilson]

Hitting the timeout and finding that all engines are actually idle is
indicative of an interrupt delivery problem. This problem is an issue
that we need to fix, so make sure we log it and provide the GEM trace.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Mika Kuoppala <mika.kuoppala@intel.com>
---
 drivers/gpu/drm/i915/i915_gem.c | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 460f256114f7..71502512ac1f 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -3823,6 +3823,12 @@ int i915_gem_wait_for_idle(struct drm_i915_private *i915,
 			if (timeout < 0)
 				return timeout;
 		}
+		if (GEM_SHOW_DEBUG() && !timeout) {
+			/* Presume that timeout was non-zero to begin with! */
+			dev_warn(&i915->drm.pdev->dev,
+				 "Missed idle-completion interrupt!\n");
+			GEM_TRACE_DUMP();
+		}
 
 		err = wait_for_engines(i915);
 		if (err)
-- 
2.18.0

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[PATCH 2/3] drm/i915: Unmask user interrupts writes into HWSP on snb/ivb/vlv/hsw

[Chris Wilson]

An oddity occurs on Sandybridge, Ivybridge and Haswell (and presumably
Valleyview) in that for the period following the GPU restart after a
reset, there are no GT interrupts received. From Ville's notes, bit 0 in
the HWSTAM corresponds to the render interrupt, and if we unmask it we
do see immediate resumption of GT interrupt delivery (via the master irq
handler) after the reset.

v2: Limit the w/a to the render interrupt from rcs

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107500
Fixes: c5498089463b ("drm/i915: Mask everything in ring HWSTAM on gen6+ in ringbuffer mode")
References: d420a50c21ef ("drm/i915: Clean up the HWSTAM mess")
Testcase: igt/gem_eio/reset-stress
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Acked-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
---
 drivers/gpu/drm/i915/intel_ringbuffer.c | 14 ++++++++++++--
 1 file changed, 12 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
index 8003cef767ba..d40f55a8dc34 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -387,8 +387,18 @@ static void intel_ring_setup_status_page(struct intel_engine_cs *engine)
 		mmio = RING_HWS_PGA(engine->mmio_base);
 	}
 
-	if (INTEL_GEN(dev_priv) >= 6)
-		I915_WRITE(RING_HWSTAM(engine->mmio_base), 0xffffffff);
+	if (INTEL_GEN(dev_priv) >= 6) {
+		u32 mask = ~0u;
+
+		/*
+		 * Keep the render interrupt unmasked as this papers over
+		 * lost interrupts following a reset.
+		 */
+		if (engine->id == RCS)
+			mask &= ~BIT(0);
+
+		I915_WRITE(RING_HWSTAM(engine->mmio_base), mask);
+	}
 
 	I915_WRITE(mmio, engine->status_page.ggtt_offset);
 	POSTING_READ(mmio);
-- 
2.18.0

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[PATCH 3/3] drm/i915: Remove extra waiter kick on legacy resets

[Chris Wilson]

Now with a more efficacious workaround for the lost interrupts after
reset, we can remove the hack of kicking the waiters after reset. The
issue was that the kick only worked for the immediate window after the
reset (those seqno that would complete in the time it took for the
waiter thread to perform its check) but miss any seqno that lacked an
interrupt afterwards.

References: 39f3be162c46 ("drm/i915: Kick waiters on resetting legacy rings")
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Matthew Auld <matthew.auld@intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Acked-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
---
 drivers/gpu/drm/i915/intel_ringbuffer.c | 2 --
 1 file changed, 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
index d40f55a8dc34..b65cf7832b39 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -537,8 +537,6 @@ static int init_ring_common(struct intel_engine_cs *engine)
 	if (INTEL_GEN(dev_priv) > 2)
 		I915_WRITE_MODE(engine, _MASKED_BIT_DISABLE(STOP_RING));
 
-	/* Papering over lost _interrupts_ immediately following the restart */
-	intel_engine_wakeup(engine);
 out:
 	intel_uncore_forcewake_put(dev_priv, FORCEWAKE_ALL);
 
-- 
2.18.0

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✗ Fi.CI.CHECKPATCH: warning for series starting with [1/3] drm/i915: Warn if we hit the timeout for wait-for-idle

[Patchwork]

== Series Details ==

Series: series starting with [1/3] drm/i915: Warn if we hit the timeout for wait-for-idle
URL   : https://patchwork.freedesktop.org/series/47876/
State : warning

== Summary ==

$ dim checkpatch origin/drm-tip
6e9f34cdcedb drm/i915: Warn if we hit the timeout for wait-for-idle
f21ba24ba6d8 drm/i915: Unmask user interrupts writes into HWSP on snb/ivb/vlv/hsw
-:21: ERROR:GIT_COMMIT_ID: Please use git commit description style 'commit <12+ chars of sha1> ("<title line>")' - ie: 'commit d420a50c21ef ("drm/i915: Clean up the HWSTAM mess")'
#21: 
References: d420a50c21ef ("drm/i915: Clean up the HWSTAM mess")

total: 1 errors, 0 warnings, 0 checks, 20 lines checked
1497da183347 drm/i915: Remove extra waiter kick on legacy resets
-:16: WARNING:COMMIT_LOG_LONG_LINE: Possible unwrapped commit description (prefer a maximum 75 chars per line)
#16: 
References: 39f3be162c46 ("drm/i915: Kick waiters on resetting legacy rings")

-:16: ERROR:GIT_COMMIT_ID: Please use git commit description style 'commit <12+ chars of sha1> ("<title line>")' - ie: 'commit 39f3be162c46 ("drm/i915: Kick waiters on resetting legacy rings")'
#16: 
References: 39f3be162c46 ("drm/i915: Kick waiters on resetting legacy rings")

total: 1 errors, 1 warnings, 0 checks, 8 lines checked

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Re: [PATCH 1/3] drm/i915: Warn if we hit the timeout for wait-for-idle

[Mika Kuoppala]

Chris Wilson <chris@chris-wilson.co.uk> writes:

> Hitting the timeout and finding that all engines are actually idle is
> indicative of an interrupt delivery problem. This problem is an issue
> that we need to fix, so make sure we log it and provide the GEM trace.
>
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Mika Kuoppala <mika.kuoppala@intel.com>
> ---
>  drivers/gpu/drm/i915/i915_gem.c | 6 ++++++
>  1 file changed, 6 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
> index 460f256114f7..71502512ac1f 100644
> --- a/drivers/gpu/drm/i915/i915_gem.c
> +++ b/drivers/gpu/drm/i915/i915_gem.c
> @@ -3823,6 +3823,12 @@ int i915_gem_wait_for_idle(struct drm_i915_private *i915,
>  			if (timeout < 0)
>  				return timeout;
>  		}
> +		if (GEM_SHOW_DEBUG() && !timeout) {
> +			/* Presume that timeout was non-zero to begin with! */

Now that you mentioned it, with all the current callsites you could
warn or even build_bug to enforce timeout > 0.

Reviewed-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>

> +			dev_warn(&i915->drm.pdev->dev,
> +				 "Missed idle-completion interrupt!\n");
> +			GEM_TRACE_DUMP();
> +		}
>  
>  		err = wait_for_engines(i915);
>  		if (err)
> -- 
> 2.18.0
>
> _______________________________________________
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> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
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✓ Fi.CI.BAT: success for series starting with [1/3] drm/i915: Warn if we hit the timeout for wait-for-idle

[Patchwork]

== Series Details ==

Series: series starting with [1/3] drm/i915: Warn if we hit the timeout for wait-for-idle
URL   : https://patchwork.freedesktop.org/series/47876/
State : success

== Summary ==

= CI Bug Log - changes from CI_DRM_4633 -> Patchwork_9884 =

== Summary - SUCCESS ==

  No regressions found.

  External URL: https://patchwork.freedesktop.org/api/1.0/series/47876/revisions/1/mbox/

== Known issues ==

  Here are the changes found in Patchwork_9884 that come from known issues:

  === IGT changes ===

    ==== Issues hit ====

    igt@drv_selftest@live_hangcheck:
      fi-kbl-7560u:       PASS -> DMESG-FAIL (fdo#106560, fdo#106947)
      {fi-icl-u}:         NOTRUN -> INCOMPLETE (fdo#107399)
      fi-kbl-7567u:       PASS -> DMESG-FAIL (fdo#106560, fdo#106947)

    igt@drv_selftest@live_workarounds:
      {fi-bsw-kefka}:     PASS -> DMESG-FAIL (fdo#107292)

    igt@kms_pipe_crc_basic@suspend-read-crc-pipe-b:
      fi-snb-2520m:       PASS -> INCOMPLETE (fdo#103713)

    igt@kms_pipe_crc_basic@suspend-read-crc-pipe-c:
      {fi-icl-u}:         NOTRUN -> DMESG-WARN (fdo#107382) +4

    {igt@kms_psr@primary_page_flip}:
      {fi-icl-u}:         NOTRUN -> FAIL (fdo#107383) +3

    
    ==== Possible fixes ====

    igt@drv_selftest@live_workarounds:
      fi-whl-u:           DMESG-FAIL (fdo#107292) -> PASS
      fi-kbl-x1275:       DMESG-FAIL (fdo#107292) -> PASS

    
    ==== Warnings ====

    {igt@kms_psr@primary_page_flip}:
      fi-cnl-psr:         DMESG-FAIL (fdo#107372) -> DMESG-WARN (fdo#107372)

    
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  fdo#103713 https://bugs.freedesktop.org/show_bug.cgi?id=103713
  fdo#106560 https://bugs.freedesktop.org/show_bug.cgi?id=106560
  fdo#106947 https://bugs.freedesktop.org/show_bug.cgi?id=106947
  fdo#107292 https://bugs.freedesktop.org/show_bug.cgi?id=107292
  fdo#107372 https://bugs.freedesktop.org/show_bug.cgi?id=107372
  fdo#107382 https://bugs.freedesktop.org/show_bug.cgi?id=107382
  fdo#107383 https://bugs.freedesktop.org/show_bug.cgi?id=107383
  fdo#107399 https://bugs.freedesktop.org/show_bug.cgi?id=107399


== Participating hosts (51 -> 47) ==

  Additional (2): fi-icl-u fi-bxt-dsi 
  Missing    (6): fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-ctg-p8600 fi-gdg-551 


== Build changes ==

    * Linux: CI_DRM_4633 -> Patchwork_9884

  CI_DRM_4633: ea6e3f703e4d234c9c8eaec6c533355c7454ecb6 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_4588: 7e5abbe4d9b2129bbbf02be77a70cad3da2ab941 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_9884: 1497da1833471d54390845b7f7e3414652d6fbb2 @ git://anongit.freedesktop.org/gfx-ci/linux


== Linux commits ==

1497da183347 drm/i915: Remove extra waiter kick on legacy resets
f21ba24ba6d8 drm/i915: Unmask user interrupts writes into HWSP on snb/ivb/vlv/hsw
6e9f34cdcedb drm/i915: Warn if we hit the timeout for wait-for-idle

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_9884/issues.html
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✓ Fi.CI.IGT: success for series starting with [1/3] drm/i915: Warn if we hit the timeout for wait-for-idle

[Patchwork]

== Series Details ==

Series: series starting with [1/3] drm/i915: Warn if we hit the timeout for wait-for-idle
URL   : https://patchwork.freedesktop.org/series/47876/
State : success

== Summary ==

= CI Bug Log - changes from CI_DRM_4633_full -> Patchwork_9884_full =

== Summary - SUCCESS ==

  No regressions found.

  

== Known issues ==

  Here are the changes found in Patchwork_9884_full that come from known issues:

  === IGT changes ===

    ==== Possible fixes ====

    igt@gem_eio@reset-stress:
      shard-hsw:          FAIL (fdo#107500) -> PASS

    
  fdo#107500 https://bugs.freedesktop.org/show_bug.cgi?id=107500


== Participating hosts (5 -> 5) ==

  No changes in participating hosts


== Build changes ==

    * Linux: CI_DRM_4633 -> Patchwork_9884

  CI_DRM_4633: ea6e3f703e4d234c9c8eaec6c533355c7454ecb6 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_4588: 7e5abbe4d9b2129bbbf02be77a70cad3da2ab941 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_9884: 1497da1833471d54390845b7f7e3414652d6fbb2 @ git://anongit.freedesktop.org/gfx-ci/linux
  piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_9884/shards.html
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Re: [PATCH 2/3] drm/i915: Unmask user interrupts writes into HWSP on snb/ivb/vlv/hsw

[Mika Kuoppala]

Chris Wilson <chris@chris-wilson.co.uk> writes:

> An oddity occurs on Sandybridge, Ivybridge and Haswell (and presumably
> Valleyview) in that for the period following the GPU restart after a
> reset, there are no GT interrupts received. From Ville's notes, bit 0 in
> the HWSTAM corresponds to the render interrupt, and if we unmask it we
> do see immediate resumption of GT interrupt delivery (via the master irq
> handler) after the reset.
>
> v2: Limit the w/a to the render interrupt from rcs
>
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107500
> Fixes: c5498089463b ("drm/i915: Mask everything in ring HWSTAM on gen6+ in ringbuffer mode")
> References: d420a50c21ef ("drm/i915: Clean up the HWSTAM mess")
> Testcase: igt/gem_eio/reset-stress
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
>  drivers/gpu/drm/i915/intel_ringbuffer.c | 14 ++++++++++++--
>  1 file changed, 12 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
> index 8003cef767ba..5a2601a4d1aa 100644
> --- a/drivers/gpu/drm/i915/intel_ringbuffer.c
> +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
> @@ -387,8 +387,18 @@ static void intel_ring_setup_status_page(struct intel_engine_cs *engine)
>  		mmio = RING_HWS_PGA(engine->mmio_base);
>  	}
>  
> -	if (INTEL_GEN(dev_priv) >= 6)
> -		I915_WRITE(RING_HWSTAM(engine->mmio_base), 0xffffffff);
> +	if (INTEL_GEN(dev_priv) >= 6) {
> +		u32 mask = ~0u;
> +
> +		/*
> +		 * Keep the render interrupt unmasked as this papaers over

papers, tho papaers sounds like it needs grown up to walk it across
the reset.

> +		 * lost interrupts following a reset.
> +		 */
> +		if (engine->id == RCS)
> +			mask &= ~BIT(0);
> +
> +		I915_WRITE(RING_HWSTAM(engine->mmio_base), mask);

This is fine too as the improved test pushes it with all engines.

Acked-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>

> +	}
>  
>  	I915_WRITE(mmio, engine->status_page.ggtt_offset);
>  	POSTING_READ(mmio);
> -- 
> 2.18.0
>
> _______________________________________________
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> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
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[PATCH 2/3] drm/i915: Unmask user interrupts writes into HWSP on snb/ivb/vlv/hsw

[Chris Wilson]

An oddity occurs on Sandybridge, Ivybridge and Haswell (and presumably
Valleyview) in that for the period following the GPU restart after a
reset, there are no GT interrupts received. From Ville's notes, bit 0 in
the HWSTAM corresponds to the render interrupt, and if we unmask it we
do see immediate resumption of GT interrupt delivery (via the master irq
handler) after the reset.

v2: Limit the w/a to the render interrupt from rcs

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107500
Fixes: c5498089463b ("drm/i915: Mask everything in ring HWSTAM on gen6+ in ringbuffer mode")
References: d420a50c21ef ("drm/i915: Clean up the HWSTAM mess")
Testcase: igt/gem_eio/reset-stress
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/intel_ringbuffer.c | 14 ++++++++++++--
 1 file changed, 12 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
index 8003cef767ba..5a2601a4d1aa 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -387,8 +387,18 @@ static void intel_ring_setup_status_page(struct intel_engine_cs *engine)
 		mmio = RING_HWS_PGA(engine->mmio_base);
 	}
 
-	if (INTEL_GEN(dev_priv) >= 6)
-		I915_WRITE(RING_HWSTAM(engine->mmio_base), 0xffffffff);
+	if (INTEL_GEN(dev_priv) >= 6) {
+		u32 mask = ~0u;
+
+		/*
+		 * Keep the render interrupt unmasked as this papaers over
+		 * lost interrupts following a reset.
+		 */
+		if (engine->id == RCS)
+			mask &= ~BIT(0);
+
+		I915_WRITE(RING_HWSTAM(engine->mmio_base), mask);
+	}
 
 	I915_WRITE(mmio, engine->status_page.ggtt_offset);
 	POSTING_READ(mmio);
-- 
2.18.0

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