* [PATCH v2 0/5] Add RZ/G2M SYSC/RST/Clock support
@ 2018-08-02 14:48 Biju Das
2018-08-02 14:48 ` [PATCH v2 1/5] dt-bindings: power: Add r8a774a1 SYSC power domain definitions Biju Das
0 siblings, 1 reply; 4+ messages in thread
From: Biju Das @ 2018-08-02 14:48 UTC (permalink / raw)
To: Rob Herring, Mark Rutland
Cc: Biju Das, Simon Horman, Magnus Damm, linux-renesas-soc,
devicetree, Geert Uytterhoeven, Chris Paterson, Fabrizio Castro
This patch series aims to add SYSC/RST/Clock support for
for RZ/G2M SoC. RZ/G2M SoC is similar to R-Car Gen3 M3-W SoC.
----
V1-->V2
* Incorporated review comments
----
Biju Das (5):
dt-bindings: power: Add r8a774a1 SYSC power domain definitions
soc: renesas: rcar-sysc: Add r8a774a1 support
soc: renesas: rcar-rst: Add support for RZ/G2M
clk: renesas: Add r8a774a1 CPG Core Clock Definitions
clk: renesas: cpg-mssr: Add r8a774a1 support
.../devicetree/bindings/clock/renesas,cpg-mssr.txt | 9 +-
.../bindings/power/renesas,rcar-sysc.txt | 1 +
.../devicetree/bindings/reset/renesas,rst.txt | 1 +
drivers/clk/renesas/Kconfig | 5 +
drivers/clk/renesas/Makefile | 1 +
drivers/clk/renesas/r8a774a1-cpg-mssr.c | 323 +++++++++++++++++++++
drivers/clk/renesas/renesas-cpg-mssr.c | 6 +
drivers/clk/renesas/renesas-cpg-mssr.h | 1 +
drivers/soc/renesas/Kconfig | 11 +-
drivers/soc/renesas/Makefile | 1 +
drivers/soc/renesas/r8a774a1-sysc.c | 45 +++
drivers/soc/renesas/rcar-rst.c | 4 +-
drivers/soc/renesas/rcar-sysc.c | 3 +
drivers/soc/renesas/rcar-sysc.h | 1 +
include/dt-bindings/clock/r8a774a1-cpg-mssr.h | 58 ++++
include/dt-bindings/power/r8a774a1-sysc.h | 31 ++
16 files changed, 493 insertions(+), 8 deletions(-)
create mode 100644 drivers/clk/renesas/r8a774a1-cpg-mssr.c
create mode 100644 drivers/soc/renesas/r8a774a1-sysc.c
create mode 100644 include/dt-bindings/clock/r8a774a1-cpg-mssr.h
create mode 100644 include/dt-bindings/power/r8a774a1-sysc.h
--
2.7.4
^ permalink raw reply [flat|nested] 4+ messages in thread
* [PATCH v2 1/5] dt-bindings: power: Add r8a774a1 SYSC power domain definitions
2018-08-02 14:48 [PATCH v2 0/5] Add RZ/G2M SYSC/RST/Clock support Biju Das
@ 2018-08-02 14:48 ` Biju Das
2018-08-09 11:07 ` Simon Horman
0 siblings, 1 reply; 4+ messages in thread
From: Biju Das @ 2018-08-02 14:48 UTC (permalink / raw)
To: Rob Herring, Mark Rutland
Cc: Biju Das, devicetree, Simon Horman, Geert Uytterhoeven,
Chris Paterson, Fabrizio Castro, linux-renesas-soc
This patch adds power domain indices for RZ/G2M.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Chris Paterson <chris.paterson2@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
V1-->V2
* No change
---
include/dt-bindings/power/r8a774a1-sysc.h | 31 +++++++++++++++++++++++++++++++
1 file changed, 31 insertions(+)
create mode 100644 include/dt-bindings/power/r8a774a1-sysc.h
diff --git a/include/dt-bindings/power/r8a774a1-sysc.h b/include/dt-bindings/power/r8a774a1-sysc.h
new file mode 100644
index 0000000..580f431
--- /dev/null
+++ b/include/dt-bindings/power/r8a774a1-sysc.h
@@ -0,0 +1,31 @@
+/* SPDX-License-Identifier: GPL-2.0
+ *
+ * Copyright (C) 2018 Renesas Electronics Corp.
+ */
+#ifndef __DT_BINDINGS_POWER_R8A774A1_SYSC_H__
+#define __DT_BINDINGS_POWER_R8A774A1_SYSC_H__
+
+/*
+ * These power domain indices match the numbers of the interrupt bits
+ * representing the power areas in the various Interrupt Registers
+ * (e.g. SYSCISR, Interrupt Status Register)
+ */
+
+#define R8A774A1_PD_CA57_CPU0 0
+#define R8A774A1_PD_CA57_CPU1 1
+#define R8A774A1_PD_CA53_CPU0 5
+#define R8A774A1_PD_CA53_CPU1 6
+#define R8A774A1_PD_CA53_CPU2 7
+#define R8A774A1_PD_CA53_CPU3 8
+#define R8A774A1_PD_CA57_SCU 12
+#define R8A774A1_PD_A3VC 14
+#define R8A774A1_PD_3DG_A 17
+#define R8A774A1_PD_3DG_B 18
+#define R8A774A1_PD_CA53_SCU 21
+#define R8A774A1_PD_A2VC0 25
+#define R8A774A1_PD_A2VC1 26
+
+/* Always-on power area */
+#define R8A774A1_PD_ALWAYS_ON 32
+
+#endif /* __DT_BINDINGS_POWER_R8A774A1_SYSC_H__ */
--
2.7.4
^ permalink raw reply related [flat|nested] 4+ messages in thread
* Re: [PATCH v2 1/5] dt-bindings: power: Add r8a774a1 SYSC power domain definitions
2018-08-02 14:48 ` [PATCH v2 1/5] dt-bindings: power: Add r8a774a1 SYSC power domain definitions Biju Das
@ 2018-08-09 11:07 ` Simon Horman
2018-08-10 11:09 ` Simon Horman
0 siblings, 1 reply; 4+ messages in thread
From: Simon Horman @ 2018-08-09 11:07 UTC (permalink / raw)
To: Biju Das
Cc: Rob Herring, Mark Rutland, devicetree, Geert Uytterhoeven,
Chris Paterson, Fabrizio Castro, linux-renesas-soc
On Thu, Aug 02, 2018 at 03:48:18PM +0100, Biju Das wrote:
> This patch adds power domain indices for RZ/G2M.
>
> Signed-off-by: Biju Das <biju.das@bp.renesas.com>
> Reviewed-by: Chris Paterson <chris.paterson2@renesas.com>
> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH v2 1/5] dt-bindings: power: Add r8a774a1 SYSC power domain definitions
2018-08-09 11:07 ` Simon Horman
@ 2018-08-10 11:09 ` Simon Horman
0 siblings, 0 replies; 4+ messages in thread
From: Simon Horman @ 2018-08-10 11:09 UTC (permalink / raw)
To: Biju Das
Cc: Rob Herring, Mark Rutland, devicetree, Geert Uytterhoeven,
Chris Paterson, Fabrizio Castro, linux-renesas-soc
On Thu, Aug 09, 2018 at 01:07:59PM +0200, Simon Horman wrote:
> On Thu, Aug 02, 2018 at 03:48:18PM +0100, Biju Das wrote:
> > This patch adds power domain indices for RZ/G2M.
> >
> > Signed-off-by: Biju Das <biju.das@bp.renesas.com>
> > Reviewed-by: Chris Paterson <chris.paterson2@renesas.com>
> > Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
>
> Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
Now applied for v4.20.
^ permalink raw reply [flat|nested] 4+ messages in thread
end of thread, other threads:[~2018-08-10 11:09 UTC | newest]
Thread overview: 4+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2018-08-02 14:48 [PATCH v2 0/5] Add RZ/G2M SYSC/RST/Clock support Biju Das
2018-08-02 14:48 ` [PATCH v2 1/5] dt-bindings: power: Add r8a774a1 SYSC power domain definitions Biju Das
2018-08-09 11:07 ` Simon Horman
2018-08-10 11:09 ` Simon Horman
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.