* [U-Boot] [PATCH v2 0/7] ARM: dts: sunxi: Update dts(i) files from Linux-v4.18-rc3
@ 2018-08-09 13:08 Jagan Teki
2018-08-09 13:08 ` [U-Boot] [PATCH v2 1/7] ARM: dts: sun4i: Update A10 " Jagan Teki
` (7 more replies)
0 siblings, 8 replies; 11+ messages in thread
From: Jagan Teki @ 2018-08-09 13:08 UTC (permalink / raw)
To: u-boot
This series is trying to update SoC dtsi and board dts files
for Allwinner sun4i, 5i, 6i, 8i-a23/a33/a83t, r40 SoC's
from Linux-4.18-rc3
These update is useful for supporting features
CLK, RESET, DM_MMC etc
Since H3/H5/A64 is already updated with Linux-4.18-rc3,
this series use same version to maintain proper
compatibility for all SoC platforms syncs.
Changes for v2:
- Update commit subject line with Linux-v4.18-rc3
thanks,
Jagan.
Jagan Teki (7):
ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3
ARM: dts: sun5i: Update A10s/A13/gr8/r8 dts(i) files from
Linux-v4.18-rc3
ARM: dts: sun6i: Update A31/A31s dts(i) files from Linux-v4.18-rc3
ARM: dts: sun7i: Update A20 dts(i) files from Linux-v4.18-rc3
ARM: dts: sun8i: Update A23/A33/r16 dts(i) files from Linux-v4.18-rc3
ARM: dts: sun8i: Update A83T dts(i) files from Linux-v4.18-rc3
ARM: dts: sun8i: Update R40/V40 dts(i) files from Linux-v4.18-rc3
arch/arm/dts/axp209.dtsi | 17 +-
arch/arm/dts/axp81x.dtsi | 169 ++
arch/arm/dts/sun4i-a10-a1000.dts | 61 +-
arch/arm/dts/sun4i-a10-ba10-tvbox.dts | 23 +-
arch/arm/dts/sun4i-a10-chuwi-v7-cw0825.dts | 37 +-
arch/arm/dts/sun4i-a10-cubieboard.dts | 67 +-
arch/arm/dts/sun4i-a10-dserve-dsrv9703c.dts | 76 +-
arch/arm/dts/sun4i-a10-gemei-g9.dts | 28 +-
arch/arm/dts/sun4i-a10-hackberry.dts | 32 +-
arch/arm/dts/sun4i-a10-hyundai-a7hd.dts | 31 +-
arch/arm/dts/sun4i-a10-inet-3f.dts | 2 +-
arch/arm/dts/sun4i-a10-inet-3w.dts | 2 +-
arch/arm/dts/sun4i-a10-inet1.dts | 58 +-
arch/arm/dts/sun4i-a10-inet97fv2.dts | 41 +-
arch/arm/dts/sun4i-a10-inet9f-rev03.dts | 101 +-
.../dts/sun4i-a10-itead-iteaduino-plus.dts | 24 +-
arch/arm/dts/sun4i-a10-jesurun-q5.dts | 34 +-
arch/arm/dts/sun4i-a10-marsboard.dts | 38 +-
arch/arm/dts/sun4i-a10-mini-xplus.dts | 16 +-
arch/arm/dts/sun4i-a10-mk802.dts | 59 +-
arch/arm/dts/sun4i-a10-mk802ii.dts | 9 +-
arch/arm/dts/sun4i-a10-olinuxino-lime.dts | 75 +-
arch/arm/dts/sun4i-a10-pcduino.dts | 47 +-
arch/arm/dts/sun4i-a10-pcduino2.dts | 11 -
arch/arm/dts/sun4i-a10-pov-protab2-ips9.dts | 89 +-
arch/arm/dts/sun4i-a10.dtsi | 1349 +++++++--------
arch/arm/dts/sun5i-a10s-auxtek-t003.dts | 26 +-
arch/arm/dts/sun5i-a10s-auxtek-t004.dts | 42 +-
arch/arm/dts/sun5i-a10s-mk802.dts | 24 +-
arch/arm/dts/sun5i-a10s-olinuxino-micro.dts | 82 +-
arch/arm/dts/sun5i-a10s-r7-tv-dongle.dts | 24 +-
arch/arm/dts/sun5i-a10s-wobo-i5.dts | 29 +-
arch/arm/dts/sun5i-a10s.dtsi | 224 +--
.../dts/sun5i-a13-empire-electronix-d709.dts | 29 +-
arch/arm/dts/sun5i-a13-hsg-h702.dts | 29 +-
arch/arm/dts/sun5i-a13-inet-98v-rev2.dts | 164 +-
arch/arm/dts/sun5i-a13-olinuxino-micro.dts | 44 +-
arch/arm/dts/sun5i-a13-olinuxino.dts | 100 +-
arch/arm/dts/sun5i-a13-utoo-p66.dts | 49 +-
arch/arm/dts/sun5i-a13.dtsi | 268 +--
arch/arm/dts/sun5i-gr8-chip-pro.dts | 16 +-
arch/arm/dts/sun5i-gr8.dtsi | 1082 +-----------
arch/arm/dts/sun5i-r8-chip.dts | 91 +-
arch/arm/dts/sun5i-r8.dtsi | 40 -
.../dts/sun5i-reference-design-tablet.dtsi | 69 +-
arch/arm/dts/sun5i.dtsi | 792 ++++-----
arch/arm/dts/sun6i-a31-app4-evb1.dts | 7 +-
arch/arm/dts/sun6i-a31-colombus.dts | 26 +-
arch/arm/dts/sun6i-a31-hummingbird.dts | 153 +-
arch/arm/dts/sun6i-a31-i7.dts | 82 +-
arch/arm/dts/sun6i-a31-m9.dts | 23 +-
arch/arm/dts/sun6i-a31-mele-a1000g-quad.dts | 23 +-
arch/arm/dts/sun6i-a31.dtsi | 1151 ++++++++-----
arch/arm/dts/sun6i-a31s-cs908.dts | 2 -
arch/arm/dts/sun6i-a31s-primo81.dts | 69 +-
arch/arm/dts/sun6i-a31s-sina31s-core.dtsi | 1 -
arch/arm/dts/sun6i-a31s-sina31s.dts | 77 +-
arch/arm/dts/sun6i-a31s-sinovoip-bpi-m2.dts | 154 +-
.../sun6i-a31s-yones-toptech-bs1078-v2.dts | 13 +-
arch/arm/dts/sun6i-a31s.dtsi | 8 +
.../dts/sun6i-reference-design-tablet.dtsi | 18 +-
arch/arm/dts/sun7i-a20-bananapi-m1-plus.dts | 32 +-
arch/arm/dts/sun7i-a20-bananapi.dts | 106 +-
arch/arm/dts/sun7i-a20-bananapro.dts | 73 +-
arch/arm/dts/sun7i-a20-cubieboard2.dts | 56 +-
arch/arm/dts/sun7i-a20-cubietruck.dts | 84 +-
arch/arm/dts/sun7i-a20-hummingbird.dts | 30 +-
arch/arm/dts/sun7i-a20-i12-tvbox.dts | 34 +-
arch/arm/dts/sun7i-a20-icnova-swac.dts | 6 +-
arch/arm/dts/sun7i-a20-itead-ibox.dts | 12 +-
arch/arm/dts/sun7i-a20-lamobo-r1.dts | 73 +-
arch/arm/dts/sun7i-a20-m3.dts | 12 +-
arch/arm/dts/sun7i-a20-mk808c.dts | 43 +-
arch/arm/dts/sun7i-a20-olimex-som-evb.dts | 108 +-
arch/arm/dts/sun7i-a20-olimex-som204-evb.dts | 42 +-
arch/arm/dts/sun7i-a20-olinuxino-lime.dts | 58 +-
.../dts/sun7i-a20-olinuxino-lime2-emmc.dts | 6 +-
arch/arm/dts/sun7i-a20-olinuxino-lime2.dts | 154 +-
arch/arm/dts/sun7i-a20-olinuxino-micro.dts | 116 +-
arch/arm/dts/sun7i-a20-orangepi-mini.dts | 77 +-
arch/arm/dts/sun7i-a20-orangepi.dts | 42 +-
arch/arm/dts/sun7i-a20-pcduino3-nano.dts | 55 +-
arch/arm/dts/sun7i-a20-pcduino3.dts | 26 +-
arch/arm/dts/sun7i-a20-primo73.dts | 58 +-
arch/arm/dts/sun7i-a20-wexler-tab7200.dts | 30 +-
arch/arm/dts/sun7i-a20-wits-pro-a20-dkt.dts | 20 +-
arch/arm/dts/sun7i-a20.dtsi | 1505 +++++++----------
arch/arm/dts/sun8i-a23-a33.dtsi | 112 +-
arch/arm/dts/sun8i-a23-evb.dts | 11 +-
arch/arm/dts/sun8i-a23-gt90h-v4.dts | 5 +-
arch/arm/dts/sun8i-a23-inet86dz.dts | 6 +-
.../dts/sun8i-a23-polaroid-mid2407pxe03.dts | 34 +-
.../dts/sun8i-a23-polaroid-mid2809pxe04.dts | 25 +-
arch/arm/dts/sun8i-a23-q8-tablet.dts | 13 +
arch/arm/dts/sun8i-a23.dtsi | 4 +-
arch/arm/dts/sun8i-a33-ga10h-v1.1.dts | 5 +-
arch/arm/dts/sun8i-a33-inet-d978-rev2.dts | 29 +-
arch/arm/dts/sun8i-a33-olinuxino.dts | 66 +-
arch/arm/dts/sun8i-a33-sinlinx-sina33.dts | 53 +-
arch/arm/dts/sun8i-a33.dtsi | 63 +-
.../dts/sun8i-a83t-allwinner-h8homlet-v2.dts | 195 ++-
arch/arm/dts/sun8i-a83t-bananapi-m3.dts | 298 +++-
arch/arm/dts/sun8i-a83t-cubietruck-plus.dts | 322 +++-
arch/arm/dts/sun8i-a83t-tbs-a711.dts | 355 +++-
arch/arm/dts/sun8i-a83t.dtsi | 885 +++++++++-
arch/arm/dts/sun8i-q8-common.dtsi | 30 +-
arch/arm/dts/sun8i-r16-bananapi-m2m.dts | 3 +-
...sun8i-r16-nintendo-nes-classic-edition.dts | 2 -
arch/arm/dts/sun8i-r16-parrot.dts | 50 +-
arch/arm/dts/sun8i-r40-bananapi-m2-ultra.dts | 168 +-
arch/arm/dts/sun8i-r40.dtsi | 303 +++-
.../dts/sun8i-reference-design-tablet.dtsi | 59 +-
arch/arm/dts/sun8i-v40-bananapi-m2-berry.dts | 50 +
include/dt-bindings/clock/sun4i-a10-ccu.h | 202 +++
include/dt-bindings/clock/sun5i-ccu.h | 106 ++
include/dt-bindings/clock/sun6i-a31-ccu.h | 191 +++
include/dt-bindings/clock/sun7i-a20-ccu.h | 53 +
include/dt-bindings/clock/sun8i-a83t-ccu.h | 140 ++
include/dt-bindings/reset/sun4i-a10-ccu.h | 69 +
include/dt-bindings/reset/sun5i-ccu.h | 32 +
include/dt-bindings/reset/sun6i-a31-ccu.h | 106 ++
include/dt-bindings/reset/sun8i-a83t-ccu.h | 98 ++
122 files changed, 8374 insertions(+), 6154 deletions(-)
create mode 100644 arch/arm/dts/axp81x.dtsi
create mode 100644 include/dt-bindings/clock/sun4i-a10-ccu.h
create mode 100644 include/dt-bindings/clock/sun5i-ccu.h
create mode 100644 include/dt-bindings/clock/sun6i-a31-ccu.h
create mode 100644 include/dt-bindings/clock/sun7i-a20-ccu.h
create mode 100644 include/dt-bindings/clock/sun8i-a83t-ccu.h
create mode 100644 include/dt-bindings/reset/sun4i-a10-ccu.h
create mode 100644 include/dt-bindings/reset/sun5i-ccu.h
create mode 100644 include/dt-bindings/reset/sun6i-a31-ccu.h
create mode 100644 include/dt-bindings/reset/sun8i-a83t-ccu.h
--
2.18.0.321.gffc6fa0e3
^ permalink raw reply [flat|nested] 11+ messages in thread
* [U-Boot] [PATCH v2 1/7] ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3
2018-08-09 13:08 [U-Boot] [PATCH v2 0/7] ARM: dts: sunxi: Update dts(i) files from Linux-v4.18-rc3 Jagan Teki
@ 2018-08-09 13:08 ` Jagan Teki
2018-08-09 13:08 ` [U-Boot] [PATCH v2 2/7] ARM: dts: sun5i: Update A10s/A13/gr8/r8 " Jagan Teki
` (6 subsequent siblings)
7 siblings, 0 replies; 11+ messages in thread
From: Jagan Teki @ 2018-08-09 13:08 UTC (permalink / raw)
To: u-boot
Update all A10 devicetree dtsi and dtsi files from Linux-v4.18-rc3
with below commit:
commit 590b0c0cfc6162aeebbf43eaafb9753b56df1532
Author: Pascal Roeleven <dev@pascalroeleven.nl>
Date: Fri Apr 20 12:21:12 2018 +0200
ARM: dts: sun4i: Fix incorrect clocks for displays
Note: Update pinctrl-0 for sun4i-a10-inet-3f.dts, sun4i-a10-inet-3w.dts
like other dts file since there dts file are U-Boot specific.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
---
arch/arm/dts/axp209.dtsi | 17 +-
arch/arm/dts/sun4i-a10-a1000.dts | 61 +-
arch/arm/dts/sun4i-a10-ba10-tvbox.dts | 23 +-
arch/arm/dts/sun4i-a10-chuwi-v7-cw0825.dts | 37 +-
arch/arm/dts/sun4i-a10-cubieboard.dts | 67 +-
arch/arm/dts/sun4i-a10-dserve-dsrv9703c.dts | 76 +-
arch/arm/dts/sun4i-a10-gemei-g9.dts | 28 +-
arch/arm/dts/sun4i-a10-hackberry.dts | 32 +-
arch/arm/dts/sun4i-a10-hyundai-a7hd.dts | 31 +-
arch/arm/dts/sun4i-a10-inet-3f.dts | 2 +-
arch/arm/dts/sun4i-a10-inet-3w.dts | 2 +-
arch/arm/dts/sun4i-a10-inet1.dts | 58 +-
arch/arm/dts/sun4i-a10-inet97fv2.dts | 41 +-
arch/arm/dts/sun4i-a10-inet9f-rev03.dts | 101 +-
.../dts/sun4i-a10-itead-iteaduino-plus.dts | 24 +-
arch/arm/dts/sun4i-a10-jesurun-q5.dts | 34 +-
arch/arm/dts/sun4i-a10-marsboard.dts | 38 +-
arch/arm/dts/sun4i-a10-mini-xplus.dts | 16 +-
arch/arm/dts/sun4i-a10-mk802.dts | 59 +-
arch/arm/dts/sun4i-a10-mk802ii.dts | 9 +-
arch/arm/dts/sun4i-a10-olinuxino-lime.dts | 75 +-
arch/arm/dts/sun4i-a10-pcduino.dts | 47 +-
arch/arm/dts/sun4i-a10-pcduino2.dts | 11 -
arch/arm/dts/sun4i-a10-pov-protab2-ips9.dts | 89 +-
arch/arm/dts/sun4i-a10.dtsi | 1349 +++++++----------
include/dt-bindings/clock/sun4i-a10-ccu.h | 202 +++
include/dt-bindings/reset/sun4i-a10-ccu.h | 69 +
27 files changed, 1176 insertions(+), 1422 deletions(-)
create mode 100644 include/dt-bindings/clock/sun4i-a10-ccu.h
create mode 100644 include/dt-bindings/reset/sun4i-a10-ccu.h
diff --git a/arch/arm/dts/axp209.dtsi b/arch/arm/dts/axp209.dtsi
index 675bb0f308..0d9ff12bdf 100644
--- a/arch/arm/dts/axp209.dtsi
+++ b/arch/arm/dts/axp209.dtsi
@@ -53,12 +53,27 @@
interrupt-controller;
#interrupt-cells = <1>;
+ ac_power_supply: ac-power-supply {
+ compatible = "x-powers,axp202-ac-power-supply";
+ status = "disabled";
+ };
+
+ axp_adc: adc {
+ compatible = "x-powers,axp209-adc";
+ #io-channel-cells = <1>;
+ };
+
axp_gpio: gpio {
compatible = "x-powers,axp209-gpio";
gpio-controller;
#gpio-cells = <2>;
};
+ battery_power_supply: battery-power-supply {
+ compatible = "x-powers,axp209-battery-power-supply";
+ status = "disabled";
+ };
+
regulators {
/* Default work frequency for buck regulators */
x-powers,dcdc-freq = <1500>;
@@ -97,7 +112,7 @@
};
};
- usb_power_supply: usb_power_supply {
+ usb_power_supply: usb-power-supply {
compatible = "x-powers,axp202-usb-power-supply";
status = "disabled";
};
diff --git a/arch/arm/dts/sun4i-a10-a1000.dts b/arch/arm/dts/sun4i-a10-a1000.dts
index 39e368ec34..6c254ec4c8 100644
--- a/arch/arm/dts/sun4i-a10-a1000.dts
+++ b/arch/arm/dts/sun4i-a10-a1000.dts
@@ -47,7 +47,6 @@
#include "sunxi-common-regulators.dtsi"
#include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/pinctrl/sun4i-a10.h>
/ {
model = "Mele A1000";
@@ -63,8 +62,6 @@
leds {
compatible = "gpio-leds";
- pinctrl-names = "default";
- pinctrl-0 = <&led_pins_a1000>;
red {
label = "a1000:red:usr";
@@ -80,8 +77,6 @@
reg_emac_3v3: emac-3v3 {
compatible = "regulator-fixed";
- pinctrl-names = "default";
- pinctrl-0 = <&emac_power_pin_a1000>;
regulator-name = "emac-3v3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
@@ -117,6 +112,10 @@
status = "okay";
};
+&cpu0 {
+ cpu-supply = <®_dcdc2>;
+};
+
&ehci0 {
status = "okay";
};
@@ -126,8 +125,6 @@
};
&emac {
- pinctrl-names = "default";
- pinctrl-0 = <&emac_pins_a>;
phy = <&phy1>;
status = "okay";
};
@@ -137,8 +134,6 @@
};
&i2c0 {
- pinctrl-names = "default";
- pinctrl-0 = <&i2c0_pins_a>;
status = "okay";
axp209: pmic at 34 {
@@ -153,7 +148,7 @@
&ir0 {
pinctrl-names = "default";
- pinctrl-0 = <&ir0_rx_pins_a>;
+ pinctrl-0 = <&ir0_rx_pins>;
status = "okay";
};
@@ -167,12 +162,9 @@
};
&mmc0 {
- pinctrl-names = "default";
- pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_reference_design>;
vmmc-supply = <®_vcc3v3>;
bus-width = <4>;
- cd-gpios = <&pio 7 1 GPIO_ACTIVE_HIGH>; /* PH1 */
- cd-inverted;
+ cd-gpios = <&pio 7 1 GPIO_ACTIVE_LOW>; /* PH1 */
status = "okay";
};
@@ -184,20 +176,31 @@
status = "okay";
};
-&pio {
- emac_power_pin_a1000: emac_power_pin at 0 {
- allwinner,pins = "PH15";
- allwinner,function = "gpio_out";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
- };
+#include "axp209.dtsi"
- led_pins_a1000: led_pins at 0 {
- allwinner,pins = "PH10", "PH20";
- allwinner,function = "gpio_out";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
- };
+®_dcdc2 {
+ regulator-always-on;
+ regulator-min-microvolt = <1000000>;
+ regulator-max-microvolt = <1400000>;
+ regulator-name = "vdd-cpu";
+};
+
+®_dcdc3 {
+ regulator-always-on;
+ regulator-min-microvolt = <1000000>;
+ regulator-max-microvolt = <1250000>;
+ regulator-name = "vdd-int-dll";
+};
+
+®_ldo1 {
+ regulator-name = "vdd-rtc";
+};
+
+®_ldo2 {
+ regulator-always-on;
+ regulator-min-microvolt = <3000000>;
+ regulator-max-microvolt = <3000000>;
+ regulator-name = "avcc";
};
®_usb1_vbus {
@@ -210,13 +213,13 @@
&spdif {
pinctrl-names = "default";
- pinctrl-0 = <&spdif_tx_pins_a>;
+ pinctrl-0 = <&spdif_tx_pin>;
status = "okay";
};
&uart0 {
pinctrl-names = "default";
- pinctrl-0 = <&uart0_pins_a>;
+ pinctrl-0 = <&uart0_pb_pins>;
status = "okay";
};
diff --git a/arch/arm/dts/sun4i-a10-ba10-tvbox.dts b/arch/arm/dts/sun4i-a10-ba10-tvbox.dts
index f3cb297fd1..38a2c41349 100644
--- a/arch/arm/dts/sun4i-a10-ba10-tvbox.dts
+++ b/arch/arm/dts/sun4i-a10-ba10-tvbox.dts
@@ -68,8 +68,6 @@
};
&emac {
- pinctrl-names = "default";
- pinctrl-0 = <&emac_pins_a>;
phy = <&phy1>;
status = "okay";
};
@@ -79,8 +77,6 @@
};
&i2c0 {
- pinctrl-names = "default";
- pinctrl-0 = <&i2c0_pins_a>;
status = "okay";
axp209: pmic at 34 {
@@ -95,7 +91,7 @@
&ir0 {
pinctrl-names = "default";
- pinctrl-0 = <&ir0_rx_pins_a>;
+ pinctrl-0 = <&ir0_rx_pins>;
status = "okay";
};
@@ -108,12 +104,9 @@
};
&mmc0 {
- pinctrl-names = "default";
- pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_reference_design>;
vmmc-supply = <®_vcc3v3>;
bus-width = <4>;
- cd-gpios = <&pio 7 1 GPIO_ACTIVE_HIGH>; /* PH1 */
- cd-inverted;
+ cd-gpios = <&pio 7 1 GPIO_ACTIVE_LOW>; /* PH1 */
status = "okay";
};
@@ -121,20 +114,10 @@
status = "okay";
};
-&ohci1 {
- status = "okay";
-};
-
&otg_sram {
status = "okay";
};
-&pio {
- usb2_vbus_pin_a: usb2_vbus_pin at 0 {
- allwinner,pins = "PH12";
- };
-};
-
®_usb0_vbus {
regulator-boot-on;
status = "okay";
@@ -151,7 +134,7 @@
&uart0 {
pinctrl-names = "default";
- pinctrl-0 = <&uart0_pins_a>;
+ pinctrl-0 = <&uart0_pb_pins>;
status = "okay";
};
diff --git a/arch/arm/dts/sun4i-a10-chuwi-v7-cw0825.dts b/arch/arm/dts/sun4i-a10-chuwi-v7-cw0825.dts
index 023b03efa5..cf7b392dff 100644
--- a/arch/arm/dts/sun4i-a10-chuwi-v7-cw0825.dts
+++ b/arch/arm/dts/sun4i-a10-chuwi-v7-cw0825.dts
@@ -65,8 +65,6 @@
};
&i2c0 {
- pinctrl-names = "default";
- pinctrl-0 = <&i2c0_pins_a>;
status = "okay";
axp209: pmic at 34 {
@@ -80,14 +78,10 @@
};
&i2c1 {
- pinctrl-names = "default";
- pinctrl-0 = <&i2c1_pins_a>;
status = "okay";
};
&i2c2 {
- pinctrl-names = "default";
- pinctrl-0 = <&i2c2_pins_a>;
status = "okay";
ft5306de4: touchscreen at 38 {
@@ -104,21 +98,21 @@
vref-supply = <®_vcc3v0>;
status = "okay";
- button at 800 {
+ button-800 {
label = "Volume Up";
linux,code = <KEY_VOLUMEUP>;
channel = <0>;
voltage = <800000>;
};
- button at 1000 {
+ button-1000 {
label = "Volume Down";
linux,code = <KEY_VOLUMEDOWN>;
channel = <0>;
voltage = <1000000>;
};
- button at 1200 {
+ button-1200 {
label = "Back";
linux,code = <KEY_BACK>;
channel = <0>;
@@ -127,12 +121,9 @@
};
&mmc0 {
- pinctrl-names = "default";
- pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_reference_design>;
vmmc-supply = <®_vcc3v3>;
bus-width = <4>;
- cd-gpios = <&pio 7 1 GPIO_ACTIVE_HIGH>; /* PH1 */
- cd-inverted;
+ cd-gpios = <&pio 7 1 GPIO_ACTIVE_LOW>; /* PH1 */
status = "okay";
};
@@ -141,18 +132,16 @@
};
&pio {
- usb0_id_detect_pin: usb0_id_detect_pin at 0 {
- allwinner,pins = "PH4";
- allwinner,function = "gpio_in";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+ usb0_id_detect_pin: usb0-id-detect-pin {
+ pins = "PH4";
+ function = "gpio_in";
+ bias-pull-up;
};
- usb0_vbus_detect_pin: usb0_vbus_detect_pin at 0 {
- allwinner,pins = "PH5";
- allwinner,function = "gpio_in";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_PULL_DOWN>;
+ usb0_vbus_detect_pin: usb0-vbus-detect-pin {
+ pins = "PH5";
+ function = "gpio_in";
+ bias-pull-down;
};
};
@@ -166,7 +155,7 @@
&uart0 {
pinctrl-names = "default";
- pinctrl-0 = <&uart0_pins_a>;
+ pinctrl-0 = <&uart0_pb_pins>;
status = "okay";
};
diff --git a/arch/arm/dts/sun4i-a10-cubieboard.dts b/arch/arm/dts/sun4i-a10-cubieboard.dts
index 710e2ef516..197a1f2b75 100644
--- a/arch/arm/dts/sun4i-a10-cubieboard.dts
+++ b/arch/arm/dts/sun4i-a10-cubieboard.dts
@@ -46,7 +46,6 @@
#include "sunxi-common-regulators.dtsi"
#include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/pinctrl/sun4i-a10.h>
/ {
model = "Cubietech Cubieboard";
@@ -60,6 +59,17 @@
stdout-path = "serial0:115200n8";
};
+ hdmi-connector {
+ compatible = "hdmi-connector";
+ type = "a";
+
+ port {
+ hdmi_con_in: endpoint {
+ remote-endpoint = <&hdmi_out_con>;
+ };
+ };
+ };
+
leds {
compatible = "gpio-leds";
pinctrl-names = "default";
@@ -91,6 +101,10 @@
cpu-supply = <®_dcdc2>;
};
+&de {
+ status = "okay";
+};
+
&ehci0 {
status = "okay";
};
@@ -100,8 +114,6 @@
};
&emac {
- pinctrl-names = "default";
- pinctrl-0 = <&emac_pins_a>;
phy = <&phy1>;
status = "okay";
};
@@ -110,9 +122,17 @@
status = "okay";
};
+&hdmi {
+ status = "okay";
+};
+
+&hdmi_out {
+ hdmi_out_con: endpoint {
+ remote-endpoint = <&hdmi_con_in>;
+ };
+};
+
&i2c0 {
- pinctrl-names = "default";
- pinctrl-0 = <&i2c0_pins_a>;
status = "okay";
axp209: pmic at 34 {
@@ -122,14 +142,12 @@
};
&i2c1 {
- pinctrl-names = "default";
- pinctrl-0 = <&i2c1_pins_a>;
status = "okay";
};
&ir0 {
pinctrl-names = "default";
- pinctrl-0 = <&ir0_rx_pins_a>;
+ pinctrl-0 = <&ir0_rx_pins>;
status = "okay";
};
@@ -142,12 +160,9 @@
};
&mmc0 {
- pinctrl-names = "default";
- pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_reference_design>;
vmmc-supply = <®_vcc3v3>;
bus-width = <4>;
- cd-gpios = <&pio 7 1 GPIO_ACTIVE_HIGH>; /* PH1 */
- cd-inverted;
+ cd-gpios = <&pio 7 1 GPIO_ACTIVE_LOW>; /* PH1 */
status = "okay";
};
@@ -164,18 +179,16 @@
};
&pio {
- led_pins_cubieboard: led_pins at 0 {
- allwinner,pins = "PH20", "PH21";
- allwinner,function = "gpio_out";
- allwinner,drive = <SUN4I_PINCTRL_20_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ led_pins_cubieboard: led-pins {
+ pins = "PH20", "PH21";
+ function = "gpio_out";
+ drive-strength = <20>;
};
- usb0_id_detect_pin: usb0_id_detect_pin at 0 {
- allwinner,pins = "PH4";
- allwinner,function = "gpio_in";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+ usb0_id_detect_pin: usb0-id-detect-pin {
+ pins = "PH4";
+ function = "gpio_in";
+ bias-pull-up;
};
};
@@ -185,6 +198,10 @@
#include "axp209.dtsi"
+&ac_power_supply {
+ status = "okay";
+};
+
®_dcdc2 {
regulator-always-on;
regulator-min-microvolt = <1000000>;
@@ -220,14 +237,14 @@
&spi0 {
pinctrl-names = "default";
- pinctrl-0 = <&spi0_pins_a>,
- <&spi0_cs0_pins_a>;
+ pinctrl-0 = <&spi0_pi_pins>,
+ <&spi0_cs0_pi_pin>;
status = "okay";
};
&uart0 {
pinctrl-names = "default";
- pinctrl-0 = <&uart0_pins_a>;
+ pinctrl-0 = <&uart0_pb_pins>;
status = "okay";
};
diff --git a/arch/arm/dts/sun4i-a10-dserve-dsrv9703c.dts b/arch/arm/dts/sun4i-a10-dserve-dsrv9703c.dts
index 893497e397..896e27a087 100644
--- a/arch/arm/dts/sun4i-a10-dserve-dsrv9703c.dts
+++ b/arch/arm/dts/sun4i-a10-dserve-dsrv9703c.dts
@@ -46,7 +46,6 @@
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/interrupt-controller/irq.h>
-#include <dt-bindings/pinctrl/sun4i-a10.h>
#include <dt-bindings/pwm/pwm.h>
/ {
@@ -59,8 +58,6 @@
backlight: backlight {
compatible = "pwm-backlight";
- pinctrl-names = "default";
- pinctrl-0 = <&bl_en_pin_dsrv9703c>;
pwms = <&pwm 0 50000 PWM_POLARITY_INVERTED>;
brightness-levels = <0 10 20 30 40 50 60 70 80 90 100>;
default-brightness-level = <8>;
@@ -78,10 +75,8 @@
max-microvolt = <3000000>;
};
- reg_motor: reg_motor {
+ reg_motor: reg-motor {
compatible = "regulator-fixed";
- pinctrl-names = "default";
- pinctrl-0 = <&motor_pins>;
regulator-name = "vcc-motor";
regulator-min-microvolt = <3000000>;
regulator-max-microvolt = <3000000>;
@@ -91,8 +86,6 @@
};
&codec {
- pinctrl-names = "default";
- pinctrl-0 = <&codec_pa_pin>;
allwinner,pa-gpios = <&pio 7 15 GPIO_ACTIVE_HIGH>; /* PH15 */
status = "okay";
};
@@ -106,8 +99,6 @@
};
&i2c0 {
- pinctrl-names = "default";
- pinctrl-0 = <&i2c0_pins_a>;
status = "okay";
axp209: pmic at 34 {
@@ -119,15 +110,11 @@
#include "axp209.dtsi"
&i2c1 {
- pinctrl-names = "default";
- pinctrl-0 = <&i2c1_pins_a>;
/* pull-ups and devices require AXP209 LDO3 */
status = "failed";
};
&i2c2 {
- pinctrl-names = "default";
- pinctrl-0 = <&i2c2_pins_a>;
status = "okay";
ft5406ee8: touchscreen at 38 {
@@ -135,8 +122,6 @@
reg = <0x38>;
interrupt-parent = <&pio>;
interrupts = <7 21 IRQ_TYPE_EDGE_FALLING>;
- pinctrl-names = "default";
- pinctrl-0 = <&touchscreen_pins>;
reset-gpios = <&pio 1 13 GPIO_ACTIVE_LOW>;
touchscreen-size-x = <1024>;
touchscreen-size-y = <768>;
@@ -147,14 +132,14 @@
vref-supply = <®_ldo2>;
status = "okay";
- button at 400 {
+ button-400 {
label = "Volume Down";
linux,code = <KEY_VOLUMEDOWN>;
channel = <0>;
voltage = <400000>;
};
- button at 800 {
+ button-800 {
label = "Volume Up";
linux,code = <KEY_VOLUMEUP>;
channel = <0>;
@@ -163,12 +148,9 @@
};
&mmc0 {
- pinctrl-names = "default";
- pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_reference_design>;
vmmc-supply = <®_vcc3v3>;
bus-width = <4>;
- cd-gpios = <&pio 7 1 GPIO_ACTIVE_HIGH>; /* PH1 */
- cd-inverted;
+ cd-gpios = <&pio 7 1 GPIO_ACTIVE_LOW>; /* PH1 */
status = "okay";
};
@@ -177,52 +159,22 @@
};
&pio {
- bl_en_pin_dsrv9703c: bl_en_pin at 0 {
- allwinner,pins = "PH7";
- allwinner,function = "gpio_out";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
- };
-
- codec_pa_pin: codec_pa_pin at 0 {
- allwinner,pins = "PH15";
- allwinner,function = "gpio_out";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
- };
-
- motor_pins: motor_pins at 0 {
- allwinner,pins = "PB3";
- allwinner,function = "gpio_out";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
- };
-
- touchscreen_pins: touchscreen_pins at 0 {
- allwinner,pins = "PB13";
- allwinner,function = "gpio_out";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
- };
-
- usb0_id_detect_pin: usb0_id_detect_pin at 0 {
- allwinner,pins = "PH4";
- allwinner,function = "gpio_in";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+ usb0_id_detect_pin: usb0-id-detect-pin {
+ pins = "PH4";
+ function = "gpio_in";
+ bias-pull-up;
};
- usb0_vbus_detect_pin: usb0_vbus_detect_pin at 0 {
- allwinner,pins = "PH5";
- allwinner,function = "gpio_in";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_PULL_DOWN>;
+ usb0_vbus_detect_pin: usb0-vbus-detect-pin {
+ pins = "PH5";
+ function = "gpio_in";
+ bias-pull-down;
};
};
&pwm {
pinctrl-names = "default";
- pinctrl-0 = <&pwm0_pins_a>;
+ pinctrl-0 = <&pwm0_pin>;
status = "okay";
};
@@ -261,7 +213,7 @@
&uart0 {
pinctrl-names = "default";
- pinctrl-0 = <&uart0_pins_a>;
+ pinctrl-0 = <&uart0_pb_pins>;
status = "okay";
};
diff --git a/arch/arm/dts/sun4i-a10-gemei-g9.dts b/arch/arm/dts/sun4i-a10-gemei-g9.dts
index ac64781a0a..ea7a59dcf8 100644
--- a/arch/arm/dts/sun4i-a10-gemei-g9.dts
+++ b/arch/arm/dts/sun4i-a10-gemei-g9.dts
@@ -72,8 +72,6 @@
*/
&codec {
/* PH15 controls power to external amplifier (ft2012q) */
- pinctrl-names = "default";
- pinctrl-0 = <&codec_pa_pin>;
allwinner,pa-gpios = <&pio 7 15 GPIO_ACTIVE_HIGH>;
status = "okay";
};
@@ -91,8 +89,6 @@
};
&i2c0 {
- pinctrl-names = "default";
- pinctrl-0 = <&i2c0_pins_a>;
status = "okay";
axp209: pmic at 34 {
@@ -104,8 +100,6 @@
#include "axp209.dtsi"
&i2c1 {
- pinctrl-names = "default";
- pinctrl-0 = <&i2c1_pins_a>;
status = "okay";
/* Accelerometer */
@@ -122,21 +116,21 @@
status = "okay";
- button at 158 {
+ button-158 {
label = "Volume Down";
linux,code = <KEY_VOLUMEDOWN>;
channel = <0>;
voltage = <158730>;
};
- button at 349 {
+ button-349 {
label = "Volume Up";
linux,code = <KEY_VOLUMEUP>;
channel = <0>;
voltage = <349206>;
};
- button at 1142 {
+ button-1142 {
label = "Esc";
linux,code = <KEY_ESC>;
channel = <0>;
@@ -145,24 +139,12 @@
};
&mmc0 {
- pinctrl-names = "default";
- pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_reference_design>;
vmmc-supply = <®_vcc3v3>;
bus-width = <4>;
- cd-gpios = <&pio 7 1 GPIO_ACTIVE_HIGH>; /* PH01 */
- cd-inverted;
+ cd-gpios = <&pio 7 1 GPIO_ACTIVE_LOW>; /* PH01 */
status = "okay";
};
-&pio {
- codec_pa_pin: codec_pa_pin at 0 {
- allwinner,pins = "PH15";
- allwinner,function = "gpio_out";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
- };
-};
-
®_dcdc2 {
regulator-always-on;
regulator-min-microvolt = <1000000>;
@@ -199,7 +181,7 @@
&uart0 {
pinctrl-names = "default";
- pinctrl-0 = <&uart0_pins_a>;
+ pinctrl-0 = <&uart0_pb_pins>;
status = "okay";
};
diff --git a/arch/arm/dts/sun4i-a10-hackberry.dts b/arch/arm/dts/sun4i-a10-hackberry.dts
index 6de83a6187..cc988ccd5c 100644
--- a/arch/arm/dts/sun4i-a10-hackberry.dts
+++ b/arch/arm/dts/sun4i-a10-hackberry.dts
@@ -47,7 +47,6 @@
#include "sunxi-common-regulators.dtsi"
#include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/pinctrl/sun4i-a10.h>
/ {
model = "Miniand Hackberry";
@@ -81,8 +80,6 @@
};
&emac {
- pinctrl-names = "default";
- pinctrl-0 = <&emac_pins_a>;
phy = <&phy0>;
status = "okay";
};
@@ -93,7 +90,7 @@
&ir0 {
pinctrl-names = "default";
- pinctrl-0 = <&ir0_rx_pins_a>;
+ pinctrl-0 = <&ir0_rx_pins>;
status = "okay";
};
@@ -107,12 +104,9 @@
};
&mmc0 {
- pinctrl-names = "default";
- pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_reference_design>;
vmmc-supply = <®_vcc3v3>;
bus-width = <4>;
- cd-gpios = <&pio 7 1 GPIO_ACTIVE_HIGH>; /* PH1 */
- cd-inverted;
+ cd-gpios = <&pio 7 1 GPIO_ACTIVE_LOW>; /* PH1 */
status = "okay";
};
@@ -124,31 +118,11 @@
status = "okay";
};
-&pio {
- pinctrl-names = "default";
- pinctrl-0 = <&hackberry_hogs>;
-
- hackberry_hogs: hogs at 0 {
- allwinner,pins = "PH19";
- allwinner,function = "gpio_out";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
- };
-
- usb2_vbus_pin_hackberry: usb2_vbus_pin at 0 {
- allwinner,pins = "PH12";
- allwinner,function = "gpio_out";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
- };
-};
-
®_usb1_vbus {
status = "okay";
};
®_usb2_vbus {
- pinctrl-0 = <&usb2_vbus_pin_hackberry>;
gpio = <&pio 7 12 GPIO_ACTIVE_HIGH>;
status = "okay";
};
@@ -161,6 +135,6 @@
&uart0 {
pinctrl-names = "default";
- pinctrl-0 = <&uart0_pins_a>;
+ pinctrl-0 = <&uart0_pb_pins>;
status = "okay";
};
diff --git a/arch/arm/dts/sun4i-a10-hyundai-a7hd.dts b/arch/arm/dts/sun4i-a10-hyundai-a7hd.dts
index 9103864fef..f63767cddd 100644
--- a/arch/arm/dts/sun4i-a10-hyundai-a7hd.dts
+++ b/arch/arm/dts/sun4i-a10-hyundai-a7hd.dts
@@ -63,8 +63,6 @@
};
&i2c0 {
- pinctrl-names = "default";
- pinctrl-0 = <&i2c0_pins_a>;
status = "okay";
axp209: pmic at 34 {
@@ -78,12 +76,9 @@
};
&mmc0 {
- pinctrl-names = "default";
- pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_reference_design>;
vmmc-supply = <®_vcc3v3>;
bus-width = <4>;
- cd-gpios = <&pio 7 1 GPIO_ACTIVE_HIGH>; /* PH1 */
- cd-inverted;
+ cd-gpios = <&pio 7 1 GPIO_ACTIVE_LOW>; /* PH1 */
status = "okay";
};
@@ -92,18 +87,16 @@
};
&pio {
- usb0_id_detect_pin: usb0_id_detect_pin at 0 {
- allwinner,pins = "PH4";
- allwinner,function = "gpio_in";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+ usb0_id_detect_pin: usb0-id-detect-pin {
+ pins = "PH4";
+ function = "gpio_in";
+ bias-pull-up;
};
- usb0_vbus_detect_pin: usb0_vbus_detect_pin at 0 {
- allwinner,pins = "PH5";
- allwinner,function = "gpio_in";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_PULL_DOWN>;
+ usb0_vbus_detect_pin: usb0-vbus-detect-pin {
+ pins = "PH5";
+ function = "gpio_in";
+ bias-pull-down;
};
};
@@ -118,14 +111,10 @@
&uart0 {
pinctrl-names = "default";
- pinctrl-0 = <&uart0_pins_a>;
+ pinctrl-0 = <&uart0_pb_pins>;
status = "okay";
};
-&usb2_vbus_pin_a {
- allwinner,pins = "PH6";
-};
-
&usb_otg {
dr_mode = "otg";
status = "okay";
diff --git a/arch/arm/dts/sun4i-a10-inet-3f.dts b/arch/arm/dts/sun4i-a10-inet-3f.dts
index f815b83157..9aa8469a0c 100644
--- a/arch/arm/dts/sun4i-a10-inet-3f.dts
+++ b/arch/arm/dts/sun4i-a10-inet-3f.dts
@@ -23,6 +23,6 @@
&uart0 {
pinctrl-names = "default";
- pinctrl-0 = <&uart0_pins_a>;
+ pinctrl-0 = <&uart0_pb_pins>;
status = "okay";
};
diff --git a/arch/arm/dts/sun4i-a10-inet-3w.dts b/arch/arm/dts/sun4i-a10-inet-3w.dts
index d0267ceee9..33232e94ed 100644
--- a/arch/arm/dts/sun4i-a10-inet-3w.dts
+++ b/arch/arm/dts/sun4i-a10-inet-3w.dts
@@ -23,6 +23,6 @@
&uart0 {
pinctrl-names = "default";
- pinctrl-0 = <&uart0_pins_a>;
+ pinctrl-0 = <&uart0_pb_pins>;
status = "okay";
};
diff --git a/arch/arm/dts/sun4i-a10-inet1.dts b/arch/arm/dts/sun4i-a10-inet1.dts
index e09053bf5e..26d0c1d6a0 100644
--- a/arch/arm/dts/sun4i-a10-inet1.dts
+++ b/arch/arm/dts/sun4i-a10-inet1.dts
@@ -46,7 +46,6 @@
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/interrupt-controller/irq.h>
-#include <dt-bindings/pinctrl/sun4i-a10.h>
#include <dt-bindings/pwm/pwm.h>
/ {
@@ -59,8 +58,6 @@
backlight: backlight {
compatible = "pwm-backlight";
- pinctrl-names = "default";
- pinctrl-0 = <&bl_en_pin_inet>;
pwms = <&pwm 0 50000 PWM_POLARITY_INVERTED>;
brightness-levels = <0 10 20 30 40 50 60 70 80 90 100>;
default-brightness-level = <8>;
@@ -89,8 +86,6 @@
};
&i2c0 {
- pinctrl-names = "default";
- pinctrl-0 = <&i2c0_pins_a>;
status = "okay";
axp209: pmic at 34 {
@@ -102,8 +97,6 @@
#include "axp209.dtsi"
&i2c1 {
- pinctrl-names = "default";
- pinctrl-0 = <&i2c1_pins_a>;
status = "okay";
/* Accelerometer */
@@ -116,8 +109,6 @@
};
&i2c2 {
- pinctrl-names = "default";
- pinctrl-0 = <&i2c2_pins_a>;
status = "okay";
ft5x: touchscreen at 38 {
@@ -125,8 +116,6 @@
reg = <0x38>;
interrupt-parent = <&pio>;
interrupts = <7 21 IRQ_TYPE_EDGE_FALLING>;
- pinctrl-names = "default";
- pinctrl-0 = <&touchscreen_wake_pin>;
wake-gpios = <&pio 1 13 GPIO_ACTIVE_HIGH>; /* PB13 */
touchscreen-size-x = <600>;
touchscreen-size-y = <1024>;
@@ -138,21 +127,21 @@
vref-supply = <®_ldo2>;
status = "okay";
- button at 200 {
+ button-200 {
label = "Volume Up";
linux,code = <KEY_VOLUMEUP>;
channel = <0>;
voltage = <200000>;
};
- button at 1000 {
+ button-1000 {
label = "Volume Down";
linux,code = <KEY_VOLUMEDOWN>;
channel = <0>;
voltage = <1000000>;
};
- button at 1200 {
+ button-1200 {
label = "Home";
linux,code = <KEY_HOMEPAGE>;
channel = <0>;
@@ -161,12 +150,9 @@
};
&mmc0 {
- pinctrl-names = "default";
- pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_reference_design>;
vmmc-supply = <®_vcc3v3>;
bus-width = <4>;
- cd-gpios = <&pio 7 1 GPIO_ACTIVE_HIGH>; /* PH1 */
- cd-inverted;
+ cd-gpios = <&pio 7 1 GPIO_ACTIVE_LOW>; /* PH1 */
status = "okay";
};
@@ -179,38 +165,22 @@
};
&pio {
- bl_en_pin_inet: bl_en_pin at 0 {
- allwinner,pins = "PH7";
- allwinner,function = "gpio_out";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
- };
-
- touchscreen_wake_pin: touchscreen_wake_pin at 0 {
- allwinner,pins = "PB13";
- allwinner,function = "gpio_out";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
- };
-
- usb0_id_detect_pin: usb0_id_detect_pin at 0 {
- allwinner,pins = "PH4";
- allwinner,function = "gpio_in";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+ usb0_id_detect_pin: usb0-id-detect-pin {
+ pins = "PH4";
+ function = "gpio_in";
+ bias-pull-up;
};
- usb0_vbus_detect_pin: usb0_vbus_detect_pin at 0 {
- allwinner,pins = "PH5";
- allwinner,function = "gpio_in";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_PULL_DOWN>;
+ usb0_vbus_detect_pin: usb0-vbus-detect-pin {
+ pins = "PH5";
+ function = "gpio_in";
+ bias-pull-down;
};
};
&pwm {
pinctrl-names = "default";
- pinctrl-0 = <&pwm0_pins_a>;
+ pinctrl-0 = <&pwm0_pin>;
status = "okay";
};
@@ -253,7 +223,7 @@
&uart0 {
pinctrl-names = "default";
- pinctrl-0 = <&uart0_pins_a>;
+ pinctrl-0 = <&uart0_pb_pins>;
status = "okay";
};
diff --git a/arch/arm/dts/sun4i-a10-inet97fv2.dts b/arch/arm/dts/sun4i-a10-inet97fv2.dts
index 04b0d2d1ae..5d096528e7 100644
--- a/arch/arm/dts/sun4i-a10-inet97fv2.dts
+++ b/arch/arm/dts/sun4i-a10-inet97fv2.dts
@@ -72,8 +72,6 @@
};
&i2c0 {
- pinctrl-names = "default";
- pinctrl-0 = <&i2c0_pins_a>;
status = "okay";
axp209: pmic at 34 {
@@ -85,14 +83,10 @@
#include "axp209.dtsi"
&i2c1 {
- pinctrl-names = "default";
- pinctrl-0 = <&i2c1_pins_a>;
status = "okay";
};
&i2c2 {
- pinctrl-names = "default";
- pinctrl-0 = <&i2c2_pins_a>;
status = "okay";
ft5406ee8: touchscreen at 38 {
@@ -109,35 +103,35 @@
vref-supply = <®_ldo2>;
status = "okay";
- button at 200 {
+ button-200 {
label = "Menu";
linux,code = <KEY_MENU>;
channel = <0>;
voltage = <200000>;
};
- button at 600 {
+ button-600 {
label = "Volume Up";
linux,code = <KEY_VOLUMEUP>;
channel = <0>;
voltage = <600000>;
};
- button at 800 {
+ button-800 {
label = "Volume Down";
linux,code = <KEY_VOLUMEDOWN>;
channel = <0>;
voltage = <800000>;
};
- button at 1000 {
+ button-1000 {
label = "Home";
linux,code = <KEY_HOMEPAGE>;
channel = <0>;
voltage = <1000000>;
};
- button at 1200 {
+ button-1200 {
label = "Esc";
linux,code = <KEY_ESC>;
channel = <0>;
@@ -146,12 +140,9 @@
};
&mmc0 {
- pinctrl-names = "default";
- pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_reference_design>;
vmmc-supply = <®_vcc3v3>;
bus-width = <4>;
- cd-gpios = <&pio 7 1 GPIO_ACTIVE_HIGH>; /* PH1 */
- cd-inverted;
+ cd-gpios = <&pio 7 1 GPIO_ACTIVE_LOW>; /* PH1 */
status = "okay";
};
@@ -160,18 +151,16 @@
};
&pio {
- usb0_id_detect_pin: usb0_id_detect_pin at 0 {
- allwinner,pins = "PH4";
- allwinner,function = "gpio_in";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+ usb0_id_detect_pin: usb0-id-detect-pin {
+ pins = "PH4";
+ function = "gpio_in";
+ bias-pull-up;
};
- usb0_vbus_detect_pin: usb0_vbus_detect_pin at 0 {
- allwinner,pins = "PH5";
- allwinner,function = "gpio_in";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_PULL_DOWN>;
+ usb0_vbus_detect_pin: usb0-vbus-detect-pin {
+ pins = "PH5";
+ function = "gpio_in";
+ bias-pull-down;
};
};
@@ -210,7 +199,7 @@
&uart0 {
pinctrl-names = "default";
- pinctrl-0 = <&uart0_pins_a>;
+ pinctrl-0 = <&uart0_pb_pins>;
status = "okay";
};
diff --git a/arch/arm/dts/sun4i-a10-inet9f-rev03.dts b/arch/arm/dts/sun4i-a10-inet9f-rev03.dts
index bba4f9cf9b..221acd10f6 100644
--- a/arch/arm/dts/sun4i-a10-inet9f-rev03.dts
+++ b/arch/arm/dts/sun4i-a10-inet9f-rev03.dts
@@ -46,7 +46,6 @@
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/interrupt-controller/irq.h>
-#include <dt-bindings/pinctrl/sun4i-a10.h>
/ {
model = "iNet-9F Rev 03";
@@ -60,7 +59,7 @@
stdout-path = "serial0:115200n8";
};
- gpio_keys {
+ gpio-keys {
compatible = "gpio-keys-polled";
pinctrl-names = "default";
pinctrl-0 = <&key_pins_inet9f>;
@@ -68,7 +67,7 @@
#size-cells = <0>;
poll-interval = <20>;
- button at 0 {
+ left-joystick-left {
label = "Left Joystick Left";
linux,code = <ABS_X>;
linux,input-type = <EV_ABS>;
@@ -76,7 +75,7 @@
gpios = <&pio 0 6 GPIO_ACTIVE_LOW>; /* PA6 */
};
- button at 1 {
+ left-joystick-right {
label = "Left Joystick Right";
linux,code = <ABS_X>;
linux,input-type = <EV_ABS>;
@@ -84,7 +83,7 @@
gpios = <&pio 0 5 GPIO_ACTIVE_LOW>; /* PA5 */
};
- button at 2 {
+ left-joystick-up {
label = "Left Joystick Up";
linux,code = <ABS_Y>;
linux,input-type = <EV_ABS>;
@@ -92,7 +91,7 @@
gpios = <&pio 0 8 GPIO_ACTIVE_LOW>; /* PA8 */
};
- button at 3 {
+ left-joystick-down {
label = "Left Joystick Down";
linux,code = <ABS_Y>;
linux,input-type = <EV_ABS>;
@@ -100,7 +99,7 @@
gpios = <&pio 0 9 GPIO_ACTIVE_LOW>; /* PA9 */
};
- button at 4 {
+ right-joystick-left {
label = "Right Joystick Left";
linux,code = <ABS_Z>;
linux,input-type = <EV_ABS>;
@@ -108,7 +107,7 @@
gpios = <&pio 0 1 GPIO_ACTIVE_LOW>; /* PA1 */
};
- button at 5 {
+ right-joystick-right {
label = "Right Joystick Right";
linux,code = <ABS_Z>;
linux,input-type = <EV_ABS>;
@@ -116,7 +115,7 @@
gpios = <&pio 0 0 GPIO_ACTIVE_LOW>; /* PA0 */
};
- button at 6 {
+ right-joystick-up {
label = "Right Joystick Up";
linux,code = <ABS_RZ>;
linux,input-type = <EV_ABS>;
@@ -124,7 +123,7 @@
gpios = <&pio 0 3 GPIO_ACTIVE_LOW>; /* PA3 */
};
- button at 7 {
+ right-joystick-down {
label = "Right Joystick Down";
linux,code = <ABS_RZ>;
linux,input-type = <EV_ABS>;
@@ -132,7 +131,7 @@
gpios = <&pio 0 4 GPIO_ACTIVE_LOW>; /* PA4 */
};
- button at 8 {
+ dpad-left {
label = "DPad Left";
linux,code = <ABS_HAT0X>;
linux,input-type = <EV_ABS>;
@@ -140,7 +139,7 @@
gpios = <&pio 7 23 GPIO_ACTIVE_LOW>; /* PH23 */
};
- button at 9 {
+ dpad-right {
label = "DPad Right";
linux,code = <ABS_HAT0X>;
linux,input-type = <EV_ABS>;
@@ -148,7 +147,7 @@
gpios = <&pio 7 24 GPIO_ACTIVE_LOW>; /* PH24 */
};
- button at 10 {
+ dpad-up {
label = "DPad Up";
linux,code = <ABS_HAT0Y>;
linux,input-type = <EV_ABS>;
@@ -156,7 +155,7 @@
gpios = <&pio 7 25 GPIO_ACTIVE_LOW>; /* PH25 */
};
- button at 11 {
+ dpad-down {
label = "DPad Down";
linux,code = <ABS_HAT0Y>;
linux,input-type = <EV_ABS>;
@@ -164,49 +163,49 @@
gpios = <&pio 7 26 GPIO_ACTIVE_LOW>; /* PH26 */
};
- button at 12 {
+ x {
label = "Button X";
linux,code = <BTN_X>;
gpios = <&pio 0 16 GPIO_ACTIVE_LOW>; /* PA16 */
};
- button at 13 {
+ y {
label = "Button Y";
linux,code = <BTN_Y>;
gpios = <&pio 0 14 GPIO_ACTIVE_LOW>; /* PA14 */
};
- button at 14 {
+ a {
label = "Button A";
linux,code = <BTN_A>;
gpios = <&pio 0 17 GPIO_ACTIVE_LOW>; /* PA17 */
};
- button at 15 {
+ b {
label = "Button B";
linux,code = <BTN_B>;
gpios = <&pio 0 15 GPIO_ACTIVE_LOW>; /* PA15 */
};
- button at 16 {
+ select {
label = "Select Button";
linux,code = <BTN_SELECT>;
gpios = <&pio 0 11 GPIO_ACTIVE_LOW>; /* PA11 */
};
- button at 17 {
+ start {
label = "Start Button";
linux,code = <BTN_START>;
gpios = <&pio 0 12 GPIO_ACTIVE_LOW>; /* PA12 */
};
- button at 18 {
+ top-left {
label = "Top Left Button";
linux,code = <BTN_TL>;
gpios = <&pio 7 22 GPIO_ACTIVE_LOW>; /* PH22 */
};
- button at 19 {
+ top-right {
label = "Top Right Button";
linux,code = <BTN_TR>;
gpios = <&pio 0 13 GPIO_ACTIVE_LOW>; /* PA13 */
@@ -223,8 +222,6 @@
};
&i2c0 {
- pinctrl-names = "default";
- pinctrl-0 = <&i2c0_pins_a>;
status = "okay";
axp209: pmic at 34 {
@@ -236,8 +233,6 @@
#include "axp209.dtsi"
&i2c1 {
- pinctrl-names = "default";
- pinctrl-0 = <&i2c1_pins_a>;
status = "okay";
/* Accelerometer */
@@ -250,8 +245,6 @@
};
&i2c2 {
- pinctrl-names = "default";
- pinctrl-0 = <&i2c2_pins_a>;
status = "okay";
ft5406ee8: touchscreen at 38 {
@@ -268,35 +261,35 @@
vref-supply = <®_ldo2>;
status = "okay";
- button at 200 {
+ button-200 {
label = "Menu";
linux,code = <KEY_MENU>;
channel = <0>;
voltage = <200000>;
};
- button at 600 {
+ button-600 {
label = "Volume Up";
linux,code = <KEY_VOLUMEUP>;
channel = <0>;
voltage = <600000>;
};
- button at 800 {
+ button-800 {
label = "Volume Down";
linux,code = <KEY_VOLUMEDOWN>;
channel = <0>;
voltage = <800000>;
};
- button at 1000 {
+ button-1000 {
label = "Home";
linux,code = <KEY_HOMEPAGE>;
channel = <0>;
voltage = <1000000>;
};
- button at 1200 {
+ button-1200 {
label = "Esc";
linux,code = <KEY_ESC>;
channel = <0>;
@@ -305,12 +298,9 @@
};
&mmc0 {
- pinctrl-names = "default";
- pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_reference_design>;
vmmc-supply = <®_vcc3v3>;
bus-width = <4>;
- cd-gpios = <&pio 7 1 GPIO_ACTIVE_HIGH>; /* PH1 */
- cd-inverted;
+ cd-gpios = <&pio 7 1 GPIO_ACTIVE_LOW>; /* PH1 */
status = "okay";
};
@@ -319,29 +309,26 @@
};
&pio {
- key_pins_inet9f: key_pins at 0 {
- allwinner,pins = "PA0", "PA1", "PA3", "PA4",
- "PA5", "PA6", "PA8", "PA9",
- "PA11", "PA12", "PA13",
- "PA14", "PA15", "PA16", "PA17",
- "PH22", "PH23", "PH24", "PH25", "PH26";
- allwinner,function = "gpio_in";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+ key_pins_inet9f: key-pins {
+ pins = "PA0", "PA1", "PA3", "PA4",
+ "PA5", "PA6", "PA8", "PA9",
+ "PA11", "PA12", "PA13",
+ "PA14", "PA15", "PA16", "PA17",
+ "PH22", "PH23", "PH24", "PH25", "PH26";
+ function = "gpio_in";
+ bias-pull-up;
};
- usb0_id_detect_pin: usb0_id_detect_pin at 0 {
- allwinner,pins = "PH4";
- allwinner,function = "gpio_in";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+ usb0_id_detect_pin: usb0-id-detect-pin {
+ pins = "PH4";
+ function = "gpio_in";
+ bias-pull-up;
};
- usb0_vbus_detect_pin: usb0_vbus_detect_pin at 0 {
- allwinner,pins = "PH5";
- allwinner,function = "gpio_in";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_PULL_DOWN>;
+ usb0_vbus_detect_pin: usb0-vbus-detect-pin {
+ pins = "PH5";
+ function = "gpio_in";
+ bias-pull-down;
};
};
@@ -380,7 +367,7 @@
&uart0 {
pinctrl-names = "default";
- pinctrl-0 = <&uart0_pins_a>;
+ pinctrl-0 = <&uart0_pb_pins>;
status = "okay";
};
diff --git a/arch/arm/dts/sun4i-a10-itead-iteaduino-plus.dts b/arch/arm/dts/sun4i-a10-itead-iteaduino-plus.dts
index 4e798f014c..80ecd78247 100644
--- a/arch/arm/dts/sun4i-a10-itead-iteaduino-plus.dts
+++ b/arch/arm/dts/sun4i-a10-itead-iteaduino-plus.dts
@@ -57,7 +57,7 @@
&emac {
pinctrl-names = "default";
- pinctrl-0 = <&emac_pins_a>;
+ pinctrl-0 = <&emac_pins>;
phy = <&phy1>;
status = "okay";
};
@@ -67,6 +67,9 @@
};
&i2c0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c0_pins>;
+
axp209: pmic at 34 {
interrupts = <0>;
};
@@ -74,19 +77,19 @@
&i2c1 {
pinctrl-names = "default";
- pinctrl-0 = <&i2c1_pins_a>;
+ pinctrl-0 = <&i2c1_pins>;
status = "okay";
};
&i2c2 {
pinctrl-names = "default";
- pinctrl-0 = <&i2c2_pins_a>;
+ pinctrl-0 = <&i2c2_pins>;
status = "okay";
};
&ir0 {
pinctrl-names = "default";
- pinctrl-0 = <&ir0_rx_pins_a>;
+ pinctrl-0 = <&ir0_rx_pins>;
status = "okay";
};
@@ -100,11 +103,10 @@
&mmc0 {
pinctrl-names = "default";
- pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_reference_design>;
+ pinctrl-0 = <&mmc0_pins>;
vmmc-supply = <®_vcc3v3>;
bus-width = <4>;
- cd-gpios = <&pio 7 1 GPIO_ACTIVE_HIGH>; /* PH1 */
- cd-inverted;
+ cd-gpios = <&pio 7 1 GPIO_ACTIVE_LOW>; /* PH1 */
status = "okay";
};
@@ -114,7 +116,11 @@
&spi0 {
pinctrl-names = "default";
- pinctrl-0 = <&spi0_pins_a>,
- <&spi0_cs0_pins_a>;
+ pinctrl-0 = <&spi0_pi_pins>,
+ <&spi0_cs0_pi_pin>;
status = "okay";
};
+
+&uart0 {
+ pinctrl-0 = <&uart0_pb_pins>;
+};
diff --git a/arch/arm/dts/sun4i-a10-jesurun-q5.dts b/arch/arm/dts/sun4i-a10-jesurun-q5.dts
index e28f080b1f..247fa27ef7 100644
--- a/arch/arm/dts/sun4i-a10-jesurun-q5.dts
+++ b/arch/arm/dts/sun4i-a10-jesurun-q5.dts
@@ -47,7 +47,6 @@
#include "sunxi-common-regulators.dtsi"
#include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/pinctrl/sun4i-a10.h>
/ {
model = "Jesurun Q5";
@@ -63,8 +62,6 @@
leds {
compatible = "gpio-leds";
- pinctrl-names = "default";
- pinctrl-0 = <&led_pins_q5>;
green {
label = "q5:green:usr";
@@ -75,8 +72,6 @@
reg_emac_3v3: emac-3v3 {
compatible = "regulator-fixed";
- pinctrl-names = "default";
- pinctrl-0 = <&emac_power_pin_q5>;
regulator-name = "emac-3v3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
@@ -99,8 +94,6 @@
};
&emac {
- pinctrl-names = "default";
- pinctrl-0 = <&emac_pins_a>;
phy = <&phy1>;
status = "okay";
};
@@ -110,8 +103,6 @@
};
&i2c0 {
- pinctrl-names = "default";
- pinctrl-0 = <&i2c0_pins_a>;
status = "okay";
axp209: pmic at 34 {
@@ -126,7 +117,7 @@
&ir0 {
pinctrl-names = "default";
- pinctrl-0 = <&ir0_rx_pins_a>;
+ pinctrl-0 = <&ir0_rx_pins>;
status = "okay";
};
@@ -140,12 +131,9 @@
};
&mmc0 {
- pinctrl-names = "default";
- pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_reference_design>;
vmmc-supply = <®_vcc3v3>;
bus-width = <4>;
- cd-gpios = <&pio 7 1 GPIO_ACTIVE_HIGH>; /* PH1 */
- cd-inverted;
+ cd-gpios = <&pio 7 1 GPIO_ACTIVE_LOW>; /* PH1 */
status = "okay";
};
@@ -161,22 +149,6 @@
status = "okay";
};
-&pio {
- emac_power_pin_q5: emac_power_pin at 0 {
- allwinner,pins = "PH19";
- allwinner,function = "gpio_out";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
- };
-
- led_pins_q5: led_pins at 0 {
- allwinner,pins = "PH20";
- allwinner,function = "gpio_out";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
- };
-};
-
®_usb0_vbus {
regulator-boot-on;
status = "okay";
@@ -192,7 +164,7 @@
&uart0 {
pinctrl-names = "default";
- pinctrl-0 = <&uart0_pins_a>;
+ pinctrl-0 = <&uart0_pb_pins>;
status = "okay";
};
diff --git a/arch/arm/dts/sun4i-a10-marsboard.dts b/arch/arm/dts/sun4i-a10-marsboard.dts
index 8e50723dbe..0dbf695765 100644
--- a/arch/arm/dts/sun4i-a10-marsboard.dts
+++ b/arch/arm/dts/sun4i-a10-marsboard.dts
@@ -46,7 +46,6 @@
#include "sunxi-common-regulators.dtsi"
#include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/pinctrl/sun4i-a10.h>
/ {
model = "HAOYU Electronics Marsboard A10";
@@ -62,8 +61,6 @@
leds {
compatible = "gpio-leds";
- pinctrl-names = "default";
- pinctrl-0 = <&led_pins_marsboard>;
red1 {
label = "marsboard:red1:usr";
@@ -108,27 +105,19 @@
};
&emac {
- pinctrl-names = "default";
- pinctrl-0 = <&emac_pins_a>;
phy = <&phy1>;
status = "okay";
};
&i2c0 {
- pinctrl-names = "default";
- pinctrl-0 = <&i2c0_pins_a>;
status = "okay";
};
&i2c1 {
- pinctrl-names = "default";
- pinctrl-0 = <&i2c1_pins_a>;
status = "okay";
};
&i2c2 {
- pinctrl-names = "default";
- pinctrl-0 = <&i2c2_pins_a>;
status = "okay";
};
@@ -141,12 +130,9 @@
};
&mmc0 {
- pinctrl-names = "default";
- pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_reference_design>;
vmmc-supply = <®_vcc3v3>;
bus-width = <4>;
- cd-gpios = <&pio 7 1 GPIO_ACTIVE_HIGH>; /* PH1 */
- cd-inverted;
+ cd-gpios = <&pio 7 1 GPIO_ACTIVE_LOW>; /* PH1 */
status = "okay";
};
@@ -163,18 +149,10 @@
};
&pio {
- led_pins_marsboard: led_pins at 0 {
- allwinner,pins = "PB5", "PB6", "PB7", "PB8";
- allwinner,function = "gpio_out";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
- };
-
- usb0_id_detect_pin: usb0_id_detect_pin at 0 {
- allwinner,pins = "PH4";
- allwinner,function = "gpio_in";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+ usb0_id_detect_pin: usb0-id-detect-pin {
+ pins = "PH4";
+ function = "gpio_in";
+ bias-pull-up;
};
};
@@ -188,14 +166,14 @@
&spi0 {
pinctrl-names = "default";
- pinctrl-0 = <&spi0_pins_a>,
- <&spi0_cs0_pins_a>;
+ pinctrl-0 = <&spi0_pi_pins>,
+ <&spi0_cs0_pi_pin>;
status = "okay";
};
&uart0 {
pinctrl-names = "default";
- pinctrl-0 = <&uart0_pins_a>;
+ pinctrl-0 = <&uart0_pb_pins>;
status = "okay";
};
diff --git a/arch/arm/dts/sun4i-a10-mini-xplus.dts b/arch/arm/dts/sun4i-a10-mini-xplus.dts
index a7dd86d30f..f9d74e2103 100644
--- a/arch/arm/dts/sun4i-a10-mini-xplus.dts
+++ b/arch/arm/dts/sun4i-a10-mini-xplus.dts
@@ -47,7 +47,6 @@
#include "sunxi-common-regulators.dtsi"
#include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/pinctrl/sun4i-a10.h>
/ {
model = "PineRiver Mini X-Plus";
@@ -71,8 +70,6 @@
};
&i2c0 {
- pinctrl-names = "default";
- pinctrl-0 = <&i2c0_pins_a>;
status = "okay";
axp209: pmic at 34 {
@@ -87,22 +84,19 @@
&ir0 {
pinctrl-names = "default";
- pinctrl-0 = <&ir0_rx_pins_a>;
+ pinctrl-0 = <&ir0_rx_pins>;
status = "okay";
};
-&ir0_rx_pins_a {
+&ir0_rx_pins {
/* The ir receiver is not always populated */
- allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+ bias-pull-up;
};
&mmc0 {
- pinctrl-names = "default";
- pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_reference_design>;
vmmc-supply = <®_vcc3v3>;
bus-width = <4>;
- cd-gpios = <&pio 7 1 GPIO_ACTIVE_HIGH>; /* PH1 */
- cd-inverted;
+ cd-gpios = <&pio 7 1 GPIO_ACTIVE_LOW>; /* PH1 */
status = "okay";
};
@@ -133,7 +127,7 @@
&uart0 {
pinctrl-names = "default";
- pinctrl-0 = <&uart0_pins_a>;
+ pinctrl-0 = <&uart0_pb_pins>;
status = "okay";
};
diff --git a/arch/arm/dts/sun4i-a10-mk802.dts b/arch/arm/dts/sun4i-a10-mk802.dts
index ee46ea8548..059fe9c5d0 100644
--- a/arch/arm/dts/sun4i-a10-mk802.dts
+++ b/arch/arm/dts/sun4i-a10-mk802.dts
@@ -44,7 +44,6 @@
#include "sun4i-a10.dtsi"
#include "sunxi-common-regulators.dtsi"
#include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/pinctrl/sun4i-a10.h>
/ {
model = "MK802";
@@ -57,12 +56,27 @@
chosen {
stdout-path = "serial0:115200n8";
};
+
+ hdmi-connector {
+ compatible = "hdmi-connector";
+ type = "a";
+
+ port {
+ hdmi_con_in: endpoint {
+ remote-endpoint = <&hdmi_out_con>;
+ };
+ };
+ };
};
&codec {
status = "okay";
};
+&de {
+ status = "okay";
+};
+
&ehci0 {
status = "okay";
};
@@ -71,13 +85,20 @@
status = "okay";
};
+&hdmi {
+ status = "okay";
+};
+
+&hdmi_out {
+ hdmi_out_con: endpoint {
+ remote-endpoint = <&hdmi_con_in>;
+ };
+};
+
&mmc0 {
- pinctrl-names = "default";
- pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_reference_design>;
vmmc-supply = <®_vcc3v3>;
bus-width = <4>;
- cd-gpios = <&pio 7 1 GPIO_ACTIVE_HIGH>; /* PH1 */
- cd-inverted;
+ cd-gpios = <&pio 7 1 GPIO_ACTIVE_LOW>; /* PH1 */
status = "okay";
};
@@ -89,29 +110,6 @@
status = "okay";
};
-&pio {
- usb0_id_detect_pin: usb0_id_detect_pin at 0 {
- allwinner,pins = "PH4";
- allwinner,function = "gpio_in";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
- };
-
- usb0_vbus_detect_pin: usb0_vbus_detect_pin at 0 {
- allwinner,pins = "PH5";
- allwinner,function = "gpio_in";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
- };
-
- usb2_vbus_pin_mk802: usb2_vbus_pin at 0 {
- allwinner,pins = "PH12";
- allwinner,function = "gpio_out";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
- };
-};
-
®_usb0_vbus {
status = "okay";
};
@@ -121,14 +119,13 @@
};
®_usb2_vbus {
- pinctrl-0 = <&usb2_vbus_pin_mk802>;
gpio = <&pio 7 12 GPIO_ACTIVE_HIGH>; /* PH12 */
status = "okay";
};
&uart0 {
pinctrl-names = "default";
- pinctrl-0 = <&uart0_pins_a>;
+ pinctrl-0 = <&uart0_pb_pins>;
status = "okay";
};
@@ -138,8 +135,6 @@
};
&usbphy {
- pinctrl-names = "default";
- pinctrl-0 = <&usb0_id_detect_pin>, <&usb0_vbus_detect_pin>;
usb0_id_det-gpios = <&pio 7 4 GPIO_ACTIVE_HIGH>; /* PH4 */
usb0_vbus_det-gpios = <&pio 7 5 GPIO_ACTIVE_HIGH>; /* PH5 */
usb0_vbus-supply = <®_usb0_vbus>;
diff --git a/arch/arm/dts/sun4i-a10-mk802ii.dts b/arch/arm/dts/sun4i-a10-mk802ii.dts
index c861fa7e35..17dcdf0311 100644
--- a/arch/arm/dts/sun4i-a10-mk802ii.dts
+++ b/arch/arm/dts/sun4i-a10-mk802ii.dts
@@ -67,8 +67,6 @@
};
&i2c0 {
- pinctrl-names = "default";
- pinctrl-0 = <&i2c0_pins_a>;
status = "okay";
axp209: pmic at 34 {
@@ -82,12 +80,9 @@
};
&mmc0 {
- pinctrl-names = "default";
- pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_reference_design>;
vmmc-supply = <®_vcc3v3>;
bus-width = <4>;
- cd-gpios = <&pio 7 1 GPIO_ACTIVE_HIGH>; /* PH1 */
- cd-inverted;
+ cd-gpios = <&pio 7 1 GPIO_ACTIVE_LOW>; /* PH1 */
status = "okay";
};
@@ -105,7 +100,7 @@
&uart0 {
pinctrl-names = "default";
- pinctrl-0 = <&uart0_pins_a>;
+ pinctrl-0 = <&uart0_pb_pins>;
status = "okay";
};
diff --git a/arch/arm/dts/sun4i-a10-olinuxino-lime.dts b/arch/arm/dts/sun4i-a10-olinuxino-lime.dts
index b350448c72..b74a614965 100644
--- a/arch/arm/dts/sun4i-a10-olinuxino-lime.dts
+++ b/arch/arm/dts/sun4i-a10-olinuxino-lime.dts
@@ -45,7 +45,6 @@
#include "sunxi-common-regulators.dtsi"
#include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/pinctrl/sun4i-a10.h>
/ {
model = "Olimex A10-OLinuXino-LIME";
@@ -59,6 +58,17 @@
stdout-path = "serial0:115200n8";
};
+ hdmi-connector {
+ compatible = "hdmi-connector";
+ type = "a";
+
+ port {
+ hdmi_con_in: endpoint {
+ remote-endpoint = <&hdmi_out_con>;
+ };
+ };
+ };
+
leds {
compatible = "gpio-leds";
pinctrl-names = "default";
@@ -87,7 +97,10 @@
864000 1300000
624000 1250000
>;
- cooling-max-level = <2>;
+};
+
+&de {
+ status = "okay";
};
&ehci0 {
@@ -99,8 +112,6 @@
};
&emac {
- pinctrl-names = "default";
- pinctrl-0 = <&emac_pins_a>;
phy = <&phy1>;
status = "okay";
};
@@ -109,9 +120,17 @@
status = "okay";
};
+&hdmi {
+ status = "okay";
+};
+
+&hdmi_out {
+ hdmi_out_con: endpoint {
+ remote-endpoint = <&hdmi_con_in>;
+ };
+};
+
&i2c0 {
- pinctrl-names = "default";
- pinctrl-0 = <&i2c0_pins_a>;
status = "okay";
axp209: pmic at 34 {
@@ -125,8 +144,6 @@
};
&i2c1 {
- pinctrl-names = "default";
- pinctrl-0 = <&i2c1_pins_a>;
status = "okay";
eeprom: eeprom at 50 {
@@ -145,12 +162,9 @@
};
&mmc0 {
- pinctrl-names = "default";
- pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_reference_design>;
vmmc-supply = <®_vcc3v3>;
bus-width = <4>;
- cd-gpios = <&pio 7 1 GPIO_ACTIVE_HIGH>; /* PH1 */
- cd-inverted;
+ cd-gpios = <&pio 7 1 GPIO_ACTIVE_LOW>; /* PH1 */
status = "okay";
};
@@ -167,37 +181,26 @@
};
&pio {
- ahci_pwr_pin_olinuxinolime: ahci_pwr_pin at 1 {
- allwinner,pins = "PC3";
- allwinner,function = "gpio_out";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
- };
-
- led_pins_olinuxinolime: led_pins at 0 {
- allwinner,pins = "PH2";
- allwinner,function = "gpio_out";
- allwinner,drive = <SUN4I_PINCTRL_20_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ led_pins_olinuxinolime: led-pin {
+ pins = "PH2";
+ function = "gpio_out";
+ drive-strength = <20>;
};
- usb0_id_detect_pin: usb0_id_detect_pin at 0 {
- allwinner,pins = "PH4";
- allwinner,function = "gpio_in";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+ usb0_id_detect_pin: usb0-id-detect-pin {
+ pins = "PH4";
+ function = "gpio_in";
+ bias-pull-up;
};
- usb0_vbus_detect_pin: usb0_vbus_detect_pin at 0 {
- allwinner,pins = "PH5";
- allwinner,function = "gpio_in";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_PULL_DOWN>;
+ usb0_vbus_detect_pin: usb0-vbus-detect-pin {
+ pins = "PH5";
+ function = "gpio_in";
+ bias-pull-down;
};
};
®_ahci_5v {
- pinctrl-0 = <&ahci_pwr_pin_olinuxinolime>;
gpio = <&pio 2 3 GPIO_ACTIVE_HIGH>;
status = "okay";
};
@@ -216,7 +219,7 @@
&uart0 {
pinctrl-names = "default";
- pinctrl-0 = <&uart0_pins_a>;
+ pinctrl-0 = <&uart0_pb_pins>;
status = "okay";
};
diff --git a/arch/arm/dts/sun4i-a10-pcduino.dts b/arch/arm/dts/sun4i-a10-pcduino.dts
index 39034aa8e1..b97a0f2f20 100644
--- a/arch/arm/dts/sun4i-a10-pcduino.dts
+++ b/arch/arm/dts/sun4i-a10-pcduino.dts
@@ -47,7 +47,6 @@
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
-#include <dt-bindings/pinctrl/sun4i-a10.h>
/ {
model = "LinkSprite pcDuino";
@@ -63,8 +62,6 @@
leds {
compatible = "gpio-leds";
- pinctrl-names = "default";
- pinctrl-0 = <&led_pins_pcduino>;
tx {
label = "pcduino:green:tx";
@@ -77,26 +74,24 @@
};
};
- gpio_keys {
+ gpio-keys {
compatible = "gpio-keys";
- pinctrl-names = "default";
- pinctrl-0 = <&key_pins_pcduino>;
#address-cells = <1>;
#size-cells = <0>;
- button at 0 {
+ back {
label = "Key Back";
linux,code = <KEY_BACK>;
gpios = <&pio 7 17 GPIO_ACTIVE_LOW>;
};
- button at 1 {
+ home {
label = "Key Home";
linux,code = <KEY_HOME>;
gpios = <&pio 7 18 GPIO_ACTIVE_LOW>;
};
- button at 2 {
+ menu {
label = "Key Menu";
linux,code = <KEY_MENU>;
gpios = <&pio 7 19 GPIO_ACTIVE_LOW>;
@@ -117,8 +112,6 @@
};
&emac {
- pinctrl-names = "default";
- pinctrl-0 = <&emac_pins_a>;
phy = <&phy1>;
status = "okay";
};
@@ -128,8 +121,6 @@
};
&i2c0 {
- pinctrl-names = "default";
- pinctrl-0 = <&i2c0_pins_a>;
status = "okay";
axp209: pmic at 34 {
@@ -147,12 +138,9 @@
};
&mmc0 {
- pinctrl-names = "default";
- pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_reference_design>;
vmmc-supply = <®_vcc3v3>;
bus-width = <4>;
- cd-gpios = <&pio 7 1 GPIO_ACTIVE_HIGH>; /* PH1 */
- cd-inverted;
+ cd-gpios = <&pio 7 1 GPIO_ACTIVE_LOW>; /* PH1 */
status = "okay";
};
@@ -169,25 +157,10 @@
};
&pio {
- led_pins_pcduino: led_pins at 0 {
- allwinner,pins = "PH15", "PH16";
- allwinner,function = "gpio_out";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
- };
-
- key_pins_pcduino: key_pins at 0 {
- allwinner,pins = "PH17", "PH18", "PH19";
- allwinner,function = "gpio_in";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
- };
-
- usb0_id_detect_pin: usb0_id_detect_pin at 0 {
- allwinner,pins = "PH4";
- allwinner,function = "gpio_in";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+ usb0_id_detect_pin: usb0-id-detect-pin {
+ pins = "PH4";
+ function = "gpio_in";
+ bias-pull-up;
};
};
@@ -220,7 +193,7 @@
&uart0 {
pinctrl-names = "default";
- pinctrl-0 = <&uart0_pins_a>;
+ pinctrl-0 = <&uart0_pb_pins>;
status = "okay";
};
diff --git a/arch/arm/dts/sun4i-a10-pcduino2.dts b/arch/arm/dts/sun4i-a10-pcduino2.dts
index de483a1bf3..bc4f128965 100644
--- a/arch/arm/dts/sun4i-a10-pcduino2.dts
+++ b/arch/arm/dts/sun4i-a10-pcduino2.dts
@@ -55,18 +55,7 @@
compatible = "linksprite,a10-pcduino2", "allwinner,sun4i-a10";
};
-&pio {
- usb2_vbus_pin_pcduino2: usb2_vbus_pin at 0 {
- allwinner,pins = "PD2";
- allwinner,function = "gpio_out";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
- };
-};
-
®_usb2_vbus {
- pinctrl-names = "default";
- pinctrl-0 = <&usb2_vbus_pin_pcduino2>;
gpio = <&pio 3 2 GPIO_ACTIVE_HIGH>;
status = "okay";
};
diff --git a/arch/arm/dts/sun4i-a10-pov-protab2-ips9.dts b/arch/arm/dts/sun4i-a10-pov-protab2-ips9.dts
index ea90634e48..84b25be1ac 100644
--- a/arch/arm/dts/sun4i-a10-pov-protab2-ips9.dts
+++ b/arch/arm/dts/sun4i-a10-pov-protab2-ips9.dts
@@ -46,7 +46,6 @@
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/interrupt-controller/irq.h>
-#include <dt-bindings/pinctrl/sun4i-a10.h>
#include <dt-bindings/pwm/pwm.h>
/ {
@@ -59,8 +58,6 @@
backlight: backlight {
compatible = "pwm-backlight";
- pinctrl-names = "default";
- pinctrl-0 = <&bl_en_pin_protab>;
pwms = <&pwm 0 50000 PWM_POLARITY_INVERTED>;
brightness-levels = <0 10 20 30 40 50 60 70 80 90 100>;
default-brightness-level = <8>;
@@ -73,8 +70,6 @@
};
&codec {
- pinctrl-names = "default";
- pinctrl-0 = <&codec_pa_pin>;
allwinner,pa-gpios = <&pio 7 15 GPIO_ACTIVE_HIGH>; /* PH15 */
status = "okay";
};
@@ -88,8 +83,6 @@
};
&i2c0 {
- pinctrl-names = "default";
- pinctrl-0 = <&i2c0_pins_a>;
status = "okay";
axp209: pmic at 34 {
@@ -101,27 +94,14 @@
#include "axp209.dtsi"
&i2c1 {
- pinctrl-names = "default";
- pinctrl-0 = <&i2c1_pins_a>;
- status = "okay";
-
- /* Accelerometer */
- bma250 at 18 {
- compatible = "bosch,bma250";
- reg = <0x18>;
- interrupt-parent = <&pio>;
- interrupts = <7 0 IRQ_TYPE_EDGE_RISING>; /* PH0 / EINT0 */
- };
+ /* pull-ups and devices require AXP209 LDO3 */
+ status = "failed";
};
&i2c2 {
- pinctrl-names = "default";
- pinctrl-0 = <&i2c2_pins_a>;
status = "okay";
- pixcir_ts at 5c {
- pinctrl-names = "default";
- pinctrl-0 = <&touchscreen_pins>;
+ touchscreen at 5c {
compatible = "pixcir,pixcir_tangoc";
reg = <0x5c>;
interrupt-parent = <&pio>;
@@ -140,14 +120,14 @@
vref-supply = <®_ldo2>;
status = "okay";
- button at 400 {
+ button-400 {
label = "Volume Up";
linux,code = <KEY_VOLUMEUP>;
channel = <0>;
voltage = <400000>;
};
- button at 800 {
+ button-800 {
label = "Volume Down";
linux,code = <KEY_VOLUMEDOWN>;
channel = <0>;
@@ -156,12 +136,9 @@
};
&mmc0 {
- pinctrl-names = "default";
- pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_reference_design>;
vmmc-supply = <®_vcc3v3>;
bus-width = <4>;
- cd-gpios = <&pio 7 1 GPIO_ACTIVE_HIGH>; /* PH1 */
- cd-inverted;
+ cd-gpios = <&pio 7 1 GPIO_ACTIVE_LOW>; /* PH1 */
status = "okay";
};
@@ -170,45 +147,22 @@
};
&pio {
- bl_en_pin_protab: bl_en_pin at 0 {
- allwinner,pins = "PH7";
- allwinner,function = "gpio_out";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ usb0_id_detect_pin: usb0-id-detect-pin {
+ pins = "PH4";
+ function = "gpio_in";
+ bias-pull-up;
};
- codec_pa_pin: codec_pa_pin at 0 {
- allwinner,pins = "PH15";
- allwinner,function = "gpio_out";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
- };
-
- touchscreen_pins: touchscreen_pins at 0 {
- allwinner,pins = "PA5", "PB13";
- allwinner,function = "gpio_out";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
- };
-
- usb0_id_detect_pin: usb0_id_detect_pin at 0 {
- allwinner,pins = "PH4";
- allwinner,function = "gpio_in";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
- };
-
- usb0_vbus_detect_pin: usb0_vbus_detect_pin at 0 {
- allwinner,pins = "PH5";
- allwinner,function = "gpio_in";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_PULL_DOWN>;
+ usb0_vbus_detect_pin: usb0-vbus-detect-pin {
+ pins = "PH5";
+ function = "gpio_in";
+ bias-pull-down;
};
};
&pwm {
pinctrl-names = "default";
- pinctrl-0 = <&pwm0_pins_a>;
+ pinctrl-0 = <&pwm0_pin>;
status = "okay";
};
@@ -237,17 +191,6 @@
regulator-name = "avcc";
};
-®_ldo3 {
- /*
- * We need to always power the camera sensor, otherwhise all access
- * to i2c1 is blocked.
- */
- regulator-always-on;
- regulator-min-microvolt = <2800000>;
- regulator-max-microvolt = <2800000>;
- regulator-name = "vdd-csi";
-};
-
®_usb0_vbus {
status = "okay";
};
@@ -258,7 +201,7 @@
&uart0 {
pinctrl-names = "default";
- pinctrl-0 = <&uart0_pins_a>;
+ pinctrl-0 = <&uart0_pb_pins>;
status = "okay";
};
diff --git a/arch/arm/dts/sun4i-a10.dtsi b/arch/arm/dts/sun4i-a10.dtsi
index 7e7dfc2b43..3a1c6b45c9 100644
--- a/arch/arm/dts/sun4i-a10.dtsi
+++ b/arch/arm/dts/sun4i-a10.dtsi
@@ -41,15 +41,14 @@
* OTHER DEALINGS IN THE SOFTWARE.
*/
-#include "skeleton.dtsi"
-
#include <dt-bindings/thermal/thermal.h>
-
-#include <dt-bindings/clock/sun4i-a10-pll2.h>
#include <dt-bindings/dma/sun4i-a10.h>
-#include <dt-bindings/pinctrl/sun4i-a10.h>
+#include <dt-bindings/clock/sun4i-a10-ccu.h>
+#include <dt-bindings/reset/sun4i-a10-ccu.h>
/ {
+ #address-cells = <1>;
+ #size-cells = <1>;
interrupt-parent = <&intc>;
aliases {
@@ -61,46 +60,48 @@
#size-cells = <1>;
ranges;
- framebuffer at 0 {
+ framebuffer-lcd0-hdmi {
compatible = "allwinner,simple-framebuffer",
"simple-framebuffer";
allwinner,pipeline = "de_be0-lcd0-hdmi";
- clocks = <&ahb_gates 36>, <&ahb_gates 43>,
- <&ahb_gates 44>, <&de_be0_clk>,
- <&tcon0_ch1_clk>, <&dram_gates 26>;
+ clocks = <&ccu CLK_AHB_LCD0>, <&ccu CLK_AHB_HDMI0>,
+ <&ccu CLK_AHB_DE_BE0>, <&ccu CLK_DE_BE0>,
+ <&ccu CLK_TCON0_CH1>, <&ccu CLK_DRAM_DE_BE0>;
status = "disabled";
};
- framebuffer at 1 {
+ framebuffer-fe0-lcd0-hdmi {
compatible = "allwinner,simple-framebuffer",
"simple-framebuffer";
allwinner,pipeline = "de_fe0-de_be0-lcd0-hdmi";
- clocks = <&ahb_gates 36>, <&ahb_gates 43>,
- <&ahb_gates 44>, <&ahb_gates 46>,
- <&de_be0_clk>, <&de_fe0_clk>, <&tcon0_ch1_clk>,
- <&dram_gates 25>, <&dram_gates 26>;
+ clocks = <&ccu CLK_AHB_LCD0>, <&ccu CLK_AHB_HDMI0>,
+ <&ccu CLK_AHB_DE_BE0>, <&ccu CLK_AHB_DE_FE0>,
+ <&ccu CLK_DE_BE0>, <&ccu CLK_DE_FE0>,
+ <&ccu CLK_TCON0_CH1>, <&ccu CLK_HDMI>,
+ <&ccu CLK_DRAM_DE_FE0>, <&ccu CLK_DRAM_DE_BE0>;
status = "disabled";
};
- framebuffer at 2 {
+ framebuffer-fe0-lcd0 {
compatible = "allwinner,simple-framebuffer",
"simple-framebuffer";
allwinner,pipeline = "de_fe0-de_be0-lcd0";
- clocks = <&ahb_gates 36>, <&ahb_gates 44>, <&ahb_gates 46>,
- <&de_be0_clk>, <&de_fe0_clk>, <&tcon0_ch0_clk>,
- <&dram_gates 25>, <&dram_gates 26>;
+ clocks = <&ccu CLK_AHB_LCD0>, <&ccu CLK_AHB_DE_BE0>,
+ <&ccu CLK_AHB_DE_FE0>, <&ccu CLK_DE_BE0>,
+ <&ccu CLK_DE_FE0>, <&ccu CLK_TCON0_CH0>,
+ <&ccu CLK_DRAM_DE_FE0>, <&ccu CLK_DRAM_DE_BE0>;
status = "disabled";
};
- framebuffer at 3 {
+ framebuffer-fe0-lcd0-tve0 {
compatible = "allwinner,simple-framebuffer",
"simple-framebuffer";
allwinner,pipeline = "de_fe0-de_be0-lcd0-tve0";
- clocks = <&ahb_gates 34>, <&ahb_gates 36>,
- <&ahb_gates 44>, <&ahb_gates 46>,
- <&de_be0_clk>, <&de_fe0_clk>,
- <&tcon0_ch1_clk>, <&dram_gates 5>,
- <&dram_gates 25>, <&dram_gates 26>;
+ clocks = <&ccu CLK_AHB_TVE0>, <&ccu CLK_AHB_LCD0>,
+ <&ccu CLK_AHB_DE_BE0>, <&ccu CLK_AHB_DE_FE0>,
+ <&ccu CLK_DE_BE0>, <&ccu CLK_DE_FE0>,
+ <&ccu CLK_TCON0_CH1>, <&ccu CLK_DRAM_TVE0>,
+ <&ccu CLK_DRAM_DE_FE0>, <&ccu CLK_DRAM_DE_BE0>;
status = "disabled";
};
};
@@ -112,7 +113,7 @@
device_type = "cpu";
compatible = "arm,cortex-a8";
reg = <0x0>;
- clocks = <&cpu>;
+ clocks = <&ccu CLK_CPU>;
clock-latency = <244144>; /* 8 32k periods */
operating-points = <
/* kHz uV */
@@ -122,13 +123,11 @@
624000 1250000
>;
#cooling-cells = <2>;
- cooling-min-level = <0>;
- cooling-max-level = <3>;
};
};
thermal-zones {
- cpu_thermal {
+ cpu-thermal {
/* milliseconds */
polling-delay-passive = <250>;
polling-delay = <1000>;
@@ -142,14 +141,14 @@
};
trips {
- cpu_alert0: cpu_alert0 {
+ cpu_alert0: cpu-alert0 {
/* milliCelsius */
temperature = <850000>;
hysteresis = <2000>;
type = "passive";
};
- cpu_crit: cpu_crit {
+ cpu_crit: cpu-crit {
/* milliCelsius */
temperature = <100000>;
hysteresis = <2000>;
@@ -159,532 +158,46 @@
};
};
- memory {
- reg = <0x40000000 0x80000000>;
- };
-
clocks {
#address-cells = <1>;
#size-cells = <1>;
ranges;
- /*
- * This is a dummy clock, to be used as placeholder on
- * other mux clocks when a specific parent clock is not
- * yet implemented. It should be dropped when the driver
- * is complete.
- */
- dummy: dummy {
+ osc24M: clk-24M {
#clock-cells = <0>;
compatible = "fixed-clock";
- clock-frequency = <0>;
- };
-
- osc24M: clk at 01c20050 {
- #clock-cells = <0>;
- compatible = "allwinner,sun4i-a10-osc-clk";
- reg = <0x01c20050 0x4>;
clock-frequency = <24000000>;
clock-output-names = "osc24M";
};
- osc3M: osc3M_clk {
- compatible = "fixed-factor-clock";
- #clock-cells = <0>;
- clock-div = <8>;
- clock-mult = <1>;
- clocks = <&osc24M>;
- clock-output-names = "osc3M";
- };
-
- osc32k: clk at 0 {
+ osc32k: clk-32k {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <32768>;
clock-output-names = "osc32k";
};
+ };
- pll1: clk at 01c20000 {
- #clock-cells = <0>;
- compatible = "allwinner,sun4i-a10-pll1-clk";
- reg = <0x01c20000 0x4>;
- clocks = <&osc24M>;
- clock-output-names = "pll1";
- };
-
- pll2: clk at 01c20008 {
- #clock-cells = <1>;
- compatible = "allwinner,sun4i-a10-pll2-clk";
- reg = <0x01c20008 0x8>;
- clocks = <&osc24M>;
- clock-output-names = "pll2-1x", "pll2-2x",
- "pll2-4x", "pll2-8x";
- };
-
- pll3: clk at 01c20010 {
- #clock-cells = <0>;
- compatible = "allwinner,sun4i-a10-pll3-clk";
- reg = <0x01c20010 0x4>;
- clocks = <&osc3M>;
- clock-output-names = "pll3";
- };
-
- pll3x2: pll3x2_clk {
- compatible = "fixed-factor-clock";
- #clock-cells = <0>;
- clock-div = <1>;
- clock-mult = <2>;
- clocks = <&pll3>;
- clock-output-names = "pll3-2x";
- };
-
- pll4: clk at 01c20018 {
- #clock-cells = <0>;
- compatible = "allwinner,sun4i-a10-pll1-clk";
- reg = <0x01c20018 0x4>;
- clocks = <&osc24M>;
- clock-output-names = "pll4";
- };
-
- pll5: clk at 01c20020 {
- #clock-cells = <1>;
- compatible = "allwinner,sun4i-a10-pll5-clk";
- reg = <0x01c20020 0x4>;
- clocks = <&osc24M>;
- clock-output-names = "pll5_ddr", "pll5_other";
- };
-
- pll6: clk at 01c20028 {
- #clock-cells = <1>;
- compatible = "allwinner,sun4i-a10-pll6-clk";
- reg = <0x01c20028 0x4>;
- clocks = <&osc24M>;
- clock-output-names = "pll6_sata", "pll6_other", "pll6";
- };
-
- pll7: clk at 01c20030 {
- #clock-cells = <0>;
- compatible = "allwinner,sun4i-a10-pll3-clk";
- reg = <0x01c20030 0x4>;
- clocks = <&osc3M>;
- clock-output-names = "pll7";
- };
-
- pll7x2: pll7x2_clk {
- compatible = "fixed-factor-clock";
- #clock-cells = <0>;
- clock-div = <1>;
- clock-mult = <2>;
- clocks = <&pll7>;
- clock-output-names = "pll7-2x";
- };
-
- /* dummy is 200M */
- cpu: cpu at 01c20054 {
- #clock-cells = <0>;
- compatible = "allwinner,sun4i-a10-cpu-clk";
- reg = <0x01c20054 0x4>;
- clocks = <&osc32k>, <&osc24M>, <&pll1>, <&dummy>;
- clock-output-names = "cpu";
- };
-
- axi: axi at 01c20054 {
- #clock-cells = <0>;
- compatible = "allwinner,sun4i-a10-axi-clk";
- reg = <0x01c20054 0x4>;
- clocks = <&cpu>;
- clock-output-names = "axi";
- };
-
- axi_gates: clk at 01c2005c {
- #clock-cells = <1>;
- compatible = "allwinner,sun4i-a10-axi-gates-clk";
- reg = <0x01c2005c 0x4>;
- clocks = <&axi>;
- clock-indices = <0>;
- clock-output-names = "axi_dram";
- };
-
- ahb: ahb at 01c20054 {
- #clock-cells = <0>;
- compatible = "allwinner,sun4i-a10-ahb-clk";
- reg = <0x01c20054 0x4>;
- clocks = <&axi>;
- clock-output-names = "ahb";
- };
-
- ahb_gates: clk at 01c20060 {
- #clock-cells = <1>;
- compatible = "allwinner,sun4i-a10-ahb-gates-clk";
- reg = <0x01c20060 0x8>;
- clocks = <&ahb>;
- clock-indices = <0>, <1>,
- <2>, <3>,
- <4>, <5>, <6>,
- <7>, <8>, <9>,
- <10>, <11>, <12>,
- <13>, <14>, <16>,
- <17>, <18>, <20>,
- <21>, <22>, <23>,
- <24>, <25>, <26>,
- <32>, <33>, <34>,
- <35>, <36>, <37>,
- <40>, <41>, <43>,
- <44>, <45>,
- <46>, <47>,
- <50>, <52>;
- clock-output-names = "ahb_usb0", "ahb_ehci0",
- "ahb_ohci0", "ahb_ehci1",
- "ahb_ohci1", "ahb_ss", "ahb_dma",
- "ahb_bist", "ahb_mmc0", "ahb_mmc1",
- "ahb_mmc2", "ahb_mmc3", "ahb_ms",
- "ahb_nand", "ahb_sdram", "ahb_ace",
- "ahb_emac", "ahb_ts", "ahb_spi0",
- "ahb_spi1", "ahb_spi2", "ahb_spi3",
- "ahb_pata", "ahb_sata", "ahb_gps",
- "ahb_ve", "ahb_tvd", "ahb_tve0",
- "ahb_tve1", "ahb_lcd0", "ahb_lcd1",
- "ahb_csi0", "ahb_csi1", "ahb_hdmi",
- "ahb_de_be0", "ahb_de_be1",
- "ahb_de_fe0", "ahb_de_fe1",
- "ahb_mp", "ahb_mali400";
- };
-
- apb0: apb0 at 01c20054 {
- #clock-cells = <0>;
- compatible = "allwinner,sun4i-a10-apb0-clk";
- reg = <0x01c20054 0x4>;
- clocks = <&ahb>;
- clock-output-names = "apb0";
- };
-
- apb0_gates: clk at 01c20068 {
- #clock-cells = <1>;
- compatible = "allwinner,sun4i-a10-apb0-gates-clk";
- reg = <0x01c20068 0x4>;
- clocks = <&apb0>;
- clock-indices = <0>, <1>,
- <2>, <3>,
- <5>, <6>,
- <7>, <10>;
- clock-output-names = "apb0_codec", "apb0_spdif",
- "apb0_ac97", "apb0_iis",
- "apb0_pio", "apb0_ir0",
- "apb0_ir1", "apb0_keypad";
- };
-
- apb1: clk at 01c20058 {
- #clock-cells = <0>;
- compatible = "allwinner,sun4i-a10-apb1-clk";
- reg = <0x01c20058 0x4>;
- clocks = <&osc24M>, <&pll6 1>, <&osc32k>;
- clock-output-names = "apb1";
- };
-
- apb1_gates: clk at 01c2006c {
- #clock-cells = <1>;
- compatible = "allwinner,sun4i-a10-apb1-gates-clk";
- reg = <0x01c2006c 0x4>;
- clocks = <&apb1>;
- clock-indices = <0>, <1>,
- <2>, <4>,
- <5>, <6>,
- <7>, <16>,
- <17>, <18>,
- <19>, <20>,
- <21>, <22>,
- <23>;
- clock-output-names = "apb1_i2c0", "apb1_i2c1",
- "apb1_i2c2", "apb1_can",
- "apb1_scr", "apb1_ps20",
- "apb1_ps21", "apb1_uart0",
- "apb1_uart1", "apb1_uart2",
- "apb1_uart3", "apb1_uart4",
- "apb1_uart5", "apb1_uart6",
- "apb1_uart7";
- };
-
- nand_clk: clk at 01c20080 {
- #clock-cells = <0>;
- compatible = "allwinner,sun4i-a10-mod0-clk";
- reg = <0x01c20080 0x4>;
- clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
- clock-output-names = "nand";
- };
-
- ms_clk: clk at 01c20084 {
- #clock-cells = <0>;
- compatible = "allwinner,sun4i-a10-mod0-clk";
- reg = <0x01c20084 0x4>;
- clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
- clock-output-names = "ms";
- };
-
- mmc0_clk: clk at 01c20088 {
- #clock-cells = <1>;
- compatible = "allwinner,sun4i-a10-mmc-clk";
- reg = <0x01c20088 0x4>;
- clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
- clock-output-names = "mmc0",
- "mmc0_output",
- "mmc0_sample";
- };
-
- mmc1_clk: clk at 01c2008c {
- #clock-cells = <1>;
- compatible = "allwinner,sun4i-a10-mmc-clk";
- reg = <0x01c2008c 0x4>;
- clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
- clock-output-names = "mmc1",
- "mmc1_output",
- "mmc1_sample";
- };
-
- mmc2_clk: clk at 01c20090 {
- #clock-cells = <1>;
- compatible = "allwinner,sun4i-a10-mmc-clk";
- reg = <0x01c20090 0x4>;
- clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
- clock-output-names = "mmc2",
- "mmc2_output",
- "mmc2_sample";
- };
-
- mmc3_clk: clk at 01c20094 {
- #clock-cells = <1>;
- compatible = "allwinner,sun4i-a10-mmc-clk";
- reg = <0x01c20094 0x4>;
- clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
- clock-output-names = "mmc3",
- "mmc3_output",
- "mmc3_sample";
- };
-
- ts_clk: clk at 01c20098 {
- #clock-cells = <0>;
- compatible = "allwinner,sun4i-a10-mod0-clk";
- reg = <0x01c20098 0x4>;
- clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
- clock-output-names = "ts";
- };
-
- ss_clk: clk at 01c2009c {
- #clock-cells = <0>;
- compatible = "allwinner,sun4i-a10-mod0-clk";
- reg = <0x01c2009c 0x4>;
- clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
- clock-output-names = "ss";
- };
-
- spi0_clk: clk at 01c200a0 {
- #clock-cells = <0>;
- compatible = "allwinner,sun4i-a10-mod0-clk";
- reg = <0x01c200a0 0x4>;
- clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
- clock-output-names = "spi0";
- };
-
- spi1_clk: clk at 01c200a4 {
- #clock-cells = <0>;
- compatible = "allwinner,sun4i-a10-mod0-clk";
- reg = <0x01c200a4 0x4>;
- clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
- clock-output-names = "spi1";
- };
-
- spi2_clk: clk at 01c200a8 {
- #clock-cells = <0>;
- compatible = "allwinner,sun4i-a10-mod0-clk";
- reg = <0x01c200a8 0x4>;
- clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
- clock-output-names = "spi2";
- };
-
- pata_clk: clk at 01c200ac {
- #clock-cells = <0>;
- compatible = "allwinner,sun4i-a10-mod0-clk";
- reg = <0x01c200ac 0x4>;
- clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
- clock-output-names = "pata";
- };
-
- ir0_clk: clk at 01c200b0 {
- #clock-cells = <0>;
- compatible = "allwinner,sun4i-a10-mod0-clk";
- reg = <0x01c200b0 0x4>;
- clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
- clock-output-names = "ir0";
- };
-
- ir1_clk: clk at 01c200b4 {
- #clock-cells = <0>;
- compatible = "allwinner,sun4i-a10-mod0-clk";
- reg = <0x01c200b4 0x4>;
- clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
- clock-output-names = "ir1";
- };
-
- spdif_clk: clk at 01c200c0 {
- #clock-cells = <0>;
- compatible = "allwinner,sun4i-a10-mod1-clk";
- reg = <0x01c200c0 0x4>;
- clocks = <&pll2 SUN4I_A10_PLL2_8X>,
- <&pll2 SUN4I_A10_PLL2_4X>,
- <&pll2 SUN4I_A10_PLL2_2X>,
- <&pll2 SUN4I_A10_PLL2_1X>;
- clock-output-names = "spdif";
- };
-
- usb_clk: clk at 01c200cc {
- #clock-cells = <1>;
- #reset-cells = <1>;
- compatible = "allwinner,sun4i-a10-usb-clk";
- reg = <0x01c200cc 0x4>;
- clocks = <&pll6 1>;
- clock-output-names = "usb_ohci0", "usb_ohci1",
- "usb_phy";
- };
-
- spi3_clk: clk at 01c200d4 {
- #clock-cells = <0>;
- compatible = "allwinner,sun4i-a10-mod0-clk";
- reg = <0x01c200d4 0x4>;
- clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
- clock-output-names = "spi3";
- };
-
- dram_gates: clk at 01c20100 {
- #clock-cells = <1>;
- compatible = "allwinner,sun4i-a10-dram-gates-clk";
- reg = <0x01c20100 0x4>;
- clocks = <&pll5 0>;
- clock-indices = <0>,
- <1>, <2>,
- <3>,
- <4>,
- <5>, <6>,
- <15>,
- <24>, <25>,
- <26>, <27>,
- <28>, <29>;
- clock-output-names = "dram_ve",
- "dram_csi0", "dram_csi1",
- "dram_ts",
- "dram_tvd",
- "dram_tve0", "dram_tve1",
- "dram_output",
- "dram_de_fe1", "dram_de_fe0",
- "dram_de_be0", "dram_de_be1",
- "dram_de_mp", "dram_ace";
- };
-
- de_be0_clk: clk at 01c20104 {
- #clock-cells = <0>;
- #reset-cells = <0>;
- compatible = "allwinner,sun4i-a10-display-clk";
- reg = <0x01c20104 0x4>;
- clocks = <&pll3>, <&pll7>, <&pll5 1>;
- clock-output-names = "de-be0";
- };
-
- de_be1_clk: clk at 01c20108 {
- #clock-cells = <0>;
- #reset-cells = <0>;
- compatible = "allwinner,sun4i-a10-display-clk";
- reg = <0x01c20108 0x4>;
- clocks = <&pll3>, <&pll7>, <&pll5 1>;
- clock-output-names = "de-be1";
- };
-
- de_fe0_clk: clk at 01c2010c {
- #clock-cells = <0>;
- #reset-cells = <0>;
- compatible = "allwinner,sun4i-a10-display-clk";
- reg = <0x01c2010c 0x4>;
- clocks = <&pll3>, <&pll7>, <&pll5 1>;
- clock-output-names = "de-fe0";
- };
-
- de_fe1_clk: clk at 01c20110 {
- #clock-cells = <0>;
- #reset-cells = <0>;
- compatible = "allwinner,sun4i-a10-display-clk";
- reg = <0x01c20110 0x4>;
- clocks = <&pll3>, <&pll7>, <&pll5 1>;
- clock-output-names = "de-fe1";
- };
-
-
- tcon0_ch0_clk: clk at 01c20118 {
- #clock-cells = <0>;
- #reset-cells = <1>;
- compatible = "allwinner,sun4i-a10-tcon-ch0-clk";
- reg = <0x01c20118 0x4>;
- clocks = <&pll3>, <&pll7>, <&pll3x2>, <&pll7x2>;
- clock-output-names = "tcon0-ch0-sclk";
-
- };
-
- tcon1_ch0_clk: clk at 01c2011c {
- #clock-cells = <0>;
- #reset-cells = <1>;
- compatible = "allwinner,sun4i-a10-tcon-ch1-clk";
- reg = <0x01c2011c 0x4>;
- clocks = <&pll3>, <&pll7>, <&pll3x2>, <&pll7x2>;
- clock-output-names = "tcon1-ch0-sclk";
-
- };
-
- tcon0_ch1_clk: clk at 01c2012c {
- #clock-cells = <0>;
- compatible = "allwinner,sun4i-a10-tcon-ch0-clk";
- reg = <0x01c2012c 0x4>;
- clocks = <&pll3>, <&pll7>, <&pll3x2>, <&pll7x2>;
- clock-output-names = "tcon0-ch1-sclk";
-
- };
-
- tcon1_ch1_clk: clk at 01c20130 {
- #clock-cells = <0>;
- compatible = "allwinner,sun4i-a10-tcon-ch1-clk";
- reg = <0x01c20130 0x4>;
- clocks = <&pll3>, <&pll7>, <&pll3x2>, <&pll7x2>;
- clock-output-names = "tcon1-ch1-sclk";
-
- };
-
- ve_clk: clk at 01c2013c {
- #clock-cells = <0>;
- #reset-cells = <0>;
- compatible = "allwinner,sun4i-a10-ve-clk";
- reg = <0x01c2013c 0x4>;
- clocks = <&pll4>;
- clock-output-names = "ve";
- };
-
- codec_clk: clk at 01c20140 {
- #clock-cells = <0>;
- compatible = "allwinner,sun4i-a10-codec-clk";
- reg = <0x01c20140 0x4>;
- clocks = <&pll2 SUN4I_A10_PLL2_1X>;
- clock-output-names = "codec";
- };
+ de: display-engine {
+ compatible = "allwinner,sun4i-a10-display-engine";
+ allwinner,pipelines = <&fe0>, <&fe1>;
+ status = "disabled";
};
- soc at 01c00000 {
+ soc {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
ranges;
- sram-controller at 01c00000 {
+ sram-controller at 1c00000 {
compatible = "allwinner,sun4i-a10-sram-controller";
reg = <0x01c00000 0x30>;
#address-cells = <1>;
#size-cells = <1>;
ranges;
- sram_a: sram at 00000000 {
+ sram_a: sram at 0 {
compatible = "mmio-sram";
reg = <0x00000000 0xc000>;
#address-cells = <1>;
@@ -698,14 +211,14 @@
};
};
- sram_d: sram at 00010000 {
+ sram_d: sram at 10000 {
compatible = "mmio-sram";
reg = <0x00010000 0x1000>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0 0x00010000 0x1000>;
- otg_sram: sram-section at 0000 {
+ otg_sram: sram-section at 0 {
compatible = "allwinner,sun4i-a10-sram-d";
reg = <0x0000 0x1000>;
status = "disabled";
@@ -713,19 +226,19 @@
};
};
- dma: dma-controller at 01c02000 {
+ dma: dma-controller at 1c02000 {
compatible = "allwinner,sun4i-a10-dma";
reg = <0x01c02000 0x1000>;
interrupts = <27>;
- clocks = <&ahb_gates 6>;
+ clocks = <&ccu CLK_AHB_DMA>;
#dma-cells = <2>;
};
- nfc: nand at 01c03000 {
+ nfc: nand at 1c03000 {
compatible = "allwinner,sun4i-a10-nand";
reg = <0x01c03000 0x1000>;
interrupts = <37>;
- clocks = <&ahb_gates 13>, <&nand_clk>;
+ clocks = <&ccu CLK_AHB_NAND>, <&ccu CLK_NAND>;
clock-names = "ahb", "mod";
dmas = <&dma SUN4I_DMA_DEDICATED 3>;
dma-names = "rxtx";
@@ -734,11 +247,11 @@
#size-cells = <0>;
};
- spi0: spi at 01c05000 {
+ spi0: spi at 1c05000 {
compatible = "allwinner,sun4i-a10-spi";
reg = <0x01c05000 0x1000>;
interrupts = <10>;
- clocks = <&ahb_gates 20>, <&spi0_clk>;
+ clocks = <&ccu CLK_AHB_SPI0>, <&ccu CLK_SPI0>;
clock-names = "ahb", "mod";
dmas = <&dma SUN4I_DMA_DEDICATED 27>,
<&dma SUN4I_DMA_DEDICATED 26>;
@@ -748,30 +261,34 @@
#size-cells = <0>;
};
- spi1: spi at 01c06000 {
+ spi1: spi at 1c06000 {
compatible = "allwinner,sun4i-a10-spi";
reg = <0x01c06000 0x1000>;
interrupts = <11>;
- clocks = <&ahb_gates 21>, <&spi1_clk>;
+ clocks = <&ccu CLK_AHB_SPI1>, <&ccu CLK_SPI1>;
clock-names = "ahb", "mod";
dmas = <&dma SUN4I_DMA_DEDICATED 9>,
<&dma SUN4I_DMA_DEDICATED 8>;
dma-names = "rx", "tx";
+ pinctrl-names = "default";
+ pinctrl-0 = <&spi1_pins>, <&spi1_cs0_pin>;
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
};
- emac: ethernet at 01c0b000 {
+ emac: ethernet at 1c0b000 {
compatible = "allwinner,sun4i-a10-emac";
reg = <0x01c0b000 0x1000>;
interrupts = <55>;
- clocks = <&ahb_gates 17>;
+ clocks = <&ccu CLK_AHB_EMAC>;
allwinner,sram = <&emac_sram 1>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&emac_pins>;
status = "disabled";
};
- mdio: mdio at 01c0b080 {
+ mdio: mdio at 1c0b080 {
compatible = "allwinner,sun4i-a10-mdio";
reg = <0x01c0b080 0x14>;
status = "disabled";
@@ -779,78 +296,154 @@
#size-cells = <0>;
};
- mmc0: mmc at 01c0f000 {
+ tcon0: lcd-controller at 1c0c000 {
+ compatible = "allwinner,sun4i-a10-tcon";
+ reg = <0x01c0c000 0x1000>;
+ interrupts = <44>;
+ resets = <&ccu RST_TCON0>;
+ reset-names = "lcd";
+ clocks = <&ccu CLK_AHB_LCD0>,
+ <&ccu CLK_TCON0_CH0>,
+ <&ccu CLK_TCON0_CH1>;
+ clock-names = "ahb",
+ "tcon-ch0",
+ "tcon-ch1";
+ clock-output-names = "tcon0-pixel-clock";
+ dmas = <&dma SUN4I_DMA_DEDICATED 14>;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ tcon0_in: port at 0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0>;
+
+ tcon0_in_be0: endpoint at 0 {
+ reg = <0>;
+ remote-endpoint = <&be0_out_tcon0>;
+ };
+
+ tcon0_in_be1: endpoint at 1 {
+ reg = <1>;
+ remote-endpoint = <&be1_out_tcon0>;
+ };
+ };
+
+ tcon0_out: port at 1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <1>;
+
+ tcon0_out_hdmi: endpoint at 1 {
+ reg = <1>;
+ remote-endpoint = <&hdmi_in_tcon0>;
+ allwinner,tcon-channel = <1>;
+ };
+ };
+ };
+ };
+
+ tcon1: lcd-controller at 1c0d000 {
+ compatible = "allwinner,sun4i-a10-tcon";
+ reg = <0x01c0d000 0x1000>;
+ interrupts = <45>;
+ resets = <&ccu RST_TCON1>;
+ reset-names = "lcd";
+ clocks = <&ccu CLK_AHB_LCD1>,
+ <&ccu CLK_TCON1_CH0>,
+ <&ccu CLK_TCON1_CH1>;
+ clock-names = "ahb",
+ "tcon-ch0",
+ "tcon-ch1";
+ clock-output-names = "tcon1-pixel-clock";
+ dmas = <&dma SUN4I_DMA_DEDICATED 15>;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ tcon1_in: port at 0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0>;
+
+ tcon1_in_be0: endpoint at 0 {
+ reg = <0>;
+ remote-endpoint = <&be0_out_tcon1>;
+ };
+
+ tcon1_in_be1: endpoint at 1 {
+ reg = <1>;
+ remote-endpoint = <&be1_out_tcon1>;
+ };
+ };
+
+ tcon1_out: port at 1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <1>;
+
+ tcon1_out_hdmi: endpoint at 1 {
+ reg = <1>;
+ remote-endpoint = <&hdmi_in_tcon1>;
+ allwinner,tcon-channel = <1>;
+ };
+ };
+ };
+ };
+
+ mmc0: mmc at 1c0f000 {
compatible = "allwinner,sun4i-a10-mmc";
reg = <0x01c0f000 0x1000>;
- clocks = <&ahb_gates 8>,
- <&mmc0_clk 0>,
- <&mmc0_clk 1>,
- <&mmc0_clk 2>;
- clock-names = "ahb",
- "mmc",
- "output",
- "sample";
+ clocks = <&ccu CLK_AHB_MMC0>, <&ccu CLK_MMC0>;
+ clock-names = "ahb", "mmc";
interrupts = <32>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&mmc0_pins>;
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
};
- mmc1: mmc at 01c10000 {
+ mmc1: mmc at 1c10000 {
compatible = "allwinner,sun4i-a10-mmc";
reg = <0x01c10000 0x1000>;
- clocks = <&ahb_gates 9>,
- <&mmc1_clk 0>,
- <&mmc1_clk 1>,
- <&mmc1_clk 2>;
- clock-names = "ahb",
- "mmc",
- "output",
- "sample";
+ clocks = <&ccu CLK_AHB_MMC1>, <&ccu CLK_MMC1>;
+ clock-names = "ahb", "mmc";
interrupts = <33>;
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
};
- mmc2: mmc at 01c11000 {
+ mmc2: mmc at 1c11000 {
compatible = "allwinner,sun4i-a10-mmc";
reg = <0x01c11000 0x1000>;
- clocks = <&ahb_gates 10>,
- <&mmc2_clk 0>,
- <&mmc2_clk 1>,
- <&mmc2_clk 2>;
- clock-names = "ahb",
- "mmc",
- "output",
- "sample";
+ clocks = <&ccu CLK_AHB_MMC2>, <&ccu CLK_MMC2>;
+ clock-names = "ahb", "mmc";
interrupts = <34>;
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
};
- mmc3: mmc at 01c12000 {
+ mmc3: mmc at 1c12000 {
compatible = "allwinner,sun4i-a10-mmc";
reg = <0x01c12000 0x1000>;
- clocks = <&ahb_gates 11>,
- <&mmc3_clk 0>,
- <&mmc3_clk 1>,
- <&mmc3_clk 2>;
- clock-names = "ahb",
- "mmc",
- "output",
- "sample";
+ clocks = <&ccu CLK_AHB_MMC3>, <&ccu CLK_MMC3>;
+ clock-names = "ahb", "mmc";
interrupts = <35>;
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
};
- usb_otg: usb at 01c13000 {
+ usb_otg: usb at 1c13000 {
compatible = "allwinner,sun4i-a10-musb";
reg = <0x01c13000 0x0400>;
- clocks = <&ahb_gates 0>;
+ clocks = <&ccu CLK_AHB_OTG>;
interrupts = <38>;
interrupt-names = "mc";
phys = <&usbphy 0>;
@@ -860,51 +453,95 @@
status = "disabled";
};
- usbphy: phy at 01c13400 {
+ usbphy: phy at 1c13400 {
#phy-cells = <1>;
compatible = "allwinner,sun4i-a10-usb-phy";
reg = <0x01c13400 0x10 0x01c14800 0x4 0x01c1c800 0x4>;
reg-names = "phy_ctrl", "pmu1", "pmu2";
- clocks = <&usb_clk 8>;
+ clocks = <&ccu CLK_USB_PHY>;
clock-names = "usb_phy";
- resets = <&usb_clk 0>, <&usb_clk 1>, <&usb_clk 2>;
+ resets = <&ccu RST_USB_PHY0>,
+ <&ccu RST_USB_PHY1>,
+ <&ccu RST_USB_PHY2>;
reset-names = "usb0_reset", "usb1_reset", "usb2_reset";
status = "disabled";
};
- ehci0: usb at 01c14000 {
+ ehci0: usb at 1c14000 {
compatible = "allwinner,sun4i-a10-ehci", "generic-ehci";
reg = <0x01c14000 0x100>;
interrupts = <39>;
- clocks = <&ahb_gates 1>;
+ clocks = <&ccu CLK_AHB_EHCI0>;
phys = <&usbphy 1>;
phy-names = "usb";
status = "disabled";
};
- ohci0: usb at 01c14400 {
+ ohci0: usb at 1c14400 {
compatible = "allwinner,sun4i-a10-ohci", "generic-ohci";
reg = <0x01c14400 0x100>;
interrupts = <64>;
- clocks = <&usb_clk 6>, <&ahb_gates 2>;
+ clocks = <&ccu CLK_USB_OHCI0>, <&ccu CLK_AHB_OHCI0>;
phys = <&usbphy 1>;
phy-names = "usb";
status = "disabled";
};
- crypto: crypto-engine at 01c15000 {
+ crypto: crypto-engine at 1c15000 {
compatible = "allwinner,sun4i-a10-crypto";
reg = <0x01c15000 0x1000>;
interrupts = <86>;
- clocks = <&ahb_gates 5>, <&ss_clk>;
+ clocks = <&ccu CLK_AHB_SS>, <&ccu CLK_SS>;
clock-names = "ahb", "mod";
};
- spi2: spi at 01c17000 {
+ hdmi: hdmi at 1c16000 {
+ compatible = "allwinner,sun4i-a10-hdmi";
+ reg = <0x01c16000 0x1000>;
+ interrupts = <58>;
+ clocks = <&ccu CLK_AHB_HDMI0>, <&ccu CLK_HDMI>,
+ <&ccu CLK_PLL_VIDEO0_2X>,
+ <&ccu CLK_PLL_VIDEO1_2X>;
+ clock-names = "ahb", "mod", "pll-0", "pll-1";
+ dmas = <&dma SUN4I_DMA_NORMAL 16>,
+ <&dma SUN4I_DMA_NORMAL 16>,
+ <&dma SUN4I_DMA_DEDICATED 24>;
+ dma-names = "ddc-tx", "ddc-rx", "audio-tx";
+ status = "disabled";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ hdmi_in: port at 0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0>;
+
+ hdmi_in_tcon0: endpoint at 0 {
+ reg = <0>;
+ remote-endpoint = <&tcon0_out_hdmi>;
+ };
+
+ hdmi_in_tcon1: endpoint at 1 {
+ reg = <1>;
+ remote-endpoint = <&tcon1_out_hdmi>;
+ };
+ };
+
+ hdmi_out: port at 1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <1>;
+ };
+ };
+ };
+
+ spi2: spi at 1c17000 {
compatible = "allwinner,sun4i-a10-spi";
reg = <0x01c17000 0x1000>;
interrupts = <12>;
- clocks = <&ahb_gates 22>, <&spi2_clk>;
+ clocks = <&ccu CLK_AHB_SPI2>, <&ccu CLK_SPI2>;
clock-names = "ahb", "mod";
dmas = <&dma SUN4I_DMA_DEDICATED 29>,
<&dma SUN4I_DMA_DEDICATED 28>;
@@ -914,39 +551,39 @@
#size-cells = <0>;
};
- ahci: sata at 01c18000 {
+ ahci: sata at 1c18000 {
compatible = "allwinner,sun4i-a10-ahci";
reg = <0x01c18000 0x1000>;
interrupts = <56>;
- clocks = <&pll6 0>, <&ahb_gates 25>;
+ clocks = <&ccu CLK_AHB_SATA>, <&ccu CLK_SATA>;
status = "disabled";
};
- ehci1: usb at 01c1c000 {
+ ehci1: usb at 1c1c000 {
compatible = "allwinner,sun4i-a10-ehci", "generic-ehci";
reg = <0x01c1c000 0x100>;
interrupts = <40>;
- clocks = <&ahb_gates 3>;
+ clocks = <&ccu CLK_AHB_EHCI1>;
phys = <&usbphy 2>;
phy-names = "usb";
status = "disabled";
};
- ohci1: usb at 01c1c400 {
+ ohci1: usb at 1c1c400 {
compatible = "allwinner,sun4i-a10-ohci", "generic-ohci";
reg = <0x01c1c400 0x100>;
interrupts = <65>;
- clocks = <&usb_clk 7>, <&ahb_gates 4>;
+ clocks = <&ccu CLK_USB_OHCI1>, <&ccu CLK_AHB_OHCI1>;
phys = <&usbphy 2>;
phy-names = "usb";
status = "disabled";
};
- spi3: spi at 01c1f000 {
+ spi3: spi at 1c1f000 {
compatible = "allwinner,sun4i-a10-spi";
reg = <0x01c1f000 0x1000>;
interrupts = <50>;
- clocks = <&ahb_gates 23>, <&spi3_clk>;
+ clocks = <&ccu CLK_AHB_SPI3>, <&ccu CLK_SPI3>;
clock-names = "ahb", "mod";
dmas = <&dma SUN4I_DMA_DEDICATED 31>,
<&dma SUN4I_DMA_DEDICATED 30>;
@@ -956,230 +593,191 @@
#size-cells = <0>;
};
- intc: interrupt-controller at 01c20400 {
+ ccu: clock at 1c20000 {
+ compatible = "allwinner,sun4i-a10-ccu";
+ reg = <0x01c20000 0x400>;
+ clocks = <&osc24M>, <&osc32k>;
+ clock-names = "hosc", "losc";
+ #clock-cells = <1>;
+ #reset-cells = <1>;
+ };
+
+ intc: interrupt-controller at 1c20400 {
compatible = "allwinner,sun4i-a10-ic";
reg = <0x01c20400 0x400>;
interrupt-controller;
#interrupt-cells = <1>;
};
- pio: pinctrl at 01c20800 {
+ pio: pinctrl at 1c20800 {
compatible = "allwinner,sun4i-a10-pinctrl";
reg = <0x01c20800 0x400>;
interrupts = <28>;
- clocks = <&apb0_gates 5>;
+ clocks = <&ccu CLK_APB0_PIO>, <&osc24M>, <&osc32k>;
+ clock-names = "apb", "hosc", "losc";
gpio-controller;
interrupt-controller;
#interrupt-cells = <3>;
#gpio-cells = <3>;
- emac_pins_a: emac0 at 0 {
- allwinner,pins = "PA0", "PA1", "PA2",
- "PA3", "PA4", "PA5", "PA6",
- "PA7", "PA8", "PA9", "PA10",
- "PA11", "PA12", "PA13", "PA14",
- "PA15", "PA16";
- allwinner,function = "emac";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ can0_ph_pins: can0-ph-pins {
+ pins = "PH20", "PH21";
+ function = "can";
};
- i2c0_pins_a: i2c0 at 0 {
- allwinner,pins = "PB0", "PB1";
- allwinner,function = "i2c0";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ emac_pins: emac0-pins {
+ pins = "PA0", "PA1", "PA2",
+ "PA3", "PA4", "PA5", "PA6",
+ "PA7", "PA8", "PA9", "PA10",
+ "PA11", "PA12", "PA13", "PA14",
+ "PA15", "PA16";
+ function = "emac";
};
- i2c1_pins_a: i2c1 at 0 {
- allwinner,pins = "PB18", "PB19";
- allwinner,function = "i2c1";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ i2c0_pins: i2c0-pins {
+ pins = "PB0", "PB1";
+ function = "i2c0";
};
- i2c2_pins_a: i2c2 at 0 {
- allwinner,pins = "PB20", "PB21";
- allwinner,function = "i2c2";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ i2c1_pins: i2c1-pins {
+ pins = "PB18", "PB19";
+ function = "i2c1";
};
- ir0_rx_pins_a: ir0 at 0 {
- allwinner,pins = "PB4";
- allwinner,function = "ir0";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ i2c2_pins: i2c2-pins {
+ pins = "PB20", "PB21";
+ function = "i2c2";
};
- ir0_tx_pins_a: ir0 at 1 {
- allwinner,pins = "PB3";
- allwinner,function = "ir0";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ ir0_rx_pins: ir0-rx-pin {
+ pins = "PB4";
+ function = "ir0";
};
- ir1_rx_pins_a: ir1 at 0 {
- allwinner,pins = "PB23";
- allwinner,function = "ir1";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ ir0_tx_pins: ir0-tx-pin {
+ pins = "PB3";
+ function = "ir0";
};
- ir1_tx_pins_a: ir1 at 1 {
- allwinner,pins = "PB22";
- allwinner,function = "ir1";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ ir1_rx_pins: ir1-rx-pin {
+ pins = "PB23";
+ function = "ir1";
};
- mmc0_pins_a: mmc0 at 0 {
- allwinner,pins = "PF0", "PF1", "PF2",
- "PF3", "PF4", "PF5";
- allwinner,function = "mmc0";
- allwinner,drive = <SUN4I_PINCTRL_30_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ ir1_tx_pins: ir1-tx-pin {
+ pins = "PB22";
+ function = "ir1";
};
- mmc0_cd_pin_reference_design: mmc0_cd_pin at 0 {
- allwinner,pins = "PH1";
- allwinner,function = "gpio_in";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+ mmc0_pins: mmc0-pins {
+ pins = "PF0", "PF1", "PF2",
+ "PF3", "PF4", "PF5";
+ function = "mmc0";
+ drive-strength = <30>;
+ bias-pull-up;
};
- ps20_pins_a: ps20 at 0 {
- allwinner,pins = "PI20", "PI21";
- allwinner,function = "ps2";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ ps2_ch0_pins: ps2-ch0-pins {
+ pins = "PI20", "PI21";
+ function = "ps2";
};
- ps21_pins_a: ps21 at 0 {
- allwinner,pins = "PH12", "PH13";
- allwinner,function = "ps2";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ ps2_ch1_ph_pins: ps2-ch1-ph-pins {
+ pins = "PH12", "PH13";
+ function = "ps2";
};
- pwm0_pins_a: pwm0 at 0 {
- allwinner,pins = "PB2";
- allwinner,function = "pwm";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ pwm0_pin: pwm0-pin {
+ pins = "PB2";
+ function = "pwm";
};
- pwm1_pins_a: pwm1 at 0 {
- allwinner,pins = "PI3";
- allwinner,function = "pwm";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ pwm1_pin: pwm1-pin {
+ pins = "PI3";
+ function = "pwm";
};
- spdif_tx_pins_a: spdif at 0 {
- allwinner,pins = "PB13";
- allwinner,function = "spdif";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+ spdif_tx_pin: spdif-tx-pin {
+ pins = "PB13";
+ function = "spdif";
+ bias-pull-up;
};
- spi0_pins_a: spi0 at 0 {
- allwinner,pins = "PI11", "PI12", "PI13";
- allwinner,function = "spi0";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ spi0_pi_pins: spi0-pi-pins {
+ pins = "PI11", "PI12", "PI13";
+ function = "spi0";
};
- spi0_cs0_pins_a: spi0_cs0 at 0 {
- allwinner,pins = "PI10";
- allwinner,function = "spi0";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ spi0_cs0_pi_pin: spi0-cs0-pi-pin {
+ pins = "PI10";
+ function = "spi0";
};
- spi1_pins_a: spi1 at 0 {
- allwinner,pins = "PI17", "PI18", "PI19";
- allwinner,function = "spi1";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ spi1_pins: spi1-pins {
+ pins = "PI17", "PI18", "PI19";
+ function = "spi1";
};
- spi1_cs0_pins_a: spi1_cs0 at 0 {
- allwinner,pins = "PI16";
- allwinner,function = "spi1";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ spi1_cs0_pin: spi1-cs0-pin {
+ pins = "PI16";
+ function = "spi1";
};
- spi2_pins_a: spi2 at 0 {
- allwinner,pins = "PC20", "PC21", "PC22";
- allwinner,function = "spi2";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ spi2_pb_pins: spi2-pb-pins {
+ pins = "PB15", "PB16", "PB17";
+ function = "spi2";
};
- spi2_pins_b: spi2 at 1 {
- allwinner,pins = "PB15", "PB16", "PB17";
- allwinner,function = "spi2";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ spi2_pc_pins: spi2-pc-pins {
+ pins = "PC20", "PC21", "PC22";
+ function = "spi2";
};
- spi2_cs0_pins_a: spi2_cs0 at 0 {
- allwinner,pins = "PC19";
- allwinner,function = "spi2";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ spi2_cs0_pb_pin: spi2-cs0-pb-pin {
+ pins = "PB14";
+ function = "spi2";
};
- spi2_cs0_pins_b: spi2_cs0 at 1 {
- allwinner,pins = "PB14";
- allwinner,function = "spi2";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ spi2_cs0_pc_pins: spi2-cs0-pc-pin {
+ pins = "PC19";
+ function = "spi2";
};
- uart0_pins_a: uart0 at 0 {
- allwinner,pins = "PB22", "PB23";
- allwinner,function = "uart0";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ uart0_pb_pins: uart0-pb-pins {
+ pins = "PB22", "PB23";
+ function = "uart0";
};
- uart0_pins_b: uart0 at 1 {
- allwinner,pins = "PF2", "PF4";
- allwinner,function = "uart0";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ uart0_pf_pins: uart0-pf-pins {
+ pins = "PF2", "PF4";
+ function = "uart0";
};
- uart1_pins_a: uart1 at 0 {
- allwinner,pins = "PA10", "PA11";
- allwinner,function = "uart1";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ uart1_pins: uart1-pins {
+ pins = "PA10", "PA11";
+ function = "uart1";
};
};
- timer at 01c20c00 {
+ timer at 1c20c00 {
compatible = "allwinner,sun4i-a10-timer";
reg = <0x01c20c00 0x90>;
interrupts = <22>;
clocks = <&osc24M>;
};
- wdt: watchdog at 01c20c90 {
+ wdt: watchdog at 1c20c90 {
compatible = "allwinner,sun4i-a10-wdt";
reg = <0x01c20c90 0x10>;
};
- rtc: rtc at 01c20d00 {
+ rtc: rtc at 1c20d00 {
compatible = "allwinner,sun4i-a10-rtc";
reg = <0x01c20d00 0x20>;
interrupts = <24>;
};
- pwm: pwm at 01c20e00 {
+ pwm: pwm at 1c20e00 {
compatible = "allwinner,sun4i-a10-pwm";
reg = <0x01c20e00 0xc>;
clocks = <&osc24M>;
@@ -1187,12 +785,12 @@
status = "disabled";
};
- spdif: spdif at 01c21000 {
+ spdif: spdif at 1c21000 {
#sound-dai-cells = <0>;
compatible = "allwinner,sun4i-a10-spdif";
reg = <0x01c21000 0x400>;
interrupts = <13>;
- clocks = <&apb0_gates 1>, <&spdif_clk>;
+ clocks = <&ccu CLK_APB0_SPDIF>, <&ccu CLK_SPDIF>;
clock-names = "apb", "spdif";
dmas = <&dma SUN4I_DMA_NORMAL 2>,
<&dma SUN4I_DMA_NORMAL 2>;
@@ -1200,37 +798,50 @@
status = "disabled";
};
- ir0: ir at 01c21800 {
+ ir0: ir at 1c21800 {
compatible = "allwinner,sun4i-a10-ir";
- clocks = <&apb0_gates 6>, <&ir0_clk>;
+ clocks = <&ccu CLK_APB0_IR0>, <&ccu CLK_IR0>;
clock-names = "apb", "ir";
interrupts = <5>;
reg = <0x01c21800 0x40>;
status = "disabled";
};
- ir1: ir at 01c21c00 {
+ ir1: ir at 1c21c00 {
compatible = "allwinner,sun4i-a10-ir";
- clocks = <&apb0_gates 7>, <&ir1_clk>;
+ clocks = <&ccu CLK_APB0_IR1>, <&ccu CLK_IR1>;
clock-names = "apb", "ir";
interrupts = <6>;
reg = <0x01c21c00 0x40>;
status = "disabled";
};
- lradc: lradc at 01c22800 {
+ i2s0: i2s at 1c22400 {
+ #sound-dai-cells = <0>;
+ compatible = "allwinner,sun4i-a10-i2s";
+ reg = <0x01c22400 0x400>;
+ interrupts = <16>;
+ clocks = <&ccu CLK_APB0_I2S0>, <&ccu CLK_I2S0>;
+ clock-names = "apb", "mod";
+ dmas = <&dma SUN4I_DMA_NORMAL 3>,
+ <&dma SUN4I_DMA_NORMAL 3>;
+ dma-names = "rx", "tx";
+ status = "disabled";
+ };
+
+ lradc: lradc at 1c22800 {
compatible = "allwinner,sun4i-a10-lradc-keys";
reg = <0x01c22800 0x100>;
interrupts = <31>;
status = "disabled";
};
- codec: codec at 01c22c00 {
+ codec: codec at 1c22c00 {
#sound-dai-cells = <0>;
compatible = "allwinner,sun4i-a10-codec";
reg = <0x01c22c00 0x40>;
interrupts = <30>;
- clocks = <&apb0_gates 0>, <&codec_clk>;
+ clocks = <&ccu CLK_APB0_CODEC>, <&ccu CLK_CODEC>;
clock-names = "apb", "codec";
dmas = <&dma SUN4I_DMA_NORMAL 19>,
<&dma SUN4I_DMA_NORMAL 19>;
@@ -1238,142 +849,316 @@
status = "disabled";
};
- sid: eeprom at 01c23800 {
+ sid: eeprom at 1c23800 {
compatible = "allwinner,sun4i-a10-sid";
reg = <0x01c23800 0x10>;
};
- rtp: rtp at 01c25000 {
+ rtp: rtp at 1c25000 {
compatible = "allwinner,sun4i-a10-ts";
reg = <0x01c25000 0x100>;
interrupts = <29>;
#thermal-sensor-cells = <0>;
};
- uart0: serial at 01c28000 {
+ uart0: serial at 1c28000 {
compatible = "snps,dw-apb-uart";
reg = <0x01c28000 0x400>;
interrupts = <1>;
reg-shift = <2>;
reg-io-width = <4>;
- clocks = <&apb1_gates 16>;
+ clocks = <&ccu CLK_APB1_UART0>;
status = "disabled";
};
- uart1: serial at 01c28400 {
+ uart1: serial at 1c28400 {
compatible = "snps,dw-apb-uart";
reg = <0x01c28400 0x400>;
interrupts = <2>;
reg-shift = <2>;
reg-io-width = <4>;
- clocks = <&apb1_gates 17>;
+ clocks = <&ccu CLK_APB1_UART1>;
status = "disabled";
};
- uart2: serial at 01c28800 {
+ uart2: serial at 1c28800 {
compatible = "snps,dw-apb-uart";
reg = <0x01c28800 0x400>;
interrupts = <3>;
reg-shift = <2>;
reg-io-width = <4>;
- clocks = <&apb1_gates 18>;
+ clocks = <&ccu CLK_APB1_UART2>;
status = "disabled";
};
- uart3: serial at 01c28c00 {
+ uart3: serial at 1c28c00 {
compatible = "snps,dw-apb-uart";
reg = <0x01c28c00 0x400>;
interrupts = <4>;
reg-shift = <2>;
reg-io-width = <4>;
- clocks = <&apb1_gates 19>;
+ clocks = <&ccu CLK_APB1_UART3>;
status = "disabled";
};
- uart4: serial at 01c29000 {
+ uart4: serial at 1c29000 {
compatible = "snps,dw-apb-uart";
reg = <0x01c29000 0x400>;
interrupts = <17>;
reg-shift = <2>;
reg-io-width = <4>;
- clocks = <&apb1_gates 20>;
+ clocks = <&ccu CLK_APB1_UART4>;
status = "disabled";
};
- uart5: serial at 01c29400 {
+ uart5: serial at 1c29400 {
compatible = "snps,dw-apb-uart";
reg = <0x01c29400 0x400>;
interrupts = <18>;
reg-shift = <2>;
reg-io-width = <4>;
- clocks = <&apb1_gates 21>;
+ clocks = <&ccu CLK_APB1_UART5>;
status = "disabled";
};
- uart6: serial at 01c29800 {
+ uart6: serial at 1c29800 {
compatible = "snps,dw-apb-uart";
reg = <0x01c29800 0x400>;
interrupts = <19>;
reg-shift = <2>;
reg-io-width = <4>;
- clocks = <&apb1_gates 22>;
+ clocks = <&ccu CLK_APB1_UART6>;
status = "disabled";
};
- uart7: serial at 01c29c00 {
+ uart7: serial at 1c29c00 {
compatible = "snps,dw-apb-uart";
reg = <0x01c29c00 0x400>;
interrupts = <20>;
reg-shift = <2>;
reg-io-width = <4>;
- clocks = <&apb1_gates 23>;
+ clocks = <&ccu CLK_APB1_UART7>;
status = "disabled";
};
- i2c0: i2c at 01c2ac00 {
+ ps20: ps2 at 1c2a000 {
+ compatible = "allwinner,sun4i-a10-ps2";
+ reg = <0x01c2a000 0x400>;
+ interrupts = <62>;
+ clocks = <&ccu CLK_APB1_PS20>;
+ status = "disabled";
+ };
+
+ ps21: ps2 at 1c2a400 {
+ compatible = "allwinner,sun4i-a10-ps2";
+ reg = <0x01c2a400 0x400>;
+ interrupts = <63>;
+ clocks = <&ccu CLK_APB1_PS21>;
+ status = "disabled";
+ };
+
+ i2c0: i2c at 1c2ac00 {
compatible = "allwinner,sun4i-a10-i2c";
reg = <0x01c2ac00 0x400>;
interrupts = <7>;
- clocks = <&apb1_gates 0>;
+ clocks = <&ccu CLK_APB1_I2C0>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c0_pins>;
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
};
- i2c1: i2c at 01c2b000 {
+ i2c1: i2c at 1c2b000 {
compatible = "allwinner,sun4i-a10-i2c";
reg = <0x01c2b000 0x400>;
interrupts = <8>;
- clocks = <&apb1_gates 1>;
+ clocks = <&ccu CLK_APB1_I2C1>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c1_pins>;
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
};
- i2c2: i2c at 01c2b400 {
+ i2c2: i2c at 1c2b400 {
compatible = "allwinner,sun4i-a10-i2c";
reg = <0x01c2b400 0x400>;
interrupts = <9>;
- clocks = <&apb1_gates 2>;
+ clocks = <&ccu CLK_APB1_I2C2>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c2_pins>;
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
};
- ps20: ps2 at 01c2a000 {
- compatible = "allwinner,sun4i-a10-ps2";
- reg = <0x01c2a000 0x400>;
- interrupts = <62>;
- clocks = <&apb1_gates 6>;
+ can0: can at 1c2bc00 {
+ compatible = "allwinner,sun4i-a10-can";
+ reg = <0x01c2bc00 0x400>;
+ interrupts = <26>;
+ clocks = <&ccu CLK_APB1_CAN>;
status = "disabled";
};
- ps21: ps2 at 01c2a400 {
- compatible = "allwinner,sun4i-a10-ps2";
- reg = <0x01c2a400 0x400>;
- interrupts = <63>;
- clocks = <&apb1_gates 7>;
- status = "disabled";
+ fe0: display-frontend at 1e00000 {
+ compatible = "allwinner,sun4i-a10-display-frontend";
+ reg = <0x01e00000 0x20000>;
+ interrupts = <47>;
+ clocks = <&ccu CLK_AHB_DE_FE0>, <&ccu CLK_DE_FE0>,
+ <&ccu CLK_DRAM_DE_FE0>;
+ clock-names = "ahb", "mod",
+ "ram";
+ resets = <&ccu RST_DE_FE0>;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ fe0_out: port at 1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <1>;
+
+ fe0_out_be0: endpoint at 0 {
+ reg = <0>;
+ remote-endpoint = <&be0_in_fe0>;
+ };
+
+ fe0_out_be1: endpoint at 1 {
+ reg = <1>;
+ remote-endpoint = <&be1_in_fe0>;
+ };
+ };
+ };
+ };
+
+ fe1: display-frontend at 1e20000 {
+ compatible = "allwinner,sun4i-a10-display-frontend";
+ reg = <0x01e20000 0x20000>;
+ interrupts = <48>;
+ clocks = <&ccu CLK_AHB_DE_FE1>, <&ccu CLK_DE_FE1>,
+ <&ccu CLK_DRAM_DE_FE1>;
+ clock-names = "ahb", "mod",
+ "ram";
+ resets = <&ccu RST_DE_FE1>;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ fe1_out: port at 1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <1>;
+
+ fe1_out_be0: endpoint at 0 {
+ reg = <0>;
+ remote-endpoint = <&be0_in_fe1>;
+ };
+
+ fe1_out_be1: endpoint at 1 {
+ reg = <1>;
+ remote-endpoint = <&be1_in_fe1>;
+ };
+ };
+ };
+ };
+
+ be1: display-backend at 1e40000 {
+ compatible = "allwinner,sun4i-a10-display-backend";
+ reg = <0x01e40000 0x10000>;
+ interrupts = <48>;
+ clocks = <&ccu CLK_AHB_DE_BE1>, <&ccu CLK_DE_BE1>,
+ <&ccu CLK_DRAM_DE_BE1>;
+ clock-names = "ahb", "mod",
+ "ram";
+ resets = <&ccu RST_DE_BE1>;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ be1_in: port at 0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0>;
+
+ be1_in_fe0: endpoint at 0 {
+ reg = <0>;
+ remote-endpoint = <&fe0_out_be1>;
+ };
+
+ be1_in_fe1: endpoint at 1 {
+ reg = <1>;
+ remote-endpoint = <&fe1_out_be1>;
+ };
+ };
+
+ be1_out: port at 1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <1>;
+
+ be1_out_tcon0: endpoint at 0 {
+ reg = <0>;
+ remote-endpoint = <&tcon0_in_be1>;
+ };
+
+ be1_out_tcon1: endpoint at 1 {
+ reg = <1>;
+ remote-endpoint = <&tcon1_in_be1>;
+ };
+ };
+ };
+ };
+
+ be0: display-backend at 1e60000 {
+ compatible = "allwinner,sun4i-a10-display-backend";
+ reg = <0x01e60000 0x10000>;
+ interrupts = <47>;
+ clocks = <&ccu CLK_AHB_DE_BE0>, <&ccu CLK_DE_BE0>,
+ <&ccu CLK_DRAM_DE_BE0>;
+ clock-names = "ahb", "mod",
+ "ram";
+ resets = <&ccu RST_DE_BE0>;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ be0_in: port at 0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0>;
+
+ be0_in_fe0: endpoint at 0 {
+ reg = <0>;
+ remote-endpoint = <&fe0_out_be0>;
+ };
+
+ be0_in_fe1: endpoint at 1 {
+ reg = <1>;
+ remote-endpoint = <&fe1_out_be0>;
+ };
+ };
+
+ be0_out: port at 1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <1>;
+
+ be0_out_tcon0: endpoint at 0 {
+ reg = <0>;
+ remote-endpoint = <&tcon0_in_be0>;
+ };
+
+ be0_out_tcon1: endpoint at 1 {
+ reg = <1>;
+ remote-endpoint = <&tcon1_in_be0>;
+ };
+ };
+ };
};
};
};
diff --git a/include/dt-bindings/clock/sun4i-a10-ccu.h b/include/dt-bindings/clock/sun4i-a10-ccu.h
new file mode 100644
index 0000000000..e4fa61be5c
--- /dev/null
+++ b/include/dt-bindings/clock/sun4i-a10-ccu.h
@@ -0,0 +1,202 @@
+/*
+ * Copyright (C) 2017 Priit Laes <plaes@plaes.org>
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ * a) This file is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This file is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ * b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#ifndef _DT_BINDINGS_CLK_SUN4I_A10_H_
+#define _DT_BINDINGS_CLK_SUN4I_A10_H_
+
+#define CLK_HOSC 1
+#define CLK_PLL_VIDEO0_2X 9
+#define CLK_PLL_VIDEO1_2X 18
+#define CLK_CPU 20
+
+/* AHB Gates */
+#define CLK_AHB_OTG 26
+#define CLK_AHB_EHCI0 27
+#define CLK_AHB_OHCI0 28
+#define CLK_AHB_EHCI1 29
+#define CLK_AHB_OHCI1 30
+#define CLK_AHB_SS 31
+#define CLK_AHB_DMA 32
+#define CLK_AHB_BIST 33
+#define CLK_AHB_MMC0 34
+#define CLK_AHB_MMC1 35
+#define CLK_AHB_MMC2 36
+#define CLK_AHB_MMC3 37
+#define CLK_AHB_MS 38
+#define CLK_AHB_NAND 39
+#define CLK_AHB_SDRAM 40
+#define CLK_AHB_ACE 41
+#define CLK_AHB_EMAC 42
+#define CLK_AHB_TS 43
+#define CLK_AHB_SPI0 44
+#define CLK_AHB_SPI1 45
+#define CLK_AHB_SPI2 46
+#define CLK_AHB_SPI3 47
+#define CLK_AHB_PATA 48
+#define CLK_AHB_SATA 49
+#define CLK_AHB_GPS 50
+#define CLK_AHB_HSTIMER 51
+#define CLK_AHB_VE 52
+#define CLK_AHB_TVD 53
+#define CLK_AHB_TVE0 54
+#define CLK_AHB_TVE1 55
+#define CLK_AHB_LCD0 56
+#define CLK_AHB_LCD1 57
+#define CLK_AHB_CSI0 58
+#define CLK_AHB_CSI1 59
+#define CLK_AHB_HDMI0 60
+#define CLK_AHB_HDMI1 61
+#define CLK_AHB_DE_BE0 62
+#define CLK_AHB_DE_BE1 63
+#define CLK_AHB_DE_FE0 64
+#define CLK_AHB_DE_FE1 65
+#define CLK_AHB_GMAC 66
+#define CLK_AHB_MP 67
+#define CLK_AHB_GPU 68
+
+/* APB0 Gates */
+#define CLK_APB0_CODEC 69
+#define CLK_APB0_SPDIF 70
+#define CLK_APB0_I2S0 71
+#define CLK_APB0_AC97 72
+#define CLK_APB0_I2S1 73
+#define CLK_APB0_PIO 74
+#define CLK_APB0_IR0 75
+#define CLK_APB0_IR1 76
+#define CLK_APB0_I2S2 77
+#define CLK_APB0_KEYPAD 78
+
+/* APB1 Gates */
+#define CLK_APB1_I2C0 79
+#define CLK_APB1_I2C1 80
+#define CLK_APB1_I2C2 81
+#define CLK_APB1_I2C3 82
+#define CLK_APB1_CAN 83
+#define CLK_APB1_SCR 84
+#define CLK_APB1_PS20 85
+#define CLK_APB1_PS21 86
+#define CLK_APB1_I2C4 87
+#define CLK_APB1_UART0 88
+#define CLK_APB1_UART1 89
+#define CLK_APB1_UART2 90
+#define CLK_APB1_UART3 91
+#define CLK_APB1_UART4 92
+#define CLK_APB1_UART5 93
+#define CLK_APB1_UART6 94
+#define CLK_APB1_UART7 95
+
+/* IP clocks */
+#define CLK_NAND 96
+#define CLK_MS 97
+#define CLK_MMC0 98
+#define CLK_MMC0_OUTPUT 99
+#define CLK_MMC0_SAMPLE 100
+#define CLK_MMC1 101
+#define CLK_MMC1_OUTPUT 102
+#define CLK_MMC1_SAMPLE 103
+#define CLK_MMC2 104
+#define CLK_MMC2_OUTPUT 105
+#define CLK_MMC2_SAMPLE 106
+#define CLK_MMC3 107
+#define CLK_MMC3_OUTPUT 108
+#define CLK_MMC3_SAMPLE 109
+#define CLK_TS 110
+#define CLK_SS 111
+#define CLK_SPI0 112
+#define CLK_SPI1 113
+#define CLK_SPI2 114
+#define CLK_PATA 115
+#define CLK_IR0 116
+#define CLK_IR1 117
+#define CLK_I2S0 118
+#define CLK_AC97 119
+#define CLK_SPDIF 120
+#define CLK_KEYPAD 121
+#define CLK_SATA 122
+#define CLK_USB_OHCI0 123
+#define CLK_USB_OHCI1 124
+#define CLK_USB_PHY 125
+#define CLK_GPS 126
+#define CLK_SPI3 127
+#define CLK_I2S1 128
+#define CLK_I2S2 129
+
+/* DRAM Gates */
+#define CLK_DRAM_VE 130
+#define CLK_DRAM_CSI0 131
+#define CLK_DRAM_CSI1 132
+#define CLK_DRAM_TS 133
+#define CLK_DRAM_TVD 134
+#define CLK_DRAM_TVE0 135
+#define CLK_DRAM_TVE1 136
+#define CLK_DRAM_OUT 137
+#define CLK_DRAM_DE_FE1 138
+#define CLK_DRAM_DE_FE0 139
+#define CLK_DRAM_DE_BE0 140
+#define CLK_DRAM_DE_BE1 141
+#define CLK_DRAM_MP 142
+#define CLK_DRAM_ACE 143
+
+/* Display Engine Clocks */
+#define CLK_DE_BE0 144
+#define CLK_DE_BE1 145
+#define CLK_DE_FE0 146
+#define CLK_DE_FE1 147
+#define CLK_DE_MP 148
+#define CLK_TCON0_CH0 149
+#define CLK_TCON1_CH0 150
+#define CLK_CSI_SCLK 151
+#define CLK_TVD_SCLK2 152
+#define CLK_TVD 153
+#define CLK_TCON0_CH1_SCLK2 154
+#define CLK_TCON0_CH1 155
+#define CLK_TCON1_CH1_SCLK2 156
+#define CLK_TCON1_CH1 157
+#define CLK_CSI0 158
+#define CLK_CSI1 159
+#define CLK_CODEC 160
+#define CLK_VE 161
+#define CLK_AVS 162
+#define CLK_ACE 163
+#define CLK_HDMI 164
+#define CLK_GPU 165
+
+#endif /* _DT_BINDINGS_CLK_SUN4I_A10_H_ */
diff --git a/include/dt-bindings/reset/sun4i-a10-ccu.h b/include/dt-bindings/reset/sun4i-a10-ccu.h
new file mode 100644
index 0000000000..5f4480bedc
--- /dev/null
+++ b/include/dt-bindings/reset/sun4i-a10-ccu.h
@@ -0,0 +1,69 @@
+/*
+ * Copyright (C) 2017 Priit Laes <plaes@plaes.org>
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ * a) This file is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This file is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ * b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#ifndef _DT_BINDINGS_RST_SUN4I_A10_H
+#define _DT_BINDINGS_RST_SUN4I_A10_H
+
+#define RST_USB_PHY0 1
+#define RST_USB_PHY1 2
+#define RST_USB_PHY2 3
+#define RST_GPS 4
+#define RST_DE_BE0 5
+#define RST_DE_BE1 6
+#define RST_DE_FE0 7
+#define RST_DE_FE1 8
+#define RST_DE_MP 9
+#define RST_TVE0 10
+#define RST_TCON0 11
+#define RST_TVE1 12
+#define RST_TCON1 13
+#define RST_CSI0 14
+#define RST_CSI1 15
+#define RST_VE 16
+#define RST_ACE 17
+#define RST_LVDS 18
+#define RST_GPU 19
+#define RST_HDMI_H 20
+#define RST_HDMI_SYS 21
+#define RST_HDMI_AUDIO_DMA 22
+
+#endif /* DT_BINDINGS_RST_SUN4I_A10_H */
--
2.18.0.321.gffc6fa0e3
^ permalink raw reply related [flat|nested] 11+ messages in thread
* [U-Boot] [PATCH v2 2/7] ARM: dts: sun5i: Update A10s/A13/gr8/r8 dts(i) files from Linux-v4.18-rc3
2018-08-09 13:08 [U-Boot] [PATCH v2 0/7] ARM: dts: sunxi: Update dts(i) files from Linux-v4.18-rc3 Jagan Teki
2018-08-09 13:08 ` [U-Boot] [PATCH v2 1/7] ARM: dts: sun4i: Update A10 " Jagan Teki
@ 2018-08-09 13:08 ` Jagan Teki
2018-08-09 13:08 ` [U-Boot] [PATCH v2 3/7] ARM: dts: sun6i: Update A31/A31s " Jagan Teki
` (5 subsequent siblings)
7 siblings, 0 replies; 11+ messages in thread
From: Jagan Teki @ 2018-08-09 13:08 UTC (permalink / raw)
To: u-boot
Update all A10s/A13/gr8/r8devicetree dtsi and dtsi files from
Linux-v4.18-rc3 with below commit:
commit 190e3138f9577885691540dca59c2f07540bde04
Merge: cafc87023b0d a7affb13b271
Author: Arnd Bergmann <arnd@arndb.de>
Date: Tue Mar 27 14:58:00 2018 +0200
Merge tag 'sunxi-h3-h5-for-4.17' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into next/dt
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
---
arch/arm/dts/sun5i-a10s-auxtek-t003.dts | 26 +-
arch/arm/dts/sun5i-a10s-auxtek-t004.dts | 42 +-
arch/arm/dts/sun5i-a10s-mk802.dts | 24 +-
arch/arm/dts/sun5i-a10s-olinuxino-micro.dts | 82 +-
arch/arm/dts/sun5i-a10s-r7-tv-dongle.dts | 24 +-
arch/arm/dts/sun5i-a10s-wobo-i5.dts | 29 +-
arch/arm/dts/sun5i-a10s.dtsi | 224 +---
.../dts/sun5i-a13-empire-electronix-d709.dts | 29 +-
arch/arm/dts/sun5i-a13-hsg-h702.dts | 29 +-
arch/arm/dts/sun5i-a13-inet-98v-rev2.dts | 164 +--
arch/arm/dts/sun5i-a13-olinuxino-micro.dts | 44 +-
arch/arm/dts/sun5i-a13-olinuxino.dts | 100 +-
arch/arm/dts/sun5i-a13-utoo-p66.dts | 49 +-
arch/arm/dts/sun5i-a13.dtsi | 268 +---
arch/arm/dts/sun5i-gr8-chip-pro.dts | 16 +-
arch/arm/dts/sun5i-gr8.dtsi | 1082 +----------------
arch/arm/dts/sun5i-r8-chip.dts | 91 +-
arch/arm/dts/sun5i-r8.dtsi | 40 -
.../dts/sun5i-reference-design-tablet.dtsi | 69 +-
arch/arm/dts/sun5i.dtsi | 792 ++++++------
include/dt-bindings/clock/sun5i-ccu.h | 106 ++
include/dt-bindings/reset/sun5i-ccu.h | 32 +
22 files changed, 1016 insertions(+), 2346 deletions(-)
create mode 100644 include/dt-bindings/clock/sun5i-ccu.h
create mode 100644 include/dt-bindings/reset/sun5i-ccu.h
diff --git a/arch/arm/dts/sun5i-a10s-auxtek-t003.dts b/arch/arm/dts/sun5i-a10s-auxtek-t003.dts
index d4ad021823..39504d720e 100644
--- a/arch/arm/dts/sun5i-a10s-auxtek-t003.dts
+++ b/arch/arm/dts/sun5i-a10s-auxtek-t003.dts
@@ -44,7 +44,6 @@
#include "sun5i-a10s.dtsi"
#include "sunxi-common-regulators.dtsi"
#include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/pinctrl/sun4i-a10.h>
/ {
model = "Auxtek t003 A10s hdmi tv-stick";
@@ -94,8 +93,7 @@
pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_t003>;
vmmc-supply = <®_vcc3v3>;
bus-width = <4>;
- cd-gpios = <&pio 6 1 GPIO_ACTIVE_HIGH>; /* PG1 */
- cd-inverted;
+ cd-gpios = <&pio 6 1 GPIO_ACTIVE_LOW>; /* PG1 */
status = "okay";
};
@@ -109,17 +107,15 @@
&pio {
mmc0_cd_pin_t003: mmc0_cd_pin at 0 {
- allwinner,pins = "PG1";
- allwinner,function = "gpio_in";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+ pins = "PG1";
+ function = "gpio_in";
+ bias-pull-up;
};
led_pins_t003: led_pins at 0 {
- allwinner,pins = "PB2";
- allwinner,function = "gpio_out";
- allwinner,drive = <SUN4I_PINCTRL_20_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ pins = "PB2";
+ function = "gpio_out";
+ drive-strength = <20>;
};
};
@@ -139,14 +135,6 @@
status = "okay";
};
-&usb0_vbus_pin_a {
- allwinner,pins = "PG13";
-};
-
-&usb1_vbus_pin_a {
- allwinner,pins = "PB10";
-};
-
&usb_otg {
dr_mode = "host";
status = "okay";
diff --git a/arch/arm/dts/sun5i-a10s-auxtek-t004.dts b/arch/arm/dts/sun5i-a10s-auxtek-t004.dts
index a790ec8adb..8d4fb93312 100644
--- a/arch/arm/dts/sun5i-a10s-auxtek-t004.dts
+++ b/arch/arm/dts/sun5i-a10s-auxtek-t004.dts
@@ -44,7 +44,6 @@
#include "sun5i-a10s.dtsi"
#include "sunxi-common-regulators.dtsi"
#include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/pinctrl/sun4i-a10.h>
/ {
model = "Auxtek t004 A10s hdmi tv-stick";
@@ -105,8 +104,7 @@
pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_t004>;
vmmc-supply = <®_vcc3v3>;
bus-width = <4>;
- cd-gpios = <&pio 6 1 GPIO_ACTIVE_HIGH>; /* PG1 */
- cd-inverted;
+ cd-gpios = <&pio 6 1 GPIO_ACTIVE_LOW>; /* PG1 */
status = "okay";
};
@@ -124,26 +122,32 @@
status = "okay";
};
+&otg_sram {
+ status = "okay";
+};
+
&pio {
+ usb0_id_detect_pin: usb0_id_detect_pin at 0 {
+ pins = "PG12";
+ function = "gpio_in";
+ bias-pull-up;
+ };
+
mmc0_cd_pin_t004: mmc0_cd_pin at 0 {
- allwinner,pins = "PG1";
- allwinner,function = "gpio_in";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+ pins = "PG1";
+ function = "gpio_in";
+ bias-pull-up;
};
mmc1_vcc_en_pin_t004: mmc1_vcc_en_pin at 0 {
- allwinner,pins = "PB18";
- allwinner,function = "gpio_out";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ pins = "PB18";
+ function = "gpio_out";
};
led_pins_t004: led_pins at 0 {
- allwinner,pins = "PB2";
- allwinner,function = "gpio_out";
- allwinner,drive = <SUN4I_PINCTRL_20_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ pins = "PB2";
+ function = "gpio_out";
+ drive-strength = <20>;
};
};
@@ -158,11 +162,15 @@
status = "okay";
};
-&usb1_vbus_pin_a {
- allwinner,pins = "PG13";
+&usb_otg {
+ dr_mode = "otg";
+ status = "okay";
};
&usbphy {
+ pinctrl-names = "default";
+ pinctrl-0 = <&usb0_id_detect_pin>;
+ usb0_id_det-gpio = <&pio 6 12 GPIO_ACTIVE_HIGH>; /* PG12 */
usb1_vbus-supply = <®_usb1_vbus>;
status = "okay";
};
diff --git a/arch/arm/dts/sun5i-a10s-mk802.dts b/arch/arm/dts/sun5i-a10s-mk802.dts
index 23b0114eb4..dd7fd5c3d7 100644
--- a/arch/arm/dts/sun5i-a10s-mk802.dts
+++ b/arch/arm/dts/sun5i-a10s-mk802.dts
@@ -92,8 +92,7 @@
pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_mk802>;
vmmc-supply = <®_vcc3v3>;
bus-width = <4>;
- cd-gpios = <&pio 6 1 GPIO_ACTIVE_HIGH>; /* PG1 */
- cd-inverted;
+ cd-gpios = <&pio 6 1 GPIO_ACTIVE_LOW>; /* PG1 */
status = "okay";
};
@@ -116,24 +115,19 @@
&pio {
led_pins_mk802: led_pins at 0 {
- allwinner,pins = "PB2";
- allwinner,function = "gpio_out";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ pins = "PB2";
+ function = "gpio_out";
};
mmc0_cd_pin_mk802: mmc0_cd_pin at 0 {
- allwinner,pins = "PG1";
- allwinner,function = "gpio_in";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+ pins = "PG1";
+ function = "gpio_in";
+ bias-pull-up;
};
usb1_vbus_pin_mk802: usb1_vbus_pin at 0 {
- allwinner,pins = "PB10";
- allwinner,function = "gpio_out";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ pins = "PB10";
+ function = "gpio_out";
};
};
@@ -150,7 +144,7 @@
};
&usb_otg {
- dr_mode = "otg";
+ dr_mode = "peripheral";
status = "okay";
};
diff --git a/arch/arm/dts/sun5i-a10s-olinuxino-micro.dts b/arch/arm/dts/sun5i-a10s-olinuxino-micro.dts
index aef91476f9..2c902ed2c8 100644
--- a/arch/arm/dts/sun5i-a10s-olinuxino-micro.dts
+++ b/arch/arm/dts/sun5i-a10s-olinuxino-micro.dts
@@ -48,7 +48,6 @@
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
-#include <dt-bindings/pinctrl/sun4i-a10.h>
/ {
model = "Olimex A10s-Olinuxino Micro";
@@ -64,6 +63,17 @@
stdout-path = "serial0:115200n8";
};
+ connector {
+ compatible = "hdmi-connector";
+ type = "a";
+
+ port {
+ hdmi_con_in: endpoint {
+ remote-endpoint = <&hdmi_out_con>;
+ };
+ };
+ };
+
leds {
compatible = "gpio-leds";
pinctrl-names = "default";
@@ -77,13 +87,17 @@
};
};
+&be0 {
+ status = "okay";
+};
+
&ehci0 {
status = "okay";
};
&emac {
pinctrl-names = "default";
- pinctrl-0 = <&emac_pins_a>;
+ pinctrl-0 = <&emac_pins_b>;
phy = <&phy1>;
status = "okay";
};
@@ -92,6 +106,16 @@
status = "okay";
};
+&hdmi {
+ status = "okay";
+};
+
+&hdmi_out {
+ hdmi_out_con: endpoint {
+ remote-endpoint = <&hdmi_con_in>;
+ };
+};
+
&i2c0 {
pinctrl-names = "default";
pinctrl-0 = <&i2c0_pins_a>;
@@ -177,8 +201,7 @@
pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_olinuxino_micro>;
vmmc-supply = <®_vcc3v3>;
bus-width = <4>;
- cd-gpios = <&pio 6 1 GPIO_ACTIVE_HIGH>; /* PG1 */
- cd-inverted;
+ cd-gpios = <&pio 6 1 GPIO_ACTIVE_LOW>; /* PG1 */
status = "okay";
};
@@ -187,8 +210,7 @@
pinctrl-0 = <&mmc1_pins_a>, <&mmc1_cd_pin_olinuxino_micro>;
vmmc-supply = <®_vcc3v3>;
bus-width = <4>;
- cd-gpios = <&pio 6 13 GPIO_ACTIVE_HIGH>; /* PG13 */
- cd-inverted;
+ cd-gpios = <&pio 6 13 GPIO_ACTIVE_LOW>; /* PG13 */
status = "okay";
};
@@ -202,38 +224,32 @@
&pio {
mmc0_cd_pin_olinuxino_micro: mmc0_cd_pin at 0 {
- allwinner,pins = "PG1";
- allwinner,function = "gpio_in";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+ pins = "PG1";
+ function = "gpio_in";
+ bias-pull-up;
};
mmc1_cd_pin_olinuxino_micro: mmc1_cd_pin at 0 {
- allwinner,pins = "PG13";
- allwinner,function = "gpio_in";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+ pins = "PG13";
+ function = "gpio_in";
+ bias-pull-up;
};
led_pins_olinuxino: led_pins at 0 {
- allwinner,pins = "PE3";
- allwinner,function = "gpio_out";
- allwinner,drive = <SUN4I_PINCTRL_20_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ pins = "PE3";
+ function = "gpio_out";
+ drive-strength = <20>;
};
usb1_vbus_pin_olinuxino_m: usb1_vbus_pin at 0 {
- allwinner,pins = "PB10";
- allwinner,function = "gpio_out";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ pins = "PB10";
+ function = "gpio_out";
};
usb0_id_detect_pin: usb0_id_detect_pin at 0 {
- allwinner,pins = "PG12";
- allwinner,function = "gpio_in";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+ pins = "PG12";
+ function = "gpio_in";
+ bias-pull-up;
};
};
@@ -250,8 +266,12 @@
&spi2 {
pinctrl-names = "default";
- pinctrl-0 = <&spi2_pins_a>,
- <&spi2_cs0_pins_a>;
+ pinctrl-0 = <&spi2_pins_b>,
+ <&spi2_cs0_pins_b>;
+ status = "okay";
+};
+
+&tcon0 {
status = "okay";
};
@@ -263,7 +283,7 @@
&uart2 {
pinctrl-names = "default";
- pinctrl-0 = <&uart2_pins_a>;
+ pinctrl-0 = <&uart2_pins_b>;
status = "okay";
};
@@ -278,10 +298,6 @@
status = "okay";
};
-&usb0_vbus_pin_a {
- allwinner,pins = "PG11";
-};
-
&usbphy {
pinctrl-names = "default";
pinctrl-0 = <&usb0_id_detect_pin>;
diff --git a/arch/arm/dts/sun5i-a10s-r7-tv-dongle.dts b/arch/arm/dts/sun5i-a10s-r7-tv-dongle.dts
index 3b057983c7..034853d1c0 100644
--- a/arch/arm/dts/sun5i-a10s-r7-tv-dongle.dts
+++ b/arch/arm/dts/sun5i-a10s-r7-tv-dongle.dts
@@ -45,7 +45,6 @@
#include "sunxi-common-regulators.dtsi"
#include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/pinctrl/sun4i-a10.h>
/ {
model = "R7 A10s hdmi tv-stick";
@@ -81,8 +80,7 @@
pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_r7>;
vmmc-supply = <®_vcc3v3>;
bus-width = <4>;
- cd-gpios = <&pio 6 1 GPIO_ACTIVE_HIGH>; /* PG1 */
- cd-inverted;
+ cd-gpios = <&pio 6 1 GPIO_ACTIVE_LOW>; /* PG1 */
status = "okay";
};
@@ -101,24 +99,20 @@
&pio {
mmc0_cd_pin_r7: mmc0_cd_pin at 0 {
- allwinner,pins = "PG1";
- allwinner,function = "gpio_in";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+ pins = "PG1";
+ function = "gpio_in";
+ bias-pull-up;
};
led_pins_r7: led_pins at 0 {
- allwinner,pins = "PB2";
- allwinner,function = "gpio_out";
- allwinner,drive = <SUN4I_PINCTRL_20_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ pins = "PB2";
+ function = "gpio_out";
+ drive-strength = <20>;
};
usb1_vbus_pin_r7: usb1_vbus_pin at 0 {
- allwinner,pins = "PG13";
- allwinner,function = "gpio_out";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ pins = "PG13";
+ function = "gpio_out";
};
};
diff --git a/arch/arm/dts/sun5i-a10s-wobo-i5.dts b/arch/arm/dts/sun5i-a10s-wobo-i5.dts
index b5de75f4c7..3f68ef5d92 100644
--- a/arch/arm/dts/sun5i-a10s-wobo-i5.dts
+++ b/arch/arm/dts/sun5i-a10s-wobo-i5.dts
@@ -46,7 +46,6 @@
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/irq.h>
-#include <dt-bindings/pinctrl/sun4i-a10.h>
/ {
model = "A10s-Wobo i5";
@@ -95,7 +94,7 @@
&emac {
pinctrl-names = "default";
- pinctrl-0 = <&emac_pins_b>;
+ pinctrl-0 = <&emac_pins_a>;
phy = <&phy1>;
status = "okay";
};
@@ -131,8 +130,7 @@
pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_wobo_i5>;
vmmc-supply = <®_vcc3v3>;
bus-width = <4>;
- cd-gpios = <&pio 1 3 GPIO_ACTIVE_HIGH>; /* PB3 */
- cd-inverted;
+ cd-gpios = <&pio 1 3 GPIO_ACTIVE_LOW>; /* PB3 */
status = "okay";
};
@@ -146,24 +144,19 @@
&pio {
led_pins_wobo_i5: led_pins at 0 {
- allwinner,pins = "PB2";
- allwinner,function = "gpio_out";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ pins = "PB2";
+ function = "gpio_out";
};
mmc0_cd_pin_wobo_i5: mmc0_cd_pin at 0 {
- allwinner,pins = "PB3";
- allwinner,function = "gpio_in";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+ pins = "PB3";
+ function = "gpio_in";
+ bias-pull-up;
};
emac_power_pin_wobo: emac_power_pin at 0 {
- allwinner,pins = "PA02";
- allwinner,function = "gpio_out";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ pins = "PA02";
+ function = "gpio_out";
};
};
@@ -222,10 +215,6 @@
status = "okay";
};
-&usb1_vbus_pin_a {
- allwinner,pins = "PG12";
-};
-
&usbphy {
usb1_vbus-supply = <®_usb1_vbus>;
status = "okay";
diff --git a/arch/arm/dts/sun5i-a10s.dtsi b/arch/arm/dts/sun5i-a10s.dtsi
index c41a2ba34d..316cb8b294 100644
--- a/arch/arm/dts/sun5i-a10s.dtsi
+++ b/arch/arm/dts/sun5i-a10s.dtsi
@@ -47,7 +47,6 @@
#include "sun5i.dtsi"
#include <dt-bindings/dma/sun4i-a10.h>
-#include <dt-bindings/pinctrl/sun4i-a10.h>
/ {
interrupt-parent = <&intc>;
@@ -61,207 +60,118 @@
#size-cells = <1>;
ranges;
- framebuffer at 0 {
+ framebuffer at 2 {
compatible = "allwinner,simple-framebuffer",
"simple-framebuffer";
allwinner,pipeline = "de_be0-lcd0-hdmi";
- clocks = <&pll3>, <&pll5 1>, <&ahb_gates 36>,
- <&ahb_gates 43>, <&ahb_gates 44>;
- status = "disabled";
- };
-
- framebuffer at 1 {
- compatible = "allwinner,simple-framebuffer",
- "simple-framebuffer";
- allwinner,pipeline = "de_be0-lcd0";
- clocks = <&pll3>, <&pll5 1>, <&ahb_gates 36>,
- <&ahb_gates 44>;
+ clocks = <&ccu CLK_AHB_LCD>, <&ccu CLK_AHB_HDMI>,
+ <&ccu CLK_AHB_DE_BE>, <&ccu CLK_DRAM_DE_BE>,
+ <&ccu CLK_DE_BE>, <&ccu CLK_HDMI>;
status = "disabled";
};
+ };
- framebuffer at 2 {
- compatible = "allwinner,simple-framebuffer",
- "simple-framebuffer";
- allwinner,pipeline = "de_be0-lcd0-tve0";
- clocks = <&pll3>, <&pll5 1>, <&ahb_gates 34>,
- <&ahb_gates 36>, <&ahb_gates 44>;
- status = "disabled";
- };
+ display-engine {
+ compatible = "allwinner,sun5i-a10s-display-engine";
+ allwinner,pipelines = <&fe0>;
};
- clocks {
- ahb_gates: clk at 01c20060 {
- #clock-cells = <1>;
- compatible = "allwinner,sun5i-a10s-ahb-gates-clk";
- reg = <0x01c20060 0x8>;
- clocks = <&ahb>;
- clock-indices = <0>, <1>,
- <2>, <5>, <6>,
- <7>, <8>, <9>,
- <10>, <13>,
- <14>, <17>, <18>,
- <20>, <21>, <22>,
- <26>, <28>, <32>,
- <34>, <36>, <40>,
- <43>, <44>,
- <46>, <51>,
- <52>;
- clock-output-names = "ahb_usbotg", "ahb_ehci",
- "ahb_ohci", "ahb_ss", "ahb_dma",
- "ahb_bist", "ahb_mmc0", "ahb_mmc1",
- "ahb_mmc2", "ahb_nand",
- "ahb_sdram", "ahb_emac", "ahb_ts",
- "ahb_spi0", "ahb_spi1", "ahb_spi2",
- "ahb_gps", "ahb_stimer", "ahb_ve",
- "ahb_tve", "ahb_lcd", "ahb_csi",
- "ahb_hdmi", "ahb_de_be",
- "ahb_de_fe", "ahb_iep",
- "ahb_mali400";
- };
+ soc at 1c00000 {
+ hdmi: hdmi at 1c16000 {
+ compatible = "allwinner,sun5i-a10s-hdmi";
+ reg = <0x01c16000 0x1000>;
+ interrupts = <58>;
+ clocks = <&ccu CLK_AHB_HDMI>, <&ccu CLK_HDMI>,
+ <&ccu CLK_PLL_VIDEO0_2X>,
+ <&ccu CLK_PLL_VIDEO1_2X>;
+ clock-names = "ahb", "mod", "pll-0", "pll-1";
+ dmas = <&dma SUN4I_DMA_NORMAL 16>,
+ <&dma SUN4I_DMA_NORMAL 16>,
+ <&dma SUN4I_DMA_DEDICATED 24>;
+ dma-names = "ddc-tx", "ddc-rx", "audio-tx";
+ status = "disabled";
- apb0_gates: clk at 01c20068 {
- #clock-cells = <1>;
- compatible = "allwinner,sun5i-a10s-apb0-gates-clk";
- reg = <0x01c20068 0x4>;
- clocks = <&apb0>;
- clock-indices = <0>, <3>,
- <5>, <6>,
- <10>;
- clock-output-names = "apb0_codec", "apb0_iis",
- "apb0_pio", "apb0_ir",
- "apb0_keypad";
- };
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
- apb1_gates: clk at 01c2006c {
- #clock-cells = <1>;
- compatible = "allwinner,sun5i-a10s-apb1-gates-clk";
- reg = <0x01c2006c 0x4>;
- clocks = <&apb1>;
- clock-indices = <0>, <1>,
- <2>, <16>,
- <17>, <18>,
- <19>;
- clock-output-names = "apb1_i2c0", "apb1_i2c1",
- "apb1_i2c2", "apb1_uart0",
- "apb1_uart1", "apb1_uart2",
- "apb1_uart3";
- };
- };
+ hdmi_in: port at 0 {
+ reg = <0>;
- soc at 01c00000 {
- emac: ethernet at 01c0b000 {
- compatible = "allwinner,sun4i-a10-emac";
- reg = <0x01c0b000 0x1000>;
- interrupts = <55>;
- clocks = <&ahb_gates 17>;
- allwinner,sram = <&emac_sram 1>;
- status = "disabled";
- };
+ hdmi_in_tcon0: endpoint {
+ remote-endpoint = <&tcon0_out_hdmi>;
+ };
+ };
- mdio: mdio at 01c0b080 {
- compatible = "allwinner,sun4i-a10-mdio";
- reg = <0x01c0b080 0x14>;
- status = "disabled";
- #address-cells = <1>;
- #size-cells = <0>;
+ hdmi_out: port at 1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <1>;
+ };
+ };
};
- pwm: pwm at 01c20e00 {
+ pwm: pwm at 1c20e00 {
compatible = "allwinner,sun5i-a10s-pwm";
reg = <0x01c20e00 0xc>;
- clocks = <&osc24M>;
+ clocks = <&ccu CLK_HOSC>;
#pwm-cells = <3>;
status = "disabled";
};
-
- uart0: serial at 01c28000 {
- compatible = "snps,dw-apb-uart";
- reg = <0x01c28000 0x400>;
- interrupts = <1>;
- reg-shift = <2>;
- reg-io-width = <4>;
- clocks = <&apb1_gates 16>;
- status = "disabled";
- };
-
- uart2: serial at 01c28800 {
- compatible = "snps,dw-apb-uart";
- reg = <0x01c28800 0x400>;
- interrupts = <3>;
- reg-shift = <2>;
- reg-io-width = <4>;
- clocks = <&apb1_gates 18>;
- status = "disabled";
- };
};
};
+&ccu {
+ compatible = "allwinner,sun5i-a10s-ccu";
+};
+
&pio {
compatible = "allwinner,sun5i-a10s-pinctrl";
uart0_pins_a: uart0 at 0 {
- allwinner,pins = "PB19", "PB20";
- allwinner,function = "uart0";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ pins = "PB19", "PB20";
+ function = "uart0";
};
- uart2_pins_a: uart2 at 0 {
- allwinner,pins = "PC18", "PC19";
- allwinner,function = "uart2";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ uart2_pins_b: uart2 at 1 {
+ pins = "PC18", "PC19";
+ function = "uart2";
};
- emac_pins_a: emac0 at 0 {
- allwinner,pins = "PA0", "PA1", "PA2",
+ emac_pins_b: emac0 at 1 {
+ pins = "PA0", "PA1", "PA2",
"PA3", "PA4", "PA5", "PA6",
"PA7", "PA8", "PA9", "PA10",
"PA11", "PA12", "PA13", "PA14",
"PA15", "PA16";
- allwinner,function = "emac";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
- };
-
- emac_pins_b: emac0 at 1 {
- allwinner,pins = "PD6", "PD7", "PD10",
- "PD11", "PD12", "PD13", "PD14",
- "PD15", "PD18", "PD19", "PD20",
- "PD21", "PD22", "PD23", "PD24",
- "PD25", "PD26", "PD27";
- allwinner,function = "emac";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ function = "emac";
};
mmc1_pins_a: mmc1 at 0 {
- allwinner,pins = "PG3", "PG4", "PG5",
+ pins = "PG3", "PG4", "PG5",
"PG6", "PG7", "PG8";
- allwinner,function = "mmc1";
- allwinner,drive = <SUN4I_PINCTRL_30_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ function = "mmc1";
+ drive-strength = <30>;
};
- spi2_pins_a: spi2 at 0 {
- allwinner,pins = "PB12", "PB13", "PB14";
- allwinner,function = "spi2";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ spi2_pins_b: spi2 at 1 {
+ pins = "PB12", "PB13", "PB14";
+ function = "spi2";
};
- spi2_cs0_pins_a: spi2_cs0 at 0 {
- allwinner,pins = "PB11";
- allwinner,function = "spi2";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ spi2_cs0_pins_b: spi2_cs0 at 1 {
+ pins = "PB11";
+ function = "spi2";
};
};
&sram_a {
- emac_sram: sram-section at 8000 {
- compatible = "allwinner,sun4i-a10-sram-a3-a4";
- reg = <0x8000 0x4000>;
- status = "disabled";
+};
+
+&tcon0_out {
+ tcon0_out_hdmi: endpoint at 2 {
+ reg = <2>;
+ remote-endpoint = <&hdmi_in_tcon0>;
+ allwinner,tcon-channel = <1>;
};
};
diff --git a/arch/arm/dts/sun5i-a13-empire-electronix-d709.dts b/arch/arm/dts/sun5i-a13-empire-electronix-d709.dts
index 6efbba6d40..378214d831 100644
--- a/arch/arm/dts/sun5i-a13-empire-electronix-d709.dts
+++ b/arch/arm/dts/sun5i-a13-empire-electronix-d709.dts
@@ -46,7 +46,6 @@
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/interrupt-controller/irq.h>
-#include <dt-bindings/pinctrl/sun4i-a10.h>
#include <dt-bindings/pwm/pwm.h>
/ {
@@ -126,8 +125,7 @@
pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_d709>;
vmmc-supply = <®_vcc3v3>;
bus-width = <4>;
- cd-gpios = <&pio 6 0 GPIO_ACTIVE_HIGH>; /* PG0 */
- cd-inverted;
+ cd-gpios = <&pio 6 0 GPIO_ACTIVE_LOW>; /* PG0 */
status = "okay";
};
@@ -137,24 +135,21 @@
&pio {
mmc0_cd_pin_d709: mmc0_cd_pin at 0 {
- allwinner,pins = "PG0";
- allwinner,function = "gpio_in";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+ pins = "PG0";
+ function = "gpio_in";
+ bias-pull-up;
};
usb0_vbus_detect_pin: usb0_vbus_detect_pin at 0 {
- allwinner,pins = "PG1";
- allwinner,function = "gpio_in";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_PULL_DOWN>;
+ pins = "PG1";
+ function = "gpio_in";
+ bias-pull-down;
};
usb0_id_detect_pin: usb0_id_detect_pin at 0 {
- allwinner,pins = "PG2";
- allwinner,function = "gpio_in";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+ pins = "PG2";
+ function = "gpio_in";
+ bias-pull-up;
};
};
@@ -211,10 +206,6 @@
status = "okay";
};
-&usb0_vbus_pin_a {
- allwinner,pins = "PG12";
-};
-
&usbphy {
pinctrl-names = "default";
pinctrl-0 = <&usb0_id_detect_pin>, <&usb0_vbus_detect_pin>;
diff --git a/arch/arm/dts/sun5i-a13-hsg-h702.dts b/arch/arm/dts/sun5i-a13-hsg-h702.dts
index 3724b98806..7ee0c3f6d7 100644
--- a/arch/arm/dts/sun5i-a13-hsg-h702.dts
+++ b/arch/arm/dts/sun5i-a13-hsg-h702.dts
@@ -46,7 +46,6 @@
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
-#include <dt-bindings/pinctrl/sun4i-a10.h>
/ {
model = "HSG H702";
@@ -121,8 +120,7 @@
pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_h702>;
vmmc-supply = <®_vcc3v3>;
bus-width = <4>;
- cd-gpios = <&pio 6 0 GPIO_ACTIVE_HIGH>; /* PG0 */
- cd-inverted;
+ cd-gpios = <&pio 6 0 GPIO_ACTIVE_LOW>; /* PG0 */
status = "okay";
};
@@ -136,24 +134,20 @@
&pio {
mmc0_cd_pin_h702: mmc0_cd_pin at 0 {
- allwinner,pins = "PG0";
- allwinner,function = "gpio_in";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+ pins = "PG0";
+ function = "gpio_in";
+ bias-pull-up;
};
usb0_id_detect_pin: usb0_id_detect_pin at 0 {
- allwinner,pins = "PG2";
- allwinner,function = "gpio_in";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+ pins = "PG2";
+ function = "gpio_in";
+ bias-pull-up;
};
usb0_vbus_detect_pin: usb0_vbus_detect_pin at 0 {
- allwinner,pins = "PG1";
- allwinner,function = "gpio_in";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ pins = "PG1";
+ function = "gpio_in";
};
};
@@ -191,7 +185,6 @@
};
®_usb0_vbus {
- pinctrl-0 = <&usb0_vbus_pin_a>;
gpio = <&pio 6 12 GPIO_ACTIVE_HIGH>; /* PG12 */
status = "okay";
};
@@ -207,10 +200,6 @@
status = "okay";
};
-&usb0_vbus_pin_a {
- allwinner,pins = "PG12";
-};
-
&usbphy {
pinctrl-names = "default";
pinctrl-0 = <&usb0_id_detect_pin>, <&usb0_vbus_detect_pin>;
diff --git a/arch/arm/dts/sun5i-a13-inet-98v-rev2.dts b/arch/arm/dts/sun5i-a13-inet-98v-rev2.dts
index 1b11ec95ae..439ae3b537 100644
--- a/arch/arm/dts/sun5i-a13-inet-98v-rev2.dts
+++ b/arch/arm/dts/sun5i-a13-inet-98v-rev2.dts
@@ -42,171 +42,9 @@
/dts-v1/;
#include "sun5i-a13.dtsi"
-#include "sunxi-common-regulators.dtsi"
-#include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/input/input.h>
-#include <dt-bindings/interrupt-controller/irq.h>
-#include <dt-bindings/pinctrl/sun4i-a10.h>
+#include "sun5i-reference-design-tablet.dtsi"
/ {
model = "INet-98V Rev 02";
compatible = "primux,inet98v-rev2", "allwinner,sun5i-a13";
-
- aliases {
- serial0 = &uart1;
- };
-
- chosen {
- stdout-path = "serial0:115200n8";
- };
-
-};
-
-&cpu0 {
- cpu-supply = <®_dcdc2>;
-};
-
-&ehci0 {
- status = "okay";
-};
-
-&i2c0 {
- pinctrl-names = "default";
- pinctrl-0 = <&i2c0_pins_a>;
- status = "okay";
-
- axp209: pmic at 34 {
- reg = <0x34>;
- interrupts = <0>;
- };
-};
-
-#include "axp209.dtsi"
-
-&i2c1 {
- pinctrl-names = "default";
- pinctrl-0 = <&i2c1_pins_a>;
- status = "okay";
-
- pcf8563: rtc at 51 {
- compatible = "nxp,pcf8563";
- reg = <0x51>;
- };
-};
-
-&lradc {
- vref-supply = <®_ldo2>;
- status = "okay";
-
- button at 200 {
- label = "Volume Up";
- linux,code = <KEY_VOLUMEUP>;
- channel = <0>;
- voltage = <200000>;
- };
-
- button at 400 {
- label = "Volume Down";
- linux,code = <KEY_VOLUMEDOWN>;
- channel = <0>;
- voltage = <400000>;
- };
-};
-
-&mmc0 {
- pinctrl-names = "default";
- pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_inet98fv2>;
- vmmc-supply = <®_vcc3v3>;
- bus-width = <4>;
- cd-gpios = <&pio 6 0 GPIO_ACTIVE_HIGH>; /* PG0 */
- cd-inverted;
- status = "okay";
-};
-
-&otg_sram {
- status = "okay";
-};
-
-&pio {
- mmc0_cd_pin_inet98fv2: mmc0_cd_pin at 0 {
- allwinner,pins = "PG0";
- allwinner,function = "gpio_in";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
- };
-
- usb0_vbus_detect_pin: usb0_vbus_detect_pin at 0 {
- allwinner,pins = "PG1";
- allwinner,function = "gpio_in";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_PULL_DOWN>;
- };
-
- usb0_id_detect_pin: usb0_id_detect_pin at 0 {
- allwinner,pins = "PG2";
- allwinner,function = "gpio_in";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
- };
-};
-
-®_dcdc2 {
- regulator-always-on;
- regulator-min-microvolt = <1000000>;
- regulator-max-microvolt = <1400000>;
- regulator-name = "vdd-cpu";
-};
-
-®_dcdc3 {
- regulator-always-on;
- regulator-min-microvolt = <1250000>;
- regulator-max-microvolt = <1250000>;
- regulator-name = "vdd-int-pll";
-};
-
-®_ldo1 {
- regulator-name = "vdd-rtc";
-};
-
-®_ldo2 {
- regulator-always-on;
- regulator-min-microvolt = <3000000>;
- regulator-max-microvolt = <3000000>;
- regulator-name = "avcc";
-};
-
-®_ldo3 {
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- regulator-name = "vcc-wifi";
-};
-
-®_usb0_vbus {
- gpio = <&pio 6 12 GPIO_ACTIVE_HIGH>; /* PG12 */
- status = "okay";
-};
-
-&uart1 {
- pinctrl-names = "default";
- pinctrl-0 = <&uart1_pins_b>;
- status = "okay";
-};
-
-&usb_otg {
- dr_mode = "otg";
- status = "okay";
-};
-
-&usb0_vbus_pin_a {
- allwinner,pins = "PG12";
-};
-
-&usbphy {
- pinctrl-names = "default";
- pinctrl-0 = <&usb0_id_detect_pin>, <&usb0_vbus_detect_pin>;
- usb0_id_det-gpio = <&pio 6 2 GPIO_ACTIVE_HIGH>; /* PG2 */
- usb0_vbus_det-gpio = <&pio 6 1 GPIO_ACTIVE_HIGH>; /* PG1 */
- usb0_vbus-supply = <®_usb0_vbus>;
- usb1_vbus-supply = <®_ldo3>;
- status = "okay";
};
diff --git a/arch/arm/dts/sun5i-a13-olinuxino-micro.dts b/arch/arm/dts/sun5i-a13-olinuxino-micro.dts
index 081329e2b8..aa4b34fd91 100644
--- a/arch/arm/dts/sun5i-a13-olinuxino-micro.dts
+++ b/arch/arm/dts/sun5i-a13-olinuxino-micro.dts
@@ -46,7 +46,6 @@
#include "sunxi-common-regulators.dtsi"
#include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/pinctrl/sun4i-a10.h>
/ {
model = "Olimex A13-Olinuxino Micro";
@@ -100,8 +99,7 @@
pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_olinuxinom>;
vmmc-supply = <®_vcc3v3>;
bus-width = <4>;
- cd-gpios = <&pio 6 0 GPIO_ACTIVE_HIGH>; /* PG0 */
- cd-inverted;
+ cd-gpios = <&pio 6 0 GPIO_ACTIVE_LOW>; /* PG0 */
status = "okay";
};
@@ -115,45 +113,37 @@
&pio {
mmc0_cd_pin_olinuxinom: mmc0_cd_pin at 0 {
- allwinner,pins = "PG0";
- allwinner,function = "gpio_in";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+ pins = "PG0";
+ function = "gpio_in";
+ bias-pull-up;
};
led_pins_olinuxinom: led_pins at 0 {
- allwinner,pins = "PG9";
- allwinner,function = "gpio_out";
- allwinner,drive = <SUN4I_PINCTRL_20_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ pins = "PG9";
+ function = "gpio_out";
+ drive-strength = <20>;
};
usb0_id_detect_pin: usb0_id_detect_pin at 0 {
- allwinner,pins = "PG2";
- allwinner,function = "gpio_in";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+ pins = "PG2";
+ function = "gpio_in";
+ bias-pull-up;
};
usb0_vbus_detect_pin: usb0_vbus_detect_pin at 0 {
- allwinner,pins = "PG1";
- allwinner,function = "gpio_in";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_PULL_DOWN>;
+ pins = "PG1";
+ function = "gpio_in";
+ bias-pull-down;
};
usb0_vbus_pin_olinuxinom: usb0_vbus_pin at 0 {
- allwinner,pins = "PG12";
- allwinner,function = "gpio_out";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ pins = "PG12";
+ function = "gpio_out";
};
usb1_vbus_pin_olinuxinom: usb1_vbus_pin at 0 {
- allwinner,pins = "PG11";
- allwinner,function = "gpio_out";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ pins = "PG11";
+ function = "gpio_out";
};
};
diff --git a/arch/arm/dts/sun5i-a13-olinuxino.dts b/arch/arm/dts/sun5i-a13-olinuxino.dts
index b3c234c65e..437ad913a3 100644
--- a/arch/arm/dts/sun5i-a13-olinuxino.dts
+++ b/arch/arm/dts/sun5i-a13-olinuxino.dts
@@ -48,7 +48,6 @@
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
-#include <dt-bindings/pinctrl/sun4i-a10.h>
/ {
model = "Olimex A13-Olinuxino";
@@ -72,6 +71,51 @@
default-state = "on";
};
};
+
+ bridge {
+ compatible = "dumb-vga-dac";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port at 0 {
+ reg = <0>;
+
+ vga_bridge_in: endpoint {
+ remote-endpoint = <&tcon0_out_vga>;
+ };
+ };
+
+ port at 1 {
+ reg = <1>;
+
+ vga_bridge_out: endpoint {
+ remote-endpoint = <&vga_con_in>;
+ };
+ };
+ };
+ };
+
+ vga {
+ compatible = "vga-connector";
+
+ port {
+ vga_con_in: endpoint {
+ remote-endpoint = <&vga_bridge_out>;
+ };
+ };
+ };
+};
+
+&be0 {
+ status = "okay";
+};
+
+&codec {
+ status = "okay";
};
&ehci0 {
@@ -150,8 +194,7 @@
pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_olinuxino>;
vmmc-supply = <®_vcc3v3>;
bus-width = <4>;
- cd-gpios = <&pio 6 0 GPIO_ACTIVE_HIGH>; /* PG0 */
- cd-inverted;
+ cd-gpios = <&pio 6 0 GPIO_ACTIVE_LOW>; /* PG0 */
status = "okay";
};
@@ -165,38 +208,32 @@
&pio {
mmc0_cd_pin_olinuxino: mmc0_cd_pin at 0 {
- allwinner,pins = "PG0";
- allwinner,function = "gpio_in";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+ pins = "PG0";
+ function = "gpio_in";
+ bias-pull-up;
};
led_pins_olinuxino: led_pins at 0 {
- allwinner,pins = "PG9";
- allwinner,function = "gpio_out";
- allwinner,drive = <SUN4I_PINCTRL_20_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ pins = "PG9";
+ function = "gpio_out";
+ drive-strength = <20>;
};
usb0_id_detect_pin: usb0_id_detect_pin at 0 {
- allwinner,pins = "PG2";
- allwinner,function = "gpio_in";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+ pins = "PG2";
+ function = "gpio_in";
+ bias-pull-up;
};
usb0_vbus_detect_pin: usb0_vbus_detect_pin at 0 {
- allwinner,pins = "PG1";
- allwinner,function = "gpio_in";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_PULL_DOWN>;
+ pins = "PG1";
+ function = "gpio_in";
+ bias-pull-down;
};
usb1_vbus_pin_olinuxino: usb1_vbus_pin at 0 {
- allwinner,pins = "PG11";
- allwinner,function = "gpio_out";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ pins = "PG11";
+ function = "gpio_out";
};
};
@@ -211,6 +248,19 @@
status = "okay";
};
+&tcon0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&lcd_rgb666_pins>;
+ status = "okay";
+};
+
+&tcon0_out {
+ tcon0_out_vga: endpoint at 0 {
+ reg = <0>;
+ remote-endpoint = <&vga_bridge_in>;
+ };
+};
+
&uart1 {
pinctrl-names = "default";
pinctrl-0 = <&uart1_pins_b>;
@@ -222,10 +272,6 @@
status = "okay";
};
-&usb0_vbus_pin_a {
- allwinner,pins = "PG12";
-};
-
&usbphy {
pinctrl-names = "default";
pinctrl-0 = <&usb0_id_detect_pin>, <&usb0_vbus_detect_pin>;
diff --git a/arch/arm/dts/sun5i-a13-utoo-p66.dts b/arch/arm/dts/sun5i-a13-utoo-p66.dts
index a8b0bcc045..bfdd38d6bf 100644
--- a/arch/arm/dts/sun5i-a13-utoo-p66.dts
+++ b/arch/arm/dts/sun5i-a13-utoo-p66.dts
@@ -80,23 +80,7 @@
};
&codec_pa_pin {
- allwinner,pins = "PG3";
-};
-
-&i2c1 {
- icn8318: touchscreen at 40 {
- compatible = "chipone,icn8318";
- reg = <0x40>;
- interrupt-parent = <&pio>;
- interrupts = <6 9 IRQ_TYPE_EDGE_FALLING>; /* EINT9 (PG9) */
- pinctrl-names = "default";
- pinctrl-0 = <&ts_wake_pin_p66>;
- wake-gpios = <&pio 1 3 GPIO_ACTIVE_HIGH>; /* PB3 */
- touchscreen-size-x = <800>;
- touchscreen-size-y = <480>;
- touchscreen-inverted-x;
- touchscreen-swapped-x-y;
- };
+ pins = "PG3";
};
&mmc2 {
@@ -116,30 +100,35 @@
&pio {
i2c_lcd_pins: i2c_lcd_pin at 0 {
- allwinner,pins = "PG10", "PG12";
- allwinner,function = "gpio_out";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
- };
-
- ts_wake_pin_p66: ts_wake_pin at 0 {
- allwinner,pins = "PB3";
- allwinner,function = "gpio_out";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ pins = "PG10", "PG12";
+ function = "gpio_out";
+ bias-pull-up;
};
-
};
®_usb0_vbus {
gpio = <&pio 1 4 GPIO_ACTIVE_HIGH>; /* PB4 */
};
+&touchscreen {
+ compatible = "chipone,icn8318";
+ reg = <0x40>;
+ /* The P66 uses a different EINT then the reference design */
+ interrupts = <6 9 IRQ_TYPE_EDGE_FALLING>; /* EINT9 (PG9) */
+ /* The icn8318 binding expects wake-gpios instead of power-gpios */
+ wake-gpios = <&pio 1 3 GPIO_ACTIVE_HIGH>; /* PB3 */
+ touchscreen-size-x = <800>;
+ touchscreen-size-y = <480>;
+ touchscreen-inverted-x;
+ touchscreen-swapped-x-y;
+ status = "okay";
+};
+
&uart1 {
/* The P66 uses the uart pins as gpios */
status = "disabled";
};
&usb0_vbus_pin_a {
- allwinner,pins = "PB4";
+ pins = "PB4";
};
diff --git a/arch/arm/dts/sun5i-a13.dtsi b/arch/arm/dts/sun5i-a13.dtsi
index e012890e0c..b1d8277655 100644
--- a/arch/arm/dts/sun5i-a13.dtsi
+++ b/arch/arm/dts/sun5i-a13.dtsi
@@ -46,27 +46,11 @@
#include "sun5i.dtsi"
-#include <dt-bindings/pinctrl/sun4i-a10.h>
#include <dt-bindings/thermal/thermal.h>
/ {
interrupt-parent = <&intc>;
- chosen {
- #address-cells = <1>;
- #size-cells = <1>;
- ranges;
-
- framebuffer at 0 {
- compatible = "allwinner,simple-framebuffer",
- "simple-framebuffer";
- allwinner,pipeline = "de_be0-lcd0";
- clocks = <&ahb_gates 36>, <&ahb_gates 44>, <&de_be_clk>,
- <&tcon_ch0_clk>, <&dram_gates 26>;
- status = "disabled";
- };
- };
-
thermal-zones {
cpu_thermal {
/* milliseconds */
@@ -84,7 +68,7 @@
trips {
cpu_alert0: cpu_alert0 {
/* milliCelsius */
- temperature = <850000>;
+ temperature = <85000>;
hysteresis = <2000>;
type = "passive";
};
@@ -99,237 +83,27 @@
};
};
- clocks {
- ahb_gates: clk at 01c20060 {
- #clock-cells = <1>;
- compatible = "allwinner,sun5i-a13-ahb-gates-clk";
- reg = <0x01c20060 0x8>;
- clocks = <&ahb>;
- clock-indices = <0>, <1>,
- <2>, <5>, <6>,
- <7>, <8>, <9>,
- <10>, <13>,
- <14>, <20>,
- <21>, <22>,
- <28>, <32>, <34>,
- <36>, <40>, <44>,
- <46>, <51>,
- <52>;
- clock-output-names = "ahb_usbotg", "ahb_ehci",
- "ahb_ohci", "ahb_ss", "ahb_dma",
- "ahb_bist", "ahb_mmc0", "ahb_mmc1",
- "ahb_mmc2", "ahb_nand",
- "ahb_sdram", "ahb_spi0",
- "ahb_spi1", "ahb_spi2",
- "ahb_stimer", "ahb_ve", "ahb_tve",
- "ahb_lcd", "ahb_csi", "ahb_de_be",
- "ahb_de_fe", "ahb_iep",
- "ahb_mali400";
- };
-
- apb0_gates: clk at 01c20068 {
- #clock-cells = <1>;
- compatible = "allwinner,sun5i-a13-apb0-gates-clk";
- reg = <0x01c20068 0x4>;
- clocks = <&apb0>;
- clock-indices = <0>, <5>,
- <6>;
- clock-output-names = "apb0_codec", "apb0_pio",
- "apb0_ir";
- };
-
- apb1_gates: clk at 01c2006c {
- #clock-cells = <1>;
- compatible = "allwinner,sun5i-a13-apb1-gates-clk";
- reg = <0x01c2006c 0x4>;
- clocks = <&apb1>;
- clock-indices = <0>, <1>,
- <2>, <17>,
- <19>;
- clock-output-names = "apb1_i2c0", "apb1_i2c1",
- "apb1_i2c2", "apb1_uart1",
- "apb1_uart3";
- };
-
- dram_gates: clk at 01c20100 {
- #clock-cells = <1>;
- compatible = "allwinner,sun5i-a13-dram-gates-clk",
- "allwinner,sun4i-a10-gates-clk";
- reg = <0x01c20100 0x4>;
- clocks = <&pll5 0>;
- clock-indices = <0>,
- <1>,
- <25>,
- <26>,
- <29>,
- <31>;
- clock-output-names = "dram_ve",
- "dram_csi",
- "dram_de_fe",
- "dram_de_be",
- "dram_ace",
- "dram_iep";
- };
-
- de_be_clk: clk at 01c20104 {
- #clock-cells = <0>;
- #reset-cells = <0>;
- compatible = "allwinner,sun4i-a10-display-clk";
- reg = <0x01c20104 0x4>;
- clocks = <&pll3>, <&pll7>, <&pll5 1>;
- clock-output-names = "de-be";
- };
-
- de_fe_clk: clk at 01c2010c {
- #clock-cells = <0>;
- #reset-cells = <0>;
- compatible = "allwinner,sun4i-a10-display-clk";
- reg = <0x01c2010c 0x4>;
- clocks = <&pll3>, <&pll7>, <&pll5 1>;
- clock-output-names = "de-fe";
- };
-
- tcon_ch0_clk: clk at 01c20118 {
- #clock-cells = <0>;
- #reset-cells = <1>;
- compatible = "allwinner,sun4i-a10-tcon-ch0-clk";
- reg = <0x01c20118 0x4>;
- clocks = <&pll3>, <&pll7>, <&pll3x2>, <&pll7x2>;
- clock-output-names = "tcon-ch0-sclk";
- };
-
- tcon_ch1_clk: clk at 01c2012c {
- #clock-cells = <0>;
- compatible = "allwinner,sun4i-a10-tcon-ch1-clk";
- reg = <0x01c2012c 0x4>;
- clocks = <&pll3>, <&pll7>, <&pll3x2>, <&pll7x2>;
- clock-output-names = "tcon-ch1-sclk";
- };
- };
-
display-engine {
compatible = "allwinner,sun5i-a13-display-engine";
allwinner,pipelines = <&fe0>;
};
- soc at 01c00000 {
- tcon0: lcd-controller at 01c0c000 {
- compatible = "allwinner,sun5i-a13-tcon";
- reg = <0x01c0c000 0x1000>;
- interrupts = <44>;
- resets = <&tcon_ch0_clk 1>;
- reset-names = "lcd";
- clocks = <&ahb_gates 36>,
- <&tcon_ch0_clk>,
- <&tcon_ch1_clk>;
- clock-names = "ahb",
- "tcon-ch0",
- "tcon-ch1";
- clock-output-names = "tcon-pixel-clock";
- status = "disabled";
-
- ports {
- #address-cells = <1>;
- #size-cells = <0>;
-
- tcon0_in: port at 0 {
- #address-cells = <1>;
- #size-cells = <0>;
- reg = <0>;
-
- tcon0_in_be0: endpoint at 0 {
- reg = <0>;
- remote-endpoint = <&be0_out_tcon0>;
- };
- };
-
- tcon0_out: port at 1 {
- #address-cells = <1>;
- #size-cells = <0>;
- reg = <1>;
- };
- };
- };
-
- pwm: pwm at 01c20e00 {
+ soc at 1c00000 {
+ pwm: pwm at 1c20e00 {
compatible = "allwinner,sun5i-a13-pwm";
reg = <0x01c20e00 0xc>;
- clocks = <&osc24M>;
+ clocks = <&ccu CLK_HOSC>;
#pwm-cells = <3>;
status = "disabled";
};
- fe0: display-frontend at 01e00000 {
- compatible = "allwinner,sun5i-a13-display-frontend";
- reg = <0x01e00000 0x20000>;
- interrupts = <47>;
- clocks = <&ahb_gates 46>, <&de_fe_clk>,
- <&dram_gates 25>;
- clock-names = "ahb", "mod",
- "ram";
- resets = <&de_fe_clk>;
- status = "disabled";
-
- ports {
- #address-cells = <1>;
- #size-cells = <0>;
-
- fe0_out: port at 1 {
- #address-cells = <1>;
- #size-cells = <0>;
- reg = <1>;
-
- fe0_out_be0: endpoint at 0 {
- reg = <0>;
- remote-endpoint = <&be0_in_fe0>;
- };
- };
- };
- };
-
- be0: display-backend at 01e60000 {
- compatible = "allwinner,sun5i-a13-display-backend";
- reg = <0x01e60000 0x10000>;
- clocks = <&ahb_gates 44>, <&de_be_clk>,
- <&dram_gates 26>;
- clock-names = "ahb", "mod",
- "ram";
- resets = <&de_be_clk>;
- status = "disabled";
-
- assigned-clocks = <&de_be_clk>;
- assigned-clock-rates = <300000000>;
-
- ports {
- #address-cells = <1>;
- #size-cells = <0>;
-
- be0_in: port at 0 {
- #address-cells = <1>;
- #size-cells = <0>;
- reg = <0>;
-
- be0_in_fe0: endpoint at 0 {
- reg = <0>;
- remote-endpoint = <&fe0_out_be0>;
- };
- };
-
- be0_out: port at 1 {
- #address-cells = <1>;
- #size-cells = <0>;
- reg = <1>;
-
- be0_out_tcon0: endpoint at 0 {
- reg = <0>;
- remote-endpoint = <&tcon0_in_be0>;
- };
- };
- };
- };
};
};
+&ccu {
+ compatible = "allwinner,sun5i-a13-ccu";
+};
+
&cpu0 {
clock-latency = <244144>; /* 8 32k periods */
operating-points = <
@@ -342,34 +116,8 @@
432000 1200000
>;
#cooling-cells = <2>;
- cooling-min-level = <0>;
- cooling-max-level = <5>;
};
&pio {
compatible = "allwinner,sun5i-a13-pinctrl";
-
- lcd_rgb666_pins: lcd_rgb666 at 0 {
- allwinner,pins = "PD2", "PD3", "PD4", "PD5", "PD6", "PD7",
- "PD10", "PD11", "PD12", "PD13", "PD14", "PD15",
- "PD18", "PD19", "PD20", "PD21", "PD22", "PD23",
- "PD24", "PD25", "PD26", "PD27";
- allwinner,function = "lcd0";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
- };
-
- uart1_pins_a: uart1 at 0 {
- allwinner,pins = "PE10", "PE11";
- allwinner,function = "uart1";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
- };
-
- uart1_pins_b: uart1 at 1 {
- allwinner,pins = "PG3", "PG4";
- allwinner,function = "uart1";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
- };
};
diff --git a/arch/arm/dts/sun5i-gr8-chip-pro.dts b/arch/arm/dts/sun5i-gr8-chip-pro.dts
index 92a2dc6250..c55b11a4d3 100644
--- a/arch/arm/dts/sun5i-gr8-chip-pro.dts
+++ b/arch/arm/dts/sun5i-gr8-chip-pro.dts
@@ -159,23 +159,19 @@
&pio {
usb0_id_pin_chip_pro: usb0-id-pin at 0 {
- allwinner,pins = "PG2";
- allwinner,function = "gpio_in";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ pins = "PG2";
+ function = "gpio_in";
};
wifi_reg_on_pin_chip_pro: wifi-reg-on-pin at 0 {
- allwinner,pins = "PB10";
- allwinner,function = "gpio_out";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ pins = "PB10";
+ function = "gpio_out";
};
};
&pwm {
pinctrl-names = "default";
- pinctrl-0 = <&pwm0_pins_a>, <&pwm1_pins>;
+ pinctrl-0 = <&pwm0_pins>, <&pwm1_pins>;
status = "disabled";
};
@@ -224,7 +220,7 @@
&uart1 {
pinctrl-names = "default";
- pinctrl-0 = <&uart1_pins_a>, <&uart1_cts_rts_pins_a>;
+ pinctrl-0 = <&uart1_pins_b>, <&uart1_cts_rts_pins_a>;
status = "okay";
};
diff --git a/arch/arm/dts/sun5i-gr8.dtsi b/arch/arm/dts/sun5i-gr8.dtsi
index ea86d4d58d..ef0b7446a9 100644
--- a/arch/arm/dts/sun5i-gr8.dtsi
+++ b/arch/arm/dts/sun5i-gr8.dtsi
@@ -42,901 +42,33 @@
* OTHER DEALINGS IN THE SOFTWARE.
*/
-#include <dt-bindings/clock/sun4i-a10-pll2.h>
+#include "sun5i.dtsi"
+
+#include <dt-bindings/clock/sun5i-ccu.h>
#include <dt-bindings/dma/sun4i-a10.h>
-#include <dt-bindings/pinctrl/sun4i-a10.h>
+#include <dt-bindings/reset/sun5i-ccu.h>
/ {
- interrupt-parent = <&intc>;
- #address-cells = <1>;
- #size-cells = <1>;
-
- cpus {
- #address-cells = <1>;
- #size-cells = <0>;
-
- cpu0: cpu at 0 {
- device_type = "cpu";
- compatible = "arm,cortex-a8";
- reg = <0x0>;
- clocks = <&cpu>;
- };
- };
-
- clocks {
- #address-cells = <1>;
- #size-cells = <1>;
- ranges;
-
- /*
- * This is a dummy clock, to be used as placeholder on
- * other mux clocks when a specific parent clock is not
- * yet implemented. It should be dropped when the driver
- * is complete.
- */
- dummy: dummy {
- #clock-cells = <0>;
- compatible = "fixed-clock";
- clock-frequency = <0>;
- };
-
- osc24M: clk at 01c20050 {
- #clock-cells = <0>;
- compatible = "allwinner,sun4i-a10-osc-clk";
- reg = <0x01c20050 0x4>;
- clock-frequency = <24000000>;
- clock-output-names = "osc24M";
- };
-
- osc3M: osc3M-clk {
- compatible = "fixed-factor-clock";
- #clock-cells = <0>;
- clock-div = <8>;
- clock-mult = <1>;
- clocks = <&osc24M>;
- clock-output-names = "osc3M";
- };
-
- osc32k: clk at 0 {
- #clock-cells = <0>;
- compatible = "fixed-clock";
- clock-frequency = <32768>;
- clock-output-names = "osc32k";
- };
-
- pll1: clk at 01c20000 {
- #clock-cells = <0>;
- compatible = "allwinner,sun4i-a10-pll1-clk";
- reg = <0x01c20000 0x4>;
- clocks = <&osc24M>;
- clock-output-names = "pll1";
- };
-
- pll2: clk at 01c20008 {
- #clock-cells = <1>;
- compatible = "allwinner,sun5i-a13-pll2-clk";
- reg = <0x01c20008 0x8>;
- clocks = <&osc24M>;
- clock-output-names = "pll2-1x", "pll2-2x",
- "pll2-4x", "pll2-8x";
- };
-
- pll3: clk at 01c20010 {
- #clock-cells = <0>;
- compatible = "allwinner,sun4i-a10-pll3-clk";
- reg = <0x01c20010 0x4>;
- clocks = <&osc3M>;
- clock-output-names = "pll3";
- };
-
- pll3x2: pll3x2-clk {
- compatible = "allwinner,sun4i-a10-pll3-2x-clk";
- #clock-cells = <0>;
- clock-div = <1>;
- clock-mult = <2>;
- clocks = <&pll3>;
- clock-output-names = "pll3-2x";
- };
-
- pll4: clk at 01c20018 {
- #clock-cells = <0>;
- compatible = "allwinner,sun4i-a10-pll1-clk";
- reg = <0x01c20018 0x4>;
- clocks = <&osc24M>;
- clock-output-names = "pll4";
- };
-
- pll5: clk at 01c20020 {
- #clock-cells = <1>;
- compatible = "allwinner,sun4i-a10-pll5-clk";
- reg = <0x01c20020 0x4>;
- clocks = <&osc24M>;
- clock-output-names = "pll5_ddr", "pll5_other";
- };
-
- pll6: clk at 01c20028 {
- #clock-cells = <1>;
- compatible = "allwinner,sun4i-a10-pll6-clk";
- reg = <0x01c20028 0x4>;
- clocks = <&osc24M>;
- clock-output-names = "pll6_sata", "pll6_other", "pll6";
- };
-
- pll7: clk at 01c20030 {
- #clock-cells = <0>;
- compatible = "allwinner,sun4i-a10-pll3-clk";
- reg = <0x01c20030 0x4>;
- clocks = <&osc3M>;
- clock-output-names = "pll7";
- };
-
- pll7x2: pll7x2-clk {
- compatible = "allwinner,sun4i-a10-pll3-2x-clk";
- #clock-cells = <0>;
- clock-div = <1>;
- clock-mult = <2>;
- clocks = <&pll7>;
- clock-output-names = "pll7-2x";
- };
-
- /* dummy is 200M */
- cpu: cpu at 01c20054 {
- #clock-cells = <0>;
- compatible = "allwinner,sun4i-a10-cpu-clk";
- reg = <0x01c20054 0x4>;
- clocks = <&osc32k>, <&osc24M>, <&pll1>, <&dummy>;
- clock-output-names = "cpu";
- };
-
- axi: axi at 01c20054 {
- #clock-cells = <0>;
- compatible = "allwinner,sun4i-a10-axi-clk";
- reg = <0x01c20054 0x4>;
- clocks = <&cpu>;
- clock-output-names = "axi";
- };
-
- ahb: ahb at 01c20054 {
- #clock-cells = <0>;
- compatible = "allwinner,sun5i-a13-ahb-clk";
- reg = <0x01c20054 0x4>;
- clocks = <&axi>, <&cpu>, <&pll6 1>;
- clock-output-names = "ahb";
- /*
- * Use PLL6 as parent, instead of CPU/AXI
- * which has rate changes due to cpufreq
- */
- assigned-clocks = <&ahb>;
- assigned-clock-parents = <&pll6 1>;
- };
-
- apb0: apb0 at 01c20054 {
- #clock-cells = <0>;
- compatible = "allwinner,sun4i-a10-apb0-clk";
- reg = <0x01c20054 0x4>;
- clocks = <&ahb>;
- clock-output-names = "apb0";
- };
-
- apb1: clk at 01c20058 {
- #clock-cells = <0>;
- compatible = "allwinner,sun4i-a10-apb1-clk";
- reg = <0x01c20058 0x4>;
- clocks = <&osc24M>, <&pll6 1>, <&osc32k>;
- clock-output-names = "apb1";
- };
-
- axi_gates: clk at 01c2005c {
- #clock-cells = <1>;
- compatible = "allwinner,sun4i-a10-gates-clk";
- reg = <0x01c2005c 0x4>;
- clocks = <&axi>;
- clock-indices = <0>;
- clock-output-names = "axi_dram";
- };
-
- ahb_gates: clk at 01c20060 {
- #clock-cells = <1>;
- compatible = "allwinner,sun5i-a13-ahb-gates-clk";
- reg = <0x01c20060 0x8>;
- clocks = <&ahb>;
- clock-indices = <0>, <1>,
- <2>, <5>, <6>,
- <7>, <8>, <9>,
- <10>, <13>,
- <14>, <17>, <20>,
- <21>, <22>,
- <28>, <32>, <34>,
- <36>, <40>, <44>,
- <46>, <51>,
- <52>;
- clock-output-names = "ahb_usbotg", "ahb_ehci",
- "ahb_ohci", "ahb_ss", "ahb_dma",
- "ahb_bist", "ahb_mmc0", "ahb_mmc1",
- "ahb_mmc2", "ahb_nand",
- "ahb_sdram", "ahb_emac", "ahb_spi0",
- "ahb_spi1", "ahb_spi2",
- "ahb_hstimer", "ahb_ve", "ahb_tve",
- "ahb_lcd", "ahb_csi", "ahb_de_be",
- "ahb_de_fe", "ahb_iep",
- "ahb_mali400";
- };
-
- apb0_gates: clk at 01c20068 {
- #clock-cells = <1>;
- compatible = "allwinner,sun4i-a10-gates-clk";
- reg = <0x01c20068 0x4>;
- clocks = <&apb0>;
- clock-indices = <0>, <3>,
- <5>, <6>;
- clock-output-names = "apb0_codec", "apb0_i2s0",
- "apb0_pio", "apb0_ir";
- };
-
- apb1_gates: clk at 01c2006c {
- #clock-cells = <1>;
- compatible = "allwinner,sun4i-a10-gates-clk";
- reg = <0x01c2006c 0x4>;
- clocks = <&apb1>;
- clock-indices = <0>, <1>,
- <2>, <17>,
- <18>, <19>;
- clock-output-names = "apb1_i2c0", "apb1_i2c1",
- "apb1_i2c2", "apb1_uart1",
- "apb1_uart2", "apb1_uart3";
- };
-
- nand_clk: clk at 01c20080 {
- #clock-cells = <0>;
- compatible = "allwinner,sun4i-a10-mod0-clk";
- reg = <0x01c20080 0x4>;
- clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
- clock-output-names = "nand";
- };
-
- ms_clk: clk at 01c20084 {
- #clock-cells = <0>;
- compatible = "allwinner,sun4i-a10-mod0-clk";
- reg = <0x01c20084 0x4>;
- clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
- clock-output-names = "ms";
- };
-
- mmc0_clk: clk at 01c20088 {
- #clock-cells = <1>;
- compatible = "allwinner,sun4i-a10-mmc-clk";
- reg = <0x01c20088 0x4>;
- clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
- clock-output-names = "mmc0",
- "mmc0_output",
- "mmc0_sample";
- };
-
- mmc1_clk: clk at 01c2008c {
- #clock-cells = <1>;
- compatible = "allwinner,sun4i-a10-mmc-clk";
- reg = <0x01c2008c 0x4>;
- clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
- clock-output-names = "mmc1",
- "mmc1_output",
- "mmc1_sample";
- };
-
- mmc2_clk: clk at 01c20090 {
- #clock-cells = <1>;
- compatible = "allwinner,sun4i-a10-mmc-clk";
- reg = <0x01c20090 0x4>;
- clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
- clock-output-names = "mmc2",
- "mmc2_output",
- "mmc2_sample";
- };
-
- ts_clk: clk at 01c20098 {
- #clock-cells = <0>;
- compatible = "allwinner,sun4i-a10-mod0-clk";
- reg = <0x01c20098 0x4>;
- clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
- clock-output-names = "ts";
- };
-
- ss_clk: clk at 01c2009c {
- #clock-cells = <0>;
- compatible = "allwinner,sun4i-a10-mod0-clk";
- reg = <0x01c2009c 0x4>;
- clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
- clock-output-names = "ss";
- };
-
- spi0_clk: clk at 01c200a0 {
- #clock-cells = <0>;
- compatible = "allwinner,sun4i-a10-mod0-clk";
- reg = <0x01c200a0 0x4>;
- clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
- clock-output-names = "spi0";
- };
-
- spi1_clk: clk at 01c200a4 {
- #clock-cells = <0>;
- compatible = "allwinner,sun4i-a10-mod0-clk";
- reg = <0x01c200a4 0x4>;
- clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
- clock-output-names = "spi1";
- };
-
- spi2_clk: clk at 01c200a8 {
- #clock-cells = <0>;
- compatible = "allwinner,sun4i-a10-mod0-clk";
- reg = <0x01c200a8 0x4>;
- clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
- clock-output-names = "spi2";
- };
-
- ir0_clk: clk at 01c200b0 {
- #clock-cells = <0>;
- compatible = "allwinner,sun4i-a10-mod0-clk";
- reg = <0x01c200b0 0x4>;
- clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
- clock-output-names = "ir0";
- };
-
- i2s0_clk: clk at 01c200b8 {
- #clock-cells = <0>;
- compatible = "allwinner,sun4i-a10-mod1-clk";
- reg = <0x01c200b8 0x4>;
- clocks = <&pll2 SUN4I_A10_PLL2_8X>,
- <&pll2 SUN4I_A10_PLL2_4X>,
- <&pll2 SUN4I_A10_PLL2_2X>,
- <&pll2 SUN4I_A10_PLL2_1X>;
- clock-output-names = "i2s0";
- };
-
- spdif_clk: clk at 01c200c0 {
- #clock-cells = <0>;
- compatible = "allwinner,sun4i-a10-mod1-clk";
- reg = <0x01c200c0 0x4>;
- clocks = <&pll2 SUN4I_A10_PLL2_8X>,
- <&pll2 SUN4I_A10_PLL2_4X>,
- <&pll2 SUN4I_A10_PLL2_2X>,
- <&pll2 SUN4I_A10_PLL2_1X>;
- clock-output-names = "spdif";
- };
-
- usb_clk: clk at 01c200cc {
- #clock-cells = <1>;
- #reset-cells = <1>;
- compatible = "allwinner,sun5i-a13-usb-clk";
- reg = <0x01c200cc 0x4>;
- clocks = <&pll6 1>;
- clock-output-names = "usb_ohci0", "usb_phy";
- };
-
- dram_gates: clk at 01c20100 {
- #clock-cells = <1>;
- compatible = "nextthing,gr8-dram-gates-clk",
- "allwinner,sun4i-a10-gates-clk";
- reg = <0x01c20100 0x4>;
- clocks = <&pll5 0>;
- clock-indices = <0>,
- <1>,
- <25>,
- <26>,
- <29>,
- <31>;
- clock-output-names = "dram_ve",
- "dram_csi",
- "dram_de_fe",
- "dram_de_be",
- "dram_ace",
- "dram_iep";
- };
-
- de_be_clk: clk at 01c20104 {
- #clock-cells = <0>;
- #reset-cells = <0>;
- compatible = "allwinner,sun4i-a10-display-clk";
- reg = <0x01c20104 0x4>;
- clocks = <&pll3>, <&pll7>, <&pll5 1>;
- clock-output-names = "de-be";
- };
-
- de_fe_clk: clk at 01c2010c {
- #clock-cells = <0>;
- #reset-cells = <0>;
- compatible = "allwinner,sun4i-a10-display-clk";
- reg = <0x01c2010c 0x4>;
- clocks = <&pll3>, <&pll7>, <&pll5 1>;
- clock-output-names = "de-fe";
- };
-
- tcon_ch0_clk: clk at 01c20118 {
- #clock-cells = <0>;
- #reset-cells = <1>;
- compatible = "allwinner,sun4i-a10-tcon-ch0-clk";
- reg = <0x01c20118 0x4>;
- clocks = <&pll3>, <&pll7>, <&pll3x2>, <&pll7x2>;
- clock-output-names = "tcon-ch0-sclk";
- };
-
- tcon_ch1_clk: clk at 01c2012c {
- #clock-cells = <0>;
- compatible = "allwinner,sun4i-a10-tcon-ch1-clk";
- reg = <0x01c2012c 0x4>;
- clocks = <&pll3>, <&pll7>, <&pll3x2>, <&pll7x2>;
- clock-output-names = "tcon-ch1-sclk";
- };
-
- codec_clk: clk at 01c20140 {
- #clock-cells = <0>;
- compatible = "allwinner,sun4i-a10-codec-clk";
- reg = <0x01c20140 0x4>;
- clocks = <&pll2 SUN4I_A10_PLL2_1X>;
- clock-output-names = "codec";
- };
-
- mbus_clk: clk at 01c2015c {
- #clock-cells = <0>;
- compatible = "allwinner,sun5i-a13-mbus-clk";
- reg = <0x01c2015c 0x4>;
- clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
- clock-output-names = "mbus";
- };
- };
-
display-engine {
compatible = "allwinner,sun5i-a13-display-engine";
allwinner,pipelines = <&fe0>;
};
- soc at 01c00000 {
- compatible = "simple-bus";
- #address-cells = <1>;
- #size-cells = <1>;
- ranges;
-
- sram-controller at 01c00000 {
- compatible = "allwinner,sun4i-a10-sram-controller";
- reg = <0x01c00000 0x30>;
- #address-cells = <1>;
- #size-cells = <1>;
- ranges;
-
- sram_a: sram at 00000000 {
- compatible = "mmio-sram";
- reg = <0x00000000 0xc000>;
- #address-cells = <1>;
- #size-cells = <1>;
- ranges = <0 0x00000000 0xc000>;
- };
-
- sram_d: sram at 00010000 {
- compatible = "mmio-sram";
- reg = <0x00010000 0x1000>;
- #address-cells = <1>;
- #size-cells = <1>;
- ranges = <0 0x00010000 0x1000>;
-
- otg_sram: sram-section at 0000 {
- compatible = "allwinner,sun4i-a10-sram-d";
- reg = <0x0000 0x1000>;
- status = "disabled";
- };
- };
- };
-
- dma: dma-controller at 01c02000 {
- compatible = "allwinner,sun4i-a10-dma";
- reg = <0x01c02000 0x1000>;
- interrupts = <27>;
- clocks = <&ahb_gates 6>;
- #dma-cells = <2>;
- };
-
- nfc: nand at 01c03000 {
- compatible = "allwinner,sun4i-a10-nand";
- reg = <0x01c03000 0x1000>;
- interrupts = <37>;
- clocks = <&ahb_gates 13>, <&nand_clk>;
- clock-names = "ahb", "mod";
- dmas = <&dma SUN4I_DMA_DEDICATED 3>;
- dma-names = "rxtx";
- status = "disabled";
- #address-cells = <1>;
- #size-cells = <0>;
- };
-
- spi0: spi at 01c05000 {
- compatible = "allwinner,sun4i-a10-spi";
- reg = <0x01c05000 0x1000>;
- interrupts = <10>;
- clocks = <&ahb_gates 20>, <&spi0_clk>;
- clock-names = "ahb", "mod";
- dmas = <&dma SUN4I_DMA_DEDICATED 27>,
- <&dma SUN4I_DMA_DEDICATED 26>;
- dma-names = "rx", "tx";
- status = "disabled";
- #address-cells = <1>;
- #size-cells = <0>;
- };
-
- spi1: spi at 01c06000 {
- compatible = "allwinner,sun4i-a10-spi";
- reg = <0x01c06000 0x1000>;
- interrupts = <11>;
- clocks = <&ahb_gates 21>, <&spi1_clk>;
- clock-names = "ahb", "mod";
- dmas = <&dma SUN4I_DMA_DEDICATED 9>,
- <&dma SUN4I_DMA_DEDICATED 8>;
- dma-names = "rx", "tx";
- status = "disabled";
- #address-cells = <1>;
- #size-cells = <0>;
- };
-
- tve0: tv-encoder at 01c0a000 {
- compatible = "allwinner,sun4i-a10-tv-encoder";
- reg = <0x01c0a000 0x1000>;
- clocks = <&ahb_gates 34>;
- resets = <&tcon_ch0_clk 0>;
- status = "disabled";
-
- port {
- #address-cells = <1>;
- #size-cells = <0>;
-
- tve0_in_tcon0: endpoint at 0 {
- reg = <0>;
- remote-endpoint = <&tcon0_out_tve0>;
- };
- };
- };
-
- tcon0: lcd-controller at 01c0c000 {
- compatible = "allwinner,sun5i-a13-tcon";
- reg = <0x01c0c000 0x1000>;
- interrupts = <44>;
- resets = <&tcon_ch0_clk 1>;
- reset-names = "lcd";
- clocks = <&ahb_gates 36>,
- <&tcon_ch0_clk>,
- <&tcon_ch1_clk>;
- clock-names = "ahb",
- "tcon-ch0",
- "tcon-ch1";
- clock-output-names = "tcon-pixel-clock";
- status = "disabled";
-
- ports {
- #address-cells = <1>;
- #size-cells = <0>;
-
- tcon0_in: port at 0 {
- #address-cells = <1>;
- #size-cells = <0>;
- reg = <0>;
-
- tcon0_in_be0: endpoint at 0 {
- reg = <0>;
- remote-endpoint = <&be0_out_tcon0>;
- };
- };
-
- tcon0_out: port at 1 {
- #address-cells = <1>;
- #size-cells = <0>;
- reg = <1>;
-
- tcon0_out_tve0: endpoint at 1 {
- reg = <1>;
- remote-endpoint = <&tve0_in_tcon0>;
- };
- };
- };
- };
-
- mmc0: mmc at 01c0f000 {
- compatible = "allwinner,sun5i-a13-mmc";
- reg = <0x01c0f000 0x1000>;
- clocks = <&ahb_gates 8>,
- <&mmc0_clk 0>,
- <&mmc0_clk 1>,
- <&mmc0_clk 2>;
- clock-names = "ahb",
- "mmc",
- "output",
- "sample";
- interrupts = <32>;
- status = "disabled";
- #address-cells = <1>;
- #size-cells = <0>;
- };
-
- mmc1: mmc at 01c10000 {
- compatible = "allwinner,sun5i-a13-mmc";
- reg = <0x01c10000 0x1000>;
- clocks = <&ahb_gates 9>,
- <&mmc1_clk 0>,
- <&mmc1_clk 1>,
- <&mmc1_clk 2>;
- clock-names = "ahb",
- "mmc",
- "output",
- "sample";
- interrupts = <33>;
- status = "disabled";
- #address-cells = <1>;
- #size-cells = <0>;
- };
-
- mmc2: mmc at 01c11000 {
- compatible = "allwinner,sun5i-a13-mmc";
- reg = <0x01c11000 0x1000>;
- clocks = <&ahb_gates 10>,
- <&mmc2_clk 0>,
- <&mmc2_clk 1>,
- <&mmc2_clk 2>;
- clock-names = "ahb",
- "mmc",
- "output",
- "sample";
- interrupts = <34>;
- status = "disabled";
- #address-cells = <1>;
- #size-cells = <0>;
- };
-
- usb_otg: usb at 01c13000 {
- compatible = "allwinner,sun4i-a10-musb";
- reg = <0x01c13000 0x0400>;
- clocks = <&ahb_gates 0>;
- interrupts = <38>;
- interrupt-names = "mc";
- phys = <&usbphy 0>;
- phy-names = "usb";
- extcon = <&usbphy 0>;
- allwinner,sram = <&otg_sram 1>;
- status = "disabled";
-
- dr_mode = "otg";
- };
-
- usbphy: phy at 01c13400 {
- #phy-cells = <1>;
- compatible = "allwinner,sun5i-a13-usb-phy";
- reg = <0x01c13400 0x10 0x01c14800 0x4>;
- reg-names = "phy_ctrl", "pmu1";
- clocks = <&usb_clk 8>;
- clock-names = "usb_phy";
- resets = <&usb_clk 0>, <&usb_clk 1>;
- reset-names = "usb0_reset", "usb1_reset";
- status = "disabled";
- };
-
- ehci0: usb at 01c14000 {
- compatible = "allwinner,sun5i-a13-ehci", "generic-ehci";
- reg = <0x01c14000 0x100>;
- interrupts = <39>;
- clocks = <&ahb_gates 1>;
- phys = <&usbphy 1>;
- phy-names = "usb";
- status = "disabled";
- };
-
- ohci0: usb at 01c14400 {
- compatible = "allwinner,sun5i-a13-ohci", "generic-ohci";
- reg = <0x01c14400 0x100>;
- interrupts = <40>;
- clocks = <&usb_clk 6>, <&ahb_gates 2>;
- phys = <&usbphy 1>;
- phy-names = "usb";
- status = "disabled";
- };
-
- spi2: spi at 01c17000 {
- compatible = "allwinner,sun4i-a10-spi";
- reg = <0x01c17000 0x1000>;
- interrupts = <12>;
- clocks = <&ahb_gates 22>, <&spi2_clk>;
- clock-names = "ahb", "mod";
- dmas = <&dma SUN4I_DMA_DEDICATED 29>,
- <&dma SUN4I_DMA_DEDICATED 28>;
- dma-names = "rx", "tx";
- status = "disabled";
- #address-cells = <1>;
- #size-cells = <0>;
- };
-
- intc: interrupt-controller at 01c20400 {
- compatible = "allwinner,sun4i-a10-ic";
- reg = <0x01c20400 0x400>;
- interrupt-controller;
- #interrupt-cells = <1>;
- };
-
- pio: pinctrl at 01c20800 {
- compatible = "nextthing,gr8-pinctrl";
- reg = <0x01c20800 0x400>;
- interrupts = <28>;
- clocks = <&apb0_gates 5>;
- gpio-controller;
- interrupt-controller;
- #interrupt-cells = <3>;
- #gpio-cells = <3>;
-
- i2c0_pins_a: i2c0 at 0 {
- allwinner,pins = "PB0", "PB1";
- allwinner,function = "i2c0";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
- };
-
- i2c1_pins_a: i2c1 at 0 {
- allwinner,pins = "PB15", "PB16";
- allwinner,function = "i2c1";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
- };
-
- i2c2_pins_a: i2c2 at 0 {
- allwinner,pins = "PB17", "PB18";
- allwinner,function = "i2c2";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
- };
-
- i2s0_data_pins_a: i2s0-data at 0 {
- allwinner,pins = "PB6", "PB7", "PB8", "PB9";
- allwinner,function = "i2s0";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
- };
-
- i2s0_mclk_pins_a: i2s0-mclk at 0 {
- allwinner,pins = "PB5";
- allwinner,function = "i2s0";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
- };
-
- ir0_rx_pins_a: ir0 at 0 {
- allwinner,pins = "PB4";
- allwinner,function = "ir0";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
- };
-
- lcd_rgb666_pins: lcd-rgb666 at 0 {
- allwinner,pins = "PD2", "PD3", "PD4", "PD5", "PD6", "PD7",
- "PD10", "PD11", "PD12", "PD13", "PD14", "PD15",
- "PD18", "PD19", "PD20", "PD21", "PD22", "PD23",
- "PD24", "PD25", "PD26", "PD27";
- allwinner,function = "lcd0";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
- };
-
- mmc0_pins_a: mmc0 at 0 {
- allwinner,pins = "PF0", "PF1", "PF2", "PF3",
- "PF4", "PF5";
- allwinner,function = "mmc0";
- allwinner,drive = <SUN4I_PINCTRL_30_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
- };
-
- nand_pins_a: nand-base0 at 0 {
- allwinner,pins = "PC0", "PC1", "PC2",
- "PC5", "PC8", "PC9", "PC10",
- "PC11", "PC12", "PC13", "PC14",
- "PC15";
- allwinner,function = "nand0";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
- };
-
- nand_cs0_pins_a: nand-cs at 0 {
- allwinner,pins = "PC4";
- allwinner,function = "nand0";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
- };
-
- nand_rb0_pins_a: nand-rb at 0 {
- allwinner,pins = "PC6";
- allwinner,function = "nand0";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
- };
-
- pwm0_pins_a: pwm0 at 0 {
- allwinner,pins = "PB2";
- allwinner,function = "pwm0";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
- };
-
- pwm1_pins: pwm1 {
- allwinner,pins = "PG13";
- allwinner,function = "pwm1";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
- };
-
- spdif_tx_pins_a: spdif at 0 {
- allwinner,pins = "PB10";
- allwinner,function = "spdif";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
- };
-
- uart1_pins_a: uart1 at 1 {
- allwinner,pins = "PG3", "PG4";
- allwinner,function = "uart1";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
- };
-
- uart1_cts_rts_pins_a: uart1-cts-rts at 0 {
- allwinner,pins = "PG5", "PG6";
- allwinner,function = "uart1";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
- };
-
- uart2_pins_a: uart2 at 1 {
- allwinner,pins = "PD2", "PD3";
- allwinner,function = "uart2";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
- };
-
- uart2_cts_rts_pins_a: uart2-cts-rts at 0 {
- allwinner,pins = "PD4", "PD5";
- allwinner,function = "uart2";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
- };
-
- uart3_pins_a: uart3 at 1 {
- allwinner,pins = "PG9", "PG10";
- allwinner,function = "uart3";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
- };
-
- uart3_cts_rts_pins_a: uart3-cts-rts at 0 {
- allwinner,pins = "PG11", "PG12";
- allwinner,function = "uart3";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
- };
- };
-
- pwm: pwm at 01c20e00 {
+ soc at 1c00000 {
+ pwm: pwm at 1c20e00 {
compatible = "allwinner,sun5i-a10s-pwm";
reg = <0x01c20e00 0xc>;
- clocks = <&osc24M>;
+ clocks = <&ccu CLK_HOSC>;
#pwm-cells = <3>;
status = "disabled";
};
- timer at 01c20c00 {
- compatible = "allwinner,sun4i-a10-timer";
- reg = <0x01c20c00 0x90>;
- interrupts = <22>;
- clocks = <&osc24M>;
- };
-
- wdt: watchdog at 01c20c90 {
- compatible = "allwinner,sun4i-a10-wdt";
- reg = <0x01c20c90 0x10>;
- };
-
- spdif: spdif at 01c21000 {
+ spdif: spdif at 1c21000 {
#sound-dai-cells = <0>;
compatible = "allwinner,sun4i-a10-spdif";
reg = <0x01c21000 0x400>;
interrupts = <13>;
- clocks = <&apb0_gates 1>, <&spdif_clk>;
+ clocks = <&ccu CLK_APB0_SPDIF>, <&ccu CLK_SPDIF>;
clock-names = "apb", "spdif";
dmas = <&dma SUN4I_DMA_NORMAL 2>,
<&dma SUN4I_DMA_NORMAL 2>;
@@ -944,189 +76,51 @@
status = "disabled";
};
- ir0: ir at 01c21800 {
- compatible = "allwinner,sun4i-a10-ir";
- clocks = <&apb0_gates 6>, <&ir0_clk>;
- clock-names = "apb", "ir";
- interrupts = <5>;
- reg = <0x01c21800 0x40>;
- status = "disabled";
- };
-
- i2s0: i2s at 01c22400 {
+ i2s0: i2s at 1c22400 {
#sound-dai-cells = <0>;
compatible = "allwinner,sun4i-a10-i2s";
reg = <0x01c22400 0x400>;
interrupts = <16>;
- clocks = <&apb0_gates 3>, <&i2s0_clk>;
+ clocks = <&ccu CLK_APB0_I2S>, <&ccu CLK_I2S>;
clock-names = "apb", "mod";
dmas = <&dma SUN4I_DMA_NORMAL 3>,
<&dma SUN4I_DMA_NORMAL 3>;
dma-names = "rx", "tx";
status = "disabled";
};
+ };
+};
- lradc: lradc at 01c22800 {
- compatible = "allwinner,sun4i-a10-lradc-keys";
- reg = <0x01c22800 0x100>;
- interrupts = <31>;
- status = "disabled";
- };
-
- codec: codec at 01c22c00 {
- #sound-dai-cells = <0>;
- compatible = "allwinner,sun4i-a10-codec";
- reg = <0x01c22c00 0x40>;
- interrupts = <30>;
- clocks = <&apb0_gates 0>, <&codec_clk>;
- clock-names = "apb", "codec";
- dmas = <&dma SUN4I_DMA_NORMAL 19>,
- <&dma SUN4I_DMA_NORMAL 19>;
- dma-names = "rx", "tx";
- status = "disabled";
- };
-
- rtp: rtp at 01c25000 {
- compatible = "allwinner,sun5i-a13-ts";
- reg = <0x01c25000 0x100>;
- interrupts = <29>;
- #thermal-sensor-cells = <0>;
- };
-
- uart1: serial at 01c28400 {
- compatible = "snps,dw-apb-uart";
- reg = <0x01c28400 0x400>;
- interrupts = <2>;
- reg-shift = <2>;
- reg-io-width = <4>;
- clocks = <&apb1_gates 17>;
- status = "disabled";
- };
-
- uart2: serial at 01c28800 {
- compatible = "snps,dw-apb-uart";
- reg = <0x01c28800 0x400>;
- interrupts = <3>;
- reg-shift = <2>;
- reg-io-width = <4>;
- clocks = <&apb1_gates 18>;
- status = "disabled";
- };
-
- uart3: serial at 01c28c00 {
- compatible = "snps,dw-apb-uart";
- reg = <0x01c28c00 0x400>;
- interrupts = <4>;
- reg-shift = <2>;
- reg-io-width = <4>;
- clocks = <&apb1_gates 19>;
- status = "disabled";
- };
-
- i2c0: i2c at 01c2ac00 {
- compatible = "allwinner,sun4i-a10-i2c";
- reg = <0x01c2ac00 0x400>;
- interrupts = <7>;
- clocks = <&apb1_gates 0>;
- status = "disabled";
- #address-cells = <1>;
- #size-cells = <0>;
- };
-
- i2c1: i2c at 01c2b000 {
- compatible = "allwinner,sun4i-a10-i2c";
- reg = <0x01c2b000 0x400>;
- interrupts = <8>;
- clocks = <&apb1_gates 1>;
- status = "disabled";
- #address-cells = <1>;
- #size-cells = <0>;
- };
-
- i2c2: i2c at 01c2b400 {
- compatible = "allwinner,sun4i-a10-i2c";
- reg = <0x01c2b400 0x400>;
- interrupts = <9>;
- clocks = <&apb1_gates 2>;
- status = "disabled";
- #address-cells = <1>;
- #size-cells = <0>;
- };
-
- timer at 01c60000 {
- compatible = "allwinner,sun5i-a13-hstimer";
- reg = <0x01c60000 0x1000>;
- interrupts = <82>, <83>;
- clocks = <&ahb_gates 28>;
- };
-
- fe0: display-frontend at 01e00000 {
- compatible = "allwinner,sun5i-a13-display-frontend";
- reg = <0x01e00000 0x20000>;
- interrupts = <47>;
- clocks = <&ahb_gates 46>, <&de_fe_clk>,
- <&dram_gates 25>;
- clock-names = "ahb", "mod",
- "ram";
- resets = <&de_fe_clk>;
- status = "disabled";
-
- ports {
- #address-cells = <1>;
- #size-cells = <0>;
-
- fe0_out: port at 1 {
- #address-cells = <1>;
- #size-cells = <0>;
- reg = <1>;
-
- fe0_out_be0: endpoint at 0 {
- reg = <0>;
- remote-endpoint = <&be0_in_fe0>;
- };
- };
- };
- };
-
- be0: display-backend at 01e60000 {
- compatible = "allwinner,sun5i-a13-display-backend";
- reg = <0x01e60000 0x10000>;
- clocks = <&ahb_gates 44>, <&de_be_clk>,
- <&dram_gates 26>;
- clock-names = "ahb", "mod",
- "ram";
- resets = <&de_be_clk>;
- status = "disabled";
+&ccu {
+ compatible = "nextthing,gr8-ccu";
+};
- assigned-clocks = <&de_be_clk>;
- assigned-clock-rates = <300000000>;
+&pio {
+ compatible = "nextthing,gr8-pinctrl";
- ports {
- #address-cells = <1>;
- #size-cells = <0>;
+ i2s0_data_pins_a: i2s0-data at 0 {
+ pins = "PB6", "PB7", "PB8", "PB9";
+ function = "i2s0";
+ };
- be0_in: port at 0 {
- #address-cells = <1>;
- #size-cells = <0>;
- reg = <0>;
+ i2s0_mclk_pins_a: i2s0-mclk at 0 {
+ pins = "PB5";
+ function = "i2s0";
+ };
- be0_in_fe0: endpoint at 0 {
- reg = <0>;
- remote-endpoint = <&fe0_out_be0>;
- };
- };
+ pwm1_pins: pwm1 {
+ pins = "PG13";
+ function = "pwm1";
+ };
- be0_out: port at 1 {
- #address-cells = <1>;
- #size-cells = <0>;
- reg = <1>;
+ spdif_tx_pins_a: spdif at 0 {
+ pins = "PB10";
+ function = "spdif";
+ bias-pull-up;
+ };
- be0_out_tcon0: endpoint at 0 {
- reg = <0>;
- remote-endpoint = <&tcon0_in_be0>;
- };
- };
- };
- };
+ uart1_cts_rts_pins_a: uart1-cts-rts at 0 {
+ pins = "PG5", "PG6";
+ function = "uart1";
};
};
diff --git a/arch/arm/dts/sun5i-r8-chip.dts b/arch/arm/dts/sun5i-r8-chip.dts
index 7a8cc27279..879a4b0f3b 100644
--- a/arch/arm/dts/sun5i-r8-chip.dts
+++ b/arch/arm/dts/sun5i-r8-chip.dts
@@ -56,25 +56,39 @@
aliases {
i2c0 = &i2c0;
+ i2c1 = &i2c1;
i2c2 = &i2c2;
serial0 = &uart1;
serial1 = &uart3;
+ spi0 = &spi2;
};
chosen {
stdout-path = "serial0:115200n8";
};
- wifi_reg_on: wifi_reg_on {
- compatible = "regulator-fixed";
+ leds {
+ compatible = "gpio-leds";
+
+ status {
+ label = "chip:white:status";
+ gpios = <&axp_gpio 2 GPIO_ACTIVE_HIGH>;
+ default-state = "on";
+ };
+ };
+
+ mmc0_pwrseq: mmc0_pwrseq {
+ compatible = "mmc-pwrseq-simple";
pinctrl-names = "default";
pinctrl-0 = <&chip_wifi_reg_on_pin>;
+ reset-gpios = <&pio 2 19 GPIO_ACTIVE_LOW>; /* PC19 */
+ };
- regulator-name = "wifi-reg-on";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- gpio = <&pio 2 19 GPIO_ACTIVE_HIGH>; /* PC19 */
- enable-active-high;
+ onewire {
+ compatible = "w1-gpio";
+ gpios = <&pio 3 2 GPIO_ACTIVE_HIGH>; /* PD2 */
+ pinctrl-names = "default";
+ pinctrl-0 = <&chip_w1_pin>;
};
};
@@ -114,6 +128,20 @@
#include "axp209.dtsi"
+&ac_power_supply {
+ status = "okay";
+};
+
+&battery_power_supply {
+ status = "okay";
+};
+
+&i2c1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c1_pins_a>;
+ status = "disabled";
+};
+
&i2c2 {
pinctrl-names = "default";
pinctrl-0 = <&i2c2_pins_a>;
@@ -134,13 +162,14 @@
};
&mmc0_pins_a {
- allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+ bias-pull-up;
};
&mmc0 {
pinctrl-names = "default";
pinctrl-0 = <&mmc0_pins_a>;
- vmmc-supply = <&wifi_reg_on>;
+ vmmc-supply = <®_vcc3v3>;
+ mmc-pwrseq = <&mmc0_pwrseq>;
bus-width = <4>;
non-removable;
status = "okay";
@@ -156,24 +185,24 @@
&pio {
chip_vbus_pin: chip_vbus_pin at 0 {
- allwinner,pins = "PB10";
- allwinner,function = "gpio_out";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ pins = "PB10";
+ function = "gpio_out";
};
chip_wifi_reg_on_pin: chip_wifi_reg_on_pin at 0 {
- allwinner,pins = "PC19";
- allwinner,function = "gpio_out";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ pins = "PC19";
+ function = "gpio_out";
};
chip_id_det_pin: chip_id_det_pin at 0 {
- allwinner,pins = "PG2";
- allwinner,function = "gpio_in";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ pins = "PG2";
+ function = "gpio_in";
+ };
+
+ chip_w1_pin: chip_w1_pin at 0 {
+ pins = "PD2";
+ function = "gpio_in";
+ bias-pull-up;
};
};
@@ -202,17 +231,25 @@
regulator-always-on;
};
+/*
+ * Both LDO3 and LDO4 are used in parallel to power up the WiFi/BT
+ * Chip.
+ *
+ * If those are not enabled, the SDIO part will not enumerate, and
+ * since there's no way currently to pass DT infos to an SDIO device,
+ * we cannot really do better than this ugly hack for now.
+ */
®_ldo3 {
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
- regulator-name = "vdd-wifi1";
+ regulator-name = "vcc-wifi-1";
regulator-always-on;
};
®_ldo4 {
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
- regulator-name = "vdd-wifi2";
+ regulator-name = "vcc-wifi-2";
regulator-always-on;
};
@@ -229,6 +266,12 @@
status = "okay";
};
+&spi2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&spi2_pins_a>;
+ status = "disabled";
+};
+
&tcon0 {
status = "okay";
};
@@ -246,7 +289,7 @@
&uart3 {
pinctrl-names = "default";
pinctrl-0 = <&uart3_pins_a>,
- <&uart3_pins_cts_rts_a>;
+ <&uart3_cts_rts_pins_a>;
status = "okay";
};
diff --git a/arch/arm/dts/sun5i-r8.dtsi b/arch/arm/dts/sun5i-r8.dtsi
index 8b058f53b7..de35dbcd11 100644
--- a/arch/arm/dts/sun5i-r8.dtsi
+++ b/arch/arm/dts/sun5i-r8.dtsi
@@ -45,43 +45,3 @@
#include "sun5i-a13.dtsi"
-/ {
- chosen {
- framebuffer at 1 {
- compatible = "allwinner,simple-framebuffer",
- "simple-framebuffer";
- allwinner,pipeline = "de_be0-lcd0-tve0";
- clocks = <&ahb_gates 34>, <&ahb_gates 36>,
- <&ahb_gates 44>, <&de_be_clk>,
- <&tcon_ch1_clk>, <&dram_gates 26>;
- status = "disabled";
- };
- };
-
- soc at 01c00000 {
- tve0: tv-encoder at 01c0a000 {
- compatible = "allwinner,sun4i-a10-tv-encoder";
- reg = <0x01c0a000 0x1000>;
- clocks = <&ahb_gates 34>;
- resets = <&tcon_ch0_clk 0>;
- status = "disabled";
-
- port {
- #address-cells = <1>;
- #size-cells = <0>;
-
- tve0_in_tcon0: endpoint at 0 {
- reg = <0>;
- remote-endpoint = <&tcon0_out_tve0>;
- };
- };
- };
- };
-};
-
-&tcon0_out {
- tcon0_out_tve0: endpoint at 1 {
- reg = <1>;
- remote-endpoint = <&tve0_in_tcon0>;
- };
-};
diff --git a/arch/arm/dts/sun5i-reference-design-tablet.dtsi b/arch/arm/dts/sun5i-reference-design-tablet.dtsi
index 20cc940f5f..8acbaab14f 100644
--- a/arch/arm/dts/sun5i-reference-design-tablet.dtsi
+++ b/arch/arm/dts/sun5i-reference-design-tablet.dtsi
@@ -41,6 +41,7 @@
*/
#include "sunxi-reference-design-tablet.dtsi"
+#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/pwm/pwm.h>
/ {
@@ -84,6 +85,23 @@
};
&i2c1 {
+ /*
+ * The gsl1680 is rated at 400KHz and it will not work reliable at
+ * 100KHz, this has been confirmed on multiple different q8 tablets.
+ * All other devices on this bus are also rated for 400KHz.
+ */
+ clock-frequency = <400000>;
+
+ touchscreen: touchscreen {
+ interrupt-parent = <&pio>;
+ interrupts = <6 11 IRQ_TYPE_EDGE_FALLING>; /* EINT11 (PG11) */
+ pinctrl-names = "default";
+ pinctrl-0 = <&ts_power_pin>;
+ power-gpios = <&pio 1 3 GPIO_ACTIVE_HIGH>; /* PB3 */
+ /* Tablet dts must provide reg and compatible */
+ status = "disabled";
+ };
+
pcf8563: rtc at 51 {
compatible = "nxp,pcf8563";
reg = <0x51>;
@@ -92,6 +110,14 @@
#include "axp209.dtsi"
+&ac_power_supply {
+ status = "okay";
+};
+
+&battery_power_supply {
+ status = "okay";
+};
+
&lradc {
vref-supply = <®_ldo2>;
};
@@ -101,8 +127,7 @@
pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin>;
vmmc-supply = <®_vcc3v0>;
bus-width = <4>;
- cd-gpios = <&pio 6 0 GPIO_ACTIVE_HIGH>; /* PG0 */
- cd-inverted;
+ cd-gpios = <&pio 6 0 GPIO_ACTIVE_LOW>; /* PG0 */
status = "okay";
};
@@ -112,38 +137,38 @@
&pio {
codec_pa_pin: codec_pa_pin at 0 {
- allwinner,pins = "PG10";
- allwinner,function = "gpio_out";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ pins = "PG10";
+ function = "gpio_out";
};
mmc0_cd_pin: mmc0_cd_pin at 0 {
- allwinner,pins = "PG0";
- allwinner,function = "gpio_in";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+ pins = "PG0";
+ function = "gpio_in";
+ bias-pull-up;
+ };
+
+ ts_power_pin: ts_power_pin {
+ pins = "PB3";
+ function = "gpio_out";
+ drive-strength = <10>;
+ bias-disable;
};
usb0_vbus_detect_pin: usb0_vbus_detect_pin at 0 {
- allwinner,pins = "PG1";
- allwinner,function = "gpio_in";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_PULL_DOWN>;
+ pins = "PG1";
+ function = "gpio_in";
+ bias-pull-down;
};
usb0_id_detect_pin: usb0_id_detect_pin at 0 {
- allwinner,pins = "PG2";
- allwinner,function = "gpio_in";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+ pins = "PG2";
+ function = "gpio_in";
+ bias-pull-up;
};
usb0_vbus_pin_a: usb0_vbus_pin at 0 {
- allwinner,pins = "PG12";
- allwinner,function = "gpio_out";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ pins = "PG12";
+ function = "gpio_out";
};
};
diff --git a/arch/arm/dts/sun5i.dtsi b/arch/arm/dts/sun5i.dtsi
index e374f4fc80..07f2248ed5 100644
--- a/arch/arm/dts/sun5i.dtsi
+++ b/arch/arm/dts/sun5i.dtsi
@@ -44,9 +44,9 @@
#include "skeleton.dtsi"
-#include <dt-bindings/clock/sun4i-a10-pll2.h>
+#include <dt-bindings/clock/sun5i-ccu.h>
#include <dt-bindings/dma/sun4i-a10.h>
-#include <dt-bindings/pinctrl/sun4i-a10.h>
+#include <dt-bindings/reset/sun5i-ccu.h>
/ {
interrupt-parent = <&intc>;
@@ -59,42 +59,45 @@
device_type = "cpu";
compatible = "arm,cortex-a8";
reg = <0x0>;
- clocks = <&cpu>;
+ clocks = <&ccu CLK_CPU>;
};
};
- clocks {
+ chosen {
#address-cells = <1>;
#size-cells = <1>;
ranges;
- /*
- * This is a dummy clock, to be used as placeholder on
- * other mux clocks when a specific parent clock is not
- * yet implemented. It should be dropped when the driver
- * is complete.
- */
- dummy: dummy {
- #clock-cells = <0>;
- compatible = "fixed-clock";
- clock-frequency = <0>;
+ framebuffer at 0 {
+ compatible = "allwinner,simple-framebuffer",
+ "simple-framebuffer";
+ allwinner,pipeline = "de_be0-lcd0";
+ clocks = <&ccu CLK_AHB_LCD>, <&ccu CLK_AHB_DE_BE>, <&ccu CLK_DE_BE>,
+ <&ccu CLK_TCON_CH0>, <&ccu CLK_DRAM_DE_BE>;
+ status = "disabled";
};
- osc24M: clk at 01c20050 {
- #clock-cells = <0>;
- compatible = "allwinner,sun4i-a10-osc-clk";
- reg = <0x01c20050 0x4>;
- clock-frequency = <24000000>;
- clock-output-names = "osc24M";
+ framebuffer at 1 {
+ compatible = "allwinner,simple-framebuffer",
+ "simple-framebuffer";
+ allwinner,pipeline = "de_be0-lcd0-tve0";
+ clocks = <&ccu CLK_AHB_TVE>, <&ccu CLK_AHB_LCD>,
+ <&ccu CLK_AHB_DE_BE>, <&ccu CLK_DE_BE>,
+ <&ccu CLK_TCON_CH1>, <&ccu CLK_DRAM_DE_BE>;
+ status = "disabled";
};
+ };
+
+ clocks {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
- osc3M: osc3M_clk {
- compatible = "fixed-factor-clock";
+ osc24M: clk at 1c20050 {
#clock-cells = <0>;
- clock-div = <8>;
- clock-mult = <1>;
- clocks = <&osc24M>;
- clock-output-names = "osc3M";
+ compatible = "fixed-clock";
+ clock-frequency = <24000000>;
+ clock-output-names = "osc24M";
};
osc32k: clk at 0 {
@@ -103,272 +106,22 @@
clock-frequency = <32768>;
clock-output-names = "osc32k";
};
-
- pll1: clk at 01c20000 {
- #clock-cells = <0>;
- compatible = "allwinner,sun4i-a10-pll1-clk";
- reg = <0x01c20000 0x4>;
- clocks = <&osc24M>;
- clock-output-names = "pll1";
- };
-
- pll2: clk at 01c20008 {
- #clock-cells = <1>;
- compatible = "allwinner,sun5i-a13-pll2-clk";
- reg = <0x01c20008 0x8>;
- clocks = <&osc24M>;
- clock-output-names = "pll2-1x", "pll2-2x",
- "pll2-4x", "pll2-8x";
- };
-
- pll3: clk at 01c20010 {
- #clock-cells = <0>;
- compatible = "allwinner,sun4i-a10-pll3-clk";
- reg = <0x01c20010 0x4>;
- clocks = <&osc3M>;
- clock-output-names = "pll3";
- };
-
- pll3x2: pll3x2_clk {
- compatible = "allwinner,sun4i-a10-pll3-2x-clk", "fixed-factor-clock";
- #clock-cells = <0>;
- clock-div = <1>;
- clock-mult = <2>;
- clocks = <&pll3>;
- clock-output-names = "pll3-2x";
- };
-
- pll4: clk at 01c20018 {
- #clock-cells = <0>;
- compatible = "allwinner,sun4i-a10-pll1-clk";
- reg = <0x01c20018 0x4>;
- clocks = <&osc24M>;
- clock-output-names = "pll4";
- };
-
- pll5: clk at 01c20020 {
- #clock-cells = <1>;
- compatible = "allwinner,sun4i-a10-pll5-clk";
- reg = <0x01c20020 0x4>;
- clocks = <&osc24M>;
- clock-output-names = "pll5_ddr", "pll5_other";
- };
-
- pll6: clk at 01c20028 {
- #clock-cells = <1>;
- compatible = "allwinner,sun4i-a10-pll6-clk";
- reg = <0x01c20028 0x4>;
- clocks = <&osc24M>;
- clock-output-names = "pll6_sata", "pll6_other", "pll6";
- };
-
- pll7: clk at 01c20030 {
- #clock-cells = <0>;
- compatible = "allwinner,sun4i-a10-pll3-clk";
- reg = <0x01c20030 0x4>;
- clocks = <&osc3M>;
- clock-output-names = "pll7";
- };
-
- pll7x2: pll7x2_clk {
- compatible = "fixed-factor-clock";
- #clock-cells = <0>;
- clock-div = <1>;
- clock-mult = <2>;
- clocks = <&pll7>;
- clock-output-names = "pll7-2x";
- };
-
- /* dummy is 200M */
- cpu: cpu at 01c20054 {
- #clock-cells = <0>;
- compatible = "allwinner,sun4i-a10-cpu-clk";
- reg = <0x01c20054 0x4>;
- clocks = <&osc32k>, <&osc24M>, <&pll1>, <&dummy>;
- clock-output-names = "cpu";
- };
-
- axi: axi at 01c20054 {
- #clock-cells = <0>;
- compatible = "allwinner,sun4i-a10-axi-clk";
- reg = <0x01c20054 0x4>;
- clocks = <&cpu>;
- clock-output-names = "axi";
- };
-
- ahb: ahb at 01c20054 {
- #clock-cells = <0>;
- compatible = "allwinner,sun5i-a13-ahb-clk";
- reg = <0x01c20054 0x4>;
- clocks = <&axi>, <&cpu>, <&pll6 1>;
- clock-output-names = "ahb";
- /*
- * Use PLL6 as parent, instead of CPU/AXI
- * which has rate changes due to cpufreq
- */
- assigned-clocks = <&ahb>;
- assigned-clock-parents = <&pll6 1>;
- };
-
- apb0: apb0 at 01c20054 {
- #clock-cells = <0>;
- compatible = "allwinner,sun4i-a10-apb0-clk";
- reg = <0x01c20054 0x4>;
- clocks = <&ahb>;
- clock-output-names = "apb0";
- };
-
- apb1: clk at 01c20058 {
- #clock-cells = <0>;
- compatible = "allwinner,sun4i-a10-apb1-clk";
- reg = <0x01c20058 0x4>;
- clocks = <&osc24M>, <&pll6 1>, <&osc32k>;
- clock-output-names = "apb1";
- };
-
- axi_gates: clk at 01c2005c {
- #clock-cells = <1>;
- compatible = "allwinner,sun4i-a10-axi-gates-clk";
- reg = <0x01c2005c 0x4>;
- clocks = <&axi>;
- clock-indices = <0>;
- clock-output-names = "axi_dram";
- };
-
- nand_clk: clk at 01c20080 {
- #clock-cells = <0>;
- compatible = "allwinner,sun4i-a10-mod0-clk";
- reg = <0x01c20080 0x4>;
- clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
- clock-output-names = "nand";
- };
-
- ms_clk: clk at 01c20084 {
- #clock-cells = <0>;
- compatible = "allwinner,sun4i-a10-mod0-clk";
- reg = <0x01c20084 0x4>;
- clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
- clock-output-names = "ms";
- };
-
- mmc0_clk: clk at 01c20088 {
- #clock-cells = <1>;
- compatible = "allwinner,sun4i-a10-mmc-clk";
- reg = <0x01c20088 0x4>;
- clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
- clock-output-names = "mmc0",
- "mmc0_output",
- "mmc0_sample";
- };
-
- mmc1_clk: clk at 01c2008c {
- #clock-cells = <1>;
- compatible = "allwinner,sun4i-a10-mmc-clk";
- reg = <0x01c2008c 0x4>;
- clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
- clock-output-names = "mmc1",
- "mmc1_output",
- "mmc1_sample";
- };
-
- mmc2_clk: clk at 01c20090 {
- #clock-cells = <1>;
- compatible = "allwinner,sun4i-a10-mmc-clk";
- reg = <0x01c20090 0x4>;
- clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
- clock-output-names = "mmc2",
- "mmc2_output",
- "mmc2_sample";
- };
-
- ts_clk: clk at 01c20098 {
- #clock-cells = <0>;
- compatible = "allwinner,sun4i-a10-mod0-clk";
- reg = <0x01c20098 0x4>;
- clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
- clock-output-names = "ts";
- };
-
- ss_clk: clk at 01c2009c {
- #clock-cells = <0>;
- compatible = "allwinner,sun4i-a10-mod0-clk";
- reg = <0x01c2009c 0x4>;
- clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
- clock-output-names = "ss";
- };
-
- spi0_clk: clk at 01c200a0 {
- #clock-cells = <0>;
- compatible = "allwinner,sun4i-a10-mod0-clk";
- reg = <0x01c200a0 0x4>;
- clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
- clock-output-names = "spi0";
- };
-
- spi1_clk: clk at 01c200a4 {
- #clock-cells = <0>;
- compatible = "allwinner,sun4i-a10-mod0-clk";
- reg = <0x01c200a4 0x4>;
- clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
- clock-output-names = "spi1";
- };
-
- spi2_clk: clk at 01c200a8 {
- #clock-cells = <0>;
- compatible = "allwinner,sun4i-a10-mod0-clk";
- reg = <0x01c200a8 0x4>;
- clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
- clock-output-names = "spi2";
- };
-
- ir0_clk: clk at 01c200b0 {
- #clock-cells = <0>;
- compatible = "allwinner,sun4i-a10-mod0-clk";
- reg = <0x01c200b0 0x4>;
- clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
- clock-output-names = "ir0";
- };
-
- usb_clk: clk at 01c200cc {
- #clock-cells = <1>;
- #reset-cells = <1>;
- compatible = "allwinner,sun5i-a13-usb-clk";
- reg = <0x01c200cc 0x4>;
- clocks = <&pll6 1>;
- clock-output-names = "usb_ohci0", "usb_phy";
- };
-
- codec_clk: clk at 01c20140 {
- #clock-cells = <0>;
- compatible = "allwinner,sun4i-a10-codec-clk";
- reg = <0x01c20140 0x4>;
- clocks = <&pll2 SUN4I_A10_PLL2_1X>;
- clock-output-names = "codec";
- };
-
- mbus_clk: clk at 01c2015c {
- #clock-cells = <0>;
- compatible = "allwinner,sun5i-a13-mbus-clk";
- reg = <0x01c2015c 0x4>;
- clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
- clock-output-names = "mbus";
- };
};
- soc at 01c00000 {
+ soc at 1c00000 {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
ranges;
- sram-controller at 01c00000 {
+ sram-controller at 1c00000 {
compatible = "allwinner,sun4i-a10-sram-controller";
reg = <0x01c00000 0x30>;
#address-cells = <1>;
#size-cells = <1>;
ranges;
- sram_a: sram at 00000000 {
+ sram_a: sram at 0 {
compatible = "mmio-sram";
reg = <0x00000000 0xc000>;
#address-cells = <1>;
@@ -376,14 +129,20 @@
ranges = <0 0x00000000 0xc000>;
};
- sram_d: sram at 00010000 {
+ emac_sram: sram-section at 8000 {
+ compatible = "allwinner,sun4i-a10-sram-a3-a4";
+ reg = <0x8000 0x4000>;
+ status = "disabled";
+ };
+
+ sram_d: sram at 10000 {
compatible = "mmio-sram";
reg = <0x00010000 0x1000>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0 0x00010000 0x1000>;
- otg_sram: sram-section at 0000 {
+ otg_sram: sram-section at 0 {
compatible = "allwinner,sun4i-a10-sram-d";
reg = <0x0000 0x1000>;
status = "disabled";
@@ -391,19 +150,32 @@
};
};
- dma: dma-controller at 01c02000 {
+ dma: dma-controller at 1c02000 {
compatible = "allwinner,sun4i-a10-dma";
reg = <0x01c02000 0x1000>;
interrupts = <27>;
- clocks = <&ahb_gates 6>;
+ clocks = <&ccu CLK_AHB_DMA>;
#dma-cells = <2>;
};
- spi0: spi at 01c05000 {
+ nfc: nand at 1c03000 {
+ compatible = "allwinner,sun4i-a10-nand";
+ reg = <0x01c03000 0x1000>;
+ interrupts = <37>;
+ clocks = <&ccu CLK_AHB_NAND>, <&ccu CLK_NAND>;
+ clock-names = "ahb", "mod";
+ dmas = <&dma SUN4I_DMA_DEDICATED 3>;
+ dma-names = "rxtx";
+ status = "disabled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ spi0: spi at 1c05000 {
compatible = "allwinner,sun4i-a10-spi";
reg = <0x01c05000 0x1000>;
interrupts = <10>;
- clocks = <&ahb_gates 20>, <&spi0_clk>;
+ clocks = <&ccu CLK_AHB_SPI0>, <&ccu CLK_SPI0>;
clock-names = "ahb", "mod";
dmas = <&dma SUN4I_DMA_DEDICATED 27>,
<&dma SUN4I_DMA_DEDICATED 26>;
@@ -413,11 +185,11 @@
#size-cells = <0>;
};
- spi1: spi at 01c06000 {
+ spi1: spi at 1c06000 {
compatible = "allwinner,sun4i-a10-spi";
reg = <0x01c06000 0x1000>;
interrupts = <11>;
- clocks = <&ahb_gates 21>, <&spi1_clk>;
+ clocks = <&ccu CLK_AHB_SPI1>, <&ccu CLK_SPI1>;
clock-names = "ahb", "mod";
dmas = <&dma SUN4I_DMA_DEDICATED 9>,
<&dma SUN4I_DMA_DEDICATED 8>;
@@ -427,61 +199,122 @@
#size-cells = <0>;
};
- mmc0: mmc at 01c0f000 {
+ tve0: tv-encoder at 1c0a000 {
+ compatible = "allwinner,sun4i-a10-tv-encoder";
+ reg = <0x01c0a000 0x1000>;
+ clocks = <&ccu CLK_AHB_TVE>;
+ resets = <&ccu RST_TVE>;
+ status = "disabled";
+
+ port {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ tve0_in_tcon0: endpoint at 0 {
+ reg = <0>;
+ remote-endpoint = <&tcon0_out_tve0>;
+ };
+ };
+ };
+
+ emac: ethernet at 1c0b000 {
+ compatible = "allwinner,sun4i-a10-emac";
+ reg = <0x01c0b000 0x1000>;
+ interrupts = <55>;
+ clocks = <&ccu CLK_AHB_EMAC>;
+ allwinner,sram = <&emac_sram 1>;
+ status = "disabled";
+ };
+
+ mdio: mdio at 1c0b080 {
+ compatible = "allwinner,sun4i-a10-mdio";
+ reg = <0x01c0b080 0x14>;
+ status = "disabled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ tcon0: lcd-controller at 1c0c000 {
+ compatible = "allwinner,sun5i-a13-tcon";
+ reg = <0x01c0c000 0x1000>;
+ interrupts = <44>;
+ resets = <&ccu RST_LCD>;
+ reset-names = "lcd";
+ clocks = <&ccu CLK_AHB_LCD>,
+ <&ccu CLK_TCON_CH0>,
+ <&ccu CLK_TCON_CH1>;
+ clock-names = "ahb",
+ "tcon-ch0",
+ "tcon-ch1";
+ clock-output-names = "tcon-pixel-clock";
+ status = "disabled";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ tcon0_in: port at 0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0>;
+
+ tcon0_in_be0: endpoint at 0 {
+ reg = <0>;
+ remote-endpoint = <&be0_out_tcon0>;
+ };
+ };
+
+ tcon0_out: port at 1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <1>;
+
+ tcon0_out_tve0: endpoint at 1 {
+ reg = <1>;
+ remote-endpoint = <&tve0_in_tcon0>;
+ allwinner,tcon-channel = <1>;
+ };
+ };
+ };
+ };
+
+ mmc0: mmc at 1c0f000 {
compatible = "allwinner,sun5i-a13-mmc";
reg = <0x01c0f000 0x1000>;
- clocks = <&ahb_gates 8>,
- <&mmc0_clk 0>,
- <&mmc0_clk 1>,
- <&mmc0_clk 2>;
- clock-names = "ahb",
- "mmc",
- "output",
- "sample";
+ clocks = <&ccu CLK_AHB_MMC0>, <&ccu CLK_MMC0>;
+ clock-names = "ahb", "mmc";
interrupts = <32>;
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
};
- mmc1: mmc at 01c10000 {
+ mmc1: mmc at 1c10000 {
compatible = "allwinner,sun5i-a13-mmc";
reg = <0x01c10000 0x1000>;
- clocks = <&ahb_gates 9>,
- <&mmc1_clk 0>,
- <&mmc1_clk 1>,
- <&mmc1_clk 2>;
- clock-names = "ahb",
- "mmc",
- "output",
- "sample";
+ clocks = <&ccu CLK_AHB_MMC1>, <&ccu CLK_MMC1>;
+ clock-names = "ahb", "mmc";
interrupts = <33>;
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
};
- mmc2: mmc at 01c11000 {
+ mmc2: mmc at 1c11000 {
compatible = "allwinner,sun5i-a13-mmc";
reg = <0x01c11000 0x1000>;
- clocks = <&ahb_gates 10>,
- <&mmc2_clk 0>,
- <&mmc2_clk 1>,
- <&mmc2_clk 2>;
- clock-names = "ahb",
- "mmc",
- "output",
- "sample";
+ clocks = <&ccu CLK_AHB_MMC2>, <&ccu CLK_MMC2>;
+ clock-names = "ahb", "mmc";
interrupts = <34>;
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
};
- usb_otg: usb at 01c13000 {
+ usb_otg: usb at 1c13000 {
compatible = "allwinner,sun4i-a10-musb";
reg = <0x01c13000 0x0400>;
- clocks = <&ahb_gates 0>;
+ clocks = <&ccu CLK_AHB_OTG>;
interrupts = <38>;
interrupt-names = "mc";
phys = <&usbphy 0>;
@@ -491,43 +324,52 @@
status = "disabled";
};
- usbphy: phy at 01c13400 {
+ usbphy: phy at 1c13400 {
#phy-cells = <1>;
compatible = "allwinner,sun5i-a13-usb-phy";
reg = <0x01c13400 0x10 0x01c14800 0x4>;
reg-names = "phy_ctrl", "pmu1";
- clocks = <&usb_clk 8>;
+ clocks = <&ccu CLK_USB_PHY0>;
clock-names = "usb_phy";
- resets = <&usb_clk 0>, <&usb_clk 1>;
+ resets = <&ccu RST_USB_PHY0>, <&ccu RST_USB_PHY1>;
reset-names = "usb0_reset", "usb1_reset";
status = "disabled";
};
- ehci0: usb at 01c14000 {
+ ehci0: usb at 1c14000 {
compatible = "allwinner,sun5i-a13-ehci", "generic-ehci";
reg = <0x01c14000 0x100>;
interrupts = <39>;
- clocks = <&ahb_gates 1>;
+ clocks = <&ccu CLK_AHB_EHCI>;
phys = <&usbphy 1>;
phy-names = "usb";
status = "disabled";
};
- ohci0: usb at 01c14400 {
+ ohci0: usb at 1c14400 {
compatible = "allwinner,sun5i-a13-ohci", "generic-ohci";
reg = <0x01c14400 0x100>;
interrupts = <40>;
- clocks = <&usb_clk 6>, <&ahb_gates 2>;
+ clocks = <&ccu CLK_USB_OHCI>, <&ccu CLK_AHB_OHCI>;
phys = <&usbphy 1>;
phy-names = "usb";
status = "disabled";
};
- spi2: spi at 01c17000 {
+ crypto: crypto-engine at 1c15000 {
+ compatible = "allwinner,sun5i-a13-crypto",
+ "allwinner,sun4i-a10-crypto";
+ reg = <0x01c15000 0x1000>;
+ interrupts = <54>;
+ clocks = <&ccu CLK_AHB_SS>, <&ccu CLK_SS>;
+ clock-names = "ahb", "mod";
+ };
+
+ spi2: spi at 1c17000 {
compatible = "allwinner,sun4i-a10-spi";
reg = <0x01c17000 0x1000>;
interrupts = <12>;
- clocks = <&ahb_gates 22>, <&spi2_clk>;
+ clocks = <&ccu CLK_AHB_SPI2>, <&ccu CLK_SPI2>;
clock-names = "ahb", "mod";
dmas = <&dma SUN4I_DMA_DEDICATED 29>,
<&dma SUN4I_DMA_DEDICATED 28>;
@@ -537,107 +379,199 @@
#size-cells = <0>;
};
- intc: interrupt-controller at 01c20400 {
+ ccu: clock at 1c20000 {
+ reg = <0x01c20000 0x400>;
+ clocks = <&osc24M>, <&osc32k>;
+ clock-names = "hosc", "losc";
+ #clock-cells = <1>;
+ #reset-cells = <1>;
+ };
+
+ intc: interrupt-controller at 1c20400 {
compatible = "allwinner,sun4i-a10-ic";
reg = <0x01c20400 0x400>;
interrupt-controller;
#interrupt-cells = <1>;
};
- pio: pinctrl at 01c20800 {
+ pio: pinctrl at 1c20800 {
reg = <0x01c20800 0x400>;
interrupts = <28>;
- clocks = <&apb0_gates 5>;
+ clocks = <&ccu CLK_APB0_PIO>, <&osc24M>, <&osc32k>;
+ clock-names = "apb", "hosc", "losc";
gpio-controller;
interrupt-controller;
#interrupt-cells = <3>;
#gpio-cells = <3>;
+ emac_pins_a: emac0 at 0 {
+ pins = "PD6", "PD7", "PD10",
+ "PD11", "PD12", "PD13", "PD14",
+ "PD15", "PD18", "PD19", "PD20",
+ "PD21", "PD22", "PD23", "PD24",
+ "PD25", "PD26", "PD27";
+ function = "emac";
+ };
+
i2c0_pins_a: i2c0 at 0 {
- allwinner,pins = "PB0", "PB1";
- allwinner,function = "i2c0";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ pins = "PB0", "PB1";
+ function = "i2c0";
};
i2c1_pins_a: i2c1 at 0 {
- allwinner,pins = "PB15", "PB16";
- allwinner,function = "i2c1";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ pins = "PB15", "PB16";
+ function = "i2c1";
};
i2c2_pins_a: i2c2 at 0 {
- allwinner,pins = "PB17", "PB18";
- allwinner,function = "i2c2";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ pins = "PB17", "PB18";
+ function = "i2c2";
+ };
+
+ ir0_rx_pins_a: ir0 at 0 {
+ pins = "PB4";
+ function = "ir0";
+ };
+
+ lcd_rgb565_pins: lcd_rgb565 at 0 {
+ pins = "PD3", "PD4", "PD5", "PD6", "PD7",
+ "PD10", "PD11", "PD12", "PD13", "PD14", "PD15",
+ "PD19", "PD20", "PD21", "PD22", "PD23",
+ "PD24", "PD25", "PD26", "PD27";
+ function = "lcd0";
+ };
+
+ lcd_rgb666_pins: lcd_rgb666 at 0 {
+ pins = "PD2", "PD3", "PD4", "PD5", "PD6", "PD7",
+ "PD10", "PD11", "PD12", "PD13", "PD14", "PD15",
+ "PD18", "PD19", "PD20", "PD21", "PD22", "PD23",
+ "PD24", "PD25", "PD26", "PD27";
+ function = "lcd0";
};
mmc0_pins_a: mmc0 at 0 {
- allwinner,pins = "PF0", "PF1", "PF2", "PF3",
- "PF4", "PF5";
- allwinner,function = "mmc0";
- allwinner,drive = <SUN4I_PINCTRL_30_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ pins = "PF0", "PF1", "PF2", "PF3",
+ "PF4", "PF5";
+ function = "mmc0";
+ drive-strength = <30>;
+ bias-pull-up;
};
mmc2_pins_a: mmc2 at 0 {
- allwinner,pins = "PC6", "PC7", "PC8", "PC9",
- "PC10", "PC11", "PC12", "PC13",
- "PC14", "PC15";
- allwinner,function = "mmc2";
- allwinner,drive = <SUN4I_PINCTRL_30_MA>;
- allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+ pins = "PC6", "PC7", "PC8", "PC9",
+ "PC10", "PC11", "PC12", "PC13",
+ "PC14", "PC15";
+ function = "mmc2";
+ drive-strength = <30>;
+ bias-pull-up;
+ };
+
+ mmc2_4bit_pins_a: mmc2-4bit at 0 {
+ pins = "PC6", "PC7", "PC8", "PC9",
+ "PC10", "PC11";
+ function = "mmc2";
+ drive-strength = <30>;
+ bias-pull-up;
+ };
+
+ nand_pins_a: nand-base0 at 0 {
+ pins = "PC0", "PC1", "PC2",
+ "PC5", "PC8", "PC9", "PC10",
+ "PC11", "PC12", "PC13", "PC14",
+ "PC15";
+ function = "nand0";
+ };
+
+ nand_cs0_pins_a: nand-cs at 0 {
+ pins = "PC4";
+ function = "nand0";
+ };
+
+ nand_rb0_pins_a: nand-rb at 0 {
+ pins = "PC6";
+ function = "nand0";
+ };
+
+ spi2_pins_a: spi2 at 0 {
+ pins = "PE1", "PE2", "PE3";
+ function = "spi2";
+ };
+
+ spi2_cs0_pins_a: spi2-cs0 at 0 {
+ pins = "PE0";
+ function = "spi2";
+ };
+
+ uart1_pins_a: uart1 at 0 {
+ pins = "PE10", "PE11";
+ function = "uart1";
+ };
+
+ uart1_pins_b: uart1 at 1 {
+ pins = "PG3", "PG4";
+ function = "uart1";
+ };
+
+ uart2_pins_a: uart2 at 0 {
+ pins = "PD2", "PD3";
+ function = "uart2";
+ };
+
+ uart2_cts_rts_pins_a: uart2-cts-rts at 0 {
+ pins = "PD4", "PD5";
+ function = "uart2";
};
uart3_pins_a: uart3 at 0 {
- allwinner,pins = "PG9", "PG10";
- allwinner,function = "uart3";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ pins = "PG9", "PG10";
+ function = "uart3";
};
- uart3_pins_cts_rts_a: uart3-cts-rts at 0 {
- allwinner,pins = "PG11", "PG12";
- allwinner,function = "uart3";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ uart3_cts_rts_pins_a: uart3-cts-rts at 0 {
+ pins = "PG11", "PG12";
+ function = "uart3";
};
pwm0_pins: pwm0 {
- allwinner,pins = "PB2";
- allwinner,function = "pwm";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ pins = "PB2";
+ function = "pwm";
};
};
- timer at 01c20c00 {
+ timer at 1c20c00 {
compatible = "allwinner,sun4i-a10-timer";
reg = <0x01c20c00 0x90>;
interrupts = <22>;
- clocks = <&osc24M>;
+ clocks = <&ccu CLK_HOSC>;
};
- wdt: watchdog at 01c20c90 {
+ wdt: watchdog at 1c20c90 {
compatible = "allwinner,sun4i-a10-wdt";
reg = <0x01c20c90 0x10>;
};
- lradc: lradc at 01c22800 {
+ ir0: ir at 1c21800 {
+ compatible = "allwinner,sun4i-a10-ir";
+ clocks = <&ccu CLK_APB0_IR>, <&ccu CLK_IR>;
+ clock-names = "apb", "ir";
+ interrupts = <5>;
+ reg = <0x01c21800 0x40>;
+ status = "disabled";
+ };
+
+ lradc: lradc at 1c22800 {
compatible = "allwinner,sun4i-a10-lradc-keys";
reg = <0x01c22800 0x100>;
interrupts = <31>;
status = "disabled";
};
- codec: codec at 01c22c00 {
+ codec: codec at 1c22c00 {
#sound-dai-cells = <0>;
compatible = "allwinner,sun4i-a10-codec";
reg = <0x01c22c00 0x40>;
interrupts = <30>;
- clocks = <&apb0_gates 0>, <&codec_clk>;
+ clocks = <&ccu CLK_APB0_CODEC>, <&ccu CLK_CODEC>;
clock-names = "apb", "codec";
dmas = <&dma SUN4I_DMA_NORMAL 19>,
<&dma SUN4I_DMA_NORMAL 19>;
@@ -645,73 +579,163 @@
status = "disabled";
};
- sid: eeprom at 01c23800 {
+ sid: eeprom at 1c23800 {
compatible = "allwinner,sun4i-a10-sid";
reg = <0x01c23800 0x10>;
};
- rtp: rtp at 01c25000 {
+ rtp: rtp at 1c25000 {
compatible = "allwinner,sun5i-a13-ts";
reg = <0x01c25000 0x100>;
interrupts = <29>;
#thermal-sensor-cells = <0>;
};
- uart1: serial at 01c28400 {
+ uart0: serial at 1c28000 {
+ compatible = "snps,dw-apb-uart";
+ reg = <0x01c28000 0x400>;
+ interrupts = <1>;
+ reg-shift = <2>;
+ reg-io-width = <4>;
+ clocks = <&ccu CLK_APB1_UART0>;
+ status = "disabled";
+ };
+
+ uart1: serial at 1c28400 {
compatible = "snps,dw-apb-uart";
reg = <0x01c28400 0x400>;
interrupts = <2>;
reg-shift = <2>;
reg-io-width = <4>;
- clocks = <&apb1_gates 17>;
+ clocks = <&ccu CLK_APB1_UART1>;
status = "disabled";
};
- uart3: serial at 01c28c00 {
+ uart2: serial at 1c28800 {
+ compatible = "snps,dw-apb-uart";
+ reg = <0x01c28800 0x400>;
+ interrupts = <3>;
+ reg-shift = <2>;
+ reg-io-width = <4>;
+ clocks = <&ccu CLK_APB1_UART2>;
+ status = "disabled";
+ };
+
+ uart3: serial at 1c28c00 {
compatible = "snps,dw-apb-uart";
reg = <0x01c28c00 0x400>;
interrupts = <4>;
reg-shift = <2>;
reg-io-width = <4>;
- clocks = <&apb1_gates 19>;
+ clocks = <&ccu CLK_APB1_UART3>;
status = "disabled";
};
- i2c0: i2c at 01c2ac00 {
+ i2c0: i2c at 1c2ac00 {
compatible = "allwinner,sun4i-a10-i2c";
reg = <0x01c2ac00 0x400>;
interrupts = <7>;
- clocks = <&apb1_gates 0>;
+ clocks = <&ccu CLK_APB1_I2C0>;
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
};
- i2c1: i2c at 01c2b000 {
+ i2c1: i2c at 1c2b000 {
compatible = "allwinner,sun4i-a10-i2c";
reg = <0x01c2b000 0x400>;
interrupts = <8>;
- clocks = <&apb1_gates 1>;
+ clocks = <&ccu CLK_APB1_I2C1>;
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
};
- i2c2: i2c at 01c2b400 {
+ i2c2: i2c at 1c2b400 {
compatible = "allwinner,sun4i-a10-i2c";
reg = <0x01c2b400 0x400>;
interrupts = <9>;
- clocks = <&apb1_gates 2>;
+ clocks = <&ccu CLK_APB1_I2C2>;
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
};
- timer at 01c60000 {
+ timer at 1c60000 {
compatible = "allwinner,sun5i-a13-hstimer";
reg = <0x01c60000 0x1000>;
interrupts = <82>, <83>;
- clocks = <&ahb_gates 28>;
+ clocks = <&ccu CLK_AHB_HSTIMER>;
+ };
+
+ fe0: display-frontend at 1e00000 {
+ compatible = "allwinner,sun5i-a13-display-frontend";
+ reg = <0x01e00000 0x20000>;
+ interrupts = <47>;
+ clocks = <&ccu CLK_DE_FE>, <&ccu CLK_DE_FE>,
+ <&ccu CLK_DRAM_DE_FE>;
+ clock-names = "ahb", "mod",
+ "ram";
+ resets = <&ccu RST_DE_FE>;
+ status = "disabled";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ fe0_out: port at 1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <1>;
+
+ fe0_out_be0: endpoint at 0 {
+ reg = <0>;
+ remote-endpoint = <&be0_in_fe0>;
+ };
+ };
+ };
+ };
+
+ be0: display-backend at 1e60000 {
+ compatible = "allwinner,sun5i-a13-display-backend";
+ reg = <0x01e60000 0x10000>;
+ interrupts = <47>;
+ clocks = <&ccu CLK_AHB_DE_BE>, <&ccu CLK_DE_BE>,
+ <&ccu CLK_DRAM_DE_BE>;
+ clock-names = "ahb", "mod",
+ "ram";
+ resets = <&ccu RST_DE_BE>;
+ status = "disabled";
+
+ assigned-clocks = <&ccu CLK_DE_BE>;
+ assigned-clock-rates = <300000000>;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ be0_in: port at 0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0>;
+
+ be0_in_fe0: endpoint at 0 {
+ reg = <0>;
+ remote-endpoint = <&fe0_out_be0>;
+ };
+ };
+
+ be0_out: port at 1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <1>;
+
+ be0_out_tcon0: endpoint at 0 {
+ reg = <0>;
+ remote-endpoint = <&tcon0_in_be0>;
+ };
+ };
+ };
};
};
};
diff --git a/include/dt-bindings/clock/sun5i-ccu.h b/include/dt-bindings/clock/sun5i-ccu.h
new file mode 100644
index 0000000000..81f34d477a
--- /dev/null
+++ b/include/dt-bindings/clock/sun5i-ccu.h
@@ -0,0 +1,106 @@
+/*
+ * Copyright 2016 Maxime Ripard
+ *
+ * Maxime Ripard <maxime.ripard@free-electrons.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef _DT_BINDINGS_CLK_SUN5I_H_
+#define _DT_BINDINGS_CLK_SUN5I_H_
+
+#define CLK_HOSC 1
+
+#define CLK_PLL_VIDEO0_2X 9
+
+#define CLK_PLL_VIDEO1_2X 16
+#define CLK_CPU 17
+
+#define CLK_AHB_OTG 23
+#define CLK_AHB_EHCI 24
+#define CLK_AHB_OHCI 25
+#define CLK_AHB_SS 26
+#define CLK_AHB_DMA 27
+#define CLK_AHB_BIST 28
+#define CLK_AHB_MMC0 29
+#define CLK_AHB_MMC1 30
+#define CLK_AHB_MMC2 31
+#define CLK_AHB_NAND 32
+#define CLK_AHB_SDRAM 33
+#define CLK_AHB_EMAC 34
+#define CLK_AHB_TS 35
+#define CLK_AHB_SPI0 36
+#define CLK_AHB_SPI1 37
+#define CLK_AHB_SPI2 38
+#define CLK_AHB_GPS 39
+#define CLK_AHB_HSTIMER 40
+#define CLK_AHB_VE 41
+#define CLK_AHB_TVE 42
+#define CLK_AHB_LCD 43
+#define CLK_AHB_CSI 44
+#define CLK_AHB_HDMI 45
+#define CLK_AHB_DE_BE 46
+#define CLK_AHB_DE_FE 47
+#define CLK_AHB_IEP 48
+#define CLK_AHB_GPU 49
+#define CLK_APB0_CODEC 50
+#define CLK_APB0_SPDIF 51
+#define CLK_APB0_I2S 52
+#define CLK_APB0_PIO 53
+#define CLK_APB0_IR 54
+#define CLK_APB0_KEYPAD 55
+#define CLK_APB1_I2C0 56
+#define CLK_APB1_I2C1 57
+#define CLK_APB1_I2C2 58
+#define CLK_APB1_UART0 59
+#define CLK_APB1_UART1 60
+#define CLK_APB1_UART2 61
+#define CLK_APB1_UART3 62
+#define CLK_NAND 63
+#define CLK_MMC0 64
+#define CLK_MMC1 65
+#define CLK_MMC2 66
+#define CLK_TS 67
+#define CLK_SS 68
+#define CLK_SPI0 69
+#define CLK_SPI1 70
+#define CLK_SPI2 71
+#define CLK_IR 72
+#define CLK_I2S 73
+#define CLK_SPDIF 74
+#define CLK_KEYPAD 75
+#define CLK_USB_OHCI 76
+#define CLK_USB_PHY0 77
+#define CLK_USB_PHY1 78
+#define CLK_GPS 79
+#define CLK_DRAM_VE 80
+#define CLK_DRAM_CSI 81
+#define CLK_DRAM_TS 82
+#define CLK_DRAM_TVE 83
+#define CLK_DRAM_DE_FE 84
+#define CLK_DRAM_DE_BE 85
+#define CLK_DRAM_ACE 86
+#define CLK_DRAM_IEP 87
+#define CLK_DE_BE 88
+#define CLK_DE_FE 89
+#define CLK_TCON_CH0 90
+
+#define CLK_TCON_CH1 92
+#define CLK_CSI 93
+#define CLK_VE 94
+#define CLK_CODEC 95
+#define CLK_AVS 96
+#define CLK_HDMI 97
+#define CLK_GPU 98
+
+#define CLK_IEP 100
+
+#endif /* _DT_BINDINGS_CLK_SUN5I_H_ */
diff --git a/include/dt-bindings/reset/sun5i-ccu.h b/include/dt-bindings/reset/sun5i-ccu.h
new file mode 100644
index 0000000000..c2b9726b50
--- /dev/null
+++ b/include/dt-bindings/reset/sun5i-ccu.h
@@ -0,0 +1,32 @@
+/*
+ * Copyright 2016 Maxime Ripard
+ *
+ * Maxime Ripard <maxime.ripard@free-electrons.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef _RST_SUN5I_H_
+#define _RST_SUN5I_H_
+
+#define RST_USB_PHY0 0
+#define RST_USB_PHY1 1
+#define RST_GPS 2
+#define RST_DE_BE 3
+#define RST_DE_FE 4
+#define RST_TVE 5
+#define RST_LCD 6
+#define RST_CSI 7
+#define RST_VE 8
+#define RST_GPU 9
+#define RST_IEP 10
+
+#endif /* _RST_SUN5I_H_ */
--
2.18.0.321.gffc6fa0e3
^ permalink raw reply related [flat|nested] 11+ messages in thread
* [U-Boot] [PATCH v2 3/7] ARM: dts: sun6i: Update A31/A31s dts(i) files from Linux-v4.18-rc3
2018-08-09 13:08 [U-Boot] [PATCH v2 0/7] ARM: dts: sunxi: Update dts(i) files from Linux-v4.18-rc3 Jagan Teki
2018-08-09 13:08 ` [U-Boot] [PATCH v2 1/7] ARM: dts: sun4i: Update A10 " Jagan Teki
2018-08-09 13:08 ` [U-Boot] [PATCH v2 2/7] ARM: dts: sun5i: Update A10s/A13/gr8/r8 " Jagan Teki
@ 2018-08-09 13:08 ` Jagan Teki
2018-08-09 13:08 ` [U-Boot] [PATCH v2 4/7] ARM: dts: sun7i: Update A20 " Jagan Teki
` (4 subsequent siblings)
7 siblings, 0 replies; 11+ messages in thread
From: Jagan Teki @ 2018-08-09 13:08 UTC (permalink / raw)
To: u-boot
Update all A31/A31s devicetree dtsi and dtsi files from
Linux-v4.18-rc3 with below commit:
commit b240b419db5d624ce7a5a397d6f62a1a686009ec
Merge: 9c2dd8405c0c 518d2f43c358
Author: Linus Torvalds <torvalds@linux-foundation.org>
Date: Thu Apr 5 21:18:09 2018 -0700
Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
---
arch/arm/dts/sun6i-a31-app4-evb1.dts | 7 +-
arch/arm/dts/sun6i-a31-colombus.dts | 26 +-
arch/arm/dts/sun6i-a31-hummingbird.dts | 153 ++-
arch/arm/dts/sun6i-a31-i7.dts | 82 +-
arch/arm/dts/sun6i-a31-m9.dts | 23 +-
arch/arm/dts/sun6i-a31-mele-a1000g-quad.dts | 23 +-
arch/arm/dts/sun6i-a31.dtsi | 1151 ++++++++++-------
arch/arm/dts/sun6i-a31s-cs908.dts | 2 -
arch/arm/dts/sun6i-a31s-primo81.dts | 69 +-
arch/arm/dts/sun6i-a31s-sina31s-core.dtsi | 1 -
arch/arm/dts/sun6i-a31s-sina31s.dts | 77 +-
arch/arm/dts/sun6i-a31s-sinovoip-bpi-m2.dts | 154 ++-
.../sun6i-a31s-yones-toptech-bs1078-v2.dts | 13 +-
arch/arm/dts/sun6i-a31s.dtsi | 8 +
.../dts/sun6i-reference-design-tablet.dtsi | 18 +-
include/dt-bindings/clock/sun6i-a31-ccu.h | 191 +++
include/dt-bindings/reset/sun6i-a31-ccu.h | 106 ++
17 files changed, 1476 insertions(+), 628 deletions(-)
create mode 100644 include/dt-bindings/clock/sun6i-a31-ccu.h
create mode 100644 include/dt-bindings/reset/sun6i-a31-ccu.h
diff --git a/arch/arm/dts/sun6i-a31-app4-evb1.dts b/arch/arm/dts/sun6i-a31-app4-evb1.dts
index 2f8cfab771..7f34323a66 100644
--- a/arch/arm/dts/sun6i-a31-app4-evb1.dts
+++ b/arch/arm/dts/sun6i-a31-app4-evb1.dts
@@ -47,7 +47,6 @@
#include "sunxi-common-regulators.dtsi"
#include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/pinctrl/sun4i-a10.h>
/ {
model = "Allwinner A31 APP4 EVB1 Evaluation Board";
@@ -68,10 +67,8 @@
&pio {
usb1_vbus_pin_a: usb1_vbus_pin at 0 {
- allwinner,pins = "PH27";
- allwinner,function = "gpio_out";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ pins = "PH27";
+ function = "gpio_out";
};
};
diff --git a/arch/arm/dts/sun6i-a31-colombus.dts b/arch/arm/dts/sun6i-a31-colombus.dts
index f9cf36888d..939c497a6f 100644
--- a/arch/arm/dts/sun6i-a31-colombus.dts
+++ b/arch/arm/dts/sun6i-a31-colombus.dts
@@ -47,7 +47,6 @@
#include "sunxi-common-regulators.dtsi"
#include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/pinctrl/sun4i-a10.h>
/ {
model = "WITS A31 Colombus Evaluation Board";
@@ -118,35 +117,30 @@
pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_colombus>;
vmmc-supply = <®_vcc3v0>;
bus-width = <4>;
- cd-gpios = <&pio 0 8 GPIO_ACTIVE_HIGH>; /* PA8 */
- cd-inverted;
+ cd-gpios = <&pio 0 8 GPIO_ACTIVE_LOW>; /* PA8 */
status = "okay";
};
&mmc0_pins_a {
- allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+ bias-pull-up;
};
&pio {
mmc0_cd_pin_colombus: mmc0_cd_pin at 0 {
- allwinner,pins = "PA8";
- allwinner,function = "gpio_in";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+ pins = "PA8";
+ function = "gpio_in";
+ bias-pull-up;
};
usb2_vbus_pin_colombus: usb2_vbus_pin at 0 {
- allwinner,pins = "PH24";
- allwinner,function = "gpio_out";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ pins = "PH24";
+ function = "gpio_out";
};
i2c_lcd_pins: i2c_lcd_pin at 0 {
- allwinner,pins = "PA23", "PA24";
- allwinner,function = "gpio_out";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+ pins = "PA23", "PA24";
+ function = "gpio_out";
+ bias-pull-up;
};
};
diff --git a/arch/arm/dts/sun6i-a31-hummingbird.dts b/arch/arm/dts/sun6i-a31-hummingbird.dts
index 9a74637f67..ce4f9e9834 100644
--- a/arch/arm/dts/sun6i-a31-hummingbird.dts
+++ b/arch/arm/dts/sun6i-a31-hummingbird.dts
@@ -47,7 +47,6 @@
#include "sunxi-common-regulators.dtsi"
#include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/pinctrl/sun4i-a10.h>
/ {
model = "Merrii A31 Hummingbird";
@@ -63,16 +62,98 @@
stdout-path = "serial0:115200n8";
};
+ hdmi-connector {
+ compatible = "hdmi-connector";
+ type = "a";
+
+ port {
+ hdmi_con_in: endpoint {
+ remote-endpoint = <&hdmi_out_con>;
+ };
+ };
+ };
+
+ vga-connector {
+ compatible = "vga-connector";
+
+ port {
+ vga_con_in: endpoint {
+ remote-endpoint = <&vga_dac_out>;
+ };
+ };
+ };
+
+ vga-dac {
+ compatible = "dumb-vga-dac";
+ vdd-supply = <®_vga_3v3>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port at 0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0>;
+
+ vga_dac_in: endpoint at 0 {
+ reg = <0>;
+ remote-endpoint = <&tcon0_out_vga>;
+ };
+ };
+
+ port at 1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <1>;
+
+ vga_dac_out: endpoint at 0 {
+ reg = <0>;
+ remote-endpoint = <&vga_con_in>;
+ };
+ };
+ };
+ };
+
+ reg_vga_3v3: vga_3v3_regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "vga-3v3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-boot-on;
+ enable-active-high;
+ gpio = <&pio 7 25 GPIO_ACTIVE_HIGH>; /* PH25 */
+ };
+
wifi_pwrseq: wifi_pwrseq {
compatible = "mmc-pwrseq-simple";
reset-gpios = <&pio 6 10 GPIO_ACTIVE_LOW>; /* PG10 */
};
};
+&codec {
+ allwinner,audio-routing =
+ "Headphone", "HP",
+ "Speaker", "LINEOUT",
+ "LINEIN", "Line In",
+ "MIC1", "Mic",
+ "MIC2", "Headset Mic",
+ "Mic", "MBIAS",
+ "Headset Mic", "HBIAS";
+ allwinner,pa-gpios = <&pio 7 22 GPIO_ACTIVE_HIGH>; /* PH22 */
+ status = "okay";
+};
+
&cpu0 {
cpu-supply = <®_dcdc3>;
};
+&de {
+ status = "okay";
+};
+
&ehci0 {
status = "okay";
};
@@ -92,6 +173,16 @@
};
};
+&hdmi {
+ status = "okay";
+};
+
+&hdmi_out {
+ hdmi_out_con: endpoint {
+ remote-endpoint = <&hdmi_con_in>;
+ };
+};
+
&i2c0 {
pinctrl-names = "default";
pinctrl-0 = <&i2c0_pins_a>;
@@ -127,14 +218,13 @@
pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_hummingbird>;
vmmc-supply = <®_dcdc1>;
bus-width = <4>;
- cd-gpios = <&pio 0 8 GPIO_ACTIVE_HIGH>; /* PA8 */
- cd-inverted;
+ cd-gpios = <&pio 0 8 GPIO_ACTIVE_LOW>; /* PA8 */
status = "okay";
};
&mmc0_pins_a {
/* external pull-ups missing for some pins */
- allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+ bias-pull-up;
};
&mmc1 {
@@ -153,24 +243,19 @@
&pio {
gmac_phy_reset_pin_hummingbird: gmac_phy_reset_pin at 0 {
- allwinner,pins = "PA21";
- allwinner,function = "gpio_out";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ pins = "PA21";
+ function = "gpio_out";
};
mmc0_cd_pin_hummingbird: mmc0_cd_pin at 0 {
- allwinner,pins = "PA8";
- allwinner,function = "gpio_in";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+ pins = "PA8";
+ function = "gpio_in";
+ bias-pull-up;
};
wifi_reset_pin_hummingbird: wifi_reset_pin at 0 {
- allwinner,pins = "PG10";
- allwinner,function = "gpio_out";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ pins = "PG10";
+ function = "gpio_out";
};
};
@@ -182,11 +267,16 @@
reg = <0x68>;
interrupt-parent = <&nmi_intc>;
interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
+ x-powers,drive-vbus-en;
};
};
#include "axp22x.dtsi"
+&ac_power_supply {
+ status = "okay";
+};
+
®_aldo1 {
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
@@ -240,23 +330,48 @@
regulator-name = "vcc-dram";
};
+®_drivevbus {
+ regulator-name = "usb0-vbus";
+ status = "okay";
+};
+
®_usb1_vbus {
gpio = <&pio 7 24 GPIO_ACTIVE_HIGH>; /* PH24 */
status = "okay";
};
+&tcon0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&lcd0_rgb888_pins>;
+};
+
+&tcon0_out {
+ tcon0_out_vga: endpoint at 0 {
+ reg = <0>;
+ remote-endpoint = <&vga_dac_in>;
+ };
+};
+
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_pins_a>;
status = "okay";
};
-&usb1_vbus_pin_a {
- /* different pin from sunxi-common-regulators */
- allwinner,pins = "PH24";
+&usb_otg {
+ dr_mode = "otg";
+ status = "okay";
+};
+
+&usb_power_supply {
+ status = "okay";
};
&usbphy {
+ usb0_id_det-gpio = <&pio 0 15 GPIO_ACTIVE_HIGH>; /* PA15 */
+ usb0_vbus_det-gpio = <&pio 0 16 GPIO_ACTIVE_HIGH>; /* PA16 */
+ usb0_vbus_power-supply = <&usb_power_supply>;
+ usb0_vbus-supply = <®_drivevbus>;
usb1_vbus-supply = <®_usb1_vbus>;
status = "okay";
};
diff --git a/arch/arm/dts/sun6i-a31-i7.dts b/arch/arm/dts/sun6i-a31-i7.dts
index e9185dad67..d659be9dbc 100644
--- a/arch/arm/dts/sun6i-a31-i7.dts
+++ b/arch/arm/dts/sun6i-a31-i7.dts
@@ -45,7 +45,6 @@
#include "sunxi-common-regulators.dtsi"
#include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/pinctrl/sun4i-a10.h>
/ {
model = "Mele I7 Quad top set box";
@@ -59,6 +58,17 @@
stdout-path = "serial0:115200n8";
};
+ hdmi-connector {
+ compatible = "hdmi-connector";
+ type = "a";
+
+ port {
+ hdmi_con_in: endpoint {
+ remote-endpoint = <&hdmi_out_con>;
+ };
+ };
+ };
+
leds {
compatible = "gpio-leds";
pinctrl-names = "default";
@@ -69,6 +79,33 @@
gpios = <&pio 7 13 GPIO_ACTIVE_HIGH>;
};
};
+
+ sound {
+ compatible = "simple-audio-card";
+ simple-audio-card,name = "On-board SPDIF";
+ simple-audio-card,cpu {
+ sound-dai = <&spdif>;
+ };
+
+ simple-audio-card,codec {
+ sound-dai = <&spdif_out>;
+ };
+ };
+
+ spdif_out: spdif-out {
+ #sound-dai-cells = <0>;
+ compatible = "linux,spdif-dit";
+ };
+};
+
+&codec {
+ allwinner,audio-routing =
+ "Headphone", "HP";
+ status = "okay";
+};
+
+&de {
+ status = "okay";
};
&ehci0 {
@@ -91,6 +128,16 @@
};
};
+&hdmi {
+ status = "okay";
+};
+
+&hdmi_out {
+ hdmi_out_con: endpoint {
+ remote-endpoint = <&hdmi_con_in>;
+ };
+};
+
&ir {
pinctrl-names = "default";
pinctrl-0 = <&ir_pins_a>;
@@ -102,31 +149,25 @@
pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_i7>;
vmmc-supply = <®_vcc3v3>;
bus-width = <4>;
- cd-gpios = <&pio 7 22 GPIO_ACTIVE_HIGH>; /* PH22 */
- cd-inverted;
+ cd-gpios = <&pio 7 22 GPIO_ACTIVE_LOW>; /* PH22 */
status = "okay";
};
&pio {
led_pins_i7: led_pins at 0 {
- allwinner,pins = "PH13";
- allwinner,function = "gpio_out";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ pins = "PH13";
+ function = "gpio_out";
};
mmc0_cd_pin_i7: mmc0_cd_pin at 0 {
- allwinner,pins = "PH22";
- allwinner,function = "gpio_in";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+ pins = "PH22";
+ function = "gpio_in";
+ bias-pull-up;
};
usb1_vbus_pin_i7: usb1_vbus_pin at 0 {
- allwinner,pins = "PC27";
- allwinner,function = "gpio_out";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ pins = "PC27";
+ function = "gpio_out";
};
};
@@ -137,6 +178,17 @@
status = "okay";
};
+&spdif {
+ pinctrl-names = "default";
+ pinctrl-0 = <&spdif_pins_a>;
+ spdif-out = "okay";
+ status = "okay";
+};
+
+&tcon0 {
+ status = "okay";
+};
+
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_pins_a>;
diff --git a/arch/arm/dts/sun6i-a31-m9.dts b/arch/arm/dts/sun6i-a31-m9.dts
index 29016a13a2..9698f6d38d 100644
--- a/arch/arm/dts/sun6i-a31-m9.dts
+++ b/arch/arm/dts/sun6i-a31-m9.dts
@@ -45,7 +45,6 @@
#include "sunxi-common-regulators.dtsi"
#include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/pinctrl/sun4i-a10.h>
/ {
model = "Mele M9 top set box";
@@ -108,8 +107,7 @@
pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_m9>;
vmmc-supply = <®_dcdc1>;
bus-width = <4>;
- cd-gpios = <&pio 7 22 GPIO_ACTIVE_HIGH>; /* PH22 */
- cd-inverted;
+ cd-gpios = <&pio 7 22 GPIO_ACTIVE_LOW>; /* PH22 */
status = "okay";
};
@@ -128,24 +126,19 @@
&pio {
led_pins_m9: led_pins at 0 {
- allwinner,pins = "PH13";
- allwinner,function = "gpio_out";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ pins = "PH13";
+ function = "gpio_out";
};
mmc0_cd_pin_m9: mmc0_cd_pin at 0 {
- allwinner,pins = "PH22";
- allwinner,function = "gpio_in";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+ pins = "PH22";
+ function = "gpio_in";
+ bias-pull-up;
};
usb1_vbus_pin_m9: usb1_vbus_pin at 0 {
- allwinner,pins = "PC27";
- allwinner,function = "gpio_out";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ pins = "PC27";
+ function = "gpio_out";
};
};
diff --git a/arch/arm/dts/sun6i-a31-mele-a1000g-quad.dts b/arch/arm/dts/sun6i-a31-mele-a1000g-quad.dts
index 5faeae429e..bb14b171b1 100644
--- a/arch/arm/dts/sun6i-a31-mele-a1000g-quad.dts
+++ b/arch/arm/dts/sun6i-a31-mele-a1000g-quad.dts
@@ -45,7 +45,6 @@
#include "sunxi-common-regulators.dtsi"
#include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/pinctrl/sun4i-a10.h>
/ {
model = "Mele A1000G Quad top set box";
@@ -108,8 +107,7 @@
pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_m9>;
vmmc-supply = <®_dcdc1>;
bus-width = <4>;
- cd-gpios = <&pio 7 22 GPIO_ACTIVE_HIGH>; /* PH22 */
- cd-inverted;
+ cd-gpios = <&pio 7 22 GPIO_ACTIVE_LOW>; /* PH22 */
status = "okay";
};
@@ -128,24 +126,19 @@
&pio {
led_pins_m9: led_pins at 0 {
- allwinner,pins = "PH13";
- allwinner,function = "gpio_out";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ pins = "PH13";
+ function = "gpio_out";
};
mmc0_cd_pin_m9: mmc0_cd_pin at 0 {
- allwinner,pins = "PH22";
- allwinner,function = "gpio_in";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+ pins = "PH22";
+ function = "gpio_in";
+ bias-pull-up;
};
usb1_vbus_pin_m9: usb1_vbus_pin at 0 {
- allwinner,pins = "PC27";
- allwinner,function = "gpio_out";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ pins = "PC27";
+ function = "gpio_out";
};
};
diff --git a/arch/arm/dts/sun6i-a31.dtsi b/arch/arm/dts/sun6i-a31.dtsi
index b674bf79bc..c72992556a 100644
--- a/arch/arm/dts/sun6i-a31.dtsi
+++ b/arch/arm/dts/sun6i-a31.dtsi
@@ -47,7 +47,8 @@
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/thermal/thermal.h>
-#include <dt-bindings/pinctrl/sun4i-a10.h>
+#include <dt-bindings/clock/sun6i-a31-ccu.h>
+#include <dt-bindings/reset/sun6i-a31-ccu.h>
/ {
interrupt-parent = <&gic>;
@@ -65,7 +66,10 @@
compatible = "allwinner,simple-framebuffer",
"simple-framebuffer";
allwinner,pipeline = "de_be0-lcd0-hdmi";
- clocks = <&pll6 0>;
+ clocks = <&ccu CLK_AHB1_BE0>, <&ccu CLK_AHB1_LCD0>,
+ <&ccu CLK_AHB1_HDMI>, <&ccu CLK_DRAM_BE0>,
+ <&ccu CLK_IEP_DRC0>, <&ccu CLK_BE0>,
+ <&ccu CLK_LCD0_CH1>, <&ccu CLK_HDMI>;
status = "disabled";
};
@@ -73,7 +77,9 @@
compatible = "allwinner,simple-framebuffer",
"simple-framebuffer";
allwinner,pipeline = "de_be0-lcd0";
- clocks = <&pll6 0>;
+ clocks = <&ccu CLK_AHB1_BE0>, <&ccu CLK_AHB1_LCD0>,
+ <&ccu CLK_DRAM_BE0>, <&ccu CLK_IEP_DRC0>,
+ <&ccu CLK_BE0>, <&ccu CLK_LCD0_CH0>;
status = "disabled";
};
};
@@ -97,7 +103,7 @@
compatible = "arm,cortex-a7";
device_type = "cpu";
reg = <0>;
- clocks = <&cpu>;
+ clocks = <&ccu CLK_CPU>;
clock-latency = <244144>; /* 8 32k periods */
operating-points = <
/* kHz uV */
@@ -107,8 +113,6 @@
480000 1000000
>;
#cooling-cells = <2>;
- cooling-min-level = <0>;
- cooling-max-level = <3>;
};
cpu at 1 {
@@ -192,235 +196,6 @@
clock-output-names = "osc32k";
};
- pll1: clk at 01c20000 {
- #clock-cells = <0>;
- compatible = "allwinner,sun6i-a31-pll1-clk";
- reg = <0x01c20000 0x4>;
- clocks = <&osc24M>;
- clock-output-names = "pll1";
- };
-
- pll6: clk at 01c20028 {
- #clock-cells = <1>;
- compatible = "allwinner,sun6i-a31-pll6-clk";
- reg = <0x01c20028 0x4>;
- clocks = <&osc24M>;
- clock-output-names = "pll6", "pll6x2";
- };
-
- cpu: cpu at 01c20050 {
- #clock-cells = <0>;
- compatible = "allwinner,sun4i-a10-cpu-clk";
- reg = <0x01c20050 0x4>;
-
- /*
- * PLL1 is listed twice here.
- * While it looks suspicious, it's actually documented
- * that way both in the datasheet and in the code from
- * Allwinner.
- */
- clocks = <&osc32k>, <&osc24M>, <&pll1>, <&pll1>;
- clock-output-names = "cpu";
- };
-
- axi: axi at 01c20050 {
- #clock-cells = <0>;
- compatible = "allwinner,sun4i-a10-axi-clk";
- reg = <0x01c20050 0x4>;
- clocks = <&cpu>;
- clock-output-names = "axi";
- };
-
- ahb1: ahb1 at 01c20054 {
- #clock-cells = <0>;
- compatible = "allwinner,sun6i-a31-ahb1-clk";
- reg = <0x01c20054 0x4>;
- clocks = <&osc32k>, <&osc24M>, <&axi>, <&pll6 0>;
- clock-output-names = "ahb1";
-
- /*
- * Clock AHB1 from PLL6, instead of CPU/AXI which
- * has rate changes due to cpufreq. Also the DMA
- * controller requires AHB1 clocked from PLL6.
- */
- assigned-clocks = <&ahb1>;
- assigned-clock-parents = <&pll6 0>;
- };
-
- ahb1_gates: clk at 01c20060 {
- #clock-cells = <1>;
- compatible = "allwinner,sun6i-a31-ahb1-gates-clk";
- reg = <0x01c20060 0x8>;
- clocks = <&ahb1>;
- clock-indices = <1>, <5>,
- <6>, <8>, <9>,
- <10>, <11>, <12>,
- <13>, <14>,
- <17>, <18>, <19>,
- <20>, <21>, <22>,
- <23>, <24>, <26>,
- <27>, <29>,
- <30>, <31>, <32>,
- <36>, <37>, <40>,
- <43>, <44>, <45>,
- <46>, <47>, <50>,
- <52>, <55>, <56>,
- <57>, <58>;
- clock-output-names = "ahb1_mipidsi", "ahb1_ss",
- "ahb1_dma", "ahb1_mmc0", "ahb1_mmc1",
- "ahb1_mmc2", "ahb1_mmc3", "ahb1_nand1",
- "ahb1_nand0", "ahb1_sdram",
- "ahb1_gmac", "ahb1_ts", "ahb1_hstimer",
- "ahb1_spi0", "ahb1_spi1", "ahb1_spi2",
- "ahb1_spi3", "ahb1_otg", "ahb1_ehci0",
- "ahb1_ehci1", "ahb1_ohci0",
- "ahb1_ohci1", "ahb1_ohci2", "ahb1_ve",
- "ahb1_lcd0", "ahb1_lcd1", "ahb1_csi",
- "ahb1_hdmi", "ahb1_de0", "ahb1_de1",
- "ahb1_fe0", "ahb1_fe1", "ahb1_mp",
- "ahb1_gpu", "ahb1_deu0", "ahb1_deu1",
- "ahb1_drc0", "ahb1_drc1";
- };
-
- apb1: apb1 at 01c20054 {
- #clock-cells = <0>;
- compatible = "allwinner,sun4i-a10-apb0-clk";
- reg = <0x01c20054 0x4>;
- clocks = <&ahb1>;
- clock-output-names = "apb1";
- };
-
- apb1_gates: clk at 01c20068 {
- #clock-cells = <1>;
- compatible = "allwinner,sun6i-a31-apb1-gates-clk";
- reg = <0x01c20068 0x4>;
- clocks = <&apb1>;
- clock-indices = <0>, <4>,
- <5>, <12>,
- <13>;
- clock-output-names = "apb1_codec", "apb1_digital_mic",
- "apb1_pio", "apb1_daudio0",
- "apb1_daudio1";
- };
-
- apb2: clk at 01c20058 {
- #clock-cells = <0>;
- compatible = "allwinner,sun4i-a10-apb1-clk";
- reg = <0x01c20058 0x4>;
- clocks = <&osc32k>, <&osc24M>, <&pll6 0>, <&pll6 0>;
- clock-output-names = "apb2";
- };
-
- apb2_gates: clk at 01c2006c {
- #clock-cells = <1>;
- compatible = "allwinner,sun6i-a31-apb2-gates-clk";
- reg = <0x01c2006c 0x4>;
- clocks = <&apb2>;
- clock-indices = <0>, <1>,
- <2>, <3>, <16>,
- <17>, <18>, <19>,
- <20>, <21>;
- clock-output-names = "apb2_i2c0", "apb2_i2c1",
- "apb2_i2c2", "apb2_i2c3",
- "apb2_uart0", "apb2_uart1",
- "apb2_uart2", "apb2_uart3",
- "apb2_uart4", "apb2_uart5";
- };
-
- mmc0_clk: clk at 01c20088 {
- #clock-cells = <1>;
- compatible = "allwinner,sun4i-a10-mmc-clk";
- reg = <0x01c20088 0x4>;
- clocks = <&osc24M>, <&pll6 0>;
- clock-output-names = "mmc0",
- "mmc0_output",
- "mmc0_sample";
- };
-
- mmc1_clk: clk at 01c2008c {
- #clock-cells = <1>;
- compatible = "allwinner,sun4i-a10-mmc-clk";
- reg = <0x01c2008c 0x4>;
- clocks = <&osc24M>, <&pll6 0>;
- clock-output-names = "mmc1",
- "mmc1_output",
- "mmc1_sample";
- };
-
- mmc2_clk: clk at 01c20090 {
- #clock-cells = <1>;
- compatible = "allwinner,sun4i-a10-mmc-clk";
- reg = <0x01c20090 0x4>;
- clocks = <&osc24M>, <&pll6 0>;
- clock-output-names = "mmc2",
- "mmc2_output",
- "mmc2_sample";
- };
-
- mmc3_clk: clk at 01c20094 {
- #clock-cells = <1>;
- compatible = "allwinner,sun4i-a10-mmc-clk";
- reg = <0x01c20094 0x4>;
- clocks = <&osc24M>, <&pll6 0>;
- clock-output-names = "mmc3",
- "mmc3_output",
- "mmc3_sample";
- };
-
- ss_clk: clk at 01c2009c {
- #clock-cells = <0>;
- compatible = "allwinner,sun4i-a10-mod0-clk";
- reg = <0x01c2009c 0x4>;
- clocks = <&osc24M>, <&pll6 0>;
- clock-output-names = "ss";
- };
-
- spi0_clk: clk at 01c200a0 {
- #clock-cells = <0>;
- compatible = "allwinner,sun4i-a10-mod0-clk";
- reg = <0x01c200a0 0x4>;
- clocks = <&osc24M>, <&pll6 0>;
- clock-output-names = "spi0";
- };
-
- spi1_clk: clk at 01c200a4 {
- #clock-cells = <0>;
- compatible = "allwinner,sun4i-a10-mod0-clk";
- reg = <0x01c200a4 0x4>;
- clocks = <&osc24M>, <&pll6 0>;
- clock-output-names = "spi1";
- };
-
- spi2_clk: clk at 01c200a8 {
- #clock-cells = <0>;
- compatible = "allwinner,sun4i-a10-mod0-clk";
- reg = <0x01c200a8 0x4>;
- clocks = <&osc24M>, <&pll6 0>;
- clock-output-names = "spi2";
- };
-
- spi3_clk: clk at 01c200ac {
- #clock-cells = <0>;
- compatible = "allwinner,sun4i-a10-mod0-clk";
- reg = <0x01c200ac 0x4>;
- clocks = <&osc24M>, <&pll6 0>;
- clock-output-names = "spi3";
- };
-
- usb_clk: clk at 01c200cc {
- #clock-cells = <1>;
- #reset-cells = <1>;
- compatible = "allwinner,sun6i-a31-usb-clk";
- reg = <0x01c200cc 0x4>;
- clocks = <&osc24M>;
- clock-indices = <8>, <9>, <10>,
- <16>, <17>,
- <18>;
- clock-output-names = "usb_phy0", "usb_phy1", "usb_phy2",
- "usb_ohci0", "usb_ohci1",
- "usb_ohci2";
- };
-
/*
* The following two are dummy clocks, placeholders
* used in the gmac_tx clock. The gmac driver will
@@ -444,7 +219,7 @@
clock-output-names = "gmac_int_tx";
};
- gmac_tx_clk: clk at 01c200d0 {
+ gmac_tx_clk: clk at 1c200d0 {
#clock-cells = <0>;
compatible = "allwinner,sun7i-a20-gmac-clk";
reg = <0x01c200d0 0x4>;
@@ -453,34 +228,135 @@
};
};
- soc at 01c00000 {
+ de: display-engine {
+ compatible = "allwinner,sun6i-a31-display-engine";
+ allwinner,pipelines = <&fe0>, <&fe1>;
+ status = "disabled";
+ };
+
+ soc at 1c00000 {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
ranges;
- dma: dma-controller at 01c02000 {
+ dma: dma-controller at 1c02000 {
compatible = "allwinner,sun6i-a31-dma";
reg = <0x01c02000 0x1000>;
interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&ahb1_gates 6>;
- resets = <&ahb1_rst 6>;
+ clocks = <&ccu CLK_AHB1_DMA>;
+ resets = <&ccu RST_AHB1_DMA>;
#dma-cells = <1>;
};
- mmc0: mmc at 01c0f000 {
- compatible = "allwinner,sun7i-a20-mmc",
- "allwinner,sun5i-a13-mmc";
+ tcon0: lcd-controller at 1c0c000 {
+ compatible = "allwinner,sun6i-a31-tcon";
+ reg = <0x01c0c000 0x1000>;
+ interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
+ resets = <&ccu RST_AHB1_LCD0>;
+ reset-names = "lcd";
+ clocks = <&ccu CLK_AHB1_LCD0>,
+ <&ccu CLK_LCD0_CH0>,
+ <&ccu CLK_LCD0_CH1>;
+ clock-names = "ahb",
+ "tcon-ch0",
+ "tcon-ch1";
+ clock-output-names = "tcon0-pixel-clock";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ tcon0_in: port at 0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0>;
+
+ tcon0_in_drc0: endpoint at 0 {
+ reg = <0>;
+ remote-endpoint = <&drc0_out_tcon0>;
+ };
+
+ tcon0_in_drc1: endpoint at 1 {
+ reg = <1>;
+ remote-endpoint = <&drc1_out_tcon0>;
+ };
+ };
+
+ tcon0_out: port at 1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <1>;
+
+ tcon0_out_hdmi: endpoint at 1 {
+ reg = <1>;
+ remote-endpoint = <&hdmi_in_tcon0>;
+ allwinner,tcon-channel = <1>;
+ };
+ };
+ };
+ };
+
+ tcon1: lcd-controller at 1c0d000 {
+ compatible = "allwinner,sun6i-a31-tcon";
+ reg = <0x01c0d000 0x1000>;
+ interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
+ resets = <&ccu RST_AHB1_LCD1>;
+ reset-names = "lcd";
+ clocks = <&ccu CLK_AHB1_LCD1>,
+ <&ccu CLK_LCD1_CH0>,
+ <&ccu CLK_LCD1_CH1>;
+ clock-names = "ahb",
+ "tcon-ch0",
+ "tcon-ch1";
+ clock-output-names = "tcon1-pixel-clock";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ tcon1_in: port at 0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0>;
+
+ tcon1_in_drc0: endpoint at 0 {
+ reg = <0>;
+ remote-endpoint = <&drc0_out_tcon1>;
+ };
+
+ tcon1_in_drc1: endpoint at 1 {
+ reg = <1>;
+ remote-endpoint = <&drc1_out_tcon1>;
+ };
+ };
+
+ tcon1_out: port at 1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <1>;
+
+ tcon1_out_hdmi: endpoint at 1 {
+ reg = <1>;
+ remote-endpoint = <&hdmi_in_tcon1>;
+ allwinner,tcon-channel = <1>;
+ };
+ };
+ };
+ };
+
+ mmc0: mmc at 1c0f000 {
+ compatible = "allwinner,sun7i-a20-mmc";
reg = <0x01c0f000 0x1000>;
- clocks = <&ahb1_gates 8>,
- <&mmc0_clk 0>,
- <&mmc0_clk 1>,
- <&mmc0_clk 2>;
+ clocks = <&ccu CLK_AHB1_MMC0>,
+ <&ccu CLK_MMC0>,
+ <&ccu CLK_MMC0_OUTPUT>,
+ <&ccu CLK_MMC0_SAMPLE>;
clock-names = "ahb",
"mmc",
"output",
"sample";
- resets = <&ahb1_rst 8>;
+ resets = <&ccu RST_AHB1_MMC0>;
reset-names = "ahb";
interrupts = <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
@@ -488,19 +364,18 @@
#size-cells = <0>;
};
- mmc1: mmc at 01c10000 {
- compatible = "allwinner,sun7i-a20-mmc",
- "allwinner,sun5i-a13-mmc";
+ mmc1: mmc at 1c10000 {
+ compatible = "allwinner,sun7i-a20-mmc";
reg = <0x01c10000 0x1000>;
- clocks = <&ahb1_gates 9>,
- <&mmc1_clk 0>,
- <&mmc1_clk 1>,
- <&mmc1_clk 2>;
+ clocks = <&ccu CLK_AHB1_MMC1>,
+ <&ccu CLK_MMC1>,
+ <&ccu CLK_MMC1_OUTPUT>,
+ <&ccu CLK_MMC1_SAMPLE>;
clock-names = "ahb",
"mmc",
"output",
"sample";
- resets = <&ahb1_rst 9>;
+ resets = <&ccu RST_AHB1_MMC1>;
reset-names = "ahb";
interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
@@ -508,19 +383,18 @@
#size-cells = <0>;
};
- mmc2: mmc at 01c11000 {
- compatible = "allwinner,sun7i-a20-mmc",
- "allwinner,sun5i-a13-mmc";
+ mmc2: mmc at 1c11000 {
+ compatible = "allwinner,sun7i-a20-mmc";
reg = <0x01c11000 0x1000>;
- clocks = <&ahb1_gates 10>,
- <&mmc2_clk 0>,
- <&mmc2_clk 1>,
- <&mmc2_clk 2>;
+ clocks = <&ccu CLK_AHB1_MMC2>,
+ <&ccu CLK_MMC2>,
+ <&ccu CLK_MMC2_OUTPUT>,
+ <&ccu CLK_MMC2_SAMPLE>;
clock-names = "ahb",
"mmc",
"output",
"sample";
- resets = <&ahb1_rst 10>;
+ resets = <&ccu RST_AHB1_MMC2>;
reset-names = "ahb";
interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
@@ -528,19 +402,18 @@
#size-cells = <0>;
};
- mmc3: mmc at 01c12000 {
- compatible = "allwinner,sun7i-a20-mmc",
- "allwinner,sun5i-a13-mmc";
+ mmc3: mmc at 1c12000 {
+ compatible = "allwinner,sun7i-a20-mmc";
reg = <0x01c12000 0x1000>;
- clocks = <&ahb1_gates 11>,
- <&mmc3_clk 0>,
- <&mmc3_clk 1>,
- <&mmc3_clk 2>;
+ clocks = <&ccu CLK_AHB1_MMC3>,
+ <&ccu CLK_MMC3>,
+ <&ccu CLK_MMC3_OUTPUT>,
+ <&ccu CLK_MMC3_SAMPLE>;
clock-names = "ahb",
"mmc",
"output",
"sample";
- resets = <&ahb1_rst 11>;
+ resets = <&ccu RST_AHB1_MMC3>;
reset-names = "ahb";
interrupts = <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
@@ -548,11 +421,54 @@
#size-cells = <0>;
};
- usb_otg: usb at 01c19000 {
+ hdmi: hdmi at 1c16000 {
+ compatible = "allwinner,sun6i-a31-hdmi";
+ reg = <0x01c16000 0x1000>;
+ interrupts = <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&ccu CLK_AHB1_HDMI>, <&ccu CLK_HDMI>,
+ <&ccu CLK_HDMI_DDC>,
+ <&ccu CLK_PLL_VIDEO0_2X>,
+ <&ccu CLK_PLL_VIDEO1_2X>;
+ clock-names = "ahb", "mod", "ddc", "pll-0", "pll-1";
+ resets = <&ccu RST_AHB1_HDMI>;
+ reset-names = "ahb";
+ dma-names = "ddc-tx", "ddc-rx", "audio-tx";
+ dmas = <&dma 13>, <&dma 13>, <&dma 14>;
+ status = "disabled";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ hdmi_in: port at 0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0>;
+
+ hdmi_in_tcon0: endpoint at 0 {
+ reg = <0>;
+ remote-endpoint = <&tcon0_out_hdmi>;
+ };
+
+ hdmi_in_tcon1: endpoint at 1 {
+ reg = <1>;
+ remote-endpoint = <&tcon1_out_hdmi>;
+ };
+ };
+
+ hdmi_out: port at 1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <1>;
+ };
+ };
+ };
+
+ usb_otg: usb at 1c19000 {
compatible = "allwinner,sun6i-a31-musb";
reg = <0x01c19000 0x0400>;
- clocks = <&ahb1_gates 24>;
- resets = <&ahb1_rst 24>;
+ clocks = <&ccu CLK_AHB1_OTG>;
+ resets = <&ccu RST_AHB1_OTG>;
interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "mc";
phys = <&usbphy 0>;
@@ -561,7 +477,7 @@
status = "disabled";
};
- usbphy: phy at 01c19400 {
+ usbphy: phy at 1c19400 {
compatible = "allwinner,sun6i-a31-usb-phy";
reg = <0x01c19400 0x10>,
<0x01c1a800 0x4>,
@@ -569,15 +485,15 @@
reg-names = "phy_ctrl",
"pmu1",
"pmu2";
- clocks = <&usb_clk 8>,
- <&usb_clk 9>,
- <&usb_clk 10>;
+ clocks = <&ccu CLK_USB_PHY0>,
+ <&ccu CLK_USB_PHY1>,
+ <&ccu CLK_USB_PHY2>;
clock-names = "usb0_phy",
"usb1_phy",
"usb2_phy";
- resets = <&usb_clk 0>,
- <&usb_clk 1>,
- <&usb_clk 2>;
+ resets = <&ccu RST_USB_PHY0>,
+ <&ccu RST_USB_PHY1>,
+ <&ccu RST_USB_PHY2>;
reset-names = "usb0_reset",
"usb1_reset",
"usb2_reset";
@@ -585,206 +501,202 @@
#phy-cells = <1>;
};
- ehci0: usb at 01c1a000 {
+ ehci0: usb at 1c1a000 {
compatible = "allwinner,sun6i-a31-ehci", "generic-ehci";
reg = <0x01c1a000 0x100>;
interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&ahb1_gates 26>;
- resets = <&ahb1_rst 26>;
+ clocks = <&ccu CLK_AHB1_EHCI0>;
+ resets = <&ccu RST_AHB1_EHCI0>;
phys = <&usbphy 1>;
phy-names = "usb";
status = "disabled";
};
- ohci0: usb at 01c1a400 {
+ ohci0: usb at 1c1a400 {
compatible = "allwinner,sun6i-a31-ohci", "generic-ohci";
reg = <0x01c1a400 0x100>;
interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&ahb1_gates 29>, <&usb_clk 16>;
- resets = <&ahb1_rst 29>;
+ clocks = <&ccu CLK_AHB1_OHCI0>, <&ccu CLK_USB_OHCI0>;
+ resets = <&ccu RST_AHB1_OHCI0>;
phys = <&usbphy 1>;
phy-names = "usb";
status = "disabled";
};
- ehci1: usb at 01c1b000 {
+ ehci1: usb at 1c1b000 {
compatible = "allwinner,sun6i-a31-ehci", "generic-ehci";
reg = <0x01c1b000 0x100>;
interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&ahb1_gates 27>;
- resets = <&ahb1_rst 27>;
+ clocks = <&ccu CLK_AHB1_EHCI1>;
+ resets = <&ccu RST_AHB1_EHCI1>;
phys = <&usbphy 2>;
phy-names = "usb";
status = "disabled";
};
- ohci1: usb at 01c1b400 {
+ ohci1: usb at 1c1b400 {
compatible = "allwinner,sun6i-a31-ohci", "generic-ohci";
reg = <0x01c1b400 0x100>;
interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&ahb1_gates 30>, <&usb_clk 17>;
- resets = <&ahb1_rst 30>;
+ clocks = <&ccu CLK_AHB1_OHCI1>, <&ccu CLK_USB_OHCI1>;
+ resets = <&ccu RST_AHB1_OHCI1>;
phys = <&usbphy 2>;
phy-names = "usb";
status = "disabled";
};
- ohci2: usb at 01c1c400 {
+ ohci2: usb at 1c1c400 {
compatible = "allwinner,sun6i-a31-ohci", "generic-ohci";
reg = <0x01c1c400 0x100>;
interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&ahb1_gates 31>, <&usb_clk 18>;
- resets = <&ahb1_rst 31>;
+ clocks = <&ccu CLK_AHB1_OHCI2>, <&ccu CLK_USB_OHCI2>;
+ resets = <&ccu RST_AHB1_OHCI2>;
status = "disabled";
};
- pio: pinctrl at 01c20800 {
+ ccu: clock at 1c20000 {
+ compatible = "allwinner,sun6i-a31-ccu";
+ reg = <0x01c20000 0x400>;
+ clocks = <&osc24M>, <&osc32k>;
+ clock-names = "hosc", "losc";
+ #clock-cells = <1>;
+ #reset-cells = <1>;
+ };
+
+ pio: pinctrl at 1c20800 {
compatible = "allwinner,sun6i-a31-pinctrl";
reg = <0x01c20800 0x400>;
interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&apb1_gates 5>;
+ clocks = <&ccu CLK_APB1_PIO>, <&osc24M>, <&osc32k>;
+ clock-names = "apb", "hosc", "losc";
gpio-controller;
interrupt-controller;
#interrupt-cells = <3>;
#gpio-cells = <3>;
- uart0_pins_a: uart0 at 0 {
- allwinner,pins = "PH20", "PH21";
- allwinner,function = "uart0";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ gmac_pins_gmii_a: gmac_gmii at 0 {
+ pins = "PA0", "PA1", "PA2", "PA3",
+ "PA4", "PA5", "PA6", "PA7",
+ "PA8", "PA9", "PA10", "PA11",
+ "PA12", "PA13", "PA14", "PA15",
+ "PA16", "PA17", "PA18", "PA19",
+ "PA20", "PA21", "PA22", "PA23",
+ "PA24", "PA25", "PA26", "PA27";
+ function = "gmac";
+ /*
+ * data lines in GMII mode run at 125MHz and
+ * might need a higher signal drive strength
+ */
+ drive-strength = <30>;
+ };
+
+ gmac_pins_mii_a: gmac_mii at 0 {
+ pins = "PA0", "PA1", "PA2", "PA3",
+ "PA8", "PA9", "PA11",
+ "PA12", "PA13", "PA14", "PA19",
+ "PA20", "PA21", "PA22", "PA23",
+ "PA24", "PA26", "PA27";
+ function = "gmac";
+ };
+
+ gmac_pins_rgmii_a: gmac_rgmii at 0 {
+ pins = "PA0", "PA1", "PA2", "PA3",
+ "PA9", "PA10", "PA11",
+ "PA12", "PA13", "PA14", "PA19",
+ "PA20", "PA25", "PA26", "PA27";
+ function = "gmac";
+ /*
+ * data lines in RGMII mode use DDR mode
+ * and need a higher signal drive strength
+ */
+ drive-strength = <40>;
};
i2c0_pins_a: i2c0 at 0 {
- allwinner,pins = "PH14", "PH15";
- allwinner,function = "i2c0";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ pins = "PH14", "PH15";
+ function = "i2c0";
};
i2c1_pins_a: i2c1 at 0 {
- allwinner,pins = "PH16", "PH17";
- allwinner,function = "i2c1";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ pins = "PH16", "PH17";
+ function = "i2c1";
};
i2c2_pins_a: i2c2 at 0 {
- allwinner,pins = "PH18", "PH19";
- allwinner,function = "i2c2";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ pins = "PH18", "PH19";
+ function = "i2c2";
+ };
+
+ lcd0_rgb888_pins: lcd0_rgb888 {
+ pins = "PD0", "PD1", "PD2", "PD3",
+ "PD4", "PD5", "PD6", "PD7",
+ "PD8", "PD9", "PD10", "PD11",
+ "PD12", "PD13", "PD14", "PD15",
+ "PD16", "PD17", "PD18", "PD19",
+ "PD20", "PD21", "PD22", "PD23",
+ "PD24", "PD25", "PD26", "PD27";
+ function = "lcd0";
};
mmc0_pins_a: mmc0 at 0 {
- allwinner,pins = "PF0", "PF1", "PF2",
+ pins = "PF0", "PF1", "PF2",
"PF3", "PF4", "PF5";
- allwinner,function = "mmc0";
- allwinner,drive = <SUN4I_PINCTRL_30_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ function = "mmc0";
+ drive-strength = <30>;
+ bias-pull-up;
};
mmc1_pins_a: mmc1 at 0 {
- allwinner,pins = "PG0", "PG1", "PG2", "PG3",
+ pins = "PG0", "PG1", "PG2", "PG3",
"PG4", "PG5";
- allwinner,function = "mmc1";
- allwinner,drive = <SUN4I_PINCTRL_30_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ function = "mmc1";
+ drive-strength = <30>;
+ bias-pull-up;
};
mmc2_pins_a: mmc2 at 0 {
- allwinner,pins = "PC6", "PC7", "PC8", "PC9",
+ pins = "PC6", "PC7", "PC8", "PC9",
"PC10", "PC11";
- allwinner,function = "mmc2";
- allwinner,drive = <SUN4I_PINCTRL_30_MA>;
- allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+ function = "mmc2";
+ drive-strength = <30>;
+ bias-pull-up;
};
mmc2_8bit_emmc_pins: mmc2 at 1 {
- allwinner,pins = "PC6", "PC7", "PC8", "PC9",
+ pins = "PC6", "PC7", "PC8", "PC9",
"PC10", "PC11", "PC12",
"PC13", "PC14", "PC15",
"PC24";
- allwinner,function = "mmc2";
- allwinner,drive = <SUN4I_PINCTRL_30_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ function = "mmc2";
+ drive-strength = <30>;
+ bias-pull-up;
};
mmc3_8bit_emmc_pins: mmc3 at 1 {
- allwinner,pins = "PC6", "PC7", "PC8", "PC9",
+ pins = "PC6", "PC7", "PC8", "PC9",
"PC10", "PC11", "PC12",
"PC13", "PC14", "PC15",
"PC24";
- allwinner,function = "mmc3";
- allwinner,drive = <SUN4I_PINCTRL_40_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ function = "mmc3";
+ drive-strength = <40>;
+ bias-pull-up;
};
- gmac_pins_mii_a: gmac_mii at 0 {
- allwinner,pins = "PA0", "PA1", "PA2", "PA3",
- "PA8", "PA9", "PA11",
- "PA12", "PA13", "PA14", "PA19",
- "PA20", "PA21", "PA22", "PA23",
- "PA24", "PA26", "PA27";
- allwinner,function = "gmac";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
- };
-
- gmac_pins_gmii_a: gmac_gmii at 0 {
- allwinner,pins = "PA0", "PA1", "PA2", "PA3",
- "PA4", "PA5", "PA6", "PA7",
- "PA8", "PA9", "PA10", "PA11",
- "PA12", "PA13", "PA14", "PA15",
- "PA16", "PA17", "PA18", "PA19",
- "PA20", "PA21", "PA22", "PA23",
- "PA24", "PA25", "PA26", "PA27";
- allwinner,function = "gmac";
- /*
- * data lines in GMII mode run at 125MHz and
- * might need a higher signal drive strength
- */
- allwinner,drive = <SUN4I_PINCTRL_30_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ spdif_pins_a: spdif at 0 {
+ pins = "PH28";
+ function = "spdif";
};
- gmac_pins_rgmii_a: gmac_rgmii at 0 {
- allwinner,pins = "PA0", "PA1", "PA2", "PA3",
- "PA9", "PA10", "PA11",
- "PA12", "PA13", "PA14", "PA19",
- "PA20", "PA25", "PA26", "PA27";
- allwinner,function = "gmac";
- /*
- * data lines in RGMII mode use DDR mode
- * and need a higher signal drive strength
- */
- allwinner,drive = <SUN4I_PINCTRL_40_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ uart0_pins_a: uart0 at 0 {
+ pins = "PH20", "PH21";
+ function = "uart0";
};
};
- ahb1_rst: reset at 01c202c0 {
- #reset-cells = <1>;
- compatible = "allwinner,sun6i-a31-ahb1-reset";
- reg = <0x01c202c0 0xc>;
- };
-
- apb1_rst: reset at 01c202d0 {
- #reset-cells = <1>;
- compatible = "allwinner,sun6i-a31-clock-reset";
- reg = <0x01c202d0 0x4>;
- };
-
- apb2_rst: reset at 01c202d8 {
- #reset-cells = <1>;
- compatible = "allwinner,sun6i-a31-clock-reset";
- reg = <0x01c202d8 0x4>;
- };
-
- timer at 01c20c00 {
+ timer at 1c20c00 {
compatible = "allwinner,sun4i-a10-timer";
reg = <0x01c20c00 0xa0>;
interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
@@ -795,155 +707,194 @@
clocks = <&osc24M>;
};
- wdt1: watchdog at 01c20ca0 {
+ wdt1: watchdog at 1c20ca0 {
compatible = "allwinner,sun6i-a31-wdt";
reg = <0x01c20ca0 0x20>;
};
- lradc: lradc at 01c22800 {
+ spdif: spdif at 1c21000 {
+ #sound-dai-cells = <0>;
+ compatible = "allwinner,sun6i-a31-spdif";
+ reg = <0x01c21000 0x400>;
+ interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&ccu CLK_APB1_SPDIF>, <&ccu CLK_SPDIF>;
+ resets = <&ccu RST_APB1_SPDIF>;
+ clock-names = "apb", "spdif";
+ dmas = <&dma 2>, <&dma 2>;
+ dma-names = "rx", "tx";
+ status = "disabled";
+ };
+
+ i2s0: i2s at 1c22000 {
+ #sound-dai-cells = <0>;
+ compatible = "allwinner,sun6i-a31-i2s";
+ reg = <0x01c22000 0x400>;
+ interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&ccu CLK_APB1_DAUDIO0>, <&ccu CLK_DAUDIO0>;
+ resets = <&ccu RST_APB1_DAUDIO0>;
+ clock-names = "apb", "mod";
+ dmas = <&dma 3>, <&dma 3>;
+ dma-names = "rx", "tx";
+ status = "disabled";
+ };
+
+ i2s1: i2s at 1c22400 {
+ #sound-dai-cells = <0>;
+ compatible = "allwinner,sun6i-a31-i2s";
+ reg = <0x01c22400 0x400>;
+ interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&ccu CLK_APB1_DAUDIO1>, <&ccu CLK_DAUDIO1>;
+ resets = <&ccu RST_APB1_DAUDIO1>;
+ clock-names = "apb", "mod";
+ dmas = <&dma 4>, <&dma 4>;
+ dma-names = "rx", "tx";
+ status = "disabled";
+ };
+
+ lradc: lradc at 1c22800 {
compatible = "allwinner,sun4i-a10-lradc-keys";
reg = <0x01c22800 0x100>;
interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
- rtp: rtp at 01c25000 {
+ rtp: rtp at 1c25000 {
compatible = "allwinner,sun6i-a31-ts";
reg = <0x01c25000 0x100>;
interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
#thermal-sensor-cells = <0>;
};
- uart0: serial at 01c28000 {
+ uart0: serial at 1c28000 {
compatible = "snps,dw-apb-uart";
reg = <0x01c28000 0x400>;
interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>;
reg-shift = <2>;
reg-io-width = <4>;
- clocks = <&apb2_gates 16>;
- resets = <&apb2_rst 16>;
+ clocks = <&ccu CLK_APB2_UART0>;
+ resets = <&ccu RST_APB2_UART0>;
dmas = <&dma 6>, <&dma 6>;
dma-names = "rx", "tx";
status = "disabled";
};
- uart1: serial at 01c28400 {
+ uart1: serial at 1c28400 {
compatible = "snps,dw-apb-uart";
reg = <0x01c28400 0x400>;
interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
reg-shift = <2>;
reg-io-width = <4>;
- clocks = <&apb2_gates 17>;
- resets = <&apb2_rst 17>;
+ clocks = <&ccu CLK_APB2_UART1>;
+ resets = <&ccu RST_APB2_UART1>;
dmas = <&dma 7>, <&dma 7>;
dma-names = "rx", "tx";
status = "disabled";
};
- uart2: serial at 01c28800 {
+ uart2: serial at 1c28800 {
compatible = "snps,dw-apb-uart";
reg = <0x01c28800 0x400>;
interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
reg-shift = <2>;
reg-io-width = <4>;
- clocks = <&apb2_gates 18>;
- resets = <&apb2_rst 18>;
+ clocks = <&ccu CLK_APB2_UART2>;
+ resets = <&ccu RST_APB2_UART2>;
dmas = <&dma 8>, <&dma 8>;
dma-names = "rx", "tx";
status = "disabled";
};
- uart3: serial at 01c28c00 {
+ uart3: serial at 1c28c00 {
compatible = "snps,dw-apb-uart";
reg = <0x01c28c00 0x400>;
interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
reg-shift = <2>;
reg-io-width = <4>;
- clocks = <&apb2_gates 19>;
- resets = <&apb2_rst 19>;
+ clocks = <&ccu CLK_APB2_UART3>;
+ resets = <&ccu RST_APB2_UART3>;
dmas = <&dma 9>, <&dma 9>;
dma-names = "rx", "tx";
status = "disabled";
};
- uart4: serial at 01c29000 {
+ uart4: serial at 1c29000 {
compatible = "snps,dw-apb-uart";
reg = <0x01c29000 0x400>;
interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
reg-shift = <2>;
reg-io-width = <4>;
- clocks = <&apb2_gates 20>;
- resets = <&apb2_rst 20>;
+ clocks = <&ccu CLK_APB2_UART4>;
+ resets = <&ccu RST_APB2_UART4>;
dmas = <&dma 10>, <&dma 10>;
dma-names = "rx", "tx";
status = "disabled";
};
- uart5: serial at 01c29400 {
+ uart5: serial at 1c29400 {
compatible = "snps,dw-apb-uart";
reg = <0x01c29400 0x400>;
interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
reg-shift = <2>;
reg-io-width = <4>;
- clocks = <&apb2_gates 21>;
- resets = <&apb2_rst 21>;
+ clocks = <&ccu CLK_APB2_UART5>;
+ resets = <&ccu RST_APB2_UART5>;
dmas = <&dma 22>, <&dma 22>;
dma-names = "rx", "tx";
status = "disabled";
};
- i2c0: i2c at 01c2ac00 {
+ i2c0: i2c at 1c2ac00 {
compatible = "allwinner,sun6i-a31-i2c";
reg = <0x01c2ac00 0x400>;
interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&apb2_gates 0>;
- resets = <&apb2_rst 0>;
+ clocks = <&ccu CLK_APB2_I2C0>;
+ resets = <&ccu RST_APB2_I2C0>;
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
};
- i2c1: i2c at 01c2b000 {
+ i2c1: i2c at 1c2b000 {
compatible = "allwinner,sun6i-a31-i2c";
reg = <0x01c2b000 0x400>;
interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&apb2_gates 1>;
- resets = <&apb2_rst 1>;
+ clocks = <&ccu CLK_APB2_I2C1>;
+ resets = <&ccu RST_APB2_I2C1>;
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
};
- i2c2: i2c at 01c2b400 {
+ i2c2: i2c at 1c2b400 {
compatible = "allwinner,sun6i-a31-i2c";
reg = <0x01c2b400 0x400>;
interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&apb2_gates 2>;
- resets = <&apb2_rst 2>;
+ clocks = <&ccu CLK_APB2_I2C2>;
+ resets = <&ccu RST_APB2_I2C2>;
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
};
- i2c3: i2c at 01c2b800 {
+ i2c3: i2c at 1c2b800 {
compatible = "allwinner,sun6i-a31-i2c";
reg = <0x01c2b800 0x400>;
interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&apb2_gates 3>;
- resets = <&apb2_rst 3>;
+ clocks = <&ccu CLK_APB2_I2C3>;
+ resets = <&ccu RST_APB2_I2C3>;
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
};
- gmac: ethernet at 01c30000 {
+ gmac: ethernet at 1c30000 {
compatible = "allwinner,sun7i-a20-gmac";
reg = <0x01c30000 0x1054>;
interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "macirq";
- clocks = <&ahb1_gates 17>, <&gmac_tx_clk>;
+ clocks = <&ccu CLK_AHB1_EMAC>, <&gmac_tx_clk>;
clock-names = "stmmaceth", "allwinner_gmac_tx";
- resets = <&ahb1_rst 17>;
+ resets = <&ccu RST_AHB1_EMAC>;
reset-names = "stmmaceth";
snps,pbl = <2>;
snps,fixed-burst;
@@ -953,17 +904,31 @@
#size-cells = <0>;
};
- crypto: crypto-engine at 01c15000 {
- compatible = "allwinner,sun4i-a10-crypto";
+ crypto: crypto-engine at 1c15000 {
+ compatible = "allwinner,sun6i-a31-crypto",
+ "allwinner,sun4i-a10-crypto";
reg = <0x01c15000 0x1000>;
interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&ahb1_gates 5>, <&ss_clk>;
+ clocks = <&ccu CLK_AHB1_SS>, <&ccu CLK_SS>;
clock-names = "ahb", "mod";
- resets = <&ahb1_rst 5>;
+ resets = <&ccu RST_AHB1_SS>;
reset-names = "ahb";
};
- timer at 01c60000 {
+ codec: codec at 1c22c00 {
+ #sound-dai-cells = <0>;
+ compatible = "allwinner,sun6i-a31-codec";
+ reg = <0x01c22c00 0x400>;
+ interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&ccu CLK_APB1_CODEC>, <&ccu CLK_CODEC>;
+ clock-names = "apb", "codec";
+ resets = <&ccu RST_APB1_CODEC>;
+ dmas = <&dma 15>, <&dma 15>;
+ dma-names = "rx", "tx";
+ status = "disabled";
+ };
+
+ timer at 1c60000 {
compatible = "allwinner,sun6i-a31-hstimer",
"allwinner,sun7i-a20-hstimer";
reg = <0x01c60000 0x1000>;
@@ -971,62 +936,62 @@
<GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&ahb1_gates 19>;
- resets = <&ahb1_rst 19>;
+ clocks = <&ccu CLK_AHB1_HSTIMER>;
+ resets = <&ccu RST_AHB1_HSTIMER>;
};
- spi0: spi at 01c68000 {
+ spi0: spi at 1c68000 {
compatible = "allwinner,sun6i-a31-spi";
reg = <0x01c68000 0x1000>;
interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&ahb1_gates 20>, <&spi0_clk>;
+ clocks = <&ccu CLK_AHB1_SPI0>, <&ccu CLK_SPI0>;
clock-names = "ahb", "mod";
dmas = <&dma 23>, <&dma 23>;
dma-names = "rx", "tx";
- resets = <&ahb1_rst 20>;
+ resets = <&ccu RST_AHB1_SPI0>;
status = "disabled";
};
- spi1: spi at 01c69000 {
+ spi1: spi at 1c69000 {
compatible = "allwinner,sun6i-a31-spi";
reg = <0x01c69000 0x1000>;
interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&ahb1_gates 21>, <&spi1_clk>;
+ clocks = <&ccu CLK_AHB1_SPI1>, <&ccu CLK_SPI1>;
clock-names = "ahb", "mod";
dmas = <&dma 24>, <&dma 24>;
dma-names = "rx", "tx";
- resets = <&ahb1_rst 21>;
+ resets = <&ccu RST_AHB1_SPI1>;
status = "disabled";
};
- spi2: spi at 01c6a000 {
+ spi2: spi at 1c6a000 {
compatible = "allwinner,sun6i-a31-spi";
reg = <0x01c6a000 0x1000>;
interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&ahb1_gates 22>, <&spi2_clk>;
+ clocks = <&ccu CLK_AHB1_SPI2>, <&ccu CLK_SPI2>;
clock-names = "ahb", "mod";
dmas = <&dma 25>, <&dma 25>;
dma-names = "rx", "tx";
- resets = <&ahb1_rst 22>;
+ resets = <&ccu RST_AHB1_SPI2>;
status = "disabled";
};
- spi3: spi at 01c6b000 {
+ spi3: spi at 1c6b000 {
compatible = "allwinner,sun6i-a31-spi";
reg = <0x01c6b000 0x1000>;
interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&ahb1_gates 23>, <&spi3_clk>;
+ clocks = <&ccu CLK_AHB1_SPI3>, <&ccu CLK_SPI3>;
clock-names = "ahb", "mod";
dmas = <&dma 26>, <&dma 26>;
dma-names = "rx", "tx";
- resets = <&ahb1_rst 23>;
+ resets = <&ccu RST_AHB1_SPI3>;
status = "disabled";
};
- gic: interrupt-controller at 01c81000 {
+ gic: interrupt-controller at 1c81000 {
compatible = "arm,cortex-a7-gic", "arm,cortex-a15-gic";
reg = <0x01c81000 0x1000>,
- <0x01c82000 0x1000>,
+ <0x01c82000 0x2000>,
<0x01c84000 0x2000>,
<0x01c86000 0x2000>;
interrupt-controller;
@@ -1034,30 +999,279 @@
interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
};
- rtc: rtc at 01f00000 {
+ fe0: display-frontend at 1e00000 {
+ compatible = "allwinner,sun6i-a31-display-frontend";
+ reg = <0x01e00000 0x20000>;
+ interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&ccu CLK_AHB1_FE0>, <&ccu CLK_FE0>,
+ <&ccu CLK_DRAM_FE0>;
+ clock-names = "ahb", "mod",
+ "ram";
+ resets = <&ccu RST_AHB1_FE0>;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ fe0_out: port at 1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <1>;
+
+ fe0_out_be0: endpoint at 0 {
+ reg = <0>;
+ remote-endpoint = <&be0_in_fe0>;
+ };
+
+ fe0_out_be1: endpoint at 1 {
+ reg = <1>;
+ remote-endpoint = <&be1_in_fe0>;
+ };
+ };
+ };
+ };
+
+ fe1: display-frontend at 1e20000 {
+ compatible = "allwinner,sun6i-a31-display-frontend";
+ reg = <0x01e20000 0x20000>;
+ interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&ccu CLK_AHB1_FE1>, <&ccu CLK_FE1>,
+ <&ccu CLK_DRAM_FE1>;
+ clock-names = "ahb", "mod",
+ "ram";
+ resets = <&ccu RST_AHB1_FE1>;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ fe1_out: port at 1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <1>;
+
+ fe1_out_be0: endpoint at 0 {
+ reg = <0>;
+ remote-endpoint = <&be0_in_fe1>;
+ };
+
+ fe1_out_be1: endpoint at 1 {
+ reg = <1>;
+ remote-endpoint = <&be1_in_fe1>;
+ };
+ };
+ };
+ };
+
+ be1: display-backend at 1e40000 {
+ compatible = "allwinner,sun6i-a31-display-backend";
+ reg = <0x01e40000 0x10000>;
+ interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&ccu CLK_AHB1_BE1>, <&ccu CLK_BE1>,
+ <&ccu CLK_DRAM_BE1>;
+ clock-names = "ahb", "mod",
+ "ram";
+ resets = <&ccu RST_AHB1_BE1>;
+
+ assigned-clocks = <&ccu CLK_BE1>;
+ assigned-clock-rates = <300000000>;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ be1_in: port at 0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0>;
+
+ be1_in_fe0: endpoint at 0 {
+ reg = <0>;
+ remote-endpoint = <&fe0_out_be1>;
+ };
+
+ be1_in_fe1: endpoint at 1 {
+ reg = <1>;
+ remote-endpoint = <&fe1_out_be1>;
+ };
+ };
+
+ be1_out: port at 1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <1>;
+
+ be1_out_drc1: endpoint at 1 {
+ reg = <1>;
+ remote-endpoint = <&drc1_in_be1>;
+ };
+ };
+ };
+ };
+
+ drc1: drc at 1e50000 {
+ compatible = "allwinner,sun6i-a31-drc";
+ reg = <0x01e50000 0x10000>;
+ interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&ccu CLK_AHB1_DRC1>, <&ccu CLK_IEP_DRC1>,
+ <&ccu CLK_DRAM_DRC1>;
+ clock-names = "ahb", "mod",
+ "ram";
+ resets = <&ccu RST_AHB1_DRC1>;
+
+ assigned-clocks = <&ccu CLK_IEP_DRC1>;
+ assigned-clock-rates = <300000000>;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ drc1_in: port at 0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0>;
+
+ drc1_in_be1: endpoint at 1 {
+ reg = <1>;
+ remote-endpoint = <&be1_out_drc1>;
+ };
+ };
+
+ drc1_out: port at 1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <1>;
+
+ drc1_out_tcon0: endpoint at 0 {
+ reg = <0>;
+ remote-endpoint = <&tcon0_in_drc1>;
+ };
+
+ drc1_out_tcon1: endpoint at 1 {
+ reg = <1>;
+ remote-endpoint = <&tcon1_in_drc1>;
+ };
+ };
+ };
+ };
+
+ be0: display-backend at 1e60000 {
+ compatible = "allwinner,sun6i-a31-display-backend";
+ reg = <0x01e60000 0x10000>;
+ interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&ccu CLK_AHB1_BE0>, <&ccu CLK_BE0>,
+ <&ccu CLK_DRAM_BE0>;
+ clock-names = "ahb", "mod",
+ "ram";
+ resets = <&ccu RST_AHB1_BE0>;
+
+ assigned-clocks = <&ccu CLK_BE0>;
+ assigned-clock-rates = <300000000>;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ be0_in: port at 0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0>;
+
+ be0_in_fe0: endpoint at 0 {
+ reg = <0>;
+ remote-endpoint = <&fe0_out_be0>;
+ };
+
+ be0_in_fe1: endpoint at 1 {
+ reg = <1>;
+ remote-endpoint = <&fe1_out_be0>;
+ };
+ };
+
+ be0_out: port at 1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <1>;
+
+ be0_out_drc0: endpoint at 0 {
+ reg = <0>;
+ remote-endpoint = <&drc0_in_be0>;
+ };
+ };
+ };
+ };
+
+ drc0: drc at 1e70000 {
+ compatible = "allwinner,sun6i-a31-drc";
+ reg = <0x01e70000 0x10000>;
+ interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&ccu CLK_AHB1_DRC0>, <&ccu CLK_IEP_DRC0>,
+ <&ccu CLK_DRAM_DRC0>;
+ clock-names = "ahb", "mod",
+ "ram";
+ resets = <&ccu RST_AHB1_DRC0>;
+
+ assigned-clocks = <&ccu CLK_IEP_DRC0>;
+ assigned-clock-rates = <300000000>;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ drc0_in: port at 0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0>;
+
+ drc0_in_be0: endpoint at 0 {
+ reg = <0>;
+ remote-endpoint = <&be0_out_drc0>;
+ };
+ };
+
+ drc0_out: port at 1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <1>;
+
+ drc0_out_tcon0: endpoint at 0 {
+ reg = <0>;
+ remote-endpoint = <&tcon0_in_drc0>;
+ };
+
+ drc0_out_tcon1: endpoint at 1 {
+ reg = <1>;
+ remote-endpoint = <&tcon1_in_drc0>;
+ };
+ };
+ };
+ };
+
+ rtc: rtc at 1f00000 {
compatible = "allwinner,sun6i-a31-rtc";
reg = <0x01f00000 0x54>;
interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
};
- nmi_intc: interrupt-controller at 01f00c0c {
- compatible = "allwinner,sun6i-a31-sc-nmi";
+ nmi_intc: interrupt-controller at 1f00c00 {
+ compatible = "allwinner,sun6i-a31-r-intc";
interrupt-controller;
#interrupt-cells = <2>;
- reg = <0x01f00c0c 0x38>;
+ reg = <0x01f00c00 0x400>;
interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
};
- prcm at 01f01400 {
+ prcm at 1f01400 {
compatible = "allwinner,sun6i-a31-prcm";
reg = <0x01f01400 0x200>;
ar100: ar100_clk {
compatible = "allwinner,sun6i-a31-ar100-clk";
#clock-cells = <0>;
- clocks = <&osc32k>, <&osc24M>, <&pll6 0>,
- <&pll6 0>;
+ clocks = <&osc32k>, <&osc24M>,
+ <&ccu CLK_PLL_PERIPH>,
+ <&ccu CLK_PLL_PERIPH>;
clock-output-names = "ar100";
};
@@ -1100,12 +1314,12 @@
};
};
- cpucfg at 01f01c00 {
+ cpucfg at 1f01c00 {
compatible = "allwinner,sun6i-a31-cpuconfig";
reg = <0x01f01c00 0x300>;
};
- ir: ir at 01f02000 {
+ ir: ir at 1f02000 {
compatible = "allwinner,sun5i-a13-ir";
clocks = <&apb0_gates 1>, <&ir_clk>;
clock-names = "apb", "ir";
@@ -1115,12 +1329,13 @@
status = "disabled";
};
- r_pio: pinctrl at 01f02c00 {
+ r_pio: pinctrl at 1f02c00 {
compatible = "allwinner,sun6i-a31-r-pinctrl";
reg = <0x01f02c00 0x400>;
interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&apb0_gates 0>;
+ clocks = <&apb0_gates 0>, <&osc24M>, <&osc32k>;
+ clock-names = "apb", "hosc", "losc";
resets = <&apb0_rst 0>;
gpio-controller;
interrupt-controller;
@@ -1129,21 +1344,17 @@
#gpio-cells = <3>;
ir_pins_a: ir at 0 {
- allwinner,pins = "PL4";
- allwinner,function = "s_ir";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ pins = "PL4";
+ function = "s_ir";
};
p2wi_pins: p2wi {
- allwinner,pins = "PL0", "PL1";
- allwinner,function = "s_p2wi";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ pins = "PL0", "PL1";
+ function = "s_p2wi";
};
};
- p2wi: i2c at 01f03400 {
+ p2wi: i2c at 1f03400 {
compatible = "allwinner,sun6i-a31-p2wi";
reg = <0x01f03400 0x400>;
interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
diff --git a/arch/arm/dts/sun6i-a31s-cs908.dts b/arch/arm/dts/sun6i-a31s-cs908.dts
index 5e8f8c4f2b..75e578159c 100644
--- a/arch/arm/dts/sun6i-a31s-cs908.dts
+++ b/arch/arm/dts/sun6i-a31s-cs908.dts
@@ -43,8 +43,6 @@
/dts-v1/;
#include "sun6i-a31s.dtsi"
-#include <dt-bindings/pinctrl/sun4i-a10.h>
-
/ {
model = "CSQ CS908 top set box";
compatible = "csq,cs908", "allwinner,sun6i-a31s";
diff --git a/arch/arm/dts/sun6i-a31s-primo81.dts b/arch/arm/dts/sun6i-a31s-primo81.dts
index 73c133f5e7..4cb9664cdb 100644
--- a/arch/arm/dts/sun6i-a31s-primo81.dts
+++ b/arch/arm/dts/sun6i-a31s-primo81.dts
@@ -48,22 +48,46 @@
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
-#include <dt-bindings/pinctrl/sun4i-a10.h>
/ {
model = "MSI Primo81 tablet";
compatible = "msi,primo81", "allwinner,sun6i-a31s";
+
+ hdmi-connector {
+ compatible = "hdmi-connector";
+ type = "c";
+
+ port {
+ hdmi_con_in: endpoint {
+ remote-endpoint = <&hdmi_out_con>;
+ };
+ };
+ };
};
&cpu0 {
cpu-supply = <®_dcdc3>;
};
+&de {
+ status = "okay";
+};
+
&ehci0 {
/* rtl8188etv wifi is connected here */
status = "okay";
};
+&hdmi {
+ status = "okay";
+};
+
+&hdmi_out {
+ hdmi_out_con: endpoint {
+ remote-endpoint = <&hdmi_con_in>;
+ };
+};
+
&i2c0 {
/* pull-ups and device VDDIO use AXP221 DLDO3 */
pinctrl-names = "default";
@@ -127,31 +151,26 @@
pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_primo81>;
vmmc-supply = <®_dcdc1>;
bus-width = <4>;
- cd-gpios = <&pio 0 8 GPIO_ACTIVE_HIGH>; /* PA8 */
- cd-inverted;
+ cd-gpios = <&pio 0 8 GPIO_ACTIVE_LOW>; /* PA8 */
status = "okay";
};
&pio {
gt911_int_primo81: gt911_int_pin at 0 {
- allwinner,pins = "PA3";
- allwinner,function = "gpio_in";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ pins = "PA3";
+ function = "gpio_in";
};
mma8452_int_primo81: mma8452_int_pin at 0 {
- allwinner,pins = "PA9";
- allwinner,function = "gpio_in";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+ pins = "PA9";
+ function = "gpio_in";
+ bias-pull-up;
};
mmc0_cd_pin_primo81: mmc0_cd_pin at 0 {
- allwinner,pins = "PA8";
- allwinner,function = "gpio_in";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+ pins = "PA8";
+ function = "gpio_in";
+ bias-pull-up;
};
};
@@ -163,11 +182,16 @@
reg = <0x68>;
interrupt-parent = <&nmi_intc>;
interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
+ x-powers,drive-vbus-en;
};
};
#include "axp22x.dtsi"
+&battery_power_supply {
+ status = "okay";
+};
+
®_aldo3 {
regulator-always-on;
regulator-min-microvolt = <2700000>;
@@ -231,6 +255,11 @@
regulator-name = "vddio-csi";
};
+®_drivevbus {
+ regulator-name = "usb0-vbus";
+ status = "okay";
+};
+
®_eldo3 {
regulator-min-microvolt = <1080000>;
regulator-max-microvolt = <1320000>;
@@ -243,12 +272,18 @@
};
&usb_otg {
- /* otg support requires support for AXP221 usb-power-supply and GPIO */
- dr_mode = "host";
+ dr_mode = "otg";
+ status = "okay";
+};
+
+&usb_power_supply {
status = "okay";
};
&usbphy {
+ usb0_id_det-gpio = <&pio 0 15 GPIO_ACTIVE_HIGH>; /* PA15 */
+ usb0_vbus_power-supply = <&usb_power_supply>;
+ usb0_vbus-supply = <®_drivevbus>;
usb1_vbus-supply = <®_dldo1>;
status = "okay";
};
diff --git a/arch/arm/dts/sun6i-a31s-sina31s-core.dtsi b/arch/arm/dts/sun6i-a31s-sina31s-core.dtsi
index 4ec0c8679b..d7325bc4ee 100644
--- a/arch/arm/dts/sun6i-a31s-sina31s-core.dtsi
+++ b/arch/arm/dts/sun6i-a31s-sina31s-core.dtsi
@@ -45,7 +45,6 @@
#include "sunxi-common-regulators.dtsi"
#include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/pinctrl/sun4i-a10.h>
/ {
model = "Sinlinx SinA31s Core Board";
diff --git a/arch/arm/dts/sun6i-a31s-sina31s.dts b/arch/arm/dts/sun6i-a31s-sina31s.dts
index 6ead2f5c84..da0ccf5a2c 100644
--- a/arch/arm/dts/sun6i-a31s-sina31s.dts
+++ b/arch/arm/dts/sun6i-a31s-sina31s.dts
@@ -53,6 +53,17 @@
stdout-path = "serial0:115200n8";
};
+ hdmi-connector {
+ compatible = "hdmi-connector";
+ type = "a";
+
+ port {
+ hdmi_con_in: endpoint {
+ remote-endpoint = <&hdmi_out_con>;
+ };
+ };
+ };
+
leds {
compatible = "gpio-leds";
pinctrl-names = "default";
@@ -63,6 +74,35 @@
gpios = <&pio 7 13 GPIO_ACTIVE_HIGH>; /* PH13 */
};
};
+
+ sound {
+ compatible = "simple-audio-card";
+ simple-audio-card,name = "On-board SPDIF";
+ simple-audio-card,cpu {
+ sound-dai = <&spdif>;
+ };
+
+ simple-audio-card,codec {
+ sound-dai = <&spdif_out>;
+ };
+ };
+
+ spdif_out: spdif-out {
+ #sound-dai-cells = <0>;
+ compatible = "linux,spdif-dit";
+ };
+};
+
+&codec {
+ allwinner,audio-routing =
+ "Line Out", "LINEOUT",
+ "MIC1", "Mic",
+ "Mic", "MBIAS";
+ status = "okay";
+};
+
+&de {
+ status = "okay";
};
&ehci0 {
@@ -87,6 +127,16 @@
};
};
+&hdmi {
+ status = "okay";
+};
+
+&hdmi_out {
+ hdmi_out_con: endpoint {
+ remote-endpoint = <&hdmi_con_in>;
+ };
+};
+
&ir {
pinctrl-names = "default";
pinctrl-0 = <&ir_pins_a>;
@@ -117,8 +167,7 @@
pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_sina31s>;
vmmc-supply = <®_dcdc1>;
bus-width = <4>;
- cd-gpios = <&pio 0 4 GPIO_ACTIVE_HIGH>; /* PA4 */
- cd-inverted;
+ cd-gpios = <&pio 0 4 GPIO_ACTIVE_LOW>; /* PA4 */
status = "okay";
};
@@ -128,17 +177,14 @@
&pio {
led_pin_sina31s: led_pin at 0 {
- allwinner,pins = "PH13";
- allwinner,function = "gpio_out";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ pins = "PH13";
+ function = "gpio_out";
};
mmc0_cd_pin_sina31s: mmc0_cd_pin at 0 {
- allwinner,pins = "PA4";
- allwinner,function = "gpio_in";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+ pins = "PA4";
+ function = "gpio_in";
+ bias-pull-up;
};
};
@@ -148,6 +194,17 @@
regulator-name = "vcc-gmac-phy";
};
+&spdif {
+ pinctrl-names = "default";
+ pinctrl-0 = <&spdif_pins_a>;
+ status = "okay";
+};
+
+&usb_otg {
+ dr_mode = "peripheral";
+ status = "okay";
+};
+
&usbphy {
status = "okay";
};
diff --git a/arch/arm/dts/sun6i-a31s-sinovoip-bpi-m2.dts b/arch/arm/dts/sun6i-a31s-sinovoip-bpi-m2.dts
index db7fa13f54..b8b79c0e9e 100644
--- a/arch/arm/dts/sun6i-a31s-sinovoip-bpi-m2.dts
+++ b/arch/arm/dts/sun6i-a31s-sinovoip-bpi-m2.dts
@@ -42,7 +42,6 @@
/dts-v1/;
#include "sun6i-a31s.dtsi"
-#include "sunxi-common-regulators.dtsi"
#include <dt-bindings/gpio/gpio.h>
/ {
@@ -86,6 +85,10 @@
};
};
+&cpu0 {
+ cpu-supply = <®_dcdc3>;
+};
+
&ehci0 {
status = "okay";
};
@@ -95,6 +98,7 @@
pinctrl-0 = <&gmac_pins_rgmii_a>, <&gmac_phy_reset_pin_bpi_m2>;
phy = <&phy1>;
phy-mode = "rgmii";
+ phy-supply = <®_dldo1>;
snps,reset-gpio = <&pio 0 21 GPIO_ACTIVE_HIGH>; /* PA21 */
snps,reset-active-low;
snps,reset-delays-us = <0 10000 30000>;
@@ -114,27 +118,26 @@
&mmc0 {
pinctrl-names = "default";
pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_bpi_m2>;
- vmmc-supply = <®_vcc3v0>;
+ vmmc-supply = <®_dcdc1>;
bus-width = <4>;
- cd-gpios = <&pio 0 4 GPIO_ACTIVE_HIGH>; /* PA4 */
- cd-inverted;
+ cd-gpios = <&pio 0 4 GPIO_ACTIVE_LOW>; /* PA4 */
status = "okay";
};
&mmc0_pins_a {
- allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+ bias-pull-up;
};
&mmc2 {
pinctrl-names = "default";
pinctrl-0 = <&mmc2_pins_a>;
- vmmc-supply = <®_vcc3v0>;
+ vmmc-supply = <®_aldo1>;
mmc-pwrseq = <&mmc2_pwrseq>;
bus-width = <4>;
non-removable;
status = "okay";
- brcmf: bcrmf at 1 {
+ brcmf: wifi at 1 {
reg = <1>;
compatible = "brcm,bcm4329-fmac";
interrupt-parent = <&r_pio>;
@@ -144,45 +147,148 @@
};
&mmc2_pins_a {
- allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+ bias-pull-up;
};
&ohci0 {
status = "okay";
};
+&p2wi {
+ status = "okay";
+
+ axp22x: pmic at 68 {
+ compatible = "x-powers,axp221";
+ reg = <0x68>;
+ interrupt-parent = <&nmi_intc>;
+ interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
+ eldoin-supply = <®_dcdc1>;
+ x-powers,drive-vbus-en;
+ };
+};
+
&pio {
gmac_phy_reset_pin_bpi_m2: gmac_phy_reset_pin at 0 {
- allwinner,pins = "PA21";
- allwinner,function = "gpio_out";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ pins = "PA21";
+ function = "gpio_out";
};
led_pins_bpi_m2: led_pins at 0 {
- allwinner,pins = "PG5", "PG10", "PG11";
- allwinner,function = "gpio_out";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ pins = "PG5", "PG10", "PG11";
+ function = "gpio_out";
};
mmc0_cd_pin_bpi_m2: mmc0_cd_pin at 0 {
- allwinner,pins = "PA4";
- allwinner,function = "gpio_in";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+ pins = "PA4";
+ function = "gpio_in";
+ bias-pull-up;
};
};
&r_pio {
mmc2_pwrseq_pin_bpi_m2: mmc2_pwrseq_pin at 0 {
- allwinner,pins = "PL8";
- allwinner,function = "gpio_out";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ pins = "PL8";
+ function = "gpio_out";
};
};
+#include "axp22x.dtsi"
+
+®_aldo1 {
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc-wifi";
+};
+
+®_aldo2 {
+ regulator-always-on;
+ regulator-min-microvolt = <2500000>;
+ regulator-max-microvolt = <2500000>;
+ regulator-name = "vcc-gmac";
+};
+
+®_aldo3 {
+ regulator-always-on;
+ regulator-min-microvolt = <3000000>;
+ regulator-max-microvolt = <3000000>;
+ regulator-name = "avcc";
+};
+
+®_dc5ldo {
+ regulator-always-on;
+ regulator-min-microvolt = <700000>;
+ regulator-max-microvolt = <1320000>;
+ regulator-name = "vdd-cpus";
+};
+
+®_dcdc1 {
+ regulator-always-on;
+ regulator-min-microvolt = <3000000>;
+ regulator-max-microvolt = <3000000>;
+ regulator-name = "vdd-3v0";
+};
+
+®_dcdc2 {
+ regulator-min-microvolt = <700000>;
+ regulator-max-microvolt = <1320000>;
+ regulator-name = "vdd-gpu";
+};
+
+®_dcdc3 {
+ regulator-always-on;
+ regulator-min-microvolt = <700000>;
+ regulator-max-microvolt = <1320000>;
+ regulator-name = "vdd-cpu";
+};
+
+®_dcdc4 {
+ regulator-always-on;
+ regulator-min-microvolt = <700000>;
+ regulator-max-microvolt = <1320000>;
+ regulator-name = "vdd-sys-dll";
+};
+
+®_dcdc5 {
+ regulator-always-on;
+ regulator-min-microvolt = <1500000>;
+ regulator-max-microvolt = <1500000>;
+ regulator-name = "vcc-dram";
+};
+
+®_dldo1 {
+ regulator-min-microvolt = <3000000>;
+ regulator-max-microvolt = <3000000>;
+ regulator-name = "vcc-mac";
+};
+
+®_dldo2 {
+ regulator-min-microvolt = <2800000>;
+ regulator-max-microvolt = <2800000>;
+ regulator-name = "avdd-csi";
+};
+
+®_dldo3 {
+ regulator-always-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc-pb";
+};
+
+®_eldo1 {
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "vdd-csi";
+ status = "okay";
+};
+
+®_ldo_io1 {
+ regulator-always-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "vcc-pm-cpus";
+ status = "okay";
+};
+
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_pins_a>;
diff --git a/arch/arm/dts/sun6i-a31s-yones-toptech-bs1078-v2.dts b/arch/arm/dts/sun6i-a31s-yones-toptech-bs1078-v2.dts
index d6ad6196a7..aab6c1720e 100644
--- a/arch/arm/dts/sun6i-a31s-yones-toptech-bs1078-v2.dts
+++ b/arch/arm/dts/sun6i-a31s-yones-toptech-bs1078-v2.dts
@@ -45,7 +45,6 @@
#include "sunxi-common-regulators.dtsi"
#include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/pinctrl/sun4i-a10.h>
/ {
model = "Yones TopTech BS1078 v2 Tablet";
@@ -92,10 +91,9 @@
&pio {
mmc0_cd_pin_bs1078v2: mmc0_cd_pin at 0 {
- allwinner,pins = "PA8";
- allwinner,function = "gpio_in";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+ pins = "PA8";
+ function = "gpio_in";
+ bias-pull-up;
};
};
@@ -104,13 +102,12 @@
pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_bs1078v2>;
vmmc-supply = <®_vcc3v0>;
bus-width = <4>;
- cd-gpios = <&pio 0 8 GPIO_ACTIVE_HIGH>; /* PA8 */
- cd-inverted;
+ cd-gpios = <&pio 0 8 GPIO_ACTIVE_LOW>; /* PA8 */
status = "okay";
};
&mmc0_pins_a {
- allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+ bias-pull-up;
};
&p2wi {
diff --git a/arch/arm/dts/sun6i-a31s.dtsi b/arch/arm/dts/sun6i-a31s.dtsi
index c17a32771b..97e2c51d0a 100644
--- a/arch/arm/dts/sun6i-a31s.dtsi
+++ b/arch/arm/dts/sun6i-a31s.dtsi
@@ -48,6 +48,14 @@
#include "sun6i-a31.dtsi"
+&de {
+ compatible = "allwinner,sun6i-a31s-display-engine";
+};
+
&pio {
compatible = "allwinner,sun6i-a31s-pinctrl";
};
+
+&tcon0 {
+ compatible = "allwinner,sun6i-a31s-tcon";
+};
diff --git a/arch/arm/dts/sun6i-reference-design-tablet.dtsi b/arch/arm/dts/sun6i-reference-design-tablet.dtsi
index 0c434304e0..4e72e4f3ef 100644
--- a/arch/arm/dts/sun6i-reference-design-tablet.dtsi
+++ b/arch/arm/dts/sun6i-reference-design-tablet.dtsi
@@ -44,7 +44,6 @@
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
-#include <dt-bindings/pinctrl/sun4i-a10.h>
/ {
aliases {
@@ -70,24 +69,21 @@
pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_e708_q1>;
vmmc-supply = <®_dcdc1>;
bus-width = <4>;
- cd-gpios = <&pio 0 8 GPIO_ACTIVE_HIGH>; /* PA8 */
- cd-inverted;
+ cd-gpios = <&pio 0 8 GPIO_ACTIVE_LOW>; /* PA8 */
status = "okay";
};
&pio {
mmc0_cd_pin_e708_q1: mmc0_cd_pin at 0 {
- allwinner,pins = "PA8";
- allwinner,function = "gpio_in";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+ pins = "PA8";
+ function = "gpio_in";
+ bias-pull-up;
};
usb0_id_detect_pin: usb0_id_detect_pin at 0 {
- allwinner,pins = "PA15";
- allwinner,function = "gpio_in";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+ pins = "PA15";
+ function = "gpio_in";
+ bias-pull-up;
};
};
diff --git a/include/dt-bindings/clock/sun6i-a31-ccu.h b/include/dt-bindings/clock/sun6i-a31-ccu.h
new file mode 100644
index 0000000000..c5d1334018
--- /dev/null
+++ b/include/dt-bindings/clock/sun6i-a31-ccu.h
@@ -0,0 +1,191 @@
+/*
+ * Copyright (C) 2016 Chen-Yu Tsai <wens@csie.org>
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ * a) This file is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This file is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ * b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#ifndef _DT_BINDINGS_CLK_SUN6I_A31_H_
+#define _DT_BINDINGS_CLK_SUN6I_A31_H_
+
+#define CLK_PLL_VIDEO0_2X 7
+
+#define CLK_PLL_PERIPH 10
+
+#define CLK_PLL_VIDEO1_2X 13
+
+#define CLK_CPU 18
+
+#define CLK_AHB1_MIPIDSI 23
+#define CLK_AHB1_SS 24
+#define CLK_AHB1_DMA 25
+#define CLK_AHB1_MMC0 26
+#define CLK_AHB1_MMC1 27
+#define CLK_AHB1_MMC2 28
+#define CLK_AHB1_MMC3 29
+#define CLK_AHB1_NAND1 30
+#define CLK_AHB1_NAND0 31
+#define CLK_AHB1_SDRAM 32
+#define CLK_AHB1_EMAC 33
+#define CLK_AHB1_TS 34
+#define CLK_AHB1_HSTIMER 35
+#define CLK_AHB1_SPI0 36
+#define CLK_AHB1_SPI1 37
+#define CLK_AHB1_SPI2 38
+#define CLK_AHB1_SPI3 39
+#define CLK_AHB1_OTG 40
+#define CLK_AHB1_EHCI0 41
+#define CLK_AHB1_EHCI1 42
+#define CLK_AHB1_OHCI0 43
+#define CLK_AHB1_OHCI1 44
+#define CLK_AHB1_OHCI2 45
+#define CLK_AHB1_VE 46
+#define CLK_AHB1_LCD0 47
+#define CLK_AHB1_LCD1 48
+#define CLK_AHB1_CSI 49
+#define CLK_AHB1_HDMI 50
+#define CLK_AHB1_BE0 51
+#define CLK_AHB1_BE1 52
+#define CLK_AHB1_FE0 53
+#define CLK_AHB1_FE1 54
+#define CLK_AHB1_MP 55
+#define CLK_AHB1_GPU 56
+#define CLK_AHB1_DEU0 57
+#define CLK_AHB1_DEU1 58
+#define CLK_AHB1_DRC0 59
+#define CLK_AHB1_DRC1 60
+
+#define CLK_APB1_CODEC 61
+#define CLK_APB1_SPDIF 62
+#define CLK_APB1_DIGITAL_MIC 63
+#define CLK_APB1_PIO 64
+#define CLK_APB1_DAUDIO0 65
+#define CLK_APB1_DAUDIO1 66
+
+#define CLK_APB2_I2C0 67
+#define CLK_APB2_I2C1 68
+#define CLK_APB2_I2C2 69
+#define CLK_APB2_I2C3 70
+#define CLK_APB2_UART0 71
+#define CLK_APB2_UART1 72
+#define CLK_APB2_UART2 73
+#define CLK_APB2_UART3 74
+#define CLK_APB2_UART4 75
+#define CLK_APB2_UART5 76
+
+#define CLK_NAND0 77
+#define CLK_NAND1 78
+#define CLK_MMC0 79
+#define CLK_MMC0_SAMPLE 80
+#define CLK_MMC0_OUTPUT 81
+#define CLK_MMC1 82
+#define CLK_MMC1_SAMPLE 83
+#define CLK_MMC1_OUTPUT 84
+#define CLK_MMC2 85
+#define CLK_MMC2_SAMPLE 86
+#define CLK_MMC2_OUTPUT 87
+#define CLK_MMC3 88
+#define CLK_MMC3_SAMPLE 89
+#define CLK_MMC3_OUTPUT 90
+#define CLK_TS 91
+#define CLK_SS 92
+#define CLK_SPI0 93
+#define CLK_SPI1 94
+#define CLK_SPI2 95
+#define CLK_SPI3 96
+#define CLK_DAUDIO0 97
+#define CLK_DAUDIO1 98
+#define CLK_SPDIF 99
+#define CLK_USB_PHY0 100
+#define CLK_USB_PHY1 101
+#define CLK_USB_PHY2 102
+#define CLK_USB_OHCI0 103
+#define CLK_USB_OHCI1 104
+#define CLK_USB_OHCI2 105
+
+#define CLK_DRAM_VE 110
+#define CLK_DRAM_CSI_ISP 111
+#define CLK_DRAM_TS 112
+#define CLK_DRAM_DRC0 113
+#define CLK_DRAM_DRC1 114
+#define CLK_DRAM_DEU0 115
+#define CLK_DRAM_DEU1 116
+#define CLK_DRAM_FE0 117
+#define CLK_DRAM_FE1 118
+#define CLK_DRAM_BE0 119
+#define CLK_DRAM_BE1 120
+#define CLK_DRAM_MP 121
+
+#define CLK_BE0 122
+#define CLK_BE1 123
+#define CLK_FE0 124
+#define CLK_FE1 125
+#define CLK_MP 126
+#define CLK_LCD0_CH0 127
+#define CLK_LCD1_CH0 128
+#define CLK_LCD0_CH1 129
+#define CLK_LCD1_CH1 130
+#define CLK_CSI0_SCLK 131
+#define CLK_CSI0_MCLK 132
+#define CLK_CSI1_MCLK 133
+#define CLK_VE 134
+#define CLK_CODEC 135
+#define CLK_AVS 136
+#define CLK_DIGITAL_MIC 137
+#define CLK_HDMI 138
+#define CLK_HDMI_DDC 139
+#define CLK_PS 140
+
+#define CLK_MIPI_DSI 143
+#define CLK_MIPI_DSI_DPHY 144
+#define CLK_MIPI_CSI_DPHY 145
+#define CLK_IEP_DRC0 146
+#define CLK_IEP_DRC1 147
+#define CLK_IEP_DEU0 148
+#define CLK_IEP_DEU1 149
+#define CLK_GPU_CORE 150
+#define CLK_GPU_MEMORY 151
+#define CLK_GPU_HYD 152
+#define CLK_ATS 153
+#define CLK_TRACE 154
+
+#define CLK_OUT_A 155
+#define CLK_OUT_B 156
+#define CLK_OUT_C 157
+
+#endif /* _DT_BINDINGS_CLK_SUN6I_A31_H_ */
diff --git a/include/dt-bindings/reset/sun6i-a31-ccu.h b/include/dt-bindings/reset/sun6i-a31-ccu.h
new file mode 100644
index 0000000000..fbff365ed6
--- /dev/null
+++ b/include/dt-bindings/reset/sun6i-a31-ccu.h
@@ -0,0 +1,106 @@
+/*
+ * Copyright (C) 2016 Chen-Yu Tsai <wens@csie.org>
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ * a) This file is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This file is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ * b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#ifndef _DT_BINDINGS_RST_SUN6I_A31_H_
+#define _DT_BINDINGS_RST_SUN6I_A31_H_
+
+#define RST_USB_PHY0 0
+#define RST_USB_PHY1 1
+#define RST_USB_PHY2 2
+
+#define RST_AHB1_MIPI_DSI 3
+#define RST_AHB1_SS 4
+#define RST_AHB1_DMA 5
+#define RST_AHB1_MMC0 6
+#define RST_AHB1_MMC1 7
+#define RST_AHB1_MMC2 8
+#define RST_AHB1_MMC3 9
+#define RST_AHB1_NAND1 10
+#define RST_AHB1_NAND0 11
+#define RST_AHB1_SDRAM 12
+#define RST_AHB1_EMAC 13
+#define RST_AHB1_TS 14
+#define RST_AHB1_HSTIMER 15
+#define RST_AHB1_SPI0 16
+#define RST_AHB1_SPI1 17
+#define RST_AHB1_SPI2 18
+#define RST_AHB1_SPI3 19
+#define RST_AHB1_OTG 20
+#define RST_AHB1_EHCI0 21
+#define RST_AHB1_EHCI1 22
+#define RST_AHB1_OHCI0 23
+#define RST_AHB1_OHCI1 24
+#define RST_AHB1_OHCI2 25
+#define RST_AHB1_VE 26
+#define RST_AHB1_LCD0 27
+#define RST_AHB1_LCD1 28
+#define RST_AHB1_CSI 29
+#define RST_AHB1_HDMI 30
+#define RST_AHB1_BE0 31
+#define RST_AHB1_BE1 32
+#define RST_AHB1_FE0 33
+#define RST_AHB1_FE1 34
+#define RST_AHB1_MP 35
+#define RST_AHB1_GPU 36
+#define RST_AHB1_DEU0 37
+#define RST_AHB1_DEU1 38
+#define RST_AHB1_DRC0 39
+#define RST_AHB1_DRC1 40
+#define RST_AHB1_LVDS 41
+
+#define RST_APB1_CODEC 42
+#define RST_APB1_SPDIF 43
+#define RST_APB1_DIGITAL_MIC 44
+#define RST_APB1_DAUDIO0 45
+#define RST_APB1_DAUDIO1 46
+#define RST_APB2_I2C0 47
+#define RST_APB2_I2C1 48
+#define RST_APB2_I2C2 49
+#define RST_APB2_I2C3 50
+#define RST_APB2_UART0 51
+#define RST_APB2_UART1 52
+#define RST_APB2_UART2 53
+#define RST_APB2_UART3 54
+#define RST_APB2_UART4 55
+#define RST_APB2_UART5 56
+
+#endif /* _DT_BINDINGS_RST_SUN6I_A31_H_ */
--
2.18.0.321.gffc6fa0e3
^ permalink raw reply related [flat|nested] 11+ messages in thread
* [U-Boot] [PATCH v2 4/7] ARM: dts: sun7i: Update A20 dts(i) files from Linux-v4.18-rc3
2018-08-09 13:08 [U-Boot] [PATCH v2 0/7] ARM: dts: sunxi: Update dts(i) files from Linux-v4.18-rc3 Jagan Teki
` (2 preceding siblings ...)
2018-08-09 13:08 ` [U-Boot] [PATCH v2 3/7] ARM: dts: sun6i: Update A31/A31s " Jagan Teki
@ 2018-08-09 13:08 ` Jagan Teki
2018-08-09 13:08 ` [U-Boot] [PATCH v2 5/7] ARM: dts: sun8i: Update A23/A33/r16 " Jagan Teki
` (3 subsequent siblings)
7 siblings, 0 replies; 11+ messages in thread
From: Jagan Teki @ 2018-08-09 13:08 UTC (permalink / raw)
To: u-boot
Update all A10 devicetree dtsi and dtsi files from Linux-v4.18-rc3
with below commit:
commit 5d9ef839f874f4e3923c8a9ae7b136c6c3912cd5
Author: Stefan Mavrodiev <stefan@olimex.com>
Date: Wed May 16 14:38:08 2018 +0300
ARM: dts: sun7i: Add Olimex A20-SOM-EVB-eMMC board
Note:
- Update sun7i-a20-primo73.dts as per Linux, since
this dts is U-Boot specific.
- Drop sun7i-a20-olimex-som-evb-emmc.dts since no board
added for this.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
---
arch/arm/dts/sun7i-a20-bananapi-m1-plus.dts | 32 +-
arch/arm/dts/sun7i-a20-bananapi.dts | 106 +-
arch/arm/dts/sun7i-a20-bananapro.dts | 73 +-
arch/arm/dts/sun7i-a20-cubieboard2.dts | 56 +-
arch/arm/dts/sun7i-a20-cubietruck.dts | 84 +-
arch/arm/dts/sun7i-a20-hummingbird.dts | 30 +-
arch/arm/dts/sun7i-a20-i12-tvbox.dts | 34 +-
arch/arm/dts/sun7i-a20-icnova-swac.dts | 6 +-
arch/arm/dts/sun7i-a20-itead-ibox.dts | 12 +-
arch/arm/dts/sun7i-a20-lamobo-r1.dts | 73 +-
arch/arm/dts/sun7i-a20-m3.dts | 12 +-
arch/arm/dts/sun7i-a20-mk808c.dts | 43 +-
arch/arm/dts/sun7i-a20-olimex-som-evb.dts | 108 +-
arch/arm/dts/sun7i-a20-olimex-som204-evb.dts | 42 +-
arch/arm/dts/sun7i-a20-olinuxino-lime.dts | 58 +-
.../dts/sun7i-a20-olinuxino-lime2-emmc.dts | 6 +-
arch/arm/dts/sun7i-a20-olinuxino-lime2.dts | 154 +-
arch/arm/dts/sun7i-a20-olinuxino-micro.dts | 116 +-
arch/arm/dts/sun7i-a20-orangepi-mini.dts | 77 +-
arch/arm/dts/sun7i-a20-orangepi.dts | 42 +-
arch/arm/dts/sun7i-a20-pcduino3-nano.dts | 55 +-
arch/arm/dts/sun7i-a20-pcduino3.dts | 26 +-
arch/arm/dts/sun7i-a20-primo73.dts | 58 +-
arch/arm/dts/sun7i-a20-wexler-tab7200.dts | 30 +-
arch/arm/dts/sun7i-a20-wits-pro-a20-dkt.dts | 20 +-
arch/arm/dts/sun7i-a20.dtsi | 1505 +++++++----------
include/dt-bindings/clock/sun7i-a20-ccu.h | 53 +
27 files changed, 1500 insertions(+), 1411 deletions(-)
create mode 100644 include/dt-bindings/clock/sun7i-a20-ccu.h
diff --git a/arch/arm/dts/sun7i-a20-bananapi-m1-plus.dts b/arch/arm/dts/sun7i-a20-bananapi-m1-plus.dts
index 4c03cc3fd7..763cb03033 100644
--- a/arch/arm/dts/sun7i-a20-bananapi-m1-plus.dts
+++ b/arch/arm/dts/sun7i-a20-bananapi-m1-plus.dts
@@ -60,6 +60,17 @@
stdout-path = "serial0:115200n8";
};
+ hdmi-connector {
+ compatible = "hdmi-connector";
+ type = "a";
+
+ port {
+ hdmi_con_in: endpoint {
+ remote-endpoint = <&hdmi_out_con>;
+ };
+ };
+ };
+
leds {
compatible = "gpio-leds";
pinctrl-names = "default";
@@ -109,6 +120,10 @@
cpu-supply = <®_dcdc2>;
};
+&de {
+ status = "okay";
+};
+
&ehci0 {
status = "okay";
};
@@ -130,6 +145,16 @@
};
};
+&hdmi {
+ status = "okay";
+};
+
+&hdmi_out {
+ hdmi_out_con: endpoint {
+ remote-endpoint = <&hdmi_con_in>;
+ };
+};
+
&i2c0 {
pinctrl-names = "default";
pinctrl-0 = <&i2c0_pins_a>;
@@ -144,6 +169,10 @@
#include "axp209.dtsi"
+&ac_power_supply {
+ status = "okay";
+};
+
&ir0 {
pinctrl-names = "default";
pinctrl-0 = <&ir0_rx_pins_a>;
@@ -155,8 +184,7 @@
pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_bpi_m1p>;
vmmc-supply = <®_vcc3v3>;
bus-width = <4>;
- cd-gpios = <&pio 7 10 GPIO_ACTIVE_HIGH>; /* PH10 */
- cd-inverted;
+ cd-gpios = <&pio 7 10 GPIO_ACTIVE_LOW>; /* PH10 */
status = "okay";
};
diff --git a/arch/arm/dts/sun7i-a20-bananapi.dts b/arch/arm/dts/sun7i-a20-bananapi.dts
index 67c8a7644b..70dfc4ac0b 100644
--- a/arch/arm/dts/sun7i-a20-bananapi.dts
+++ b/arch/arm/dts/sun7i-a20-bananapi.dts
@@ -48,7 +48,6 @@
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/irq.h>
-#include <dt-bindings/pinctrl/sun4i-a10.h>
/ {
model = "LeMaker Banana Pi";
@@ -64,6 +63,17 @@
stdout-path = "serial0:115200n8";
};
+ hdmi-connector {
+ compatible = "hdmi-connector";
+ type = "a";
+
+ port {
+ hdmi_con_in: endpoint {
+ remote-endpoint = <&hdmi_out_con>;
+ };
+ };
+ };
+
leds {
compatible = "gpio-leds";
pinctrl-names = "default";
@@ -110,6 +120,10 @@
>;
};
+&de {
+ status = "okay";
+};
+
&ehci0 {
status = "okay";
};
@@ -131,6 +145,16 @@
};
};
+&hdmi {
+ status = "okay";
+};
+
+&hdmi_out {
+ hdmi_out_con: endpoint {
+ remote-endpoint = <&hdmi_con_in>;
+ };
+};
+
&i2c0 {
pinctrl-names = "default";
pinctrl-0 = <&i2c0_pins_a>;
@@ -160,8 +184,7 @@
pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_bananapi>;
vmmc-supply = <®_vcc3v3>;
bus-width = <4>;
- cd-gpios = <&pio 7 10 GPIO_ACTIVE_HIGH>; /* PH10 */
- cd-inverted;
+ cd-gpios = <&pio 7 10 GPIO_ACTIVE_LOW>; /* PH10 */
status = "okay";
};
@@ -178,32 +201,77 @@
};
&pio {
+ gpio-line-names =
+ /* PA */
+ "ERXD3", "ERXD2", "ERXD1", "ERXD0", "ETXD3",
+ "ETXD2", "ETXD1", "ETXD0",
+ "ERXCK", "ERXERR", "ERXDV", "EMDC", "EMDIO",
+ "ETXEN", "ETXCK", "ECRS",
+ "ECOL", "ETXERR", "", "", "", "", "", "",
+ "", "", "", "", "", "", "", "",
+ /* PB */
+ "PMU-SCK", "PMU-SDA", "", "", "", "", "", "",
+ "", "USB0-DRV", "", "", "", "", "", "",
+ "", "", "", "", "SCL", "SDA", "", "",
+ "", "", "", "", "", "", "", "",
+ /* PC */
+ "", "", "", "", "", "", "", "",
+ "", "", "", "", "", "", "", "",
+ "", "", "", "", "", "", "", "",
+ "", "", "", "", "", "", "", "",
+ /* PD */
+ "", "", "", "", "", "", "", "",
+ "", "", "", "", "", "", "", "",
+ "", "", "", "", "", "", "", "",
+ "", "", "", "", "", "", "", "",
+ /* PE */
+ "", "", "", "", "", "", "", "",
+ "", "", "", "", "", "", "", "",
+ "", "", "", "", "", "", "", "",
+ "", "", "", "", "", "", "", "",
+ /* PF */
+ "SD0-D1", "SD0-D0", "SD0-CLK", "SD0-CMD", "SD0-D3",
+ "SD0-D2", "", "",
+ "", "", "", "", "", "", "", "",
+ "", "", "", "", "", "", "", "",
+ "", "", "", "", "", "", "", "",
+ /* PG */
+ "", "", "", "", "", "", "", "",
+ "", "", "", "", "", "", "", "",
+ "", "", "", "", "", "", "", "",
+ "", "", "", "", "", "", "", "",
+ /* PH */
+ "TXD0", "RXD0", "IO-1", "PH3", "USB0-IDDET", "PH5", "", "",
+ "", "", "SD0-DET", "", "", "", "", "",
+ "", "", "", "", "IO-4", "IO-5", "", "EMAC-PWR-EN",
+ "LED1", "", "", "", "", "", "", "",
+ /* PI */
+ "", "", "", "IO-GCLK", "", "", "", "",
+ "", "", "SPI-CE0", "SPI-CLK", "SPI-MOSI",
+ "SPI-MISO", "SPI-CE1", "",
+ "IO-6", "IO-3", "IO-2", "IO-0", "", "", "", "",
+ "", "", "", "", "", "", "", "";
+
usb0_id_detect_pin: usb0_id_detect_pin at 0 {
- allwinner,pins = "PH4";
- allwinner,function = "gpio_in";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+ pins = "PH4";
+ function = "gpio_in";
+ bias-pull-up;
};
mmc0_cd_pin_bananapi: mmc0_cd_pin at 0 {
- allwinner,pins = "PH10";
- allwinner,function = "gpio_in";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+ pins = "PH10";
+ function = "gpio_in";
+ bias-pull-up;
};
gmac_power_pin_bananapi: gmac_power_pin at 0 {
- allwinner,pins = "PH23";
- allwinner,function = "gpio_out";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ pins = "PH23";
+ function = "gpio_out";
};
led_pins_bananapi: led_pins at 0 {
- allwinner,pins = "PH24";
- allwinner,function = "gpio_out";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ pins = "PH24";
+ function = "gpio_out";
};
};
diff --git a/arch/arm/dts/sun7i-a20-bananapro.dts b/arch/arm/dts/sun7i-a20-bananapro.dts
index 18fcc87f46..0898eb6162 100644
--- a/arch/arm/dts/sun7i-a20-bananapro.dts
+++ b/arch/arm/dts/sun7i-a20-bananapro.dts
@@ -76,6 +76,13 @@
};
};
+ wifi_pwrseq: wifi-pwrseq {
+ compatible = "mmc-pwrseq-simple";
+ pinctrl-names = "default";
+ pinctrl-0 = <&vmmc3_pin_bananapro>;
+ reset-gpios = <&pio 7 22 GPIO_ACTIVE_LOW>;
+ };
+
reg_gmac_3v3: gmac-3v3 {
compatible = "regulator-fixed";
pinctrl-names = "default";
@@ -87,23 +94,16 @@
enable-active-high;
gpio = <&pio 7 23 GPIO_ACTIVE_HIGH>;
};
-
- reg_vmmc3: vmmc3 {
- compatible = "regulator-fixed";
- pinctrl-names = "default";
- pinctrl-0 = <&vmmc3_pin_bananapro>;
- regulator-name = "vmmc3";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- enable-active-high;
- gpio = <&pio 7 22 GPIO_ACTIVE_HIGH>;
- };
};
&ahci {
status = "okay";
};
+&codec {
+ status = "okay";
+};
+
&ehci0 {
status = "okay";
};
@@ -158,18 +158,26 @@
pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_bananapro>;
vmmc-supply = <®_vcc3v3>;
bus-width = <4>;
- cd-gpios = <&pio 7 10 GPIO_ACTIVE_HIGH>; /* PH10 */
- cd-inverted;
+ cd-gpios = <&pio 7 10 GPIO_ACTIVE_LOW>; /* PH10 */
status = "okay";
};
&mmc3 {
pinctrl-names = "default";
pinctrl-0 = <&mmc3_pins_a>;
- vmmc-supply = <®_vmmc3>;
+ vmmc-supply = <®_vcc3v3>;
+ mmc-pwrseq = <&wifi_pwrseq>;
bus-width = <4>;
non-removable;
status = "okay";
+
+ brcmf: wifi at 1 {
+ reg = <1>;
+ compatible = "brcm,bcm4329-fmac";
+ interrupt-parent = <&pio>;
+ interrupts = <7 15 IRQ_TYPE_LEVEL_LOW>;
+ interrupt-names = "host-wake";
+ };
};
&ohci0 {
@@ -182,45 +190,34 @@
&pio {
gmac_power_pin_bananapro: gmac_power_pin at 0 {
- allwinner,pins = "PH23";
- allwinner,function = "gpio_out";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ pins = "PH23";
+ function = "gpio_out";
};
led_pins_bananapro: led_pins at 0 {
- allwinner,pins = "PH24", "PG2";
- allwinner,function = "gpio_out";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ pins = "PH24", "PG2";
+ function = "gpio_out";
};
mmc0_cd_pin_bananapro: mmc0_cd_pin at 0 {
- allwinner,pins = "PH10";
- allwinner,function = "gpio_in";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+ pins = "PH10";
+ function = "gpio_in";
+ bias-pull-up;
};
usb1_vbus_pin_bananapro: usb1_vbus_pin at 0 {
- allwinner,pins = "PH0";
- allwinner,function = "gpio_out";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ pins = "PH0";
+ function = "gpio_out";
};
usb2_vbus_pin_bananapro: usb2_vbus_pin at 0 {
- allwinner,pins = "PH1";
- allwinner,function = "gpio_out";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ pins = "PH1";
+ function = "gpio_out";
};
vmmc3_pin_bananapro: vmmc3_pin at 0 {
- allwinner,pins = "PH22";
- allwinner,function = "gpio_out";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ pins = "PH22";
+ function = "gpio_out";
};
};
diff --git a/arch/arm/dts/sun7i-a20-cubieboard2.dts b/arch/arm/dts/sun7i-a20-cubieboard2.dts
index 1fa832d7b4..942ac9dfd4 100644
--- a/arch/arm/dts/sun7i-a20-cubieboard2.dts
+++ b/arch/arm/dts/sun7i-a20-cubieboard2.dts
@@ -48,7 +48,6 @@
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/irq.h>
-#include <dt-bindings/pinctrl/sun4i-a10.h>
/ {
model = "Cubietech Cubieboard2";
@@ -62,6 +61,17 @@
stdout-path = "serial0:115200n8";
};
+ hdmi-connector {
+ compatible = "hdmi-connector";
+ type = "a";
+
+ port {
+ hdmi_con_in: endpoint {
+ remote-endpoint = <&hdmi_out_con>;
+ };
+ };
+ };
+
leds {
compatible = "gpio-leds";
pinctrl-names = "default";
@@ -92,6 +102,10 @@
cpu-supply = <®_dcdc2>;
};
+&de {
+ status = "okay";
+};
+
&ehci0 {
status = "okay";
};
@@ -112,6 +126,16 @@
};
};
+&hdmi {
+ status = "okay";
+};
+
+&hdmi_out {
+ hdmi_out_con: endpoint {
+ remote-endpoint = <&hdmi_con_in>;
+ };
+};
+
&i2c0 {
pinctrl-names = "default";
pinctrl-0 = <&i2c0_pins_a>;
@@ -138,11 +162,10 @@
&mmc0 {
pinctrl-names = "default";
- pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_reference_design>;
+ pinctrl-0 = <&mmc0_pins_a>;
vmmc-supply = <®_vcc3v3>;
bus-width = <4>;
- cd-gpios = <&pio 7 1 GPIO_ACTIVE_HIGH>; /* PH1 */
- cd-inverted;
+ cd-gpios = <&pio 7 1 GPIO_ACTIVE_LOW>; /* PH1 */
status = "okay";
};
@@ -160,17 +183,14 @@
&pio {
led_pins_cubieboard2: led_pins at 0 {
- allwinner,pins = "PH20", "PH21";
- allwinner,function = "gpio_out";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ pins = "PH20", "PH21";
+ function = "gpio_out";
};
usb0_id_detect_pin: usb0_id_detect_pin at 0 {
- allwinner,pins = "PH4";
- allwinner,function = "gpio_in";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+ pins = "PH4";
+ function = "gpio_in";
+ bias-pull-up;
};
};
@@ -178,13 +198,12 @@
status = "okay";
};
-&usb_otg {
- dr_mode = "otg";
+#include "axp209.dtsi"
+
+&ac_power_supply {
status = "okay";
};
-#include "axp209.dtsi"
-
®_dcdc2 {
regulator-always-on;
regulator-min-microvolt = <1000000>;
@@ -224,6 +243,11 @@
status = "okay";
};
+&usb_otg {
+ dr_mode = "otg";
+ status = "okay";
+};
+
&usbphy {
pinctrl-names = "default";
pinctrl-0 = <&usb0_id_detect_pin>;
diff --git a/arch/arm/dts/sun7i-a20-cubietruck.dts b/arch/arm/dts/sun7i-a20-cubietruck.dts
index 83f39b0362..5649161de1 100644
--- a/arch/arm/dts/sun7i-a20-cubietruck.dts
+++ b/arch/arm/dts/sun7i-a20-cubietruck.dts
@@ -48,7 +48,6 @@
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/irq.h>
-#include <dt-bindings/pinctrl/sun4i-a10.h>
/ {
model = "Cubietech Cubietruck";
@@ -62,6 +61,17 @@
stdout-path = "serial0:115200n8";
};
+ hdmi-connector {
+ compatible = "hdmi-connector";
+ type = "a";
+
+ port {
+ hdmi_con_in: endpoint {
+ remote-endpoint = <&hdmi_out_con>;
+ };
+ };
+ };
+
leds {
compatible = "gpio-leds";
pinctrl-names = "default";
@@ -127,6 +137,10 @@
cpu-supply = <®_dcdc2>;
};
+&de {
+ status = "okay";
+};
+
&ehci0 {
status = "okay";
};
@@ -147,6 +161,16 @@
};
};
+&hdmi {
+ status = "okay";
+};
+
+&hdmi_out {
+ hdmi_out_con: endpoint {
+ remote-endpoint = <&hdmi_con_in>;
+ };
+};
+
&i2c0 {
pinctrl-names = "default";
pinctrl-0 = <&i2c0_pins_a>;
@@ -179,11 +203,10 @@
&mmc0 {
pinctrl-names = "default";
- pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_reference_design>;
+ pinctrl-0 = <&mmc0_pins_a>;
vmmc-supply = <®_vcc3v3>;
bus-width = <4>;
- cd-gpios = <&pio 7 1 GPIO_ACTIVE_HIGH>; /* PH1 */
- cd-inverted;
+ cd-gpios = <&pio 7 1 GPIO_ACTIVE_LOW>; /* PH1 */
status = "okay";
};
@@ -196,7 +219,7 @@
non-removable;
status = "okay";
- brcmf: bcrmf at 1 {
+ brcmf: wifi at 1 {
reg = <1>;
compatible = "brcm,bcm4329-fmac";
interrupt-parent = <&pio>;
@@ -207,7 +230,7 @@
&mmc3_pins_a {
/* AP6210 requires pull-up */
- allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+ bias-pull-up;
};
&ohci0 {
@@ -224,45 +247,33 @@
&pio {
ahci_pwr_pin_cubietruck: ahci_pwr_pin at 1 {
- allwinner,pins = "PH12";
- allwinner,function = "gpio_out";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ pins = "PH12";
+ function = "gpio_out";
};
led_pins_cubietruck: led_pins at 0 {
- allwinner,pins = "PH7", "PH11", "PH20", "PH21";
- allwinner,function = "gpio_out";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ pins = "PH7", "PH11", "PH20", "PH21";
+ function = "gpio_out";
};
mmc3_pwrseq_pin_cubietruck: mmc3_pwrseq_pin at 0 {
- allwinner,pins = "PH9";
- allwinner,function = "gpio_out";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ pins = "PH9";
+ function = "gpio_out";
};
usb0_vbus_pin_a: usb0_vbus_pin at 0 {
- allwinner,pins = "PH17";
- allwinner,function = "gpio_out";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ pins = "PH17";
+ function = "gpio_out";
};
usb0_id_detect_pin: usb0_id_detect_pin at 0 {
- allwinner,pins = "PH19";
- allwinner,function = "gpio_in";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ pins = "PH19";
+ function = "gpio_in";
};
usb0_vbus_detect_pin: usb0_vbus_detect_pin at 0 {
- allwinner,pins = "PH22";
- allwinner,function = "gpio_in";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ pins = "PH22";
+ function = "gpio_in";
};
};
@@ -280,6 +291,14 @@
#include "axp209.dtsi"
+&ac_power_supply {
+ status = "okay";
+};
+
+&battery_power_supply {
+ status = "okay";
+};
+
®_dcdc2 {
regulator-always-on;
regulator-min-microvolt = <1000000>;
@@ -336,11 +355,16 @@
status = "okay";
};
+&usb_power_supply {
+ status = "okay";
+};
+
&usbphy {
pinctrl-names = "default";
pinctrl-0 = <&usb0_id_detect_pin>, <&usb0_vbus_detect_pin>;
usb0_id_det-gpios = <&pio 7 19 GPIO_ACTIVE_HIGH>; /* PH19 */
usb0_vbus_det-gpios = <&pio 7 22 GPIO_ACTIVE_HIGH>; /* PH22 */
+ usb0_vbus_power-supply = <&usb_power_supply>;
usb0_vbus-supply = <®_usb0_vbus>;
usb1_vbus-supply = <®_usb1_vbus>;
usb2_vbus-supply = <®_usb2_vbus>;
diff --git a/arch/arm/dts/sun7i-a20-hummingbird.dts b/arch/arm/dts/sun7i-a20-hummingbird.dts
index 37f4a54974..1f0e5ecbf0 100644
--- a/arch/arm/dts/sun7i-a20-hummingbird.dts
+++ b/arch/arm/dts/sun7i-a20-hummingbird.dts
@@ -48,7 +48,6 @@
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/irq.h>
-#include <dt-bindings/pinctrl/sun4i-a10.h>
/ {
model = "Merrii A20 Hummingbird";
@@ -161,11 +160,10 @@
&mmc0 {
pinctrl-names = "default";
- pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_reference_design>;
+ pinctrl-0 = <&mmc0_pins_a>;
vmmc-supply = <®_vcc3v0>;
bus-width = <4>;
- cd-gpios = <&pio 7 1 GPIO_ACTIVE_HIGH>; /* PH1 */
- cd-inverted;
+ cd-gpios = <&pio 7 1 GPIO_ACTIVE_LOW>; /* PH1 */
status = "okay";
};
@@ -188,31 +186,23 @@
&pio {
ahci_pwr_pin_a20_hummingbird: ahci_pwr_pin at 0 {
- allwinner,pins = "PH15";
- allwinner,function = "gpio_out";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ pins = "PH15";
+ function = "gpio_out";
};
usb1_vbus_pin_a20_hummingbird: usb1_vbus_pin at 0 {
- allwinner,pins = "PH2";
- allwinner,function = "gpio_out";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ pins = "PH2";
+ function = "gpio_out";
};
mmc3_vdd_pin_a20_hummingbird: mmc3_vdd_pin at 0 {
- allwinner,pins = "PH9";
- allwinner,function = "gpio_out";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ pins = "PH9";
+ function = "gpio_out";
};
gmac_vdd_pin_a20_hummingbird: gmac_vdd_pin at 0 {
- allwinner,pins = "PH16";
- allwinner,function = "gpio_out";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ pins = "PH16";
+ function = "gpio_out";
};
};
diff --git a/arch/arm/dts/sun7i-a20-i12-tvbox.dts b/arch/arm/dts/sun7i-a20-i12-tvbox.dts
index 1e6bd360da..2e3f2f29d1 100644
--- a/arch/arm/dts/sun7i-a20-i12-tvbox.dts
+++ b/arch/arm/dts/sun7i-a20-i12-tvbox.dts
@@ -46,7 +46,6 @@
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/irq.h>
-#include <dt-bindings/pinctrl/sun4i-a10.h>
/ {
model = "I12 / Q5 / QT840A A20 tvbox";
@@ -158,11 +157,10 @@
&mmc0 {
pinctrl-names = "default";
- pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_reference_design>;
+ pinctrl-0 = <&mmc0_pins_a>;
vmmc-supply = <®_vcc3v3>;
bus-width = <4>;
- cd-gpios = <&pio 7 1 GPIO_ACTIVE_HIGH>; /* PH1 */
- cd-inverted;
+ cd-gpios = <&pio 7 1 GPIO_ACTIVE_LOW>; /* PH1 */
status = "okay";
};
@@ -174,7 +172,7 @@
non-removable;
status = "okay";
- brcmf: bcrmf at 1 {
+ brcmf: wifi at 1 {
reg = <1>;
compatible = "brcm,bcm4329-fmac";
interrupt-parent = <&pio>;
@@ -185,7 +183,7 @@
&mmc3_pins_a {
/* AP6210 / AP6330 requires pull-up */
- allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+ bias-pull-up;
};
&ohci0 {
@@ -198,31 +196,23 @@
&pio {
vmmc3_pin_i12_tvbox: vmmc3_pin at 0 {
- allwinner,pins = "PH2";
- allwinner,function = "gpio_out";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ pins = "PH2";
+ function = "gpio_out";
};
vmmc3_io_pin_i12_tvbox: vmmc3_io_pin at 0 {
- allwinner,pins = "PH12";
- allwinner,function = "gpio_out";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ pins = "PH12";
+ function = "gpio_out";
};
gmac_power_pin_i12_tvbox: gmac_power_pin at 0 {
- allwinner,pins = "PH21";
- allwinner,function = "gpio_out";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ pins = "PH21";
+ function = "gpio_out";
};
led_pins_i12_tvbox: led_pins at 0 {
- allwinner,pins = "PH9", "PH20";
- allwinner,function = "gpio_out";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ pins = "PH9", "PH20";
+ function = "gpio_out";
};
};
diff --git a/arch/arm/dts/sun7i-a20-icnova-swac.dts b/arch/arm/dts/sun7i-a20-icnova-swac.dts
index f5b5325a70..926fa194eb 100644
--- a/arch/arm/dts/sun7i-a20-icnova-swac.dts
+++ b/arch/arm/dts/sun7i-a20-icnova-swac.dts
@@ -46,7 +46,6 @@
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/irq.h>
-#include <dt-bindings/pinctrl/sun4i-a10.h>
/ {
model = "ICnova-A20 SWAC";
@@ -105,11 +104,10 @@
&mmc0 {
pinctrl-names = "default";
- pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_reference_design>;
+ pinctrl-0 = <&mmc0_pins_a>;
vmmc-supply = <®_vcc3v3>;
bus-width = <4>;
- cd-gpios = <&pio 8 5 GPIO_ACTIVE_HIGH>; /* PI5 */
- cd-inverted;
+ cd-gpios = <&pio 8 5 GPIO_ACTIVE_LOW>; /* PI5 */
status = "okay";
};
diff --git a/arch/arm/dts/sun7i-a20-itead-ibox.dts b/arch/arm/dts/sun7i-a20-itead-ibox.dts
index 10d48cbf81..1b05ba466e 100644
--- a/arch/arm/dts/sun7i-a20-itead-ibox.dts
+++ b/arch/arm/dts/sun7i-a20-itead-ibox.dts
@@ -121,20 +121,18 @@
&mmc0 {
pinctrl-names = "default";
- pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_reference_design>;
+ pinctrl-0 = <&mmc0_pins_a>;
vmmc-supply = <®_vcc3v3>;
bus-width = <4>;
- cd-gpios = <&pio 7 1 GPIO_ACTIVE_HIGH>; /* PH1 */
- cd-inverted;
+ cd-gpios = <&pio 7 1 GPIO_ACTIVE_LOW>; /* PH1 */
status = "okay";
};
&pio {
led_pins_itead_core: led_pins at 0 {
- allwinner,pins = "PH20","PH21";
- allwinner,function = "gpio_out";
- allwinner,drive = <SUN4I_PINCTRL_20_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ pins = "PH20","PH21";
+ function = "gpio_out";
+ drive-strength = <20>;
};
};
diff --git a/arch/arm/dts/sun7i-a20-lamobo-r1.dts b/arch/arm/dts/sun7i-a20-lamobo-r1.dts
index 73c05dab0a..b1ab7c1c33 100644
--- a/arch/arm/dts/sun7i-a20-lamobo-r1.dts
+++ b/arch/arm/dts/sun7i-a20-lamobo-r1.dts
@@ -46,7 +46,6 @@
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/irq.h>
-#include <dt-bindings/pinctrl/sun4i-a10.h>
/ {
model = "Lamobo R1";
@@ -62,6 +61,17 @@
stdout-path = "serial0:115200n8";
};
+ hdmi-connector {
+ compatible = "hdmi-connector";
+ type = "a";
+
+ port {
+ hdmi_con_in: endpoint {
+ remote-endpoint = <&hdmi_out_con>;
+ };
+ };
+ };
+
leds {
compatible = "gpio-leds";
pinctrl-names = "default";
@@ -86,10 +96,6 @@
};
};
-&ahci_pwr_pin_a {
- allwinner,pins = "PB3";
-};
-
&ahci {
target-supply = <®_ahci_5v>;
status = "okay";
@@ -103,6 +109,10 @@
cpu-supply = <®_dcdc2>;
};
+&de {
+ status = "okay";
+};
+
&ehci0 {
status = "okay";
};
@@ -167,7 +177,7 @@
reg = <8>;
label = "cpu";
ethernet = <&gmac>;
- phy-mode = "rgmii";
+ phy-mode = "rgmii-txid";
fixed-link {
speed = <1000>;
full-duplex;
@@ -178,6 +188,16 @@
};
};
+&hdmi {
+ status = "okay";
+};
+
+&hdmi_out {
+ hdmi_out_con: endpoint {
+ remote-endpoint = <&hdmi_con_in>;
+ };
+};
+
&i2c0 {
pinctrl-names = "default";
pinctrl-0 = <&i2c0_pins_a>;
@@ -207,8 +227,7 @@
pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_lamobo_r1>;
vmmc-supply = <®_vcc3v3>;
bus-width = <4>;
- cd-gpios = <&pio 7 10 GPIO_ACTIVE_HIGH>; /* PH10 */
- cd-inverted;
+ cd-gpios = <&pio 7 10 GPIO_ACTIVE_LOW>; /* PH10 */
status = "okay";
};
@@ -222,36 +241,38 @@
&pio {
usb0_id_detect_pin: usb0_id_detect_pin at 0 {
- allwinner,pins = "PH4";
- allwinner,function = "gpio_in";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+ pins = "PH4";
+ function = "gpio_in";
+ bias-pull-up;
};
mmc0_cd_pin_lamobo_r1: mmc0_cd_pin at 0 {
- allwinner,pins = "PH10";
- allwinner,function = "gpio_in";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+ pins = "PH10";
+ function = "gpio_in";
+ bias-pull-up;
};
gmac_power_pin_lamobo_r1: gmac_power_pin at 0 {
- allwinner,pins = "PH23";
- allwinner,function = "gpio_out";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ pins = "PH23";
+ function = "gpio_out";
};
led_pins_lamobo_r1: led_pins at 0 {
- allwinner,pins = "PH24";
- allwinner,function = "gpio_out";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ pins = "PH24";
+ function = "gpio_out";
};
};
#include "axp209.dtsi"
+&ac_power_supply {
+ status = "okay";
+};
+
+&battery_power_supply {
+ status = "okay";
+};
+
®_ahci_5v {
gpio = <&pio 1 3 GPIO_ACTIVE_HIGH>; /* PB3 */
status = "okay";
@@ -326,10 +347,6 @@
status = "okay";
};
-&usb2_vbus_pin_a {
- allwinner,pins = "PH12";
-};
-
&usbphy {
pinctrl-names = "default";
pinctrl-0 = <&usb0_id_detect_pin>;
diff --git a/arch/arm/dts/sun7i-a20-m3.dts b/arch/arm/dts/sun7i-a20-m3.dts
index 8d9ea48dd9..e91a209850 100644
--- a/arch/arm/dts/sun7i-a20-m3.dts
+++ b/arch/arm/dts/sun7i-a20-m3.dts
@@ -48,7 +48,6 @@
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/irq.h>
-#include <dt-bindings/pinctrl/sun4i-a10.h>
/ {
model = "Mele M3";
@@ -118,11 +117,10 @@
&mmc0 {
pinctrl-names = "default";
- pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_reference_design>;
+ pinctrl-0 = <&mmc0_pins_a>;
vmmc-supply = <®_vcc3v3>;
bus-width = <4>;
- cd-gpios = <&pio 7 1 GPIO_ACTIVE_HIGH>; /* PH1 */
- cd-inverted;
+ cd-gpios = <&pio 7 1 GPIO_ACTIVE_LOW>; /* PH1 */
status = "okay";
};
@@ -145,10 +143,8 @@
&pio {
led_pins_m3: led_pins at 0 {
- allwinner,pins = "PH20";
- allwinner,function = "gpio_out";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ pins = "PH20";
+ function = "gpio_out";
};
};
diff --git a/arch/arm/dts/sun7i-a20-mk808c.dts b/arch/arm/dts/sun7i-a20-mk808c.dts
index 90ff4a2670..6109f794a9 100644
--- a/arch/arm/dts/sun7i-a20-mk808c.dts
+++ b/arch/arm/dts/sun7i-a20-mk808c.dts
@@ -53,7 +53,6 @@
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/irq.h>
-#include <dt-bindings/pinctrl/sun4i-a10.h>
/ {
model = "mk808c";
@@ -67,12 +66,27 @@
chosen {
stdout-path = "serial0:115200n8";
};
+
+ hdmi-connector {
+ compatible = "hdmi-connector";
+ type = "a";
+
+ port {
+ hdmi_con_in: endpoint {
+ remote-endpoint = <&hdmi_out_con>;
+ };
+ };
+ };
};
&codec {
status = "okay";
};
+&de {
+ status = "okay";
+};
+
&ehci0 {
status = "okay";
};
@@ -81,6 +95,16 @@
status = "okay";
};
+&hdmi {
+ status = "okay";
+};
+
+&hdmi_out {
+ hdmi_out_con: endpoint {
+ remote-endpoint = <&hdmi_con_in>;
+ };
+};
+
&i2c0 {
pinctrl-names = "default";
pinctrl-0 = <&i2c0_pins_a>;
@@ -110,11 +134,10 @@
&mmc0 {
pinctrl-names = "default";
- pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_reference_design>;
+ pinctrl-0 = <&mmc0_pins_a>;
vmmc-supply = <®_vcc3v0>;
bus-width = <4>;
- cd-gpios = <&pio 7 1 GPIO_ACTIVE_HIGH>; /* PH1 */
- cd-inverted;
+ cd-gpios = <&pio 7 1 GPIO_ACTIVE_LOW>; /* PH1 */
status = "okay";
};
@@ -132,17 +155,13 @@
&pio {
usb0_id_detect_pin: usb0_id_detect_pin at 0 {
- allwinner,pins = "PH4";
- allwinner,function = "gpio_in";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ pins = "PH4";
+ function = "gpio_in";
};
usb0_vbus_detect_pin: usb0_vbus_detect_pin at 0 {
- allwinner,pins = "PH5";
- allwinner,function = "gpio_in";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ pins = "PH5";
+ function = "gpio_in";
};
};
diff --git a/arch/arm/dts/sun7i-a20-olimex-som-evb.dts b/arch/arm/dts/sun7i-a20-olimex-som-evb.dts
index 23aacce4d6..f080f82b58 100644
--- a/arch/arm/dts/sun7i-a20-olimex-som-evb.dts
+++ b/arch/arm/dts/sun7i-a20-olimex-som-evb.dts
@@ -48,7 +48,6 @@
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/interrupt-controller/irq.h>
-#include <dt-bindings/pinctrl/sun4i-a10.h>
/ {
model = "Olimex A20-Olimex-SOM-EVB";
@@ -62,6 +61,17 @@
stdout-path = "serial0:115200n8";
};
+ hdmi-connector {
+ compatible = "hdmi-connector";
+ type = "a";
+
+ port {
+ hdmi_con_in: endpoint {
+ remote-endpoint = <&hdmi_out_con>;
+ };
+ };
+ };
+
leds {
compatible = "gpio-leds";
pinctrl-names = "default";
@@ -80,6 +90,10 @@
status = "okay";
};
+&de {
+ status = "okay";
+};
+
&ehci0 {
status = "okay";
};
@@ -88,6 +102,10 @@
status = "okay";
};
+&cpu0 {
+ cpu-supply = <®_dcdc2>;
+};
+
&codec {
status = "okay";
};
@@ -104,6 +122,16 @@
};
};
+&hdmi {
+ status = "okay";
+};
+
+&hdmi_out {
+ hdmi_out_con: endpoint {
+ remote-endpoint = <&hdmi_con_in>;
+ };
+};
+
&i2c0 {
pinctrl-names = "default";
pinctrl-0 = <&i2c0_pins_a>;
@@ -116,6 +144,18 @@
};
};
+&i2c1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c1_pins_a>;
+ status = "okay";
+};
+
+&i2c2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c2_pins_a>;
+ status = "okay";
+};
+
&lradc {
vref-supply = <®_vcc3v0>;
status = "okay";
@@ -172,11 +212,10 @@
&mmc0 {
pinctrl-names = "default";
- pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_reference_design>;
+ pinctrl-0 = <&mmc0_pins_a>;
vmmc-supply = <®_vcc3v3>;
bus-width = <4>;
- cd-gpios = <&pio 7 1 GPIO_ACTIVE_HIGH>; /* PH1 */
- cd-inverted;
+ cd-gpios = <&pio 7 1 GPIO_ACTIVE_LOW>; /* PH1 */
status = "okay";
};
@@ -185,8 +224,7 @@
pinctrl-0 = <&mmc3_pins_a>, <&mmc3_cd_pin_olimex_som_evb>;
vmmc-supply = <®_vcc3v3>;
bus-width = <4>;
- cd-gpios = <&pio 7 0 GPIO_ACTIVE_HIGH>; /* PH0 */
- cd-inverted;
+ cd-gpios = <&pio 7 0 GPIO_ACTIVE_LOW>; /* PH0 */
status = "okay";
};
@@ -204,38 +242,30 @@
&pio {
ahci_pwr_pin_olimex_som_evb: ahci_pwr_pin at 1 {
- allwinner,pins = "PC3";
- allwinner,function = "gpio_out";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ pins = "PC3";
+ function = "gpio_out";
};
led_pins_olimex_som_evb: led_pins at 0 {
- allwinner,pins = "PH2";
- allwinner,function = "gpio_out";
- allwinner,drive = <SUN4I_PINCTRL_20_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ pins = "PH2";
+ function = "gpio_out";
+ drive-strength = <20>;
};
mmc3_cd_pin_olimex_som_evb: mmc3_cd_pin at 0 {
- allwinner,pins = "PH0";
- allwinner,function = "gpio_in";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+ pins = "PH0";
+ function = "gpio_in";
+ bias-pull-up;
};
usb0_id_detect_pin: usb0_id_detect_pin at 0 {
- allwinner,pins = "PH4";
- allwinner,function = "gpio_in";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ pins = "PH4";
+ function = "gpio_in";
};
usb0_vbus_detect_pin: usb0_vbus_detect_pin at 0 {
- allwinner,pins = "PH5";
- allwinner,function = "gpio_in";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ pins = "PH5";
+ function = "gpio_in";
};
};
@@ -284,12 +314,38 @@
status = "okay";
};
+&spi1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&spi1_pins_a>,
+ <&spi1_cs0_pins_a>;
+ status = "okay";
+};
+
+&spi2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&spi2_pins_a>,
+ <&spi2_cs0_pins_a>;
+ status = "okay";
+};
+
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_pins_a>;
status = "okay";
};
+&uart6 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart6_pins_a>;
+ status = "okay";
+};
+
+&uart7 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart7_pins_a>;
+ status = "okay";
+};
+
&usb_otg {
dr_mode = "otg";
status = "okay";
diff --git a/arch/arm/dts/sun7i-a20-olimex-som204-evb.dts b/arch/arm/dts/sun7i-a20-olimex-som204-evb.dts
index c183920cef..3d7b5c848f 100644
--- a/arch/arm/dts/sun7i-a20-olimex-som204-evb.dts
+++ b/arch/arm/dts/sun7i-a20-olimex-som204-evb.dts
@@ -32,6 +32,17 @@
stdout-path = "serial0:115200n8";
};
+ hdmi-connector {
+ compatible = "hdmi-connector";
+ type = "a";
+
+ port {
+ hdmi_con_in: endpoint {
+ remote-endpoint = <&hdmi_out_con>;
+ };
+ };
+ };
+
leds {
compatible = "gpio-leds";
@@ -65,6 +76,12 @@
status = "okay";
};
+&can0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&can0_pins_a>;
+ status = "okay";
+};
+
&codec {
status = "okay";
};
@@ -73,6 +90,10 @@
cpu-supply = <®_dcdc2>;
};
+&de {
+ status = "okay";
+};
+
&ehci0 {
status = "okay";
};
@@ -98,6 +119,16 @@
};
};
+&hdmi {
+ status = "okay";
+};
+
+&hdmi_out {
+ hdmi_out_con: endpoint {
+ remote-endpoint = <&hdmi_con_in>;
+ };
+};
+
&i2c0 {
pinctrl-names = "default";
pinctrl-0 = <&i2c0_pins_a>;
@@ -141,8 +172,7 @@
pinctrl-0 = <&mmc0_pins_a>;
vmmc-supply = <®_vcc3v3>;
bus-width = <4>;
- cd-gpios = <&pio 7 1 GPIO_ACTIVE_HIGH>;
- cd-inverted;
+ cd-gpios = <&pio 7 1 GPIO_ACTIVE_LOW>;
status = "okay";
};
@@ -181,6 +211,14 @@
#include "axp209.dtsi"
+&ac_power_supply {
+ status = "okay";
+};
+
+&battery_power_supply {
+ status = "okay";
+};
+
®_ahci_5v {
gpio = <&pio 2 3 GPIO_ACTIVE_HIGH>;
status = "okay";
diff --git a/arch/arm/dts/sun7i-a20-olinuxino-lime.dts b/arch/arm/dts/sun7i-a20-olinuxino-lime.dts
index 35ad7006c5..d20fd03596 100644
--- a/arch/arm/dts/sun7i-a20-olinuxino-lime.dts
+++ b/arch/arm/dts/sun7i-a20-olinuxino-lime.dts
@@ -49,7 +49,6 @@
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/irq.h>
-#include <dt-bindings/pinctrl/sun4i-a10.h>
/ {
model = "Olimex A20-OLinuXino-LIME";
@@ -63,6 +62,17 @@
stdout-path = "serial0:115200n8";
};
+ hdmi-connector {
+ compatible = "hdmi-connector";
+ type = "a";
+
+ port {
+ hdmi_con_in: endpoint {
+ remote-endpoint = <&hdmi_out_con>;
+ };
+ };
+ };
+
leds {
compatible = "gpio-leds";
pinctrl-names = "default";
@@ -81,6 +91,10 @@
status = "okay";
};
+&de {
+ status = "okay";
+};
+
&ehci0 {
status = "okay";
};
@@ -101,6 +115,16 @@
};
};
+&hdmi {
+ status = "okay";
+};
+
+&hdmi_out {
+ hdmi_out_con: endpoint {
+ remote-endpoint = <&hdmi_con_in>;
+ };
+};
+
&i2c0 {
pinctrl-names = "default";
pinctrl-0 = <&i2c0_pins_a>;
@@ -131,11 +155,10 @@
&mmc0 {
pinctrl-names = "default";
- pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_reference_design>;
+ pinctrl-0 = <&mmc0_pins_a>;
vmmc-supply = <®_vcc3v3>;
bus-width = <4>;
- cd-gpios = <&pio 7 1 GPIO_ACTIVE_HIGH>; /* PH1 */
- cd-inverted;
+ cd-gpios = <&pio 7 1 GPIO_ACTIVE_LOW>; /* PH1 */
status = "okay";
};
@@ -153,31 +176,26 @@
&pio {
ahci_pwr_pin_olinuxinolime: ahci_pwr_pin at 1 {
- allwinner,pins = "PC3";
- allwinner,function = "gpio_out";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ pins = "PC3";
+ function = "gpio_out";
};
led_pins_olinuxinolime: led_pins at 0 {
- allwinner,pins = "PH2";
- allwinner,function = "gpio_out";
- allwinner,drive = <SUN4I_PINCTRL_20_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ pins = "PH2";
+ function = "gpio_out";
+ drive-strength = <20>;
};
usb0_id_detect_pin: usb0_id_detect_pin at 0 {
- allwinner,pins = "PH4";
- allwinner,function = "gpio_in";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+ pins = "PH4";
+ function = "gpio_in";
+ bias-pull-up;
};
usb0_vbus_detect_pin: usb0_vbus_detect_pin at 0 {
- allwinner,pins = "PH5";
- allwinner,function = "gpio_in";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_PULL_DOWN>;
+ pins = "PH5";
+ function = "gpio_in";
+ bias-pull-down;
};
};
diff --git a/arch/arm/dts/sun7i-a20-olinuxino-lime2-emmc.dts b/arch/arm/dts/sun7i-a20-olinuxino-lime2-emmc.dts
index 10d307408f..81f376f2a4 100644
--- a/arch/arm/dts/sun7i-a20-olinuxino-lime2-emmc.dts
+++ b/arch/arm/dts/sun7i-a20-olinuxino-lime2-emmc.dts
@@ -57,10 +57,8 @@
&pio {
mmc2_pins_nrst: mmc2-rst-pin {
- allwinner,pins = "PC16";
- allwinner,function = "gpio_out";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ pins = "PC16";
+ function = "gpio_out";
};
};
diff --git a/arch/arm/dts/sun7i-a20-olinuxino-lime2.dts b/arch/arm/dts/sun7i-a20-olinuxino-lime2.dts
index d5c796c8d1..b828677f33 100644
--- a/arch/arm/dts/sun7i-a20-olinuxino-lime2.dts
+++ b/arch/arm/dts/sun7i-a20-olinuxino-lime2.dts
@@ -46,7 +46,6 @@
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/irq.h>
-#include <dt-bindings/pinctrl/sun4i-a10.h>
/ {
model = "Olimex A20-OLinuXino-LIME2";
@@ -60,6 +59,17 @@
stdout-path = "serial0:115200n8";
};
+ hdmi-connector {
+ compatible = "hdmi-connector";
+ type = "a";
+
+ port {
+ hdmi_con_in: endpoint {
+ remote-endpoint = <&hdmi_out_con>;
+ };
+ };
+ };
+
leds {
compatible = "gpio-leds";
pinctrl-names = "default";
@@ -86,6 +96,10 @@
status = "okay";
};
+&de {
+ status = "okay";
+};
+
&ehci0 {
status = "okay";
};
@@ -106,63 +120,25 @@
};
};
+&hdmi {
+ status = "okay";
+};
+
+&hdmi_out {
+ hdmi_out_con: endpoint {
+ remote-endpoint = <&hdmi_con_in>;
+ };
+};
+
&i2c0 {
pinctrl-names = "default";
pinctrl-0 = <&i2c0_pins_a>;
status = "okay";
axp209: pmic at 34 {
- compatible = "x-powers,axp209";
reg = <0x34>;
interrupt-parent = <&nmi_intc>;
interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
-
- interrupt-controller;
- #interrupt-cells = <1>;
-
- acin-supply = <®_axp_ipsout>;
- vin2-supply = <®_axp_ipsout>;
- vin3-supply = <®_axp_ipsout>;
- ldo24in-supply = <®_axp_ipsout>;
- ldo3in-supply = <®_axp_ipsout>;
-
- regulators {
- vdd_rtc: ldo1 {
- regulator-min-microvolt = <1300000>;
- regulator-max-microvolt = <1300000>;
- regulator-always-on;
- };
-
- avcc: ldo2 {
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <3300000>;
- regulator-always-on;
- };
-
- vcc_csi0: ldo3 {
- regulator-min-microvolt = <700000>;
- regulator-max-microvolt = <3500000>;
- regulator-always-on;
- };
-
- vcc_csi1: ldo4 {
- regulator-min-microvolt = <1250000>;
- regulator-max-microvolt = <3300000>;
- regulator-always-on;
- };
-
- vdd_cpu: dcdc2 {
- regulator-min-microvolt = <700000>;
- regulator-max-microvolt = <2275000>;
- regulator-always-on;
- };
-
- vdd_int: dcdc3 {
- regulator-min-microvolt = <700000>;
- regulator-max-microvolt = <3500000>;
- regulator-always-on;
- };
- };
};
};
@@ -180,11 +156,10 @@
&mmc0 {
pinctrl-names = "default";
- pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_reference_design>;
+ pinctrl-0 = <&mmc0_pins_a>;
vmmc-supply = <®_vcc3v3>;
bus-width = <4>;
- cd-gpios = <&pio 7 1 GPIO_ACTIVE_HIGH>; /* PH1 */
- cd-inverted;
+ cd-gpios = <&pio 7 1 GPIO_ACTIVE_LOW>; /* PH1 */
status = "okay";
};
@@ -202,38 +177,31 @@
&pio {
ahci_pwr_pin_olinuxinolime: ahci_pwr_pin at 1 {
- allwinner,pins = "PC3";
- allwinner,function = "gpio_out";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ pins = "PC3";
+ function = "gpio_out";
};
led_pins_olinuxinolime: led_pins at 0 {
- allwinner,pins = "PH2";
- allwinner,function = "gpio_out";
- allwinner,drive = <SUN4I_PINCTRL_20_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ pins = "PH2";
+ function = "gpio_out";
+ drive-strength = <20>;
};
usb0_id_detect_pin: usb0_id_detect_pin at 0 {
- allwinner,pins = "PH4";
- allwinner,function = "gpio_in";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+ pins = "PH4";
+ function = "gpio_in";
+ bias-pull-up;
};
usb0_vbus_detect_pin: usb0_vbus_detect_pin at 0 {
- allwinner,pins = "PH5";
- allwinner,function = "gpio_in";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_PULL_DOWN>;
+ pins = "PH5";
+ function = "gpio_in";
+ bias-pull-down;
};
usb0_vbus_pin_lime2: usb0_vbus_pin at 0 {
- allwinner,pins = "PC17";
- allwinner,function = "gpio_out";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ pins = "PC17";
+ function = "gpio_out";
};
};
@@ -243,6 +211,48 @@
status = "okay";
};
+#include "axp209.dtsi"
+
+®_dcdc2 {
+ regulator-always-on;
+ regulator-min-microvolt = <1000000>;
+ regulator-max-microvolt = <1400000>;
+ regulator-name = "vdd-cpu";
+};
+
+®_dcdc3 {
+ regulator-always-on;
+ regulator-min-microvolt = <1000000>;
+ regulator-max-microvolt = <1400000>;
+ regulator-name = "vdd-int-dll";
+};
+
+®_ldo1 {
+ regulator-always-on;
+ regulator-min-microvolt = <1300000>;
+ regulator-max-microvolt = <1300000>;
+ regulator-name = "vdd-rtc";
+};
+
+®_ldo2 {
+ regulator-always-on;
+ regulator-min-microvolt = <3000000>;
+ regulator-max-microvolt = <3000000>;
+ regulator-name = "avcc";
+};
+
+®_ldo3 {
+ regulator-min-microvolt = <2800000>;
+ regulator-max-microvolt = <2800000>;
+ regulator-name = "vddio-csi0";
+};
+
+®_ldo4 {
+ regulator-min-microvolt = <2800000>;
+ regulator-max-microvolt = <2800000>;
+ regulator-name = "vddio-csi1";
+};
+
®_usb0_vbus {
pinctrl-0 = <&usb0_vbus_pin_lime2>;
gpio = <&pio 2 17 GPIO_ACTIVE_HIGH>;
diff --git a/arch/arm/dts/sun7i-a20-olinuxino-micro.dts b/arch/arm/dts/sun7i-a20-olinuxino-micro.dts
index 7e3006f6a7..866d230593 100644
--- a/arch/arm/dts/sun7i-a20-olinuxino-micro.dts
+++ b/arch/arm/dts/sun7i-a20-olinuxino-micro.dts
@@ -49,7 +49,6 @@
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/interrupt-controller/irq.h>
-#include <dt-bindings/pinctrl/sun4i-a10.h>
/ {
model = "Olimex A20-Olinuxino Micro";
@@ -67,6 +66,17 @@
stdout-path = "serial0:115200n8";
};
+ hdmi-connector {
+ compatible = "hdmi-connector";
+ type = "a";
+
+ port {
+ hdmi_con_in: endpoint {
+ remote-endpoint = <&hdmi_out_con>;
+ };
+ };
+ };
+
leds {
compatible = "gpio-leds";
pinctrl-names = "default";
@@ -85,6 +95,18 @@
status = "okay";
};
+&codec {
+ status = "okay";
+};
+
+&cpu0 {
+ cpu-supply = <®_dcdc2>;
+};
+
+&de {
+ status = "okay";
+};
+
&ehci0 {
status = "okay";
};
@@ -95,7 +117,7 @@
&gmac {
pinctrl-names = "default";
- pinctrl-0 = <&gmac_pins_mii_a>;
+ pinctrl-0 = <&gmac_pins_mii_a>, <&gmac_txerr>;
phy = <&phy1>;
phy-mode = "mii";
status = "okay";
@@ -105,19 +127,25 @@
};
};
+&hdmi {
+ status = "okay";
+};
+
+&hdmi_out {
+ hdmi_out_con: endpoint {
+ remote-endpoint = <&hdmi_con_in>;
+ };
+};
+
&i2c0 {
pinctrl-names = "default";
pinctrl-0 = <&i2c0_pins_a>;
status = "okay";
axp209: pmic at 34 {
- compatible = "x-powers,axp209";
reg = <0x34>;
interrupt-parent = <&nmi_intc>;
interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
-
- interrupt-controller;
- #interrupt-cells = <1>;
};
};
@@ -195,11 +223,10 @@
&mmc0 {
pinctrl-names = "default";
- pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_reference_design>;
+ pinctrl-0 = <&mmc0_pins_a>;
vmmc-supply = <®_vcc3v3>;
bus-width = <4>;
- cd-gpios = <&pio 7 1 GPIO_ACTIVE_HIGH>; /* PH1 */
- cd-inverted;
+ cd-gpios = <&pio 7 1 GPIO_ACTIVE_LOW>; /* PH1 */
status = "okay";
};
@@ -208,8 +235,7 @@
pinctrl-0 = <&mmc3_pins_a>, <&mmc3_cd_pin_olinuxinom>;
vmmc-supply = <®_vcc3v3>;
bus-width = <4>;
- cd-gpios = <&pio 7 11 GPIO_ACTIVE_HIGH>; /* PH11 */
- cd-inverted;
+ cd-gpios = <&pio 7 11 GPIO_ACTIVE_LOW>; /* PH11 */
status = "okay";
};
@@ -226,35 +252,67 @@
};
&pio {
+ gmac_txerr: gmac_txerr at 0 {
+ pins = "PA17";
+ function = "gmac";
+ };
+
mmc3_cd_pin_olinuxinom: mmc3_cd_pin at 0 {
- allwinner,pins = "PH11";
- allwinner,function = "gpio_in";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+ pins = "PH11";
+ function = "gpio_in";
+ bias-pull-up;
};
led_pins_olinuxino: led_pins at 0 {
- allwinner,pins = "PH2";
- allwinner,function = "gpio_out";
- allwinner,drive = <SUN4I_PINCTRL_20_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ pins = "PH2";
+ function = "gpio_out";
+ drive-strength = <20>;
};
usb0_id_detect_pin: usb0_id_detect_pin at 0 {
- allwinner,pins = "PH4";
- allwinner,function = "gpio_in";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+ pins = "PH4";
+ function = "gpio_in";
+ bias-pull-up;
};
usb0_vbus_detect_pin: usb0_vbus_detect_pin at 0 {
- allwinner,pins = "PH5";
- allwinner,function = "gpio_in";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_PULL_DOWN>;
+ pins = "PH5";
+ function = "gpio_in";
+ bias-pull-down;
};
};
+#include "axp209.dtsi"
+
+&ac_power_supply {
+ status = "okay";
+};
+
+&battery_power_supply {
+ status = "okay";
+};
+
+®_dcdc2 {
+ regulator-always-on;
+ regulator-min-microvolt = <1000000>;
+ regulator-max-microvolt = <1400000>;
+ regulator-name = "vdd-cpu";
+};
+
+®_dcdc3 {
+ regulator-always-on;
+ regulator-min-microvolt = <1000000>;
+ regulator-max-microvolt = <1400000>;
+ regulator-name = "vdd-int-dll";
+};
+
+®_ldo2 {
+ regulator-always-on;
+ regulator-min-microvolt = <3000000>;
+ regulator-max-microvolt = <3000000>;
+ regulator-name = "avcc";
+};
+
®_ahci_5v {
status = "okay";
};
@@ -308,6 +366,10 @@
status = "okay";
};
+&usb_power_supply {
+ status = "okay";
+};
+
&usbphy {
pinctrl-names = "default";
pinctrl-0 = <&usb0_id_detect_pin>, <&usb0_vbus_detect_pin>;
diff --git a/arch/arm/dts/sun7i-a20-orangepi-mini.dts b/arch/arm/dts/sun7i-a20-orangepi-mini.dts
index 2be04c438b..f5c7178eb0 100644
--- a/arch/arm/dts/sun7i-a20-orangepi-mini.dts
+++ b/arch/arm/dts/sun7i-a20-orangepi-mini.dts
@@ -48,7 +48,6 @@
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/irq.h>
-#include <dt-bindings/pinctrl/sun4i-a10.h>
/ {
model = "Orange Pi Mini";
@@ -62,6 +61,17 @@
stdout-path = "serial0:115200n8";
};
+ hdmi-connector {
+ compatible = "hdmi-connector";
+ type = "a";
+
+ port {
+ hdmi_con_in: endpoint {
+ remote-endpoint = <&hdmi_out_con>;
+ };
+ };
+ };
+
leds {
compatible = "gpio-leds";
pinctrl-names = "default";
@@ -99,6 +109,10 @@
status = "okay";
};
+&de {
+ status = "okay";
+};
+
&ehci0 {
status = "okay";
};
@@ -120,6 +134,16 @@
};
};
+&hdmi {
+ status = "okay";
+};
+
+&hdmi_out {
+ hdmi_out_con: endpoint {
+ remote-endpoint = <&hdmi_con_in>;
+ };
+};
+
&i2c0 {
pinctrl-names = "default";
pinctrl-0 = <&i2c0_pins_a>;
@@ -145,8 +169,7 @@
pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_orangepi>;
vmmc-supply = <®_vcc3v3>;
bus-width = <4>;
- cd-gpios = <&pio 7 10 GPIO_ACTIVE_HIGH>; /* PH10 */
- cd-inverted;
+ cd-gpios = <&pio 7 10 GPIO_ACTIVE_LOW>; /* PH10 */
status = "okay";
};
@@ -155,8 +178,7 @@
pinctrl-0 = <&mmc3_pins_a>, <&mmc3_cd_pin_orangepi>;
vmmc-supply = <®_vcc3v3>;
bus-width = <4>;
- cd-gpios = <&pio 7 11 GPIO_ACTIVE_HIGH>; /* PH11 */
- cd-inverted;
+ cd-gpios = <&pio 7 11 GPIO_ACTIVE_LOW>; /* PH11 */
status = "okay";
};
@@ -166,52 +188,41 @@
&pio {
usb0_id_detect_pin: usb0_id_detect_pin at 0 {
- allwinner,pins = "PH4";
- allwinner,function = "gpio_in";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+ pins = "PH4";
+ function = "gpio_in";
+ bias-pull-up;
};
mmc0_cd_pin_orangepi: mmc0_cd_pin at 0 {
- allwinner,pins = "PH10";
- allwinner,function = "gpio_in";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+ pins = "PH10";
+ function = "gpio_in";
+ bias-pull-up;
};
mmc3_cd_pin_orangepi: mmc3_cd_pin at 0 {
- allwinner,pins = "PH11";
- allwinner,function = "gpio_in";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+ pins = "PH11";
+ function = "gpio_in";
+ bias-pull-up;
};
usb2_vbus_pin_bananapro: usb2_vbus_pin at 0 {
- allwinner,pins = "PH22";
- allwinner,function = "gpio_out";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ pins = "PH22";
+ function = "gpio_out";
};
gmac_power_pin_orangepi: gmac_power_pin at 0 {
- allwinner,pins = "PH23";
- allwinner,function = "gpio_out";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ pins = "PH23";
+ function = "gpio_out";
};
led_pins_orangepi: led_pins at 0 {
- allwinner,pins = "PH24", "PH25";
- allwinner,function = "gpio_out";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ pins = "PH24", "PH25";
+ function = "gpio_out";
};
usb1_vbus_pin_bananapro: usb1_vbus_pin at 0 {
- allwinner,pins = "PH26";
- allwinner,function = "gpio_out";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ pins = "PH26";
+ function = "gpio_out";
};
};
diff --git a/arch/arm/dts/sun7i-a20-orangepi.dts b/arch/arm/dts/sun7i-a20-orangepi.dts
index 71125bf645..7a4244e575 100644
--- a/arch/arm/dts/sun7i-a20-orangepi.dts
+++ b/arch/arm/dts/sun7i-a20-orangepi.dts
@@ -48,7 +48,6 @@
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/irq.h>
-#include <dt-bindings/pinctrl/sun4i-a10.h>
/ {
model = "Orange Pi";
@@ -136,8 +135,7 @@
pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_orangepi>;
vmmc-supply = <®_vcc3v3>;
bus-width = <4>;
- cd-gpios = <&pio 7 10 GPIO_ACTIVE_HIGH>; /* PH10 */
- cd-inverted;
+ cd-gpios = <&pio 7 10 GPIO_ACTIVE_LOW>; /* PH10 */
status = "okay";
};
@@ -147,45 +145,35 @@
&pio {
usb0_id_detect_pin: usb0_id_detect_pin at 0 {
- allwinner,pins = "PH4";
- allwinner,function = "gpio_in";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+ pins = "PH4";
+ function = "gpio_in";
+ bias-pull-up;
};
mmc0_cd_pin_orangepi: mmc0_cd_pin at 0 {
- allwinner,pins = "PH10";
- allwinner,function = "gpio_in";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+ pins = "PH10";
+ function = "gpio_in";
+ bias-pull-up;
};
usb2_vbus_pin_bananapro: usb2_vbus_pin at 0 {
- allwinner,pins = "PH22";
- allwinner,function = "gpio_out";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ pins = "PH22";
+ function = "gpio_out";
};
gmac_power_pin_orangepi: gmac_power_pin at 0 {
- allwinner,pins = "PH23";
- allwinner,function = "gpio_out";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ pins = "PH23";
+ function = "gpio_out";
};
led_pins_orangepi: led_pins at 0 {
- allwinner,pins = "PH24";
- allwinner,function = "gpio_out";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ pins = "PH24";
+ function = "gpio_out";
};
usb1_vbus_pin_bananapro: usb1_vbus_pin at 0 {
- allwinner,pins = "PH26";
- allwinner,function = "gpio_out";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ pins = "PH26";
+ function = "gpio_out";
};
};
diff --git a/arch/arm/dts/sun7i-a20-pcduino3-nano.dts b/arch/arm/dts/sun7i-a20-pcduino3-nano.dts
index ddac7328b8..bfca960b03 100644
--- a/arch/arm/dts/sun7i-a20-pcduino3-nano.dts
+++ b/arch/arm/dts/sun7i-a20-pcduino3-nano.dts
@@ -58,6 +58,17 @@
stdout-path = "serial0:115200n8";
};
+ hdmi-connector {
+ compatible = "hdmi-connector";
+ type = "a";
+
+ port {
+ hdmi_con_in: endpoint {
+ remote-endpoint = <&hdmi_out_con>;
+ };
+ };
+ };
+
leds {
compatible = "gpio-leds";
pinctrl-names = "default";
@@ -90,6 +101,10 @@
cpu-supply = <®_dcdc2>;
};
+&de {
+ status = "okay";
+};
+
&ehci0 {
status = "okay";
};
@@ -110,6 +125,16 @@
};
};
+&hdmi {
+ status = "okay";
+};
+
+&hdmi_out {
+ hdmi_out_con: endpoint {
+ remote-endpoint = <&hdmi_con_in>;
+ };
+};
+
&i2c0 {
pinctrl-names = "default";
pinctrl-0 = <&i2c0_pins_a>;
@@ -130,11 +155,10 @@
&mmc0 {
pinctrl-names = "default";
- pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_reference_design>;
+ pinctrl-0 = <&mmc0_pins_a>;
vmmc-supply = <®_vcc3v3>;
bus-width = <4>;
- cd-gpios = <&pio 7 1 GPIO_ACTIVE_HIGH>; /* PH1 */
- cd-inverted;
+ cd-gpios = <&pio 7 1 GPIO_ACTIVE_LOW>; /* PH1 */
status = "okay";
};
@@ -152,31 +176,24 @@
&pio {
ahci_pwr_pin_pcduino3_nano: ahci_pwr_pin at 0 {
- allwinner,pins = "PH2";
- allwinner,function = "gpio_out";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ pins = "PH2";
+ function = "gpio_out";
};
led_pins_pcduino3_nano: led_pins at 0 {
- allwinner,pins = "PH16", "PH15";
- allwinner,function = "gpio_out";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ pins = "PH16", "PH15";
+ function = "gpio_out";
};
usb0_id_detect_pin: usb0_id_detect_pin at 0 {
- allwinner,pins = "PH4";
- allwinner,function = "gpio_in";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+ pins = "PH4";
+ function = "gpio_in";
+ bias-pull-up;
};
usb1_vbus_pin_pcduino3_nano: usb1_vbus_pin at 0 {
- allwinner,pins = "PD2";
- allwinner,function = "gpio_out";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ pins = "PD2";
+ function = "gpio_out";
};
};
diff --git a/arch/arm/dts/sun7i-a20-pcduino3.dts b/arch/arm/dts/sun7i-a20-pcduino3.dts
index 7f449b6a28..c576f101fb 100644
--- a/arch/arm/dts/sun7i-a20-pcduino3.dts
+++ b/arch/arm/dts/sun7i-a20-pcduino3.dts
@@ -48,7 +48,6 @@
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/interrupt-controller/irq.h>
-#include <dt-bindings/pinctrl/sun4i-a10.h>
/ {
model = "LinkSprite pcDuino3";
@@ -107,10 +106,6 @@
status = "okay";
};
-&ahci_pwr_pin_a {
- allwinner,pins = "PH2";
-};
-
&codec {
status = "okay";
};
@@ -161,7 +156,7 @@
&mmc0 {
pinctrl-names = "default";
- pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_reference_design>;
+ pinctrl-0 = <&mmc0_pins_a>;
vmmc-supply = <®_vcc3v3>;
bus-width = <4>;
cd-gpios = <&pio 7 1 GPIO_ACTIVE_LOW>; /* PH1 */
@@ -182,24 +177,19 @@
&pio {
led_pins_pcduino3: led_pins at 0 {
- allwinner,pins = "PH15", "PH16";
- allwinner,function = "gpio_out";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ pins = "PH15", "PH16";
+ function = "gpio_out";
};
key_pins_pcduino3: key_pins at 0 {
- allwinner,pins = "PH17", "PH18", "PH19";
- allwinner,function = "gpio_in";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ pins = "PH17", "PH18", "PH19";
+ function = "gpio_in";
};
usb0_id_detect_pin: usb0_id_detect_pin at 0 {
- allwinner,pins = "PH4";
- allwinner,function = "gpio_in";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+ pins = "PH4";
+ function = "gpio_in";
+ bias-pull-up;
};
};
diff --git a/arch/arm/dts/sun7i-a20-primo73.dts b/arch/arm/dts/sun7i-a20-primo73.dts
index 0658f82675..b7294e0348 100644
--- a/arch/arm/dts/sun7i-a20-primo73.dts
+++ b/arch/arm/dts/sun7i-a20-primo73.dts
@@ -60,43 +60,33 @@
chosen {
stdout-path = "serial0:115200n8";
};
+};
- soc at 01c00000 {
- mmc0: mmc at 01c0f000 {
- pinctrl-names = "default";
- pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_reference_design>;
- vmmc-supply = <®_vcc3v3>;
- bus-width = <4>;
- cd-gpios = <&pio 7 1 0>; /* PH1 */
- cd-inverted;
- status = "okay";
- };
-
- usbphy: phy at 01c13400 {
- usb2_vbus-supply = <®_usb2_vbus>;
- status = "okay";
- };
+&ehci1 {
+ status = "okay";
+};
- ehci1: usb at 01c1c000 {
- /* rtl8188etv wifi is connected here */
- status = "okay";
- };
+&mmc0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&mmc0_pins_a>;
+ vmmc-supply = <®_vcc3v3>;
+ bus-width = <4>;
+ cd-gpios = <&pio 7 1 GPIO_ACTIVE_LOW>; /* PH1 */
+ status = "okay";
+};
- pinctrl at 01c20800 {
- usb2_vbus_pin_a: usb2_vbus_pin at 0 {
- allwinner,pins = "PH12";
- };
- };
+®_usb2_vbus {
+ gpio = <&pio 7 12 0>; /* PH12 */
+ status = "okay";
+};
- uart0: serial at 01c28000 {
- pinctrl-names = "default";
- pinctrl-0 = <&uart0_pins_a>;
- status = "okay";
- };
- };
+&uart0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart0_pins_a>;
+ status = "okay";
+};
- reg_usb2_vbus: usb2-vbus {
- gpio = <&pio 7 12 0>; /* PH12 */
- status = "okay";
- };
+&usbphy {
+ usb2_vbus-supply = <®_usb2_vbus>;
+ status = "okay";
};
diff --git a/arch/arm/dts/sun7i-a20-wexler-tab7200.dts b/arch/arm/dts/sun7i-a20-wexler-tab7200.dts
index 2f6b21addd..8202c87ca6 100644
--- a/arch/arm/dts/sun7i-a20-wexler-tab7200.dts
+++ b/arch/arm/dts/sun7i-a20-wexler-tab7200.dts
@@ -151,11 +151,10 @@
&mmc0 {
pinctrl-names = "default";
- pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_reference_design>;
+ pinctrl-0 = <&mmc0_pins_a>;
vmmc-supply = <®_vcc3v3>;
bus-width = <4>;
- cd-gpios = <&pio 7 1 GPIO_ACTIVE_HIGH>; /* PH1 */
- cd-inverted;
+ cd-gpios = <&pio 7 1 GPIO_ACTIVE_LOW>; /* PH1 */
status = "okay";
};
@@ -173,31 +172,24 @@
&pio {
bl_enable_pin: bl_enable_pin at 0 {
- allwinner,pins = "PH7";
- allwinner,function = "gpio_out";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ pins = "PH7";
+ function = "gpio_out";
};
codec_pa_pin: codec_pa_pin at 0 {
- allwinner,pins = "PH15";
- allwinner,function = "gpio_out";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ pins = "PH15";
+ function = "gpio_out";
};
ts_reset_pin: ts_reset_pin at 0 {
- allwinner,pins = "PB13";
- allwinner,function = "gpio_out";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ pins = "PB13";
+ function = "gpio_out";
};
usb0_id_detect_pin: usb0_id_detect_pin at 0 {
- allwinner,pins = "PH4";
- allwinner,function = "gpio_in";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+ pins = "PH4";
+ function = "gpio_in";
+ bias-pull-up;
};
};
diff --git a/arch/arm/dts/sun7i-a20-wits-pro-a20-dkt.dts b/arch/arm/dts/sun7i-a20-wits-pro-a20-dkt.dts
index dc31d476ef..ff5c108658 100644
--- a/arch/arm/dts/sun7i-a20-wits-pro-a20-dkt.dts
+++ b/arch/arm/dts/sun7i-a20-wits-pro-a20-dkt.dts
@@ -120,11 +120,10 @@
&mmc0 {
pinctrl-names = "default";
- pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_reference_design>;
+ pinctrl-0 = <&mmc0_pins_a>;
vmmc-supply = <®_vcc3v3>;
bus-width = <4>;
- cd-gpios = <&pio 7 1 GPIO_ACTIVE_HIGH>; /* PH1 */
- cd-inverted;
+ cd-gpios = <&pio 7 1 GPIO_ACTIVE_LOW>; /* PH1 */
status = "okay";
};
@@ -137,7 +136,7 @@
non-removable;
status = "okay";
- brcmf: bcrmf at 1 {
+ brcmf: wifi at 1 {
reg = <1>;
compatible = "brcm,bcm4329-fmac";
interrupt-parent = <&pio>;
@@ -160,17 +159,14 @@
&pio {
vmmc3_pin_ap6xxx_wl_regon: vmmc3_pin at 0 {
- allwinner,pins = "PH9";
- allwinner,function = "gpio_out";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ pins = "PH9";
+ function = "gpio_out";
};
usb0_id_detect_pin: usb0_id_detect_pin at 0 {
- allwinner,pins = "PH4";
- allwinner,function = "gpio_in";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+ pins = "PH4";
+ function = "gpio_in";
+ bias-pull-up;
};
};
diff --git a/arch/arm/dts/sun7i-a20.dtsi b/arch/arm/dts/sun7i-a20.dtsi
index 4394711e5a..e529e4ff21 100644
--- a/arch/arm/dts/sun7i-a20.dtsi
+++ b/arch/arm/dts/sun7i-a20.dtsi
@@ -46,10 +46,9 @@
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/thermal/thermal.h>
-
-#include <dt-bindings/clock/sun4i-a10-pll2.h>
#include <dt-bindings/dma/sun4i-a10.h>
-#include <dt-bindings/pinctrl/sun4i-a10.h>
+#include <dt-bindings/clock/sun7i-a20-ccu.h>
+#include <dt-bindings/reset/sun4i-a10-ccu.h>
/ {
interrupt-parent = <&gic>;
@@ -67,9 +66,10 @@
compatible = "allwinner,simple-framebuffer",
"simple-framebuffer";
allwinner,pipeline = "de_be0-lcd0-hdmi";
- clocks = <&ahb_gates 36>, <&ahb_gates 43>,
- <&ahb_gates 44>, <&de_be0_clk>,
- <&tcon0_ch1_clk>, <&dram_gates 26>;
+ clocks = <&ccu CLK_AHB_LCD0>, <&ccu CLK_AHB_HDMI0>,
+ <&ccu CLK_AHB_DE_BE0>, <&ccu CLK_DE_BE0>,
+ <&ccu CLK_TCON0_CH1>, <&ccu CLK_DRAM_DE_BE0>,
+ <&ccu CLK_HDMI>;
status = "disabled";
};
@@ -77,9 +77,9 @@
compatible = "allwinner,simple-framebuffer",
"simple-framebuffer";
allwinner,pipeline = "de_be0-lcd0";
- clocks = <&ahb_gates 36>, <&ahb_gates 44>,
- <&de_be0_clk>, <&tcon0_ch0_clk>,
- <&dram_gates 26>;
+ clocks = <&ccu CLK_AHB_LCD0>, <&ccu CLK_AHB_DE_BE0>,
+ <&ccu CLK_DE_BE0>, <&ccu CLK_TCON0_CH0>,
+ <&ccu CLK_DRAM_DE_BE0>;
status = "disabled";
};
@@ -87,10 +87,10 @@
compatible = "allwinner,simple-framebuffer",
"simple-framebuffer";
allwinner,pipeline = "de_be0-lcd0-tve0";
- clocks = <&ahb_gates 34>, <&ahb_gates 36>,
- <&ahb_gates 44>,
- <&de_be0_clk>, <&tcon0_ch1_clk>,
- <&dram_gates 5>, <&dram_gates 26>;
+ clocks = <&ccu CLK_AHB_TVE0>, <&ccu CLK_AHB_LCD0>,
+ <&ccu CLK_AHB_DE_BE0>,
+ <&ccu CLK_DE_BE0>, <&ccu CLK_TCON0_CH1>,
+ <&ccu CLK_DRAM_TVE0>, <&ccu CLK_DRAM_DE_BE0>;
status = "disabled";
};
};
@@ -103,7 +103,7 @@
compatible = "arm,cortex-a7";
device_type = "cpu";
reg = <0>;
- clocks = <&cpu>;
+ clocks = <&ccu CLK_CPU>;
clock-latency = <244144>; /* 8 32k periods */
operating-points = <
/* kHz uV */
@@ -116,8 +116,6 @@
144000 1000000
>;
#cooling-cells = <2>;
- cooling-min-level = <0>;
- cooling-max-level = <6>;
};
cpu at 1 {
@@ -182,23 +180,13 @@
#size-cells = <1>;
ranges;
- osc24M: clk at 01c20050 {
+ osc24M: clk at 1c20050 {
#clock-cells = <0>;
- compatible = "allwinner,sun4i-a10-osc-clk";
- reg = <0x01c20050 0x4>;
+ compatible = "fixed-clock";
clock-frequency = <24000000>;
clock-output-names = "osc24M";
};
- osc3M: osc3M_clk {
- #clock-cells = <0>;
- compatible = "fixed-factor-clock";
- clock-div = <8>;
- clock-mult = <1>;
- clocks = <&osc24M>;
- clock-output-names = "osc3M";
- };
-
osc32k: clk at 0 {
#clock-cells = <0>;
compatible = "fixed-clock";
@@ -206,528 +194,6 @@
clock-output-names = "osc32k";
};
- pll1: clk at 01c20000 {
- #clock-cells = <0>;
- compatible = "allwinner,sun4i-a10-pll1-clk";
- reg = <0x01c20000 0x4>;
- clocks = <&osc24M>;
- clock-output-names = "pll1";
- };
-
- pll2: clk at 01c20008 {
- #clock-cells = <1>;
- compatible = "allwinner,sun4i-a10-pll2-clk";
- reg = <0x01c20008 0x8>;
- clocks = <&osc24M>;
- clock-output-names = "pll2-1x", "pll2-2x",
- "pll2-4x", "pll2-8x";
- };
-
- pll3: clk at 01c20010 {
- #clock-cells = <0>;
- compatible = "allwinner,sun4i-a10-pll3-clk";
- reg = <0x01c20010 0x4>;
- clocks = <&osc3M>;
- clock-output-names = "pll3";
- };
-
- pll3x2: pll3x2_clk {
- #clock-cells = <0>;
- compatible = "fixed-factor-clock";
- clocks = <&pll3>;
- clock-div = <1>;
- clock-mult = <2>;
- clock-output-names = "pll3-2x";
- };
-
- pll4: clk at 01c20018 {
- #clock-cells = <0>;
- compatible = "allwinner,sun7i-a20-pll4-clk";
- reg = <0x01c20018 0x4>;
- clocks = <&osc24M>;
- clock-output-names = "pll4";
- };
-
- pll5: clk at 01c20020 {
- #clock-cells = <1>;
- compatible = "allwinner,sun4i-a10-pll5-clk";
- reg = <0x01c20020 0x4>;
- clocks = <&osc24M>;
- clock-output-names = "pll5_ddr", "pll5_other";
- };
-
- pll6: clk at 01c20028 {
- #clock-cells = <1>;
- compatible = "allwinner,sun4i-a10-pll6-clk";
- reg = <0x01c20028 0x4>;
- clocks = <&osc24M>;
- clock-output-names = "pll6_sata", "pll6_other", "pll6",
- "pll6_div_4";
- };
-
- pll7: clk at 01c20030 {
- #clock-cells = <0>;
- compatible = "allwinner,sun4i-a10-pll3-clk";
- reg = <0x01c20030 0x4>;
- clocks = <&osc3M>;
- clock-output-names = "pll7";
- };
-
- pll7x2: pll7x2_clk {
- #clock-cells = <0>;
- compatible = "fixed-factor-clock";
- clocks = <&pll7>;
- clock-div = <1>;
- clock-mult = <2>;
- clock-output-names = "pll7-2x";
- };
-
- pll8: clk at 01c20040 {
- #clock-cells = <0>;
- compatible = "allwinner,sun7i-a20-pll4-clk";
- reg = <0x01c20040 0x4>;
- clocks = <&osc24M>;
- clock-output-names = "pll8";
- };
-
- cpu: cpu at 01c20054 {
- #clock-cells = <0>;
- compatible = "allwinner,sun4i-a10-cpu-clk";
- reg = <0x01c20054 0x4>;
- clocks = <&osc32k>, <&osc24M>, <&pll1>, <&pll6 1>;
- clock-output-names = "cpu";
- };
-
- axi: axi at 01c20054 {
- #clock-cells = <0>;
- compatible = "allwinner,sun4i-a10-axi-clk";
- reg = <0x01c20054 0x4>;
- clocks = <&cpu>;
- clock-output-names = "axi";
- };
-
- ahb: ahb at 01c20054 {
- #clock-cells = <0>;
- compatible = "allwinner,sun5i-a13-ahb-clk";
- reg = <0x01c20054 0x4>;
- clocks = <&axi>, <&pll6 3>, <&pll6 1>;
- clock-output-names = "ahb";
- /*
- * Use PLL6 as parent, instead of CPU/AXI
- * which has rate changes due to cpufreq
- */
- assigned-clocks = <&ahb>;
- assigned-clock-parents = <&pll6 3>;
- };
-
- ahb_gates: clk at 01c20060 {
- #clock-cells = <1>;
- compatible = "allwinner,sun7i-a20-ahb-gates-clk";
- reg = <0x01c20060 0x8>;
- clocks = <&ahb>;
- clock-indices = <0>, <1>,
- <2>, <3>, <4>,
- <5>, <6>, <7>, <8>,
- <9>, <10>, <11>, <12>,
- <13>, <14>, <16>,
- <17>, <18>, <20>, <21>,
- <22>, <23>, <25>,
- <28>, <32>, <33>, <34>,
- <35>, <36>, <37>, <40>,
- <41>, <42>, <43>,
- <44>, <45>, <46>,
- <47>, <49>, <50>,
- <52>;
- clock-output-names = "ahb_usb0", "ahb_ehci0",
- "ahb_ohci0", "ahb_ehci1", "ahb_ohci1",
- "ahb_ss", "ahb_dma", "ahb_bist", "ahb_mmc0",
- "ahb_mmc1", "ahb_mmc2", "ahb_mmc3", "ahb_ms",
- "ahb_nand", "ahb_sdram", "ahb_ace",
- "ahb_emac", "ahb_ts", "ahb_spi0", "ahb_spi1",
- "ahb_spi2", "ahb_spi3", "ahb_sata",
- "ahb_hstimer", "ahb_ve", "ahb_tvd", "ahb_tve0",
- "ahb_tve1", "ahb_lcd0", "ahb_lcd1", "ahb_csi0",
- "ahb_csi1", "ahb_hdmi1", "ahb_hdmi0",
- "ahb_de_be0", "ahb_de_be1", "ahb_de_fe0",
- "ahb_de_fe1", "ahb_gmac", "ahb_mp",
- "ahb_mali";
- };
-
- apb0: apb0 at 01c20054 {
- #clock-cells = <0>;
- compatible = "allwinner,sun4i-a10-apb0-clk";
- reg = <0x01c20054 0x4>;
- clocks = <&ahb>;
- clock-output-names = "apb0";
- };
-
- apb0_gates: clk at 01c20068 {
- #clock-cells = <1>;
- compatible = "allwinner,sun7i-a20-apb0-gates-clk";
- reg = <0x01c20068 0x4>;
- clocks = <&apb0>;
- clock-indices = <0>, <1>,
- <2>, <3>, <4>,
- <5>, <6>, <7>,
- <8>, <10>;
- clock-output-names = "apb0_codec", "apb0_spdif",
- "apb0_ac97", "apb0_i2s0", "apb0_i2s1",
- "apb0_pio", "apb0_ir0", "apb0_ir1",
- "apb0_i2s2", "apb0_keypad";
- };
-
- apb1: clk at 01c20058 {
- #clock-cells = <0>;
- compatible = "allwinner,sun4i-a10-apb1-clk";
- reg = <0x01c20058 0x4>;
- clocks = <&osc24M>, <&pll6 1>, <&osc32k>;
- clock-output-names = "apb1";
- };
-
- apb1_gates: clk at 01c2006c {
- #clock-cells = <1>;
- compatible = "allwinner,sun7i-a20-apb1-gates-clk";
- reg = <0x01c2006c 0x4>;
- clocks = <&apb1>;
- clock-indices = <0>, <1>,
- <2>, <3>, <4>,
- <5>, <6>, <7>,
- <15>, <16>, <17>,
- <18>, <19>, <20>,
- <21>, <22>, <23>;
- clock-output-names = "apb1_i2c0", "apb1_i2c1",
- "apb1_i2c2", "apb1_i2c3", "apb1_can",
- "apb1_scr", "apb1_ps20", "apb1_ps21",
- "apb1_i2c4", "apb1_uart0", "apb1_uart1",
- "apb1_uart2", "apb1_uart3", "apb1_uart4",
- "apb1_uart5", "apb1_uart6", "apb1_uart7";
- };
-
- nand_clk: clk at 01c20080 {
- #clock-cells = <0>;
- compatible = "allwinner,sun4i-a10-mod0-clk";
- reg = <0x01c20080 0x4>;
- clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
- clock-output-names = "nand";
- };
-
- ms_clk: clk at 01c20084 {
- #clock-cells = <0>;
- compatible = "allwinner,sun4i-a10-mod0-clk";
- reg = <0x01c20084 0x4>;
- clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
- clock-output-names = "ms";
- };
-
- mmc0_clk: clk at 01c20088 {
- #clock-cells = <1>;
- compatible = "allwinner,sun4i-a10-mmc-clk";
- reg = <0x01c20088 0x4>;
- clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
- clock-output-names = "mmc0",
- "mmc0_output",
- "mmc0_sample";
- };
-
- mmc1_clk: clk at 01c2008c {
- #clock-cells = <1>;
- compatible = "allwinner,sun4i-a10-mmc-clk";
- reg = <0x01c2008c 0x4>;
- clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
- clock-output-names = "mmc1",
- "mmc1_output",
- "mmc1_sample";
- };
-
- mmc2_clk: clk at 01c20090 {
- #clock-cells = <1>;
- compatible = "allwinner,sun4i-a10-mmc-clk";
- reg = <0x01c20090 0x4>;
- clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
- clock-output-names = "mmc2",
- "mmc2_output",
- "mmc2_sample";
- };
-
- mmc3_clk: clk at 01c20094 {
- #clock-cells = <1>;
- compatible = "allwinner,sun4i-a10-mmc-clk";
- reg = <0x01c20094 0x4>;
- clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
- clock-output-names = "mmc3",
- "mmc3_output",
- "mmc3_sample";
- };
-
- ts_clk: clk at 01c20098 {
- #clock-cells = <0>;
- compatible = "allwinner,sun4i-a10-mod0-clk";
- reg = <0x01c20098 0x4>;
- clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
- clock-output-names = "ts";
- };
-
- ss_clk: clk at 01c2009c {
- #clock-cells = <0>;
- compatible = "allwinner,sun4i-a10-mod0-clk";
- reg = <0x01c2009c 0x4>;
- clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
- clock-output-names = "ss";
- };
-
- spi0_clk: clk at 01c200a0 {
- #clock-cells = <0>;
- compatible = "allwinner,sun4i-a10-mod0-clk";
- reg = <0x01c200a0 0x4>;
- clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
- clock-output-names = "spi0";
- };
-
- spi1_clk: clk at 01c200a4 {
- #clock-cells = <0>;
- compatible = "allwinner,sun4i-a10-mod0-clk";
- reg = <0x01c200a4 0x4>;
- clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
- clock-output-names = "spi1";
- };
-
- spi2_clk: clk at 01c200a8 {
- #clock-cells = <0>;
- compatible = "allwinner,sun4i-a10-mod0-clk";
- reg = <0x01c200a8 0x4>;
- clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
- clock-output-names = "spi2";
- };
-
- pata_clk: clk at 01c200ac {
- #clock-cells = <0>;
- compatible = "allwinner,sun4i-a10-mod0-clk";
- reg = <0x01c200ac 0x4>;
- clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
- clock-output-names = "pata";
- };
-
- ir0_clk: clk at 01c200b0 {
- #clock-cells = <0>;
- compatible = "allwinner,sun4i-a10-mod0-clk";
- reg = <0x01c200b0 0x4>;
- clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
- clock-output-names = "ir0";
- };
-
- ir1_clk: clk at 01c200b4 {
- #clock-cells = <0>;
- compatible = "allwinner,sun4i-a10-mod0-clk";
- reg = <0x01c200b4 0x4>;
- clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
- clock-output-names = "ir1";
- };
-
- i2s0_clk: clk at 01c200b8 {
- #clock-cells = <0>;
- compatible = "allwinner,sun4i-a10-mod1-clk";
- reg = <0x01c200b8 0x4>;
- clocks = <&pll2 SUN4I_A10_PLL2_8X>,
- <&pll2 SUN4I_A10_PLL2_4X>,
- <&pll2 SUN4I_A10_PLL2_2X>,
- <&pll2 SUN4I_A10_PLL2_1X>;
- clock-output-names = "i2s0";
- };
-
- ac97_clk: clk at 01c200bc {
- #clock-cells = <0>;
- compatible = "allwinner,sun4i-a10-mod1-clk";
- reg = <0x01c200bc 0x4>;
- clocks = <&pll2 SUN4I_A10_PLL2_8X>,
- <&pll2 SUN4I_A10_PLL2_4X>,
- <&pll2 SUN4I_A10_PLL2_2X>,
- <&pll2 SUN4I_A10_PLL2_1X>;
- clock-output-names = "ac97";
- };
-
- spdif_clk: clk at 01c200c0 {
- #clock-cells = <0>;
- compatible = "allwinner,sun4i-a10-mod1-clk";
- reg = <0x01c200c0 0x4>;
- clocks = <&pll2 SUN4I_A10_PLL2_8X>,
- <&pll2 SUN4I_A10_PLL2_4X>,
- <&pll2 SUN4I_A10_PLL2_2X>,
- <&pll2 SUN4I_A10_PLL2_1X>;
- clock-output-names = "spdif";
- };
-
- keypad_clk: clk at 01c200c4 {
- #clock-cells = <0>;
- compatible = "allwinner,sun4i-a10-mod0-clk";
- reg = <0x01c200c4 0x4>;
- clocks = <&osc24M>;
- clock-output-names = "keypad";
- };
-
- usb_clk: clk at 01c200cc {
- #clock-cells = <1>;
- #reset-cells = <1>;
- compatible = "allwinner,sun4i-a10-usb-clk";
- reg = <0x01c200cc 0x4>;
- clocks = <&pll6 1>;
- clock-output-names = "usb_ohci0", "usb_ohci1",
- "usb_phy";
- };
-
- spi3_clk: clk at 01c200d4 {
- #clock-cells = <0>;
- compatible = "allwinner,sun4i-a10-mod0-clk";
- reg = <0x01c200d4 0x4>;
- clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
- clock-output-names = "spi3";
- };
-
- i2s1_clk: clk at 01c200d8 {
- #clock-cells = <0>;
- compatible = "allwinner,sun4i-a10-mod1-clk";
- reg = <0x01c200d8 0x4>;
- clocks = <&pll2 SUN4I_A10_PLL2_8X>,
- <&pll2 SUN4I_A10_PLL2_4X>,
- <&pll2 SUN4I_A10_PLL2_2X>,
- <&pll2 SUN4I_A10_PLL2_1X>;
- clock-output-names = "i2s1";
- };
-
- i2s2_clk: clk at 01c200dc {
- #clock-cells = <0>;
- compatible = "allwinner,sun4i-a10-mod1-clk";
- reg = <0x01c200dc 0x4>;
- clocks = <&pll2 SUN4I_A10_PLL2_8X>,
- <&pll2 SUN4I_A10_PLL2_4X>,
- <&pll2 SUN4I_A10_PLL2_2X>,
- <&pll2 SUN4I_A10_PLL2_1X>;
- clock-output-names = "i2s2";
- };
-
- dram_gates: clk at 01c20100 {
- #clock-cells = <1>;
- compatible = "allwinner,sun4i-a10-dram-gates-clk";
- reg = <0x01c20100 0x4>;
- clocks = <&pll5 0>;
- clock-indices = <0>,
- <1>, <2>,
- <3>,
- <4>,
- <5>, <6>,
- <15>,
- <24>, <25>,
- <26>, <27>,
- <28>, <29>;
- clock-output-names = "dram_ve",
- "dram_csi0", "dram_csi1",
- "dram_ts",
- "dram_tvd",
- "dram_tve0", "dram_tve1",
- "dram_output",
- "dram_de_fe1", "dram_de_fe0",
- "dram_de_be0", "dram_de_be1",
- "dram_de_mp", "dram_ace";
- };
-
- de_be0_clk: clk at 01c20104 {
- #clock-cells = <0>;
- #reset-cells = <0>;
- compatible = "allwinner,sun4i-a10-display-clk";
- reg = <0x01c20104 0x4>;
- clocks = <&pll3>, <&pll7>, <&pll5 1>;
- clock-output-names = "de-be0";
- };
-
- de_be1_clk: clk at 01c20108 {
- #clock-cells = <0>;
- #reset-cells = <0>;
- compatible = "allwinner,sun4i-a10-display-clk";
- reg = <0x01c20108 0x4>;
- clocks = <&pll3>, <&pll7>, <&pll5 1>;
- clock-output-names = "de-be1";
- };
-
- de_fe0_clk: clk at 01c2010c {
- #clock-cells = <0>;
- #reset-cells = <0>;
- compatible = "allwinner,sun4i-a10-display-clk";
- reg = <0x01c2010c 0x4>;
- clocks = <&pll3>, <&pll7>, <&pll5 1>;
- clock-output-names = "de-fe0";
- };
-
- de_fe1_clk: clk at 01c20110 {
- #clock-cells = <0>;
- #reset-cells = <0>;
- compatible = "allwinner,sun4i-a10-display-clk";
- reg = <0x01c20110 0x4>;
- clocks = <&pll3>, <&pll7>, <&pll5 1>;
- clock-output-names = "de-fe1";
- };
-
- tcon0_ch0_clk: clk at 01c20118 {
- #clock-cells = <0>;
- #reset-cells = <1>;
- compatible = "allwinner,sun4i-a10-tcon-ch0-clk";
- reg = <0x01c20118 0x4>;
- clocks = <&pll3>, <&pll7>, <&pll3x2>, <&pll7x2>;
- clock-output-names = "tcon0-ch0-sclk";
-
- };
-
- tcon1_ch0_clk: clk at 01c2011c {
- #clock-cells = <0>;
- #reset-cells = <1>;
- compatible = "allwinner,sun4i-a10-tcon-ch1-clk";
- reg = <0x01c2011c 0x4>;
- clocks = <&pll3>, <&pll7>, <&pll3x2>, <&pll7x2>;
- clock-output-names = "tcon1-ch0-sclk";
-
- };
-
- tcon0_ch1_clk: clk at 01c2012c {
- #clock-cells = <0>;
- compatible = "allwinner,sun4i-a10-tcon-ch0-clk";
- reg = <0x01c2012c 0x4>;
- clocks = <&pll3>, <&pll7>, <&pll3x2>, <&pll7x2>;
- clock-output-names = "tcon0-ch1-sclk";
-
- };
-
- tcon1_ch1_clk: clk at 01c20130 {
- #clock-cells = <0>;
- compatible = "allwinner,sun4i-a10-tcon-ch1-clk";
- reg = <0x01c20130 0x4>;
- clocks = <&pll3>, <&pll7>, <&pll3x2>, <&pll7x2>;
- clock-output-names = "tcon1-ch1-sclk";
-
- };
-
- ve_clk: clk at 01c2013c {
- #clock-cells = <0>;
- #reset-cells = <0>;
- compatible = "allwinner,sun4i-a10-ve-clk";
- reg = <0x01c2013c 0x4>;
- clocks = <&pll4>;
- clock-output-names = "ve";
- };
-
- codec_clk: clk at 01c20140 {
- #clock-cells = <0>;
- compatible = "allwinner,sun4i-a10-codec-clk";
- reg = <0x01c20140 0x4>;
- clocks = <&pll2 SUN4I_A10_PLL2_1X>;
- clock-output-names = "codec";
- };
-
- mbus_clk: clk at 01c2015c {
- #clock-cells = <0>;
- compatible = "allwinner,sun5i-a13-mbus-clk";
- reg = <0x01c2015c 0x4>;
- clocks = <&osc24M>, <&pll6 2>, <&pll5 1>;
- clock-output-names = "mbus";
- };
-
/*
* The following two are dummy clocks, placeholders
* used in the gmac_tx clock. The gmac driver will
@@ -737,71 +203,50 @@
* The actual TX clock rate is not controlled by the
* gmac_tx clock.
*/
- mii_phy_tx_clk: clk at 2 {
+ mii_phy_tx_clk: clk at 1 {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <25000000>;
clock-output-names = "mii_phy_tx";
};
- gmac_int_tx_clk: clk at 3 {
+ gmac_int_tx_clk: clk at 2 {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <125000000>;
clock-output-names = "gmac_int_tx";
};
- gmac_tx_clk: clk at 01c20164 {
+ gmac_tx_clk: clk at 1c20164 {
#clock-cells = <0>;
compatible = "allwinner,sun7i-a20-gmac-clk";
reg = <0x01c20164 0x4>;
clocks = <&mii_phy_tx_clk>, <&gmac_int_tx_clk>;
clock-output-names = "gmac_tx";
};
+ };
- /*
- * Dummy clock used by output clocks
- */
- osc24M_32k: clk at 1 {
- #clock-cells = <0>;
- compatible = "fixed-factor-clock";
- clock-div = <750>;
- clock-mult = <1>;
- clocks = <&osc24M>;
- clock-output-names = "osc24M_32k";
- };
-
- clk_out_a: clk at 01c201f0 {
- #clock-cells = <0>;
- compatible = "allwinner,sun7i-a20-out-clk";
- reg = <0x01c201f0 0x4>;
- clocks = <&osc24M_32k>, <&osc32k>, <&osc24M>;
- clock-output-names = "clk_out_a";
- };
- clk_out_b: clk at 01c201f4 {
- #clock-cells = <0>;
- compatible = "allwinner,sun7i-a20-out-clk";
- reg = <0x01c201f4 0x4>;
- clocks = <&osc24M_32k>, <&osc32k>, <&osc24M>;
- clock-output-names = "clk_out_b";
- };
+ de: display-engine {
+ compatible = "allwinner,sun7i-a20-display-engine";
+ allwinner,pipelines = <&fe0>, <&fe1>;
+ status = "disabled";
};
- soc at 01c00000 {
+ soc at 1c00000 {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
ranges;
- sram-controller at 01c00000 {
+ sram-controller at 1c00000 {
compatible = "allwinner,sun4i-a10-sram-controller";
reg = <0x01c00000 0x30>;
#address-cells = <1>;
#size-cells = <1>;
ranges;
- sram_a: sram at 00000000 {
+ sram_a: sram at 0 {
compatible = "mmio-sram";
reg = <0x00000000 0xc000>;
#address-cells = <1>;
@@ -815,14 +260,14 @@
};
};
- sram_d: sram at 00010000 {
+ sram_d: sram at 10000 {
compatible = "mmio-sram";
reg = <0x00010000 0x1000>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0 0x00010000 0x1000>;
- otg_sram: sram-section at 0000 {
+ otg_sram: sram-section at 0 {
compatible = "allwinner,sun4i-a10-sram-d";
reg = <0x0000 0x1000>;
status = "disabled";
@@ -830,7 +275,7 @@
};
};
- nmi_intc: interrupt-controller at 01c00030 {
+ nmi_intc: interrupt-controller at 1c00030 {
compatible = "allwinner,sun7i-a20-sc-nmi";
interrupt-controller;
#interrupt-cells = <2>;
@@ -838,19 +283,19 @@
interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>;
};
- dma: dma-controller at 01c02000 {
+ dma: dma-controller at 1c02000 {
compatible = "allwinner,sun4i-a10-dma";
reg = <0x01c02000 0x1000>;
interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&ahb_gates 6>;
+ clocks = <&ccu CLK_AHB_DMA>;
#dma-cells = <2>;
};
- nfc: nand at 01c03000 {
+ nfc: nand at 1c03000 {
compatible = "allwinner,sun4i-a10-nand";
reg = <0x01c03000 0x1000>;
interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&ahb_gates 13>, <&nand_clk>;
+ clocks = <&ccu CLK_AHB_NAND>, <&ccu CLK_NAND>;
clock-names = "ahb", "mod";
dmas = <&dma SUN4I_DMA_DEDICATED 3>;
dma-names = "rxtx";
@@ -859,11 +304,11 @@
#size-cells = <0>;
};
- spi0: spi at 01c05000 {
+ spi0: spi at 1c05000 {
compatible = "allwinner,sun4i-a10-spi";
reg = <0x01c05000 0x1000>;
interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&ahb_gates 20>, <&spi0_clk>;
+ clocks = <&ccu CLK_AHB_SPI0>, <&ccu CLK_SPI0>;
clock-names = "ahb", "mod";
dmas = <&dma SUN4I_DMA_DEDICATED 27>,
<&dma SUN4I_DMA_DEDICATED 26>;
@@ -871,13 +316,14 @@
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
+ num-cs = <4>;
};
- spi1: spi at 01c06000 {
+ spi1: spi at 1c06000 {
compatible = "allwinner,sun4i-a10-spi";
reg = <0x01c06000 0x1000>;
interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&ahb_gates 21>, <&spi1_clk>;
+ clocks = <&ccu CLK_AHB_SPI1>, <&ccu CLK_SPI1>;
clock-names = "ahb", "mod";
dmas = <&dma SUN4I_DMA_DEDICATED 9>,
<&dma SUN4I_DMA_DEDICATED 8>;
@@ -885,18 +331,19 @@
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
+ num-cs = <1>;
};
- emac: ethernet at 01c0b000 {
+ emac: ethernet at 1c0b000 {
compatible = "allwinner,sun4i-a10-emac";
reg = <0x01c0b000 0x1000>;
interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&ahb_gates 17>;
+ clocks = <&ccu CLK_AHB_EMAC>;
allwinner,sram = <&emac_sram 1>;
status = "disabled";
};
- mdio: mdio at 01c0b080 {
+ mdio: mdio at 1c0b080 {
compatible = "allwinner,sun4i-a10-mdio";
reg = <0x01c0b080 0x14>;
status = "disabled";
@@ -904,14 +351,111 @@
#size-cells = <0>;
};
- mmc0: mmc at 01c0f000 {
- compatible = "allwinner,sun7i-a20-mmc",
- "allwinner,sun5i-a13-mmc";
+ tcon0: lcd-controller at 1c0c000 {
+ compatible = "allwinner,sun7i-a20-tcon";
+ reg = <0x01c0c000 0x1000>;
+ interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
+ resets = <&ccu RST_TCON0>;
+ reset-names = "lcd";
+ clocks = <&ccu CLK_AHB_LCD0>,
+ <&ccu CLK_TCON0_CH0>,
+ <&ccu CLK_TCON0_CH1>;
+ clock-names = "ahb",
+ "tcon-ch0",
+ "tcon-ch1";
+ clock-output-names = "tcon0-pixel-clock";
+ dmas = <&dma SUN4I_DMA_DEDICATED 14>;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ tcon0_in: port at 0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0>;
+
+ tcon0_in_be0: endpoint at 0 {
+ reg = <0>;
+ remote-endpoint = <&be0_out_tcon0>;
+ };
+
+ tcon0_in_be1: endpoint at 1 {
+ reg = <1>;
+ remote-endpoint = <&be1_out_tcon0>;
+ };
+ };
+
+ tcon0_out: port at 1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <1>;
+
+ tcon0_out_hdmi: endpoint at 1 {
+ reg = <1>;
+ remote-endpoint = <&hdmi_in_tcon0>;
+ allwinner,tcon-channel = <1>;
+ };
+ };
+ };
+ };
+
+ tcon1: lcd-controller at 1c0d000 {
+ compatible = "allwinner,sun7i-a20-tcon";
+ reg = <0x01c0d000 0x1000>;
+ interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
+ resets = <&ccu RST_TCON1>;
+ reset-names = "lcd";
+ clocks = <&ccu CLK_AHB_LCD1>,
+ <&ccu CLK_TCON1_CH0>,
+ <&ccu CLK_TCON1_CH1>;
+ clock-names = "ahb",
+ "tcon-ch0",
+ "tcon-ch1";
+ clock-output-names = "tcon1-pixel-clock";
+ dmas = <&dma SUN4I_DMA_DEDICATED 15>;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ tcon1_in: port at 0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0>;
+
+ tcon1_in_be0: endpoint at 0 {
+ reg = <0>;
+ remote-endpoint = <&be0_out_tcon1>;
+ };
+
+ tcon1_in_be1: endpoint at 1 {
+ reg = <1>;
+ remote-endpoint = <&be1_out_tcon1>;
+ };
+ };
+
+ tcon1_out: port at 1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <1>;
+
+ tcon1_out_hdmi: endpoint at 1 {
+ reg = <1>;
+ remote-endpoint = <&hdmi_in_tcon1>;
+ allwinner,tcon-channel = <1>;
+ };
+ };
+ };
+ };
+
+ mmc0: mmc at 1c0f000 {
+ compatible = "allwinner,sun7i-a20-mmc";
reg = <0x01c0f000 0x1000>;
- clocks = <&ahb_gates 8>,
- <&mmc0_clk 0>,
- <&mmc0_clk 1>,
- <&mmc0_clk 2>;
+ clocks = <&ccu CLK_AHB_MMC0>,
+ <&ccu CLK_MMC0>,
+ <&ccu CLK_MMC0_OUTPUT>,
+ <&ccu CLK_MMC0_SAMPLE>;
clock-names = "ahb",
"mmc",
"output",
@@ -922,14 +466,13 @@
#size-cells = <0>;
};
- mmc1: mmc at 01c10000 {
- compatible = "allwinner,sun7i-a20-mmc",
- "allwinner,sun5i-a13-mmc";
+ mmc1: mmc at 1c10000 {
+ compatible = "allwinner,sun7i-a20-mmc";
reg = <0x01c10000 0x1000>;
- clocks = <&ahb_gates 9>,
- <&mmc1_clk 0>,
- <&mmc1_clk 1>,
- <&mmc1_clk 2>;
+ clocks = <&ccu CLK_AHB_MMC1>,
+ <&ccu CLK_MMC1>,
+ <&ccu CLK_MMC1_OUTPUT>,
+ <&ccu CLK_MMC1_SAMPLE>;
clock-names = "ahb",
"mmc",
"output",
@@ -940,14 +483,13 @@
#size-cells = <0>;
};
- mmc2: mmc at 01c11000 {
- compatible = "allwinner,sun7i-a20-mmc",
- "allwinner,sun5i-a13-mmc";
+ mmc2: mmc at 1c11000 {
+ compatible = "allwinner,sun7i-a20-mmc";
reg = <0x01c11000 0x1000>;
- clocks = <&ahb_gates 10>,
- <&mmc2_clk 0>,
- <&mmc2_clk 1>,
- <&mmc2_clk 2>;
+ clocks = <&ccu CLK_AHB_MMC2>,
+ <&ccu CLK_MMC2>,
+ <&ccu CLK_MMC2_OUTPUT>,
+ <&ccu CLK_MMC2_SAMPLE>;
clock-names = "ahb",
"mmc",
"output",
@@ -958,14 +500,13 @@
#size-cells = <0>;
};
- mmc3: mmc at 01c12000 {
- compatible = "allwinner,sun7i-a20-mmc",
- "allwinner,sun5i-a13-mmc";
+ mmc3: mmc at 1c12000 {
+ compatible = "allwinner,sun7i-a20-mmc";
reg = <0x01c12000 0x1000>;
- clocks = <&ahb_gates 11>,
- <&mmc3_clk 0>,
- <&mmc3_clk 1>,
- <&mmc3_clk 2>;
+ clocks = <&ccu CLK_AHB_MMC3>,
+ <&ccu CLK_MMC3>,
+ <&ccu CLK_MMC3_OUTPUT>,
+ <&ccu CLK_MMC3_SAMPLE>;
clock-names = "ahb",
"mmc",
"output",
@@ -976,10 +517,10 @@
#size-cells = <0>;
};
- usb_otg: usb at 01c13000 {
+ usb_otg: usb at 1c13000 {
compatible = "allwinner,sun4i-a10-musb";
reg = <0x01c13000 0x0400>;
- clocks = <&ahb_gates 0>;
+ clocks = <&ccu CLK_AHB_OTG>;
interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "mc";
phys = <&usbphy 0>;
@@ -989,51 +530,97 @@
status = "disabled";
};
- usbphy: phy at 01c13400 {
+ usbphy: phy at 1c13400 {
#phy-cells = <1>;
compatible = "allwinner,sun7i-a20-usb-phy";
reg = <0x01c13400 0x10 0x01c14800 0x4 0x01c1c800 0x4>;
reg-names = "phy_ctrl", "pmu1", "pmu2";
- clocks = <&usb_clk 8>;
+ clocks = <&ccu CLK_USB_PHY>;
clock-names = "usb_phy";
- resets = <&usb_clk 0>, <&usb_clk 1>, <&usb_clk 2>;
+ resets = <&ccu RST_USB_PHY0>,
+ <&ccu RST_USB_PHY1>,
+ <&ccu RST_USB_PHY2>;
reset-names = "usb0_reset", "usb1_reset", "usb2_reset";
status = "disabled";
};
- ehci0: usb at 01c14000 {
+ ehci0: usb at 1c14000 {
compatible = "allwinner,sun7i-a20-ehci", "generic-ehci";
reg = <0x01c14000 0x100>;
interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&ahb_gates 1>;
+ clocks = <&ccu CLK_AHB_EHCI0>;
phys = <&usbphy 1>;
phy-names = "usb";
status = "disabled";
};
- ohci0: usb at 01c14400 {
+ ohci0: usb at 1c14400 {
compatible = "allwinner,sun7i-a20-ohci", "generic-ohci";
reg = <0x01c14400 0x100>;
interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&usb_clk 6>, <&ahb_gates 2>;
+ clocks = <&ccu CLK_USB_OHCI0>, <&ccu CLK_AHB_OHCI0>;
phys = <&usbphy 1>;
phy-names = "usb";
status = "disabled";
};
- crypto: crypto-engine at 01c15000 {
- compatible = "allwinner,sun4i-a10-crypto";
+ crypto: crypto-engine at 1c15000 {
+ compatible = "allwinner,sun7i-a20-crypto",
+ "allwinner,sun4i-a10-crypto";
reg = <0x01c15000 0x1000>;
interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&ahb_gates 5>, <&ss_clk>;
+ clocks = <&ccu CLK_AHB_SS>, <&ccu CLK_SS>;
clock-names = "ahb", "mod";
};
- spi2: spi at 01c17000 {
+ hdmi: hdmi at 1c16000 {
+ compatible = "allwinner,sun7i-a20-hdmi",
+ "allwinner,sun5i-a10s-hdmi";
+ reg = <0x01c16000 0x1000>;
+ interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&ccu CLK_AHB_HDMI0>, <&ccu CLK_HDMI>,
+ <&ccu CLK_PLL_VIDEO0_2X>,
+ <&ccu CLK_PLL_VIDEO1_2X>;
+ clock-names = "ahb", "mod", "pll-0", "pll-1";
+ dmas = <&dma SUN4I_DMA_NORMAL 16>,
+ <&dma SUN4I_DMA_NORMAL 16>,
+ <&dma SUN4I_DMA_DEDICATED 24>;
+ dma-names = "ddc-tx", "ddc-rx", "audio-tx";
+ status = "disabled";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ hdmi_in: port at 0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0>;
+
+ hdmi_in_tcon0: endpoint at 0 {
+ reg = <0>;
+ remote-endpoint = <&tcon0_out_hdmi>;
+ };
+
+ hdmi_in_tcon1: endpoint at 1 {
+ reg = <1>;
+ remote-endpoint = <&tcon1_out_hdmi>;
+ };
+ };
+
+ hdmi_out: port at 1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <1>;
+ };
+ };
+ };
+
+ spi2: spi at 1c17000 {
compatible = "allwinner,sun4i-a10-spi";
reg = <0x01c17000 0x1000>;
interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&ahb_gates 22>, <&spi2_clk>;
+ clocks = <&ccu CLK_AHB_SPI2>, <&ccu CLK_SPI2>;
clock-names = "ahb", "mod";
dmas = <&dma SUN4I_DMA_DEDICATED 29>,
<&dma SUN4I_DMA_DEDICATED 28>;
@@ -1041,41 +628,42 @@
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
+ num-cs = <1>;
};
- ahci: sata at 01c18000 {
+ ahci: sata at 1c18000 {
compatible = "allwinner,sun4i-a10-ahci";
reg = <0x01c18000 0x1000>;
interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&pll6 0>, <&ahb_gates 25>;
+ clocks = <&ccu CLK_AHB_SATA>, <&ccu CLK_SATA>;
status = "disabled";
};
- ehci1: usb at 01c1c000 {
+ ehci1: usb at 1c1c000 {
compatible = "allwinner,sun7i-a20-ehci", "generic-ehci";
reg = <0x01c1c000 0x100>;
interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&ahb_gates 3>;
+ clocks = <&ccu CLK_AHB_EHCI1>;
phys = <&usbphy 2>;
phy-names = "usb";
status = "disabled";
};
- ohci1: usb at 01c1c400 {
+ ohci1: usb at 1c1c400 {
compatible = "allwinner,sun7i-a20-ohci", "generic-ohci";
reg = <0x01c1c400 0x100>;
interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&usb_clk 7>, <&ahb_gates 4>;
+ clocks = <&ccu CLK_USB_OHCI1>, <&ccu CLK_AHB_OHCI1>;
phys = <&usbphy 2>;
phy-names = "usb";
status = "disabled";
};
- spi3: spi at 01c1f000 {
+ spi3: spi at 1c1f000 {
compatible = "allwinner,sun4i-a10-spi";
reg = <0x01c1f000 0x1000>;
interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&ahb_gates 23>, <&spi3_clk>;
+ clocks = <&ccu CLK_AHB_SPI3>, <&ccu CLK_SPI3>;
clock-names = "ahb", "mod";
dmas = <&dma SUN4I_DMA_DEDICATED 31>,
<&dma SUN4I_DMA_DEDICATED 30>;
@@ -1083,319 +671,258 @@
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
+ num-cs = <1>;
};
- pio: pinctrl at 01c20800 {
+ ccu: clock at 1c20000 {
+ compatible = "allwinner,sun7i-a20-ccu";
+ reg = <0x01c20000 0x400>;
+ clocks = <&osc24M>, <&osc32k>;
+ clock-names = "hosc", "losc";
+ #clock-cells = <1>;
+ #reset-cells = <1>;
+ };
+
+ pio: pinctrl at 1c20800 {
compatible = "allwinner,sun7i-a20-pinctrl";
reg = <0x01c20800 0x400>;
interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&apb0_gates 5>;
+ clocks = <&ccu CLK_APB0_PIO>, <&osc24M>, <&osc32k>;
+ clock-names = "apb", "hosc", "losc";
gpio-controller;
interrupt-controller;
#interrupt-cells = <3>;
#gpio-cells = <3>;
+ can0_pins_a: can0 at 0 {
+ pins = "PH20", "PH21";
+ function = "can";
+ };
+
clk_out_a_pins_a: clk_out_a at 0 {
- allwinner,pins = "PI12";
- allwinner,function = "clk_out_a";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ pins = "PI12";
+ function = "clk_out_a";
};
clk_out_b_pins_a: clk_out_b at 0 {
- allwinner,pins = "PI13";
- allwinner,function = "clk_out_b";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ pins = "PI13";
+ function = "clk_out_b";
};
emac_pins_a: emac0 at 0 {
- allwinner,pins = "PA0", "PA1", "PA2",
- "PA3", "PA4", "PA5", "PA6",
- "PA7", "PA8", "PA9", "PA10",
- "PA11", "PA12", "PA13", "PA14",
- "PA15", "PA16";
- allwinner,function = "emac";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ pins = "PA0", "PA1", "PA2",
+ "PA3", "PA4", "PA5", "PA6",
+ "PA7", "PA8", "PA9", "PA10",
+ "PA11", "PA12", "PA13", "PA14",
+ "PA15", "PA16";
+ function = "emac";
};
gmac_pins_mii_a: gmac_mii at 0 {
- allwinner,pins = "PA0", "PA1", "PA2",
- "PA3", "PA4", "PA5", "PA6",
- "PA7", "PA8", "PA9", "PA10",
- "PA11", "PA12", "PA13", "PA14",
- "PA15", "PA16";
- allwinner,function = "gmac";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ pins = "PA0", "PA1", "PA2",
+ "PA3", "PA4", "PA5", "PA6",
+ "PA7", "PA8", "PA9", "PA10",
+ "PA11", "PA12", "PA13", "PA14",
+ "PA15", "PA16";
+ function = "gmac";
};
gmac_pins_rgmii_a: gmac_rgmii at 0 {
- allwinner,pins = "PA0", "PA1", "PA2",
- "PA3", "PA4", "PA5", "PA6",
- "PA7", "PA8", "PA10",
- "PA11", "PA12", "PA13",
- "PA15", "PA16";
- allwinner,function = "gmac";
+ pins = "PA0", "PA1", "PA2",
+ "PA3", "PA4", "PA5", "PA6",
+ "PA7", "PA8", "PA10",
+ "PA11", "PA12", "PA13",
+ "PA15", "PA16";
+ function = "gmac";
/*
* data lines in RGMII mode use DDR mode
* and need a higher signal drive strength
*/
- allwinner,drive = <SUN4I_PINCTRL_40_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ drive-strength = <40>;
};
i2c0_pins_a: i2c0 at 0 {
- allwinner,pins = "PB0", "PB1";
- allwinner,function = "i2c0";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ pins = "PB0", "PB1";
+ function = "i2c0";
};
i2c1_pins_a: i2c1 at 0 {
- allwinner,pins = "PB18", "PB19";
- allwinner,function = "i2c1";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ pins = "PB18", "PB19";
+ function = "i2c1";
};
i2c2_pins_a: i2c2 at 0 {
- allwinner,pins = "PB20", "PB21";
- allwinner,function = "i2c2";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ pins = "PB20", "PB21";
+ function = "i2c2";
};
i2c3_pins_a: i2c3 at 0 {
- allwinner,pins = "PI0", "PI1";
- allwinner,function = "i2c3";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ pins = "PI0", "PI1";
+ function = "i2c3";
};
ir0_rx_pins_a: ir0 at 0 {
- allwinner,pins = "PB4";
- allwinner,function = "ir0";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ pins = "PB4";
+ function = "ir0";
};
ir0_tx_pins_a: ir0 at 1 {
- allwinner,pins = "PB3";
- allwinner,function = "ir0";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ pins = "PB3";
+ function = "ir0";
};
ir1_rx_pins_a: ir1 at 0 {
- allwinner,pins = "PB23";
- allwinner,function = "ir1";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ pins = "PB23";
+ function = "ir1";
};
ir1_tx_pins_a: ir1 at 1 {
- allwinner,pins = "PB22";
- allwinner,function = "ir1";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ pins = "PB22";
+ function = "ir1";
};
mmc0_pins_a: mmc0 at 0 {
- allwinner,pins = "PF0", "PF1", "PF2",
- "PF3", "PF4", "PF5";
- allwinner,function = "mmc0";
- allwinner,drive = <SUN4I_PINCTRL_30_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
- };
-
- mmc0_cd_pin_reference_design: mmc0_cd_pin at 0 {
- allwinner,pins = "PH1";
- allwinner,function = "gpio_in";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+ pins = "PF0", "PF1", "PF2",
+ "PF3", "PF4", "PF5";
+ function = "mmc0";
+ drive-strength = <30>;
+ bias-pull-up;
};
mmc2_pins_a: mmc2 at 0 {
- allwinner,pins = "PC6", "PC7", "PC8",
- "PC9", "PC10", "PC11";
- allwinner,function = "mmc2";
- allwinner,drive = <SUN4I_PINCTRL_30_MA>;
- allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+ pins = "PC6", "PC7", "PC8",
+ "PC9", "PC10", "PC11";
+ function = "mmc2";
+ drive-strength = <30>;
+ bias-pull-up;
};
mmc3_pins_a: mmc3 at 0 {
- allwinner,pins = "PI4", "PI5", "PI6",
- "PI7", "PI8", "PI9";
- allwinner,function = "mmc3";
- allwinner,drive = <SUN4I_PINCTRL_30_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ pins = "PI4", "PI5", "PI6",
+ "PI7", "PI8", "PI9";
+ function = "mmc3";
+ drive-strength = <30>;
+ bias-pull-up;
};
ps20_pins_a: ps20 at 0 {
- allwinner,pins = "PI20", "PI21";
- allwinner,function = "ps2";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ pins = "PI20", "PI21";
+ function = "ps2";
};
ps21_pins_a: ps21 at 0 {
- allwinner,pins = "PH12", "PH13";
- allwinner,function = "ps2";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ pins = "PH12", "PH13";
+ function = "ps2";
};
pwm0_pins_a: pwm0 at 0 {
- allwinner,pins = "PB2";
- allwinner,function = "pwm";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ pins = "PB2";
+ function = "pwm";
};
pwm1_pins_a: pwm1 at 0 {
- allwinner,pins = "PI3";
- allwinner,function = "pwm";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ pins = "PI3";
+ function = "pwm";
};
spdif_tx_pins_a: spdif at 0 {
- allwinner,pins = "PB13";
- allwinner,function = "spdif";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+ pins = "PB13";
+ function = "spdif";
+ bias-pull-up;
};
spi0_pins_a: spi0 at 0 {
- allwinner,pins = "PI11", "PI12", "PI13";
- allwinner,function = "spi0";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ pins = "PI11", "PI12", "PI13";
+ function = "spi0";
};
spi0_cs0_pins_a: spi0_cs0 at 0 {
- allwinner,pins = "PI10";
- allwinner,function = "spi0";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ pins = "PI10";
+ function = "spi0";
};
spi0_cs1_pins_a: spi0_cs1 at 0 {
- allwinner,pins = "PI14";
- allwinner,function = "spi0";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ pins = "PI14";
+ function = "spi0";
};
spi1_pins_a: spi1 at 0 {
- allwinner,pins = "PI17", "PI18", "PI19";
- allwinner,function = "spi1";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ pins = "PI17", "PI18", "PI19";
+ function = "spi1";
};
spi1_cs0_pins_a: spi1_cs0 at 0 {
- allwinner,pins = "PI16";
- allwinner,function = "spi1";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ pins = "PI16";
+ function = "spi1";
};
spi2_pins_a: spi2 at 0 {
- allwinner,pins = "PC20", "PC21", "PC22";
- allwinner,function = "spi2";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ pins = "PC20", "PC21", "PC22";
+ function = "spi2";
};
spi2_pins_b: spi2 at 1 {
- allwinner,pins = "PB15", "PB16", "PB17";
- allwinner,function = "spi2";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ pins = "PB15", "PB16", "PB17";
+ function = "spi2";
};
spi2_cs0_pins_a: spi2_cs0 at 0 {
- allwinner,pins = "PC19";
- allwinner,function = "spi2";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ pins = "PC19";
+ function = "spi2";
};
spi2_cs0_pins_b: spi2_cs0 at 1 {
- allwinner,pins = "PB14";
- allwinner,function = "spi2";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ pins = "PB14";
+ function = "spi2";
};
uart0_pins_a: uart0 at 0 {
- allwinner,pins = "PB22", "PB23";
- allwinner,function = "uart0";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ pins = "PB22", "PB23";
+ function = "uart0";
};
uart2_pins_a: uart2 at 0 {
- allwinner,pins = "PI16", "PI17", "PI18", "PI19";
- allwinner,function = "uart2";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ pins = "PI16", "PI17", "PI18", "PI19";
+ function = "uart2";
};
uart3_pins_a: uart3 at 0 {
- allwinner,pins = "PG6", "PG7", "PG8", "PG9";
- allwinner,function = "uart3";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ pins = "PG6", "PG7", "PG8", "PG9";
+ function = "uart3";
};
uart3_pins_b: uart3 at 1 {
- allwinner,pins = "PH0", "PH1";
- allwinner,function = "uart3";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ pins = "PH0", "PH1";
+ function = "uart3";
};
uart4_pins_a: uart4 at 0 {
- allwinner,pins = "PG10", "PG11";
- allwinner,function = "uart4";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ pins = "PG10", "PG11";
+ function = "uart4";
};
uart4_pins_b: uart4 at 1 {
- allwinner,pins = "PH4", "PH5";
- allwinner,function = "uart4";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ pins = "PH4", "PH5";
+ function = "uart4";
};
uart5_pins_a: uart5 at 0 {
- allwinner,pins = "PI10", "PI11";
- allwinner,function = "uart5";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ pins = "PI10", "PI11";
+ function = "uart5";
};
uart6_pins_a: uart6 at 0 {
- allwinner,pins = "PI12", "PI13";
- allwinner,function = "uart6";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ pins = "PI12", "PI13";
+ function = "uart6";
};
uart7_pins_a: uart7 at 0 {
- allwinner,pins = "PI20", "PI21";
- allwinner,function = "uart7";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ pins = "PI20", "PI21";
+ function = "uart7";
};
};
- timer at 01c20c00 {
+ timer at 1c20c00 {
compatible = "allwinner,sun4i-a10-timer";
reg = <0x01c20c00 0x90>;
interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>,
@@ -1407,18 +934,18 @@
clocks = <&osc24M>;
};
- wdt: watchdog at 01c20c90 {
+ wdt: watchdog at 1c20c90 {
compatible = "allwinner,sun4i-a10-wdt";
reg = <0x01c20c90 0x10>;
};
- rtc: rtc at 01c20d00 {
+ rtc: rtc at 1c20d00 {
compatible = "allwinner,sun7i-a20-rtc";
reg = <0x01c20d00 0x20>;
interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
};
- pwm: pwm at 01c20e00 {
+ pwm: pwm at 1c20e00 {
compatible = "allwinner,sun7i-a20-pwm";
reg = <0x01c20e00 0xc>;
clocks = <&osc24M>;
@@ -1426,12 +953,12 @@
status = "disabled";
};
- spdif: spdif at 01c21000 {
+ spdif: spdif at 1c21000 {
#sound-dai-cells = <0>;
compatible = "allwinner,sun4i-a10-spdif";
reg = <0x01c21000 0x400>;
interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&apb0_gates 1>, <&spdif_clk>;
+ clocks = <&ccu CLK_APB0_SPDIF>, <&ccu CLK_SPDIF>;
clock-names = "apb", "spdif";
dmas = <&dma SUN4I_DMA_NORMAL 2>,
<&dma SUN4I_DMA_NORMAL 2>;
@@ -1439,30 +966,30 @@
status = "disabled";
};
- ir0: ir at 01c21800 {
+ ir0: ir at 1c21800 {
compatible = "allwinner,sun4i-a10-ir";
- clocks = <&apb0_gates 6>, <&ir0_clk>;
+ clocks = <&ccu CLK_APB0_IR0>, <&ccu CLK_IR0>;
clock-names = "apb", "ir";
interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
reg = <0x01c21800 0x40>;
status = "disabled";
};
- ir1: ir at 01c21c00 {
+ ir1: ir at 1c21c00 {
compatible = "allwinner,sun4i-a10-ir";
- clocks = <&apb0_gates 7>, <&ir1_clk>;
+ clocks = <&ccu CLK_APB0_IR1>, <&ccu CLK_IR1>;
clock-names = "apb", "ir";
interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
reg = <0x01c21c00 0x40>;
status = "disabled";
};
- i2s1: i2s at 01c22000 {
+ i2s1: i2s at 1c22000 {
#sound-dai-cells = <0>;
compatible = "allwinner,sun4i-a10-i2s";
reg = <0x01c22000 0x400>;
interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&apb0_gates 4>, <&i2s1_clk>;
+ clocks = <&ccu CLK_APB0_I2S1>, <&ccu CLK_I2S1>;
clock-names = "apb", "mod";
dmas = <&dma SUN4I_DMA_NORMAL 4>,
<&dma SUN4I_DMA_NORMAL 4>;
@@ -1470,12 +997,12 @@
status = "disabled";
};
- i2s0: i2s at 01c22400 {
+ i2s0: i2s at 1c22400 {
#sound-dai-cells = <0>;
compatible = "allwinner,sun4i-a10-i2s";
reg = <0x01c22400 0x400>;
interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&apb0_gates 3>, <&i2s0_clk>;
+ clocks = <&ccu CLK_APB0_I2S0>, <&ccu CLK_I2S0>;
clock-names = "apb", "mod";
dmas = <&dma SUN4I_DMA_NORMAL 3>,
<&dma SUN4I_DMA_NORMAL 3>;
@@ -1483,19 +1010,19 @@
status = "disabled";
};
- lradc: lradc at 01c22800 {
+ lradc: lradc at 1c22800 {
compatible = "allwinner,sun4i-a10-lradc-keys";
reg = <0x01c22800 0x100>;
interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
- codec: codec at 01c22c00 {
+ codec: codec at 1c22c00 {
#sound-dai-cells = <0>;
compatible = "allwinner,sun7i-a20-codec";
reg = <0x01c22c00 0x40>;
interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&apb0_gates 0>, <&codec_clk>;
+ clocks = <&ccu CLK_APB0_CODEC>, <&ccu CLK_CODEC>;
clock-names = "apb", "codec";
dmas = <&dma SUN4I_DMA_NORMAL 19>,
<&dma SUN4I_DMA_NORMAL 19>;
@@ -1503,17 +1030,17 @@
status = "disabled";
};
- sid: eeprom at 01c23800 {
+ sid: eeprom at 1c23800 {
compatible = "allwinner,sun7i-a20-sid";
reg = <0x01c23800 0x200>;
};
- i2s2: i2s at 01c24400 {
+ i2s2: i2s at 1c24400 {
#sound-dai-cells = <0>;
compatible = "allwinner,sun4i-a10-i2s";
reg = <0x01c24400 0x400>;
interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&apb0_gates 8>, <&i2s2_clk>;
+ clocks = <&ccu CLK_APB0_I2S2>, <&ccu CLK_I2S2>;
clock-names = "apb", "mod";
dmas = <&dma SUN4I_DMA_NORMAL 6>,
<&dma SUN4I_DMA_NORMAL 6>;
@@ -1521,154 +1048,204 @@
status = "disabled";
};
- rtp: rtp at 01c25000 {
+ rtp: rtp at 1c25000 {
compatible = "allwinner,sun5i-a13-ts";
reg = <0x01c25000 0x100>;
interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
#thermal-sensor-cells = <0>;
};
- uart0: serial at 01c28000 {
+ uart0: serial at 1c28000 {
compatible = "snps,dw-apb-uart";
reg = <0x01c28000 0x400>;
interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
reg-shift = <2>;
reg-io-width = <4>;
- clocks = <&apb1_gates 16>;
+ clocks = <&ccu CLK_APB1_UART0>;
status = "disabled";
};
- uart1: serial at 01c28400 {
+ uart1: serial at 1c28400 {
compatible = "snps,dw-apb-uart";
reg = <0x01c28400 0x400>;
interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
reg-shift = <2>;
reg-io-width = <4>;
- clocks = <&apb1_gates 17>;
+ clocks = <&ccu CLK_APB1_UART1>;
status = "disabled";
};
- uart2: serial at 01c28800 {
+ uart2: serial at 1c28800 {
compatible = "snps,dw-apb-uart";
reg = <0x01c28800 0x400>;
interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
reg-shift = <2>;
reg-io-width = <4>;
- clocks = <&apb1_gates 18>;
+ clocks = <&ccu CLK_APB1_UART2>;
status = "disabled";
};
- uart3: serial at 01c28c00 {
+ uart3: serial at 1c28c00 {
compatible = "snps,dw-apb-uart";
reg = <0x01c28c00 0x400>;
interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
reg-shift = <2>;
reg-io-width = <4>;
- clocks = <&apb1_gates 19>;
+ clocks = <&ccu CLK_APB1_UART3>;
status = "disabled";
};
- uart4: serial at 01c29000 {
+ uart4: serial at 1c29000 {
compatible = "snps,dw-apb-uart";
reg = <0x01c29000 0x400>;
interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
reg-shift = <2>;
reg-io-width = <4>;
- clocks = <&apb1_gates 20>;
+ clocks = <&ccu CLK_APB1_UART4>;
status = "disabled";
};
- uart5: serial at 01c29400 {
+ uart5: serial at 1c29400 {
compatible = "snps,dw-apb-uart";
reg = <0x01c29400 0x400>;
interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>;
reg-shift = <2>;
reg-io-width = <4>;
- clocks = <&apb1_gates 21>;
+ clocks = <&ccu CLK_APB1_UART5>;
status = "disabled";
};
- uart6: serial at 01c29800 {
+ uart6: serial at 1c29800 {
compatible = "snps,dw-apb-uart";
reg = <0x01c29800 0x400>;
interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
reg-shift = <2>;
reg-io-width = <4>;
- clocks = <&apb1_gates 22>;
+ clocks = <&ccu CLK_APB1_UART6>;
status = "disabled";
};
- uart7: serial at 01c29c00 {
+ uart7: serial at 1c29c00 {
compatible = "snps,dw-apb-uart";
reg = <0x01c29c00 0x400>;
interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
reg-shift = <2>;
reg-io-width = <4>;
- clocks = <&apb1_gates 23>;
+ clocks = <&ccu CLK_APB1_UART7>;
status = "disabled";
};
- i2c0: i2c at 01c2ac00 {
+ ps20: ps2 at 1c2a000 {
+ compatible = "allwinner,sun4i-a10-ps2";
+ reg = <0x01c2a000 0x400>;
+ interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&ccu CLK_APB1_PS20>;
+ status = "disabled";
+ };
+
+ ps21: ps2 at 1c2a400 {
+ compatible = "allwinner,sun4i-a10-ps2";
+ reg = <0x01c2a400 0x400>;
+ interrupts = <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&ccu CLK_APB1_PS21>;
+ status = "disabled";
+ };
+
+ i2c0: i2c at 1c2ac00 {
compatible = "allwinner,sun7i-a20-i2c",
"allwinner,sun4i-a10-i2c";
reg = <0x01c2ac00 0x400>;
interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&apb1_gates 0>;
+ clocks = <&ccu CLK_APB1_I2C0>;
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
};
- i2c1: i2c at 01c2b000 {
+ i2c1: i2c at 1c2b000 {
compatible = "allwinner,sun7i-a20-i2c",
"allwinner,sun4i-a10-i2c";
reg = <0x01c2b000 0x400>;
interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&apb1_gates 1>;
+ clocks = <&ccu CLK_APB1_I2C1>;
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
};
- i2c2: i2c at 01c2b400 {
+ i2c2: i2c at 1c2b400 {
compatible = "allwinner,sun7i-a20-i2c",
"allwinner,sun4i-a10-i2c";
reg = <0x01c2b400 0x400>;
interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&apb1_gates 2>;
+ clocks = <&ccu CLK_APB1_I2C2>;
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
};
- i2c3: i2c at 01c2b800 {
+ i2c3: i2c at 1c2b800 {
compatible = "allwinner,sun7i-a20-i2c",
"allwinner,sun4i-a10-i2c";
reg = <0x01c2b800 0x400>;
interrupts = <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&apb1_gates 3>;
+ clocks = <&ccu CLK_APB1_I2C3>;
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
};
- i2c4: i2c at 01c2c000 {
+ can0: can at 1c2bc00 {
+ compatible = "allwinner,sun7i-a20-can",
+ "allwinner,sun4i-a10-can";
+ reg = <0x01c2bc00 0x400>;
+ interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&ccu CLK_APB1_CAN>;
+ status = "disabled";
+ };
+
+ i2c4: i2c at 1c2c000 {
compatible = "allwinner,sun7i-a20-i2c",
"allwinner,sun4i-a10-i2c";
reg = <0x01c2c000 0x400>;
interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&apb1_gates 15>;
+ clocks = <&ccu CLK_APB1_I2C4>;
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
};
- gmac: ethernet at 01c50000 {
+ mali: gpu at 1c40000 {
+ compatible = "allwinner,sun7i-a20-mali", "arm,mali-400";
+ reg = <0x01c40000 0x10000>;
+ interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "gp",
+ "gpmmu",
+ "pp0",
+ "ppmmu0",
+ "pp1",
+ "ppmmu1",
+ "pmu";
+ clocks = <&ccu CLK_AHB_GPU>, <&ccu CLK_GPU>;
+ clock-names = "bus", "core";
+ resets = <&ccu RST_GPU>;
+
+ assigned-clocks = <&ccu CLK_GPU>;
+ assigned-clock-rates = <384000000>;
+ };
+
+ gmac: ethernet at 1c50000 {
compatible = "allwinner,sun7i-a20-gmac";
reg = <0x01c50000 0x10000>;
interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "macirq";
- clocks = <&ahb_gates 49>, <&gmac_tx_clk>;
+ clocks = <&ccu CLK_AHB_GMAC>, <&gmac_tx_clk>;
clock-names = "stmmaceth", "allwinner_gmac_tx";
snps,pbl = <2>;
snps,fixed-burst;
@@ -1678,20 +1255,20 @@
#size-cells = <0>;
};
- hstimer at 01c60000 {
+ hstimer at 1c60000 {
compatible = "allwinner,sun7i-a20-hstimer";
reg = <0x01c60000 0x1000>;
interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&ahb_gates 28>;
+ clocks = <&ccu CLK_AHB_HSTIMER>;
};
- gic: interrupt-controller at 01c81000 {
- compatible = "arm,cortex-a7-gic", "arm,cortex-a15-gic";
+ gic: interrupt-controller at 1c81000 {
+ compatible = "arm,gic-400", "arm,cortex-a7-gic", "arm,cortex-a15-gic";
reg = <0x01c81000 0x1000>,
- <0x01c82000 0x1000>,
+ <0x01c82000 0x2000>,
<0x01c84000 0x2000>,
<0x01c86000 0x2000>;
interrupt-controller;
@@ -1699,20 +1276,164 @@
interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
};
- ps20: ps2 at 01c2a000 {
- compatible = "allwinner,sun4i-a10-ps2";
- reg = <0x01c2a000 0x400>;
- interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&apb1_gates 6>;
- status = "disabled";
+ fe0: display-frontend at 1e00000 {
+ compatible = "allwinner,sun7i-a20-display-frontend";
+ reg = <0x01e00000 0x20000>;
+ interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&ccu CLK_AHB_DE_FE0>, <&ccu CLK_DE_FE0>,
+ <&ccu CLK_DRAM_DE_FE0>;
+ clock-names = "ahb", "mod",
+ "ram";
+ resets = <&ccu RST_DE_FE0>;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ fe0_out: port at 1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <1>;
+
+ fe0_out_be0: endpoint at 0 {
+ reg = <0>;
+ remote-endpoint = <&be0_in_fe0>;
+ };
+
+ fe0_out_be1: endpoint at 1 {
+ reg = <1>;
+ remote-endpoint = <&be1_in_fe0>;
+ };
+ };
+ };
};
- ps21: ps2 at 01c2a400 {
- compatible = "allwinner,sun4i-a10-ps2";
- reg = <0x01c2a400 0x400>;
- interrupts = <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&apb1_gates 7>;
- status = "disabled";
+ fe1: display-frontend at 1e20000 {
+ compatible = "allwinner,sun7i-a20-display-frontend";
+ reg = <0x01e20000 0x20000>;
+ interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&ccu CLK_AHB_DE_FE1>, <&ccu CLK_DE_FE1>,
+ <&ccu CLK_DRAM_DE_FE1>;
+ clock-names = "ahb", "mod",
+ "ram";
+ resets = <&ccu RST_DE_FE1>;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ fe1_out: port at 1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <1>;
+
+ fe1_out_be0: endpoint at 0 {
+ reg = <0>;
+ remote-endpoint = <&be0_in_fe1>;
+ };
+
+ fe1_out_be1: endpoint at 1 {
+ reg = <1>;
+ remote-endpoint = <&be1_in_fe1>;
+ };
+ };
+ };
+ };
+
+ be1: display-backend at 1e40000 {
+ compatible = "allwinner,sun7i-a20-display-backend";
+ reg = <0x01e40000 0x10000>;
+ interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&ccu CLK_AHB_DE_BE1>, <&ccu CLK_DE_BE1>,
+ <&ccu CLK_DRAM_DE_BE1>;
+ clock-names = "ahb", "mod",
+ "ram";
+ resets = <&ccu RST_DE_BE1>;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ be1_in: port at 0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0>;
+
+ be1_in_fe0: endpoint at 0 {
+ reg = <0>;
+ remote-endpoint = <&fe0_out_be1>;
+ };
+
+ be1_in_fe1: endpoint at 1 {
+ reg = <1>;
+ remote-endpoint = <&fe1_out_be1>;
+ };
+ };
+
+ be1_out: port at 1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <1>;
+
+ be1_out_tcon0: endpoint at 0 {
+ reg = <0>;
+ remote-endpoint = <&tcon0_in_be1>;
+ };
+
+ be1_out_tcon1: endpoint at 1 {
+ reg = <1>;
+ remote-endpoint = <&tcon1_in_be1>;
+ };
+ };
+ };
+ };
+
+ be0: display-backend at 1e60000 {
+ compatible = "allwinner,sun7i-a20-display-backend";
+ reg = <0x01e60000 0x10000>;
+ interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&ccu CLK_AHB_DE_BE0>, <&ccu CLK_DE_BE0>,
+ <&ccu CLK_DRAM_DE_BE0>;
+ clock-names = "ahb", "mod",
+ "ram";
+ resets = <&ccu RST_DE_BE0>;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ be0_in: port at 0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0>;
+
+ be0_in_fe0: endpoint at 0 {
+ reg = <0>;
+ remote-endpoint = <&fe0_out_be0>;
+ };
+
+ be0_in_fe1: endpoint at 1 {
+ reg = <1>;
+ remote-endpoint = <&fe1_out_be0>;
+ };
+ };
+
+ be0_out: port at 1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <1>;
+
+ be0_out_tcon0: endpoint at 0 {
+ reg = <0>;
+ remote-endpoint = <&tcon0_in_be0>;
+ };
+
+ be0_out_tcon1: endpoint at 1 {
+ reg = <1>;
+ remote-endpoint = <&tcon1_in_be0>;
+ };
+ };
+ };
};
};
};
diff --git a/include/dt-bindings/clock/sun7i-a20-ccu.h b/include/dt-bindings/clock/sun7i-a20-ccu.h
new file mode 100644
index 0000000000..045a5178da
--- /dev/null
+++ b/include/dt-bindings/clock/sun7i-a20-ccu.h
@@ -0,0 +1,53 @@
+/*
+ * Copyright (C) 2017 Priit Laes <plaes@plaes.org>
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ * a) This file is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This file is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ * b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#ifndef _DT_BINDINGS_CLK_SUN7I_A20_H_
+#define _DT_BINDINGS_CLK_SUN7I_A20_H_
+
+#include <dt-bindings/clock/sun4i-a10-ccu.h>
+
+#define CLK_MBUS 166
+#define CLK_HDMI1_SLOW 167
+#define CLK_HDMI1 168
+#define CLK_OUT_A 169
+#define CLK_OUT_B 170
+
+#endif /* _DT_BINDINGS_CLK_SUN7I_A20_H_ */
--
2.18.0.321.gffc6fa0e3
^ permalink raw reply related [flat|nested] 11+ messages in thread
* [U-Boot] [PATCH v2 5/7] ARM: dts: sun8i: Update A23/A33/r16 dts(i) files from Linux-v4.18-rc3
2018-08-09 13:08 [U-Boot] [PATCH v2 0/7] ARM: dts: sunxi: Update dts(i) files from Linux-v4.18-rc3 Jagan Teki
` (3 preceding siblings ...)
2018-08-09 13:08 ` [U-Boot] [PATCH v2 4/7] ARM: dts: sun7i: Update A20 " Jagan Teki
@ 2018-08-09 13:08 ` Jagan Teki
2018-08-09 13:08 ` [U-Boot] [PATCH v2 6/7] ARM: dts: sun8i: Update A83T " Jagan Teki
` (2 subsequent siblings)
7 siblings, 0 replies; 11+ messages in thread
From: Jagan Teki @ 2018-08-09 13:08 UTC (permalink / raw)
To: u-boot
Update all A23/A33/r16 devicetree dtsi and dtsi files from
Linux-v4.18-rc3 with below commits.
A23:
commit bc3bd041fe766219a44688b182c260064007f0cc
Author: Miquel Raynal <miquel.raynal@bootlin.com>
Date: Tue Apr 24 17:55:02 2018 +0200
ARM: dts: sun8i: a23/a33: declare NAND pins
A33:
commit 88fe315d2c0a397ef42d7639addab0e021ae911d
Author: Maxime Ripard <maxime.ripard@bootlin.com>
Date: Wed Apr 4 11:57:15 2018 +0200
ARM: dts: sun8i: a33: Add the DSI-related nodes
r16:
commit 9621d0bd1b0d61167e1853ac68cf4869c31bcc96
Author: Miquel Raynal <miquel.raynal@bootlin.com>
Date: Tue Apr 24 17:55:03 2018 +0200
ARM: dts: nes: add Nintendo NES/SuperNES Classic Edition support
Note:
- Drop pinctrl from sun8i-r16-nintendo-nes-classic-edition.dts since
sun8i-a23-a33.dtsi is added with Linux sync.
- Don't sync non U-Boot supported dts files
sun8i-a23-ippo-q8h-v1.2.dts
sun8i-a23-ippo-q8h-v5.dts
sun8i-a33-et-q8-v1.6.dts
sun8i-a33-ippo-q8h-v1.2.dts
sun8i-r16-nintendo-nes-classic.dts
sun8i-r16-nintendo-super-nes-classic.dts
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
---
arch/arm/dts/sun8i-a23-a33.dtsi | 112 ++++++++++--------
arch/arm/dts/sun8i-a23-evb.dts | 11 +-
arch/arm/dts/sun8i-a23-gt90h-v4.dts | 5 +-
arch/arm/dts/sun8i-a23-inet86dz.dts | 6 +-
.../dts/sun8i-a23-polaroid-mid2407pxe03.dts | 34 +++---
.../dts/sun8i-a23-polaroid-mid2809pxe04.dts | 25 ++--
arch/arm/dts/sun8i-a23-q8-tablet.dts | 13 ++
arch/arm/dts/sun8i-a23.dtsi | 4 +-
arch/arm/dts/sun8i-a33-ga10h-v1.1.dts | 5 +-
arch/arm/dts/sun8i-a33-inet-d978-rev2.dts | 29 ++++-
arch/arm/dts/sun8i-a33-olinuxino.dts | 66 ++++++-----
arch/arm/dts/sun8i-a33-sinlinx-sina33.dts | 53 +++++++--
arch/arm/dts/sun8i-a33.dtsi | 63 ++++++++--
arch/arm/dts/sun8i-q8-common.dtsi | 30 +----
arch/arm/dts/sun8i-r16-bananapi-m2m.dts | 3 +-
...sun8i-r16-nintendo-nes-classic-edition.dts | 2 -
arch/arm/dts/sun8i-r16-parrot.dts | 50 ++++----
.../dts/sun8i-reference-design-tablet.dtsi | 59 ++++-----
18 files changed, 338 insertions(+), 232 deletions(-)
diff --git a/arch/arm/dts/sun8i-a23-a33.dtsi b/arch/arm/dts/sun8i-a23-a33.dtsi
index ffd21487dc..44f3cad3de 100644
--- a/arch/arm/dts/sun8i-a23-a33.dtsi
+++ b/arch/arm/dts/sun8i-a23-a33.dtsi
@@ -118,13 +118,13 @@
};
};
- soc at 01c00000 {
+ soc at 1c00000 {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
ranges;
- dma: dma-controller at 01c02000 {
+ dma: dma-controller at 1c02000 {
compatible = "allwinner,sun8i-a23-dma";
reg = <0x01c02000 0x1000>;
interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
@@ -133,7 +133,7 @@
#dma-cells = <1>;
};
- mmc0: mmc at 01c0f000 {
+ mmc0: mmc at 1c0f000 {
compatible = "allwinner,sun7i-a20-mmc";
reg = <0x01c0f000 0x1000>;
clocks = <&ccu CLK_BUS_MMC0>,
@@ -152,7 +152,7 @@
#size-cells = <0>;
};
- mmc1: mmc at 01c10000 {
+ mmc1: mmc at 1c10000 {
compatible = "allwinner,sun7i-a20-mmc";
reg = <0x01c10000 0x1000>;
clocks = <&ccu CLK_BUS_MMC1>,
@@ -171,7 +171,7 @@
#size-cells = <0>;
};
- mmc2: mmc at 01c11000 {
+ mmc2: mmc at 1c11000 {
compatible = "allwinner,sun7i-a20-mmc";
reg = <0x01c11000 0x1000>;
clocks = <&ccu CLK_BUS_MMC2>,
@@ -190,7 +190,7 @@
#size-cells = <0>;
};
- nfc: nand at 01c03000 {
+ nfc: nand at 1c03000 {
compatible = "allwinner,sun4i-a10-nand";
reg = <0x01c03000 0x1000>;
interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
@@ -198,12 +198,14 @@
clock-names = "ahb", "mod";
resets = <&ccu RST_BUS_NAND>;
reset-names = "ahb";
+ pinctrl-names = "default";
+ pinctrl-0 = <&nand_pins &nand_pins_cs0 &nand_pins_rb0>;
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
};
- usb_otg: usb at 01c19000 {
+ usb_otg: usb at 1c19000 {
/* compatible gets set in SoC specific dtsi file */
reg = <0x01c19000 0x0400>;
clocks = <&ccu CLK_BUS_OTG>;
@@ -216,7 +218,7 @@
status = "disabled";
};
- usbphy: phy at 01c19400 {
+ usbphy: phy at 1c19400 {
/*
* compatible and address regions get set in
* SoC specific dtsi file
@@ -233,7 +235,7 @@
#phy-cells = <1>;
};
- ehci0: usb at 01c1a000 {
+ ehci0: usb at 1c1a000 {
compatible = "allwinner,sun8i-a23-ehci", "generic-ehci";
reg = <0x01c1a000 0x100>;
interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
@@ -244,7 +246,7 @@
status = "disabled";
};
- ohci0: usb at 01c1a400 {
+ ohci0: usb at 1c1a400 {
compatible = "allwinner,sun8i-a23-ohci", "generic-ohci";
reg = <0x01c1a400 0x100>;
interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
@@ -255,7 +257,7 @@
status = "disabled";
};
- ccu: clock at 01c20000 {
+ ccu: clock at 1c20000 {
reg = <0x01c20000 0x400>;
clocks = <&osc24M>, <&rtc 0>;
clock-names = "hosc", "losc";
@@ -263,7 +265,7 @@
#reset-cells = <1>;
};
- pio: pinctrl at 01c20800 {
+ pio: pinctrl at 1c20800 {
/* compatible gets set in SoC specific dtsi file */
reg = <0x01c20800 0x400>;
/* interrupts get set in SoC specific dtsi file */
@@ -289,23 +291,6 @@
function = "uart1";
};
- nand_pins_a: nand-base0 at 0 {
- pins = "PC0", "PC1", "PC2", "PC5",
- "PC8", "PC9", "PC10", "PC11",
- "PC12", "PC13", "PC14", "PC15";
- function = "nand0";
- };
-
- nand_cs0_pins_a: nand-cs at 0 {
- pins = "PC4";
- function = "nand0";
- };
-
- nand_rb0_pins_a: nand-rb at 0 {
- pins = "PC6";
- function = "nand0";
- };
-
mmc0_pins_a: mmc0 at 0 {
pins = "PF0", "PF1", "PF2",
"PF3", "PF4", "PF5";
@@ -332,6 +317,37 @@
bias-pull-up;
};
+ nand_pins: nand-pins {
+ pins = "PC0", "PC1", "PC2", "PC5",
+ "PC8", "PC9", "PC10", "PC11",
+ "PC12", "PC13", "PC14", "PC15";
+ function = "nand0";
+ };
+
+ nand_pins_cs0: nand-pins-cs0 {
+ pins = "PC4";
+ function = "nand0";
+ bias-pull-up;
+ };
+
+ nand_pins_cs1: nand-pins-cs1 {
+ pins = "PC3";
+ function = "nand0";
+ bias-pull-up;
+ };
+
+ nand_pins_rb0: nand-pins-rb0 {
+ pins = "PC6";
+ function = "nand0";
+ bias-pull-up;
+ };
+
+ nand_pins_rb1: nand-pins-rb1 {
+ pins = "PC7";
+ function = "nand0";
+ bias-pull-up;
+ };
+
pwm0_pins: pwm0 {
pins = "PH0";
function = "pwm0";
@@ -361,7 +377,7 @@
};
};
- timer at 01c20c00 {
+ timer at 1c20c00 {
compatible = "allwinner,sun4i-a10-timer";
reg = <0x01c20c00 0xa0>;
interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
@@ -369,13 +385,13 @@
clocks = <&osc24M>;
};
- wdt0: watchdog at 01c20ca0 {
+ wdt0: watchdog at 1c20ca0 {
compatible = "allwinner,sun6i-a31-wdt";
reg = <0x01c20ca0 0x20>;
interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
};
- pwm: pwm at 01c21400 {
+ pwm: pwm at 1c21400 {
compatible = "allwinner,sun7i-a20-pwm";
reg = <0x01c21400 0xc>;
clocks = <&osc24M>;
@@ -383,14 +399,14 @@
status = "disabled";
};
- lradc: lradc at 01c22800 {
+ lradc: lradc at 1c22800 {
compatible = "allwinner,sun4i-a10-lradc-keys";
reg = <0x01c22800 0x100>;
interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
- uart0: serial at 01c28000 {
+ uart0: serial at 1c28000 {
compatible = "snps,dw-apb-uart";
reg = <0x01c28000 0x400>;
interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>;
@@ -403,7 +419,7 @@
status = "disabled";
};
- uart1: serial at 01c28400 {
+ uart1: serial at 1c28400 {
compatible = "snps,dw-apb-uart";
reg = <0x01c28400 0x400>;
interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
@@ -416,7 +432,7 @@
status = "disabled";
};
- uart2: serial at 01c28800 {
+ uart2: serial at 1c28800 {
compatible = "snps,dw-apb-uart";
reg = <0x01c28800 0x400>;
interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
@@ -429,7 +445,7 @@
status = "disabled";
};
- uart3: serial at 01c28c00 {
+ uart3: serial at 1c28c00 {
compatible = "snps,dw-apb-uart";
reg = <0x01c28c00 0x400>;
interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
@@ -442,7 +458,7 @@
status = "disabled";
};
- uart4: serial at 01c29000 {
+ uart4: serial at 1c29000 {
compatible = "snps,dw-apb-uart";
reg = <0x01c29000 0x400>;
interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
@@ -455,7 +471,7 @@
status = "disabled";
};
- i2c0: i2c at 01c2ac00 {
+ i2c0: i2c at 1c2ac00 {
compatible = "allwinner,sun6i-a31-i2c";
reg = <0x01c2ac00 0x400>;
interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
@@ -466,7 +482,7 @@
#size-cells = <0>;
};
- i2c1: i2c at 01c2b000 {
+ i2c1: i2c at 1c2b000 {
compatible = "allwinner,sun6i-a31-i2c";
reg = <0x01c2b000 0x400>;
interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
@@ -477,7 +493,7 @@
#size-cells = <0>;
};
- i2c2: i2c at 01c2b400 {
+ i2c2: i2c at 1c2b400 {
compatible = "allwinner,sun6i-a31-i2c";
reg = <0x01c2b400 0x400>;
interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
@@ -515,7 +531,7 @@
assigned-clock-rates = <384000000>;
};
- gic: interrupt-controller at 01c81000 {
+ gic: interrupt-controller at 1c81000 {
compatible = "arm,cortex-a7-gic", "arm,cortex-a15-gic";
reg = <0x01c81000 0x1000>,
<0x01c82000 0x2000>,
@@ -526,7 +542,7 @@
interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
};
- rtc: rtc at 01f00000 {
+ rtc: rtc at 1f00000 {
compatible = "allwinner,sun6i-a31-rtc";
reg = <0x01f00000 0x54>;
interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
@@ -544,7 +560,7 @@
interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
};
- prcm at 01f01400 {
+ prcm at 1f01400 {
compatible = "allwinner,sun8i-a23-prcm";
reg = <0x01f01400 0x200>;
@@ -592,12 +608,12 @@
};
};
- cpucfg at 01f01c00 {
+ cpucfg at 1f01c00 {
compatible = "allwinner,sun8i-a23-cpuconfig";
reg = <0x01f01c00 0x300>;
};
- r_uart: serial at 01f02800 {
+ r_uart: serial at 1f02800 {
compatible = "snps,dw-apb-uart";
reg = <0x01f02800 0x400>;
interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
@@ -608,7 +624,7 @@
status = "disabled";
};
- r_pio: pinctrl at 01f02c00 {
+ r_pio: pinctrl at 1f02c00 {
compatible = "allwinner,sun8i-a23-r-pinctrl";
reg = <0x01f02c00 0x400>;
interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
@@ -635,7 +651,7 @@
};
};
- r_rsb: rsb at 01f03400 {
+ r_rsb: rsb at 1f03400 {
compatible = "allwinner,sun8i-a23-rsb";
reg = <0x01f03400 0x400>;
interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
diff --git a/arch/arm/dts/sun8i-a23-evb.dts b/arch/arm/dts/sun8i-a23-evb.dts
index 610786e635..8a93697df3 100644
--- a/arch/arm/dts/sun8i-a23-evb.dts
+++ b/arch/arm/dts/sun8i-a23-evb.dts
@@ -48,7 +48,6 @@
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
-#include <dt-bindings/pinctrl/sun4i-a10.h>
/ {
model = "Allwinner A23 Evaluation Board";
@@ -108,17 +107,15 @@
pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_evb>;
vmmc-supply = <®_vcc3v0>;
bus-width = <4>;
- cd-gpios = <&pio 1 4 GPIO_ACTIVE_HIGH>; /* PB4 */
- cd-inverted;
+ cd-gpios = <&pio 1 4 GPIO_ACTIVE_LOW>; /* PB4 */
status = "okay";
};
&pio {
mmc0_cd_pin_evb: mmc0_cd_pin at 0 {
- allwinner,pins = "PB4";
- allwinner,function = "gpio_in";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+ pins = "PB4";
+ function = "gpio_in";
+ bias-pull-up;
};
};
diff --git a/arch/arm/dts/sun8i-a23-gt90h-v4.dts b/arch/arm/dts/sun8i-a23-gt90h-v4.dts
index da55b5a6d0..e3c7a25ca3 100644
--- a/arch/arm/dts/sun8i-a23-gt90h-v4.dts
+++ b/arch/arm/dts/sun8i-a23-gt90h-v4.dts
@@ -53,9 +53,10 @@
status = "okay";
};
-&gsl1680 {
+&touchscreen {
+ reg = <0x40>;
compatible = "silead,gsl3675";
- touchscreen-fw-name = "silead/gsl3675-gt90h.fw";
+ firmware-name = "gsl3675-gt90h.fw";
touchscreen-size-x = <1792>;
touchscreen-size-y = <1024>;
status = "okay";
diff --git a/arch/arm/dts/sun8i-a23-inet86dz.dts b/arch/arm/dts/sun8i-a23-inet86dz.dts
index 99720218b7..d4405752a4 100644
--- a/arch/arm/dts/sun8i-a23-inet86dz.dts
+++ b/arch/arm/dts/sun8i-a23-inet86dz.dts
@@ -53,10 +53,12 @@
status = "okay";
};
-&gsl1680 {
+&touchscreen {
+ reg = <0x40>;
+ compatible = "silead,gsl1680";
+ firmware-name = "gsl1680-inet86dz.fw";
touchscreen-size-x = <960>;
touchscreen-size-y = <640>;
- touchscreen-fw-name = "silead/gsl1680-inet86dz.fw";
status = "okay";
};
diff --git a/arch/arm/dts/sun8i-a23-polaroid-mid2407pxe03.dts b/arch/arm/dts/sun8i-a23-polaroid-mid2407pxe03.dts
index f23ca63828..649e313396 100644
--- a/arch/arm/dts/sun8i-a23-polaroid-mid2407pxe03.dts
+++ b/arch/arm/dts/sun8i-a23-polaroid-mid2407pxe03.dts
@@ -62,14 +62,11 @@
};
};
-&gsl1680 {
- vddio-supply = <®_ldo_io1>;
- touchscreen-size-x = <960>;
- touchscreen-size-y = <640>;
- touchscreen-inverted-x;
- touchscreen-inverted-y;
- touchscreen-fw-name = "silead/gsl1680-polaroid-mid2407pxe03.fw";
- status = "okay";
+&i2c1 {
+ mma7660: accelerometer at 4c {
+ reg = <0x4c>;
+ compatible = "fsl,mma7660";
+ };
};
&mmc1 {
@@ -89,21 +86,24 @@
};
&mmc1_pins_a {
- allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+ bias-pull-up;
};
&r_pio {
wifi_pwrseq_pin_mid2407: wifi_pwrseq_pin at 0 {
- allwinner,pins = "PL6";
- allwinner,function = "gpio_out";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ pins = "PL6";
+ function = "gpio_out";
};
};
-®_ldo_io1 {
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- regulator-name = "vcc-touchscreen";
+&touchscreen {
+ reg = <0x40>;
+ compatible = "silead,gsl1680";
+ firmware-name = "gsl1680-polaroid-mid2407pxe03.fw";
+ touchscreen-size-x = <960>;
+ touchscreen-size-y = <640>;
+ touchscreen-inverted-x;
+ touchscreen-inverted-y;
+ vddio-supply = <®_ldo_io1>;
status = "okay";
};
diff --git a/arch/arm/dts/sun8i-a23-polaroid-mid2809pxe04.dts b/arch/arm/dts/sun8i-a23-polaroid-mid2809pxe04.dts
index 8e8f3e0846..6b3bcae089 100644
--- a/arch/arm/dts/sun8i-a23-polaroid-mid2809pxe04.dts
+++ b/arch/arm/dts/sun8i-a23-polaroid-mid2809pxe04.dts
@@ -62,14 +62,6 @@
};
};
-&gsl1680 {
- compatible = "silead,gsl3670";
- touchscreen-fw-name = "silead/gsl3670-polaroid-mid2809pxe04.fw";
- touchscreen-size-x = <1660>;
- touchscreen-size-y = <890>;
- status = "okay";
-};
-
&mmc1 {
pinctrl-names = "default";
pinctrl-0 = <&mmc1_pins_a>;
@@ -87,14 +79,21 @@
};
&mmc1_pins_a {
- allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+ bias-pull-up;
};
&r_pio {
wifi_pwrseq_pin_mid2809: wifi_pwrseq_pin at 0 {
- allwinner,pins = "PL6";
- allwinner,function = "gpio_out";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ pins = "PL6";
+ function = "gpio_out";
};
};
+
+&touchscreen {
+ reg = <0x40>;
+ compatible = "silead,gsl3670";
+ firmware-name = "gsl3670-polaroid-mid2809pxe04.fw";
+ touchscreen-size-x = <1660>;
+ touchscreen-size-y = <890>;
+ status = "okay";
+};
diff --git a/arch/arm/dts/sun8i-a23-q8-tablet.dts b/arch/arm/dts/sun8i-a23-q8-tablet.dts
index 956320a6cc..b6958e8f2f 100644
--- a/arch/arm/dts/sun8i-a23-q8-tablet.dts
+++ b/arch/arm/dts/sun8i-a23-q8-tablet.dts
@@ -48,3 +48,16 @@
model = "Q8 A23 Tablet";
compatible = "allwinner,q8-a23", "allwinner,sun8i-a23";
};
+
+&codec {
+ allwinner,pa-gpios = <&pio 7 9 GPIO_ACTIVE_HIGH>; /* PH9 */
+ allwinner,audio-routing =
+ "Headphone", "HP",
+ "Headphone", "HPCOM",
+ "Speaker", "HP",
+ "MIC1", "Mic",
+ "MIC2", "Headset Mic",
+ "Mic", "MBIAS",
+ "Headset Mic", "HBIAS";
+ status = "okay";
+};
diff --git a/arch/arm/dts/sun8i-a23.dtsi b/arch/arm/dts/sun8i-a23.dtsi
index 4d1f929780..58e6585b50 100644
--- a/arch/arm/dts/sun8i-a23.dtsi
+++ b/arch/arm/dts/sun8i-a23.dtsi
@@ -49,8 +49,8 @@
reg = <0x40000000 0x40000000>;
};
- soc at 01c00000 {
- codec: codec at 01c22c00 {
+ soc at 1c00000 {
+ codec: codec at 1c22c00 {
#sound-dai-cells = <0>;
compatible = "allwinner,sun8i-a23-codec";
reg = <0x01c22c00 0x400>;
diff --git a/arch/arm/dts/sun8i-a33-ga10h-v1.1.dts b/arch/arm/dts/sun8i-a33-ga10h-v1.1.dts
index 2fea1af212..f71159987c 100644
--- a/arch/arm/dts/sun8i-a33-ga10h-v1.1.dts
+++ b/arch/arm/dts/sun8i-a33-ga10h-v1.1.dts
@@ -58,9 +58,10 @@
status = "okay";
};
-&gsl1680 {
+&touchscreen {
+ reg = <0x40>;
compatible = "silead,gsl3675";
- touchscreen-fw-name = "silead/gsl3675-ga10h.fw";
+ firmware-name = "gsl3675-ga10h.fw";
touchscreen-size-x = <1630>;
touchscreen-size-y = <990>;
touchscreen-inverted-y;
diff --git a/arch/arm/dts/sun8i-a33-inet-d978-rev2.dts b/arch/arm/dts/sun8i-a33-inet-d978-rev2.dts
index 0f52cd9dfa..3e05959104 100644
--- a/arch/arm/dts/sun8i-a33-inet-d978-rev2.dts
+++ b/arch/arm/dts/sun8i-a33-inet-d978-rev2.dts
@@ -49,6 +49,15 @@
model = "INet-D978 Rev 02";
compatible = "primux,inet-d978-rev2", "allwinner,sun8i-a33";
+ aliases {
+ serial0 = &uart1;
+ };
+
+ chosen {
+ /* Delete debug UART as serial0 is the UART for bluetooth */
+ /delete-property/stdout-path;
+ };
+
leds {
compatible = "gpio-leds";
pinctrl-names = "default";
@@ -62,7 +71,7 @@
};
&mmc1_pins_a {
- allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+ bias-pull-up;
};
&mmc1 {
@@ -80,9 +89,19 @@
&r_pio {
led_pin_d978: led_pin_d978 at 0 {
- allwinner,pins = "PL5";
- allwinner,function = "gpio_out";
- allwinner,drive = <SUN4I_PINCTRL_20_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ pins = "PL5";
+ function = "gpio_out";
+ drive-strength = <20>;
};
};
+
+&r_uart {
+ status = "disabled";
+};
+
+&uart1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart1_pins_a>,
+ <&uart1_pins_cts_rts_a>;
+ status = "okay";
+};
diff --git a/arch/arm/dts/sun8i-a33-olinuxino.dts b/arch/arm/dts/sun8i-a33-olinuxino.dts
index 9ea637e82b..a1a1eb64ca 100644
--- a/arch/arm/dts/sun8i-a33-olinuxino.dts
+++ b/arch/arm/dts/sun8i-a33-olinuxino.dts
@@ -43,7 +43,6 @@
/dts-v1/;
#include "sun8i-a33.dtsi"
-#include "sunxi-common-regulators.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
@@ -62,8 +61,6 @@
leds {
compatible = "gpio-leds";
- pinctrl-names = "default";
- pinctrl-0 = <&led_pin_olinuxino>;
green {
label = "a33-olinuxino:green:usr";
@@ -72,17 +69,24 @@
};
};
+&codec {
+ status = "okay";
+};
+
+&dai {
+ status = "okay";
+};
+
&ehci0 {
status = "okay";
};
&mmc0 {
pinctrl-names = "default";
- pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_olinuxino>;
+ pinctrl-0 = <&mmc0_pins_a>;
vmmc-supply = <®_dcdc1>;
bus-width = <4>;
- cd-gpios = <&pio 1 4 GPIO_ACTIVE_HIGH>; /* PB4 */
- cd-inverted;
+ cd-gpios = <&pio 1 4 GPIO_ACTIVE_LOW>; /* PB4 */
status = "okay";
};
@@ -90,29 +94,6 @@
status = "okay";
};
-&pio {
- led_pin_olinuxino: led_pins at 0 {
- allwinner,pins = "PB7";
- allwinner,function = "gpio_out";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
- };
-
- mmc0_cd_pin_olinuxino: mmc0_cd_pin at 0 {
- allwinner,pins = "PB4";
- allwinner,function = "gpio_in";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
- };
-
- usb0_id_detect_pin: usb0_id_detect_pin at 0 {
- allwinner,pins = "PB3";
- allwinner,function = "gpio_in";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
- };
-};
-
&r_rsb {
status = "okay";
@@ -126,7 +107,15 @@
};
};
-#include "axp22x.dtsi"
+#include "axp223.dtsi"
+
+&ac_power_supply {
+ status = "okay";
+};
+
+&battery_power_supply {
+ status = "okay";
+};
®_aldo1 {
regulator-always-on;
@@ -201,6 +190,21 @@
vcc-lcd-supply = <®_dc1sw>;
};
+&sound {
+ /* Board level jack widgets */
+ simple-audio-card,widgets = "Microphone", "Microphone Jack",
+ "Headphone", "Headphone Jack";
+ /* Board level routing. First 2 routes copied from SoC level */
+ simple-audio-card,routing =
+ "Left DAC", "AIF1 Slot 0 Left",
+ "Right DAC", "AIF1 Slot 0 Right",
+ "HP", "HPCOM",
+ "Headphone Jack", "HP",
+ "MIC1", "Microphone Jack",
+ "Microphone Jack", "MBIAS";
+ status = "okay";
+};
+
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_pins_b>;
@@ -217,8 +221,6 @@
};
&usbphy {
- pinctrl-names = "default";
- pinctrl-0 = <&usb0_id_detect_pin>;
usb0_id_det-gpios = <&pio 1 3 GPIO_ACTIVE_HIGH>; /* PB3 */
usb0_vbus_power-supply = <&usb_power_supply>;
usb0_vbus-supply = <®_drivevbus>;
diff --git a/arch/arm/dts/sun8i-a33-sinlinx-sina33.dts b/arch/arm/dts/sun8i-a33-sinlinx-sina33.dts
index b1bc88c46c..541acb4d2b 100644
--- a/arch/arm/dts/sun8i-a33-sinlinx-sina33.dts
+++ b/arch/arm/dts/sun8i-a33-sinlinx-sina33.dts
@@ -48,7 +48,6 @@
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
-#include <dt-bindings/pinctrl/sun4i-a10.h>
/ {
model = "Sinlinx SinA33";
@@ -80,7 +79,7 @@
};
};
-&de {
+&codec {
status = "okay";
};
@@ -88,6 +87,28 @@
cpu-supply = <®_dcdc3>;
};
+&cpu0_opp_table {
+ opp-1104000000 {
+ opp-hz = /bits/ 64 <1104000000>;
+ opp-microvolt = <1320000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ };
+
+ opp-1200000000 {
+ opp-hz = /bits/ 64 <1200000000>;
+ opp-microvolt = <1320000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ };
+};
+
+&de {
+ status = "okay";
+};
+
+&dai {
+ status = "okay";
+};
+
&ehci0 {
status = "okay";
};
@@ -123,8 +144,7 @@
pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_sina33>;
vmmc-supply = <®_dcdc1>;
bus-width = <4>;
- cd-gpios = <&pio 1 4 GPIO_ACTIVE_HIGH>; /* PB4 */
- cd-inverted;
+ cd-gpios = <&pio 1 4 GPIO_ACTIVE_LOW>; /* PB4 */
status = "okay";
};
@@ -140,9 +160,9 @@
&mmc2_8bit_pins {
/* Increase drive strength for DDR modes */
- allwinner,drive = <SUN4I_PINCTRL_40_MA>;
+ drive-strength = <40>;
/* eMMC is missing pull-ups */
- allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+ bias-pull-up;
};
&ohci0 {
@@ -151,10 +171,9 @@
&pio {
mmc0_cd_pin_sina33: mmc0_cd_pin at 0 {
- allwinner,pins = "PB4";
- allwinner,function = "gpio_in";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+ pins = "PB4";
+ function = "gpio_in";
+ bias-pull-up;
};
};
@@ -170,7 +189,15 @@
};
};
-#include "axp22x.dtsi"
+#include "axp223.dtsi"
+
+&ac_power_supply {
+ status = "okay";
+};
+
+&battery_power_supply {
+ status = "okay";
+};
®_aldo1 {
regulator-always-on;
@@ -232,6 +259,10 @@
regulator-name = "vcc-rtc";
};
+&sound {
+ status = "okay";
+};
+
&tcon0 {
pinctrl-names = "default";
pinctrl-0 = <&lcd_rgb666_pins>;
diff --git a/arch/arm/dts/sun8i-a33.dtsi b/arch/arm/dts/sun8i-a33.dtsi
index 22660919bd..8d278ee001 100644
--- a/arch/arm/dts/sun8i-a33.dtsi
+++ b/arch/arm/dts/sun8i-a33.dtsi
@@ -203,8 +203,8 @@
};
};
- soc at 01c00000 {
- tcon0: lcd-controller at 01c0c000 {
+ soc at 1c00000 {
+ tcon0: lcd-controller at 1c0c000 {
compatible = "allwinner,sun8i-a33-tcon";
reg = <0x01c0c000 0x1000>;
interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
@@ -236,11 +236,16 @@
#address-cells = <1>;
#size-cells = <0>;
reg = <1>;
+
+ tcon0_out_dsi: endpoint at 1 {
+ reg = <1>;
+ remote-endpoint = <&dsi_in_tcon0>;
+ };
};
};
};
- crypto: crypto-engine at 01c15000 {
+ crypto: crypto-engine at 1c15000 {
compatible = "allwinner,sun4i-a10-crypto";
reg = <0x01c15000 0x1000>;
interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
@@ -250,7 +255,7 @@
reset-names = "ahb";
};
- dai: dai at 01c22c00 {
+ dai: dai at 1c22c00 {
#sound-dai-cells = <0>;
compatible = "allwinner,sun6i-a31-i2s";
reg = <0x01c22c00 0x200>;
@@ -263,7 +268,7 @@
status = "disabled";
};
- codec: codec at 01c22e00 {
+ codec: codec at 1c22e00 {
#sound-dai-cells = <0>;
compatible = "allwinner,sun8i-a33-codec";
reg = <0x01c22e00 0x400>;
@@ -273,14 +278,53 @@
status = "disabled";
};
- ths: ths at 01c25000 {
+ ths: ths at 1c25000 {
compatible = "allwinner,sun8i-a33-ths";
reg = <0x01c25000 0x100>;
#thermal-sensor-cells = <0>;
#io-channel-cells = <0>;
};
- fe0: display-frontend at 01e00000 {
+ dsi: dsi at 1ca0000 {
+ compatible = "allwinner,sun6i-a31-mipi-dsi";
+ reg = <0x01ca0000 0x1000>;
+ interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&ccu CLK_BUS_MIPI_DSI>,
+ <&ccu CLK_DSI_SCLK>;
+ clock-names = "bus", "mod";
+ resets = <&ccu RST_BUS_MIPI_DSI>;
+ phys = <&dphy>;
+ phy-names = "dphy";
+ status = "disabled";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port at 0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0>;
+
+ dsi_in_tcon0: endpoint {
+ remote-endpoint = <&tcon0_out_dsi>;
+ };
+ };
+ };
+ };
+
+ dphy: d-phy at 1ca1000 {
+ compatible = "allwinner,sun6i-a31-mipi-dphy";
+ reg = <0x01ca1000 0x1000>;
+ clocks = <&ccu CLK_BUS_MIPI_DSI>,
+ <&ccu CLK_DSI_DPHY>;
+ clock-names = "bus", "mod";
+ resets = <&ccu RST_BUS_MIPI_DSI>;
+ status = "disabled";
+ #phy-cells = <0>;
+ };
+
+ fe0: display-frontend at 1e00000 {
compatible = "allwinner,sun8i-a33-display-frontend";
reg = <0x01e00000 0x20000>;
interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
@@ -289,7 +333,6 @@
clock-names = "ahb", "mod",
"ram";
resets = <&ccu RST_BUS_DE_FE>;
- status = "disabled";
ports {
#address-cells = <1>;
@@ -308,7 +351,7 @@
};
};
- be0: display-backend at 01e60000 {
+ be0: display-backend at 1e60000 {
compatible = "allwinner,sun8i-a33-display-backend";
reg = <0x01e60000 0x10000>, <0x01e80000 0x1000>;
reg-names = "be", "sat";
@@ -350,7 +393,7 @@
};
};
- drc0: drc at 01e70000 {
+ drc0: drc at 1e70000 {
compatible = "allwinner,sun8i-a33-drc";
reg = <0x01e70000 0x10000>;
interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
diff --git a/arch/arm/dts/sun8i-q8-common.dtsi b/arch/arm/dts/sun8i-q8-common.dtsi
index 8e2cc30ec8..c676940a96 100644
--- a/arch/arm/dts/sun8i-q8-common.dtsi
+++ b/arch/arm/dts/sun8i-q8-common.dtsi
@@ -49,13 +49,6 @@
ethernet0 = &sdio_wifi;
};
- q8_hardwaremgr {
- compatible = "allwinner,sunxi-q8-hardwaremgr";
- touchscreen-i2c-bus = <&i2c0>;
- touchscreen-supply = <®_ldo_io1>;
- touchscreen-power-gpios = <&pio 7 1 GPIO_ACTIVE_HIGH>; /* PH1 */
- };
-
wifi_pwrseq: wifi_pwrseq {
compatible = "mmc-pwrseq-simple";
/*
@@ -90,32 +83,17 @@
};
&mmc1_pins_a {
- allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+ bias-pull-up;
};
&r_pio {
wifi_pwrseq_pin_q8: wifi_pwrseq_pin at 0 {
- allwinner,pins = "PL6", "PL7", "PL11";
- allwinner,function = "gpio_in";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+ pins = "PL6", "PL7", "PL11";
+ function = "gpio_in";
+ bias-pull-up;
};
};
&usbphy {
usb1_vbus-supply = <®_dldo1>;
};
-
-&gsl1680 {
- touchscreen-size-x = <1024>;
- touchscreen-size-y = <600>;
- touchscreen-fw-name = "silead/gsl1680-q8-700.fw";
- status = "okay";
-};
-
-®_ldo_io1 {
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- regulator-name = "vcc-touchscreen";
- status = "okay";
-};
diff --git a/arch/arm/dts/sun8i-r16-bananapi-m2m.dts b/arch/arm/dts/sun8i-r16-bananapi-m2m.dts
index eaf0966672..0dbdb29a8f 100644
--- a/arch/arm/dts/sun8i-r16-bananapi-m2m.dts
+++ b/arch/arm/dts/sun8i-r16-bananapi-m2m.dts
@@ -150,8 +150,7 @@
pinctrl-0 = <&mmc0_pins_a>;
vmmc-supply = <®_dcdc1>;
bus-width = <4>;
- cd-gpios = <&pio 1 4 GPIO_ACTIVE_HIGH>; /* PB4 */
- cd-inverted;
+ cd-gpios = <&pio 1 4 GPIO_ACTIVE_LOW>; /* PB4 */
status = "okay";
};
diff --git a/arch/arm/dts/sun8i-r16-nintendo-nes-classic-edition.dts b/arch/arm/dts/sun8i-r16-nintendo-nes-classic-edition.dts
index 72a8505d94..e5590208ed 100644
--- a/arch/arm/dts/sun8i-r16-nintendo-nes-classic-edition.dts
+++ b/arch/arm/dts/sun8i-r16-nintendo-nes-classic-edition.dts
@@ -63,8 +63,6 @@
};
&nfc {
- pinctrl-names = "default";
- pinctrl-0 = <&nand_pins_a &nand_cs0_pins_a &nand_rb0_pins_a>;
status = "okay";
nand at 0 {
diff --git a/arch/arm/dts/sun8i-r16-parrot.dts b/arch/arm/dts/sun8i-r16-parrot.dts
index 47553e5229..472c03b7ae 100644
--- a/arch/arm/dts/sun8i-r16-parrot.dts
+++ b/arch/arm/dts/sun8i-r16-parrot.dts
@@ -84,6 +84,14 @@
};
+&codec {
+ status = "okay";
+};
+
+&dai {
+ status = "okay";
+};
+
&ehci0 {
status = "okay";
};
@@ -149,8 +157,8 @@
};
&mmc2_8bit_pins {
- allwinner,drive = <SUN4I_PINCTRL_40_MA>;
- allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+ drive-strength = <40>;
+ bias-pull-up;
};
&ohci0 {
@@ -159,40 +167,32 @@
&pio {
mmc0_cd_pin_parrot: mmc0_cd_pin at 0 {
- allwinner,pins = "PD14";
- allwinner,function = "gpio_in";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+ pins = "PD14";
+ function = "gpio_in";
+ bias-pull-up;
};
led_pins_parrot: led_pins at 0 {
- allwinner,pins = "PE16", "PE17";
- allwinner,function = "gpio_out";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ pins = "PE16", "PE17";
+ function = "gpio_out";
};
usb0_id_det: usb0_id_detect_pin at 0 {
- allwinner,pins = "PD10";
- allwinner,function = "gpio_in";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+ pins = "PD10";
+ function = "gpio_in";
+ bias-pull-up;
};
usb1_vbus_pin_parrot: usb1_vbus_pin at 0 {
- allwinner,pins = "PD12";
- allwinner,function = "gpio_out";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ pins = "PD12";
+ function = "gpio_out";
};
};
&r_pio {
wifi_reset_pin_parrot: wifi_reset_pin at 0 {
- allwinner,pins = "PL6";
- allwinner,function = "gpio_out";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ pins = "PL6";
+ function = "gpio_out";
};
};
@@ -209,7 +209,7 @@
};
};
-#include "axp22x.dtsi"
+#include "axp223.dtsi"
®_aldo1 {
regulator-always-on;
@@ -325,6 +325,10 @@
status = "okay";
};
+&sound {
+ status = "okay";
+};
+
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_pins_b>;
diff --git a/arch/arm/dts/sun8i-reference-design-tablet.dtsi b/arch/arm/dts/sun8i-reference-design-tablet.dtsi
index f29897c40a..880096c7e2 100644
--- a/arch/arm/dts/sun8i-reference-design-tablet.dtsi
+++ b/arch/arm/dts/sun8i-reference-design-tablet.dtsi
@@ -50,8 +50,6 @@
backlight: backlight {
compatible = "pwm-backlight";
- pinctrl-names = "default";
- pinctrl-0 = <&bl_en_pin>;
pwms = <&pwm 0 50000 PWM_POLARITY_INVERTED>;
brightness-levels = <0 10 20 30 40 50 60 70 80 90 100>;
default-brightness-level = <8>;
@@ -71,15 +69,13 @@
*/
clock-frequency = <400000>;
- gsl1680: touchscreen at 40 {
- compatible = "silead,gsl1680";
- reg = <0x40>;
+ touchscreen: touchscreen at 0 {
interrupt-parent = <&pio>;
interrupts = <1 5 IRQ_TYPE_EDGE_FALLING>; /* PB5 */
pinctrl-names = "default";
pinctrl-0 = <&ts_power_pin>;
power-gpios = <&pio 7 1 GPIO_ACTIVE_HIGH>; /* PH1 */
- /* Most tablets use this touchscreen, but not all */
+ /* Tablet dts must provide reg and compatible */
status = "disabled";
};
};
@@ -89,38 +85,26 @@
pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin>;
vmmc-supply = <®_dcdc1>;
bus-width = <4>;
- cd-gpios = <&pio 1 4 GPIO_ACTIVE_HIGH>; /* PB4 */
- cd-inverted;
+ cd-gpios = <&pio 1 4 GPIO_ACTIVE_LOW>; /* PB4 */
status = "okay";
};
&pio {
- bl_en_pin: bl_en_pin at 0 {
- allwinner,pins = "PH6";
- allwinner,function = "gpio_in";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
- };
-
mmc0_cd_pin: mmc0_cd_pin at 0 {
- allwinner,pins = "PB4";
- allwinner,function = "gpio_in";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+ pins = "PB4";
+ function = "gpio_in";
+ bias-pull-up;
};
ts_power_pin: ts_power_pin at 0 {
- allwinner,pins = "PH1";
- allwinner,function = "gpio_out";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ pins = "PH1";
+ function = "gpio_out";
};
usb0_id_detect_pin: usb0_id_detect_pin at 0 {
- allwinner,pins = "PH8";
- allwinner,function = "gpio_in";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+ pins = "PH8";
+ function = "gpio_in";
+ bias-pull-up;
};
};
@@ -138,7 +122,15 @@
};
};
-#include "axp22x.dtsi"
+#include "axp223.dtsi"
+
+&ac_power_supply {
+ status = "okay";
+};
+
+&battery_power_supply {
+ status = "okay";
+};
®_aldo1 {
regulator-always-on;
@@ -211,10 +203,21 @@
status = "okay";
};
+®_ldo_io1 {
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc-touchscreen";
+ status = "okay";
+};
+
®_rtc_ldo {
regulator-name = "vcc-rtc";
};
+&cpu0 {
+ cpu-supply = <®_dcdc2>;
+};
+
&r_uart {
pinctrl-names = "default";
pinctrl-0 = <&r_uart_pins_a>;
--
2.18.0.321.gffc6fa0e3
^ permalink raw reply related [flat|nested] 11+ messages in thread
* [U-Boot] [PATCH v2 6/7] ARM: dts: sun8i: Update A83T dts(i) files from Linux-v4.18-rc3
2018-08-09 13:08 [U-Boot] [PATCH v2 0/7] ARM: dts: sunxi: Update dts(i) files from Linux-v4.18-rc3 Jagan Teki
` (4 preceding siblings ...)
2018-08-09 13:08 ` [U-Boot] [PATCH v2 5/7] ARM: dts: sun8i: Update A23/A33/r16 " Jagan Teki
@ 2018-08-09 13:08 ` Jagan Teki
2018-08-09 13:08 ` [U-Boot] [PATCH v2 7/7] ARM: dts: sun8i: Update R40/V40 " Jagan Teki
2018-08-26 10:47 ` [U-Boot] [PATCH v2 0/7] ARM: dts: sunxi: Update " Jagan Teki
7 siblings, 0 replies; 11+ messages in thread
From: Jagan Teki @ 2018-08-09 13:08 UTC (permalink / raw)
To: u-boot
Update all A83T devicetree dtsi and dtsi files from Linux-v4.18-rc3
with below commit:
commit 221cb9fd2ee3042689fe0e6613d0f34eb46a5af6
Author: Mylène Josserand <mylene.josserand@bootlin.com>
Date: Fri May 4 21:05:44 2018 +0200
ARM: dts: sun8i: Add enable-method for SMP support for the A83T SoC
Note: bananapi-m3 and cubietruck-plus board dts files has
usb_otg enabled in U-Boot which were not present in Linux.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
---
arch/arm/dts/axp81x.dtsi | 169 ++++
.../dts/sun8i-a83t-allwinner-h8homlet-v2.dts | 195 +++-
arch/arm/dts/sun8i-a83t-bananapi-m3.dts | 298 +++++-
arch/arm/dts/sun8i-a83t-cubietruck-plus.dts | 322 ++++++-
arch/arm/dts/sun8i-a83t-tbs-a711.dts | 355 ++++++-
arch/arm/dts/sun8i-a83t.dtsi | 885 ++++++++++++++++--
include/dt-bindings/clock/sun8i-a83t-ccu.h | 140 +++
include/dt-bindings/reset/sun8i-a83t-ccu.h | 98 ++
8 files changed, 2382 insertions(+), 80 deletions(-)
create mode 100644 arch/arm/dts/axp81x.dtsi
create mode 100644 include/dt-bindings/clock/sun8i-a83t-ccu.h
create mode 100644 include/dt-bindings/reset/sun8i-a83t-ccu.h
diff --git a/arch/arm/dts/axp81x.dtsi b/arch/arm/dts/axp81x.dtsi
new file mode 100644
index 0000000000..043c717dce
--- /dev/null
+++ b/arch/arm/dts/axp81x.dtsi
@@ -0,0 +1,169 @@
+/*
+ * Copyright 2017 Chen-Yu Tsai
+ *
+ * Chen-Yu Tsai <wens@csie.org>
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ * a) This file is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This file is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ * b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/* AXP813/818 Integrated Power Management Chip */
+
+&axp81x {
+ interrupt-controller;
+ #interrupt-cells = <1>;
+
+ axp_adc: adc {
+ compatible = "x-powers,axp813-adc";
+ #io-channel-cells = <1>;
+ };
+
+ axp_gpio: gpio {
+ compatible = "x-powers,axp813-gpio";
+ gpio-controller;
+ #gpio-cells = <2>;
+
+ gpio0_ldo: gpio0-ldo {
+ pins = "GPIO0";
+ function = "ldo";
+ };
+
+ gpio1_ldo: gpio1-ldo {
+ pins = "GPIO1";
+ function = "ldo";
+ };
+ };
+
+ battery_power_supply: battery-power-supply {
+ compatible = "x-powers,axp813-battery-power-supply";
+ status = "disabled";
+ };
+
+ regulators {
+ /* Default work frequency for buck regulators */
+ x-powers,dcdc-freq = <3000>;
+
+ reg_dcdc1: dcdc1 {
+ };
+
+ reg_dcdc2: dcdc2 {
+ };
+
+ reg_dcdc3: dcdc3 {
+ };
+
+ reg_dcdc4: dcdc4 {
+ };
+
+ reg_dcdc5: dcdc5 {
+ };
+
+ reg_dcdc6: dcdc6 {
+ };
+
+ reg_dcdc7: dcdc7 {
+ };
+
+ reg_aldo1: aldo1 {
+ };
+
+ reg_aldo2: aldo2 {
+ };
+
+ reg_aldo3: aldo3 {
+ };
+
+ reg_dldo1: dldo1 {
+ };
+
+ reg_dldo2: dldo2 {
+ };
+
+ reg_dldo3: dldo3 {
+ };
+
+ reg_dldo4: dldo4 {
+ };
+
+ reg_eldo1: eldo1 {
+ };
+
+ reg_eldo2: eldo2 {
+ };
+
+ reg_eldo3: eldo3 {
+ };
+
+ reg_fldo1: fldo1 {
+ };
+
+ reg_fldo2: fldo2 {
+ };
+
+ reg_fldo3: fldo3 {
+ };
+
+ reg_ldo_io0: ldo-io0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&gpio0_ldo>;
+ /* Disable by default to avoid conflicts with GPIO */
+ status = "disabled";
+ };
+
+ reg_ldo_io1: ldo-io1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&gpio1_ldo>;
+ /* Disable by default to avoid conflicts with GPIO */
+ status = "disabled";
+ };
+
+ reg_rtc_ldo: rtc-ldo {
+ /* RTC_LDO is a fixed, always-on regulator */
+ regulator-always-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ };
+
+ reg_sw: sw {
+ };
+
+ reg_drivevbus: drivevbus {
+ status = "disabled";
+ };
+ };
+};
diff --git a/arch/arm/dts/sun8i-a83t-allwinner-h8homlet-v2.dts b/arch/arm/dts/sun8i-a83t-allwinner-h8homlet-v2.dts
index c8495d7624..36ecebaff3 100644
--- a/arch/arm/dts/sun8i-a83t-allwinner-h8homlet-v2.dts
+++ b/arch/arm/dts/sun8i-a83t-allwinner-h8homlet-v2.dts
@@ -44,6 +44,8 @@
/dts-v1/;
#include "sun8i-a83t.dtsi"
+#include <dt-bindings/gpio/gpio.h>
+
/ {
model = "Allwinner A83T H8Homlet Proto Dev Board v2.0";
compatible = "allwinner,h8homlet-v2", "allwinner,sun8i-a83t";
@@ -55,22 +57,213 @@
chosen {
stdout-path = "serial0:115200n8";
};
+
+ reg_usb0_vbus: reg-usb0-vbus {
+ compatible = "regulator-fixed";
+ regulator-name = "usb0-vbus";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ regulator-boot-on;
+ enable-active-high;
+ gpio = <&r_pio 0 5 GPIO_ACTIVE_HIGH>; /* PL5 */
+ };
+
+ reg_usb1_vbus: reg-usb1-vbus {
+ compatible = "regulator-fixed";
+ regulator-name = "usb1-vbus";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ regulator-boot-on;
+ enable-active-high;
+ gpio = <&r_pio 0 6 GPIO_ACTIVE_HIGH>; /* PL6 */
+ };
};
&ehci0 {
status = "okay";
};
+&mmc0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&mmc0_pins>;
+ vmmc-supply = <®_dcdc1>;
+ cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */
+ bus-width = <4>;
+ status = "okay";
+};
+
+&mmc2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&mmc2_8bit_emmc_pins>;
+ vmmc-supply = <®_dcdc1>;
+ vqmmc-supply = <®_dcdc1>;
+ bus-width = <8>;
+ non-removable;
+ cap-mmc-hw-reset;
+ status = "okay";
+};
+
&ohci0 {
status = "okay";
};
+&r_rsb {
+ status = "okay";
+
+ axp81x: pmic at 3a3 {
+ compatible = "x-powers,axp818", "x-powers,axp813";
+ reg = <0x3a3>;
+ interrupt-parent = <&r_intc>;
+ interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
+ eldoin-supply = <®_dcdc1>;
+ swin-supply = <®_dcdc1>;
+ };
+
+ ac100: codec at e89 {
+ compatible = "x-powers,ac100";
+ reg = <0xe89>;
+
+ ac100_codec: codec {
+ compatible = "x-powers,ac100-codec";
+ interrupt-parent = <&r_pio>;
+ interrupts = <0 11 IRQ_TYPE_LEVEL_LOW>; /* PL11 */
+ #clock-cells = <0>;
+ clock-output-names = "4M_adda";
+ };
+
+ ac100_rtc: rtc {
+ compatible = "x-powers,ac100-rtc";
+ interrupt-parent = <&r_intc>;
+ interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
+ clocks = <&ac100_codec>;
+ #clock-cells = <1>;
+ clock-output-names = "cko1_rtc",
+ "cko2_rtc",
+ "cko3_rtc";
+ };
+ };
+};
+
+#include "axp81x.dtsi"
+
+®_aldo1 {
+ regulator-always-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "vcc-1v8";
+};
+
+®_aldo2 {
+ regulator-always-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "dram-pll";
+};
+
+®_aldo3 {
+ regulator-always-on;
+ regulator-min-microvolt = <3000000>;
+ regulator-max-microvolt = <3000000>;
+ regulator-name = "avcc";
+};
+
+®_dcdc1 {
+ regulator-always-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc-3v3";
+};
+
+®_dcdc2 {
+ regulator-always-on;
+ regulator-min-microvolt = <700000>;
+ regulator-max-microvolt = <1100000>;
+ regulator-name = "vdd-cpua";
+};
+
+®_dcdc3 {
+ regulator-always-on;
+ regulator-min-microvolt = <700000>;
+ regulator-max-microvolt = <1100000>;
+ regulator-name = "vdd-cpub";
+};
+
+®_dcdc4 {
+ regulator-min-microvolt = <700000>;
+ regulator-max-microvolt = <1100000>;
+ regulator-name = "vdd-gpu";
+};
+
+®_dcdc5 {
+ regulator-always-on;
+ regulator-min-microvolt = <1500000>;
+ regulator-max-microvolt = <1500000>;
+ regulator-name = "vcc-dram";
+};
+
+®_dcdc6 {
+ regulator-always-on;
+ regulator-min-microvolt = <900000>;
+ regulator-max-microvolt = <900000>;
+ regulator-name = "vdd-sys";
+};
+
+®_dldo2 {
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc-mipi";
+};
+
+®_dldo4 {
+ /*
+ * The PHY requires 20ms after all voltages are applied until core
+ * logic is ready and 30ms after the reset pin is de-asserted.
+ * Set a 100ms delay to account for PMIC ramp time and board traces.
+ */
+ regulator-enable-ramp-delay = <100000>;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc-ephy";
+};
+
+®_fldo1 {
+ regulator-min-microvolt = <1080000>;
+ regulator-max-microvolt = <1320000>;
+ regulator-name = "vdd12-hsic";
+};
+
+®_fldo2 {
+ /*
+ * Despite the embedded CPUs core not being used in any way,
+ * this must remain on or the system will hang.
+ */
+ regulator-always-on;
+ regulator-min-microvolt = <700000>;
+ regulator-max-microvolt = <1100000>;
+ regulator-name = "vdd-cpus";
+};
+
+®_rtc_ldo {
+ regulator-name = "vcc-rtc";
+};
+
+®_sw {
+ regulator-name = "vcc-wifi";
+};
+
&uart0 {
pinctrl-names = "default";
- pinctrl-0 = <&uart0_pins_b>;
+ pinctrl-0 = <&uart0_pb_pins>;
+ status = "okay";
+};
+
+&usbphy {
+ usb0_vbus-supply = <®_usb0_vbus>;
+ usb1_vbus-supply = <®_usb1_vbus>;
status = "okay";
};
&usb_otg {
+ dr_mode = "host";
status = "okay";
};
diff --git a/arch/arm/dts/sun8i-a83t-bananapi-m3.dts b/arch/arm/dts/sun8i-a83t-bananapi-m3.dts
index dfc16a0272..eaff6fa401 100644
--- a/arch/arm/dts/sun8i-a83t-bananapi-m3.dts
+++ b/arch/arm/dts/sun8i-a83t-bananapi-m3.dts
@@ -1,6 +1,7 @@
/*
- * Copyright 2015 Vishnu Patekar
- * Vishnu Patekar <vishnupatekar0510@gmail.com>
+ * Copyright 2017 Chen-Yu Tsai
+ *
+ * Chen-Yu Tsai <wens@csie.org>
*
* This file is dual-licensed: you can use it either under the terms
* of the GPL or the X11 license, at your option. Note that this dual
@@ -44,29 +45,316 @@
/dts-v1/;
#include "sun8i-a83t.dtsi"
+#include <dt-bindings/gpio/gpio.h>
+
/ {
- model = "Allwinner A83T BananaPi M3 Board v1.2";
- compatible = "bananapi,m3v1.2", "allwinner,sun8i-a83t";
+ model = "Banana Pi BPI-M3";
+ compatible = "sinovoip,bpi-m3", "allwinner,sun8i-a83t";
aliases {
+ ethernet0 = &emac;
serial0 = &uart0;
};
chosen {
stdout-path = "serial0:115200n8";
};
+
+ connector {
+ compatible = "hdmi-connector";
+ type = "a";
+
+ port {
+ hdmi_con_in: endpoint {
+ remote-endpoint = <&hdmi_out_con>;
+ };
+ };
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ blue {
+ label = "bananapi-m3:blue:usr";
+ gpios = <&axp_gpio 1 GPIO_ACTIVE_HIGH>;
+ };
+
+ green {
+ label = "bananapi-m3:green:usr";
+ gpios = <&axp_gpio 0 GPIO_ACTIVE_HIGH>;
+ };
+ };
+
+ reg_usb1_vbus: reg-usb1-vbus {
+ compatible = "regulator-fixed";
+ regulator-name = "usb1-vbus";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ regulator-boot-on;
+ enable-active-high;
+ gpio = <&pio 3 24 GPIO_ACTIVE_HIGH>; /* PD24 */
+ };
+
+ wifi_pwrseq: wifi_pwrseq {
+ compatible = "mmc-pwrseq-simple";
+ clocks = <&ac100_rtc 1>;
+ clock-names = "ext_clock";
+ /* The WiFi low power clock must be 32768 Hz */
+ assigned-clocks = <&ac100_rtc 1>;
+ assigned-clock-rates = <32768>;
+ /* enables internal regulator and de-asserts reset */
+ reset-gpios = <&r_pio 0 2 GPIO_ACTIVE_LOW>; /* PL2 WL-PMU-EN */
+ };
+};
+
+&de {
+ status = "okay";
};
&ehci0 {
+ /* Terminus Tech FE 1.1s 4-port USB 2.0 hub here */
status = "okay";
+
+ /* TODO GL830 USB-to-SATA bridge downstream w/ GPIO power controls */
+};
+
+&emac {
+ pinctrl-names = "default";
+ pinctrl-0 = <&emac_rgmii_pins>;
+ phy-supply = <®_sw>;
+ phy-handle = <&rgmii_phy>;
+ phy-mode = "rgmii";
+ allwinner,rx-delay-ps = <700>;
+ allwinner,tx-delay-ps = <700>;
+ status = "okay";
+};
+
+&hdmi {
+ status = "okay";
+};
+
+&hdmi_out {
+ hdmi_out_con: endpoint {
+ remote-endpoint = <&hdmi_con_in>;
+ };
+};
+
+&mdio {
+ rgmii_phy: ethernet-phy at 1 {
+ compatible = "ethernet-phy-ieee802.3-c22";
+ reg = <1>;
+ };
+};
+
+&mmc0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&mmc0_pins>;
+ vmmc-supply = <®_dcdc1>;
+ bus-width = <4>;
+ cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */
+ status = "okay";
+};
+
+&mmc1 {
+ vmmc-supply = <®_dldo1>;
+ vqmmc-supply = <®_dldo1>;
+ mmc-pwrseq = <&wifi_pwrseq>;
+ bus-width = <4>;
+ non-removable;
+ status = "okay";
+
+ brcmf: wifi at 1 {
+ reg = <1>;
+ compatible = "brcm,bcm4329-fmac";
+ interrupt-parent = <&r_pio>;
+ interrupts = <0 3 IRQ_TYPE_LEVEL_LOW>;
+ interrupt-names = "host-wake";
+ };
+};
+
+&mmc2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&mmc2_8bit_emmc_pins>;
+ vmmc-supply = <®_dcdc1>;
+ vqmmc-supply = <®_dcdc1>;
+ bus-width = <8>;
+ non-removable;
+ cap-mmc-hw-reset;
+ status = "okay";
+};
+
+&r_rsb {
+ status = "okay";
+
+ axp81x: pmic at 3a3 {
+ compatible = "x-powers,axp813";
+ reg = <0x3a3>;
+ interrupt-parent = <&r_intc>;
+ interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
+ eldoin-supply = <®_dcdc1>;
+ fldoin-supply = <®_dcdc5>;
+ swin-supply = <®_dcdc1>;
+ x-powers,drive-vbus-en;
+ };
+
+ ac100: codec at e89 {
+ compatible = "x-powers,ac100";
+ reg = <0xe89>;
+
+ ac100_codec: codec {
+ compatible = "x-powers,ac100-codec";
+ interrupt-parent = <&r_pio>;
+ interrupts = <0 11 IRQ_TYPE_LEVEL_LOW>; /* PL11 */
+ #clock-cells = <0>;
+ clock-output-names = "4M_adda";
+ };
+
+ ac100_rtc: rtc {
+ compatible = "x-powers,ac100-rtc";
+ interrupt-parent = <&r_intc>;
+ interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
+ clocks = <&ac100_codec>;
+ #clock-cells = <1>;
+ clock-output-names = "cko1_rtc",
+ "cko2_rtc",
+ "cko3_rtc";
+ };
+ };
+};
+
+#include "axp81x.dtsi"
+
+®_aldo1 {
+ regulator-always-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "vcc-1v8";
+};
+
+®_aldo2 {
+ regulator-always-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "dram-pll";
+};
+
+®_aldo3 {
+ regulator-always-on;
+ regulator-min-microvolt = <3000000>;
+ regulator-max-microvolt = <3000000>;
+ regulator-name = "avcc";
+};
+
+®_dcdc1 {
+ /* schematics says 3.1V but FEX file says 3.3V */
+ regulator-always-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc-3v3";
+};
+
+®_dcdc2 {
+ regulator-always-on;
+ regulator-min-microvolt = <700000>;
+ regulator-max-microvolt = <1100000>;
+ regulator-name = "vdd-cpua";
+};
+
+®_dcdc3 {
+ regulator-always-on;
+ regulator-min-microvolt = <700000>;
+ regulator-max-microvolt = <1100000>;
+ regulator-name = "vdd-cpub";
+};
+
+®_dcdc4 {
+ regulator-min-microvolt = <700000>;
+ regulator-max-microvolt = <1100000>;
+ regulator-name = "vdd-gpu";
+};
+
+®_dcdc5 {
+ regulator-always-on;
+ regulator-min-microvolt = <1200000>;
+ regulator-max-microvolt = <1200000>;
+ regulator-name = "vcc-dram";
+};
+
+®_dcdc6 {
+ regulator-always-on;
+ regulator-min-microvolt = <900000>;
+ regulator-max-microvolt = <900000>;
+ regulator-name = "vdd-sys";
+};
+
+®_dldo1 {
+ /*
+ * This powers both the WiFi/BT module's main power, I/O supply,
+ * and external pull-ups on all the data lines. It should be set
+ * to the same voltage as the I/O supply (DCDC1 in this case) to
+ * avoid any leakage or mismatch.
+ */
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc-wifi";
+};
+
+®_dldo3 {
+ regulator-always-on;
+ regulator-min-microvolt = <2500000>;
+ regulator-max-microvolt = <2500000>;
+ regulator-name = "vcc-pd";
+};
+
+®_drivevbus {
+ regulator-name = "usb0-vbus";
+ status = "okay";
+};
+
+®_fldo1 {
+ regulator-min-microvolt = <1080000>;
+ regulator-max-microvolt = <1320000>;
+ regulator-name = "vdd12-hsic";
+};
+
+®_fldo2 {
+ /*
+ * Despite the embedded CPUs core not being used in any way,
+ * this must remain on or the system will hang.
+ */
+ regulator-always-on;
+ regulator-min-microvolt = <700000>;
+ regulator-max-microvolt = <1100000>;
+ regulator-name = "vdd-cpus";
+};
+
+®_rtc_ldo {
+ regulator-name = "vcc-rtc";
+};
+
+®_sw {
+ /*
+ * The PHY requires 20ms after all voltages
+ * are applied until core logic is ready and
+ * 30ms after the reset pin is de-asserted.
+ * Set a 100ms delay to account for PMIC
+ * ramp time and board traces.
+ */
+ regulator-enable-ramp-delay = <100000>;
+ regulator-name = "vcc-ephy";
};
&uart0 {
pinctrl-names = "default";
- pinctrl-0 = <&uart0_pins_b>;
+ pinctrl-0 = <&uart0_pb_pins>;
status = "okay";
};
&usb_otg {
status = "okay";
};
+
+&usbphy {
+ usb1_vbus-supply = <®_usb1_vbus>;
+ status = "okay";
+};
diff --git a/arch/arm/dts/sun8i-a83t-cubietruck-plus.dts b/arch/arm/dts/sun8i-a83t-cubietruck-plus.dts
index 8437c8f59e..5dba4fc310 100644
--- a/arch/arm/dts/sun8i-a83t-cubietruck-plus.dts
+++ b/arch/arm/dts/sun8i-a83t-cubietruck-plus.dts
@@ -45,33 +45,353 @@
/dts-v1/;
#include "sun8i-a83t.dtsi"
+#include <dt-bindings/gpio/gpio.h>
+
/ {
model = "Cubietech Cubietruck Plus";
compatible = "cubietech,cubietruck-plus", "allwinner,sun8i-a83t";
aliases {
+ ethernet0 = &emac;
serial0 = &uart0;
};
chosen {
stdout-path = "serial0:115200n8";
};
+
+ leds {
+ compatible = "gpio-leds";
+
+ blue {
+ label = "cubietruck-plus:blue:usr";
+ gpios = <&pio 3 25 GPIO_ACTIVE_HIGH>; /* PD25 */
+ };
+
+ orange {
+ label = "cubietruck-plus:orange:usr";
+ gpios = <&pio 3 26 GPIO_ACTIVE_HIGH>; /* PD26 */
+ };
+
+ white {
+ label = "cubietruck-plus:white:usr";
+ gpios = <&pio 3 27 GPIO_ACTIVE_HIGH>; /* PD27 */
+ };
+
+ green {
+ label = "cubietruck-plus:green:usr";
+ gpios = <&pio 4 4 GPIO_ACTIVE_HIGH>; /* PE4 */
+ };
+ };
+
+ usb-hub {
+ /* I2C is not connected */
+ compatible = "smsc,usb3503";
+ initial-mode = <1>; /* initialize in HUB mode */
+ disabled-ports = <1>;
+ intn-gpios = <&pio 7 5 GPIO_ACTIVE_HIGH>; /* PH5 */
+ reset-gpios = <&pio 4 16 GPIO_ACTIVE_HIGH>; /* PE16 */
+ connect-gpios = <&pio 4 17 GPIO_ACTIVE_HIGH>; /* PE17 */
+ refclk-frequency = <19200000>;
+ };
+
+ reg_usb1_vbus: reg-usb1-vbus {
+ compatible = "regulator-fixed";
+ regulator-name = "usb1-vbus";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ regulator-boot-on;
+ enable-active-high;
+ gpio = <&pio 3 29 GPIO_ACTIVE_HIGH>; /* PD29 */
+ };
+
+ reg_usb2_vbus: reg-usb2-vbus {
+ compatible = "regulator-fixed";
+ regulator-name = "usb2-vbus";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ regulator-boot-on;
+ enable-active-high;
+ gpio = <&r_pio 0 6 GPIO_ACTIVE_HIGH>; /* PL6 */
+ };
+
+ sound {
+ compatible = "simple-audio-card";
+ simple-audio-card,name = "On-board SPDIF";
+
+ simple-audio-card,cpu {
+ sound-dai = <&spdif>;
+ };
+
+ simple-audio-card,codec {
+ sound-dai = <&spdif_out>;
+ };
+ };
+
+ spdif_out: spdif-out {
+ #sound-dai-cells = <0>;
+ compatible = "linux,spdif-dit";
+ };
+
+ wifi_pwrseq: wifi_pwrseq {
+ compatible = "mmc-pwrseq-simple";
+ clocks = <&ac100_rtc 1>;
+ clock-names = "ext_clock";
+ /* The WiFi low power clock must be 32768 Hz */
+ assigned-clocks = <&ac100_rtc 1>;
+ assigned-clock-rates = <32768>;
+ /* enables internal regulator and de-asserts reset */
+ reset-gpios = <&r_pio 0 2 GPIO_ACTIVE_LOW>; /* PL2 WL-PMU-EN */
+ };
};
&ehci0 {
+ /* GL830 USB-to-SATA bridge here */
status = "okay";
};
&ehci1 {
+ /* USB3503 HSIC USB 2.0 hub here */
+ status = "okay";
+};
+
+&emac {
+ pinctrl-names = "default";
+ pinctrl-0 = <&emac_rgmii_pins>;
+ phy-supply = <®_dldo4>;
+ phy-handle = <&rgmii_phy>;
+ phy-mode = "rgmii";
+ status = "okay";
+};
+
+&mdio {
+ rgmii_phy: ethernet-phy at 1 {
+ compatible = "ethernet-phy-ieee802.3-c22";
+ reg = <1>;
+ };
+};
+
+&mmc0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&mmc0_pins>;
+ vmmc-supply = <®_dcdc1>;
+ bus-width = <4>;
+ cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */
+ status = "okay";
+};
+
+&mmc1 {
+ vmmc-supply = <®_dcdc1>;
+ vqmmc-supply = <®_sw>;
+ mmc-pwrseq = <&wifi_pwrseq>;
+ bus-width = <4>;
+ non-removable;
+ status = "okay";
+};
+
+&mmc2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&mmc2_8bit_emmc_pins>;
+ vmmc-supply = <®_dcdc1>;
+ bus-width = <8>;
+ non-removable;
+ cap-mmc-hw-reset;
+ status = "okay";
+};
+
+&r_rsb {
+ status = "okay";
+
+ axp81x: pmic at 3a3 {
+ compatible = "x-powers,axp818", "x-powers,axp813";
+ reg = <0x3a3>;
+ interrupt-parent = <&r_intc>;
+ interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
+ eldoin-supply = <®_dcdc1>;
+ swin-supply = <®_dcdc1>;
+ x-powers,drive-vbus-en;
+ };
+
+ ac100: codec at e89 {
+ compatible = "x-powers,ac100";
+ reg = <0xe89>;
+
+ ac100_codec: codec {
+ compatible = "x-powers,ac100-codec";
+ interrupt-parent = <&r_pio>;
+ interrupts = <0 11 IRQ_TYPE_LEVEL_LOW>; /* PL11 */
+ #clock-cells = <0>;
+ clock-output-names = "4M_adda";
+ };
+
+ ac100_rtc: rtc {
+ compatible = "x-powers,ac100-rtc";
+ interrupt-parent = <&r_intc>;
+ interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
+ clocks = <&ac100_codec>;
+ #clock-cells = <1>;
+ clock-output-names = "cko1_rtc",
+ "cko2_rtc",
+ "cko3_rtc";
+ };
+ };
+};
+
+#include "axp81x.dtsi"
+
+®_aldo1 {
+ regulator-always-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "vcc-1v8";
+};
+
+®_aldo2 {
+ regulator-always-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "dram-pll";
+};
+
+®_aldo3 {
+ regulator-always-on;
+ regulator-min-microvolt = <3000000>;
+ regulator-max-microvolt = <3000000>;
+ regulator-name = "avcc";
+};
+
+®_dcdc1 {
+ /*
+ * The schematics say this should be 3.3V, but the FEX file says
+ * it should be 3V. The latter makes sense, as the WiFi module's
+ * I/O is indirectly powered from DCDC1, through SW. It is rated
+ * at 2.98V maximum.
+ */
+ regulator-always-on;
+ regulator-min-microvolt = <3000000>;
+ regulator-max-microvolt = <3000000>;
+ regulator-name = "vcc-3v";
+};
+
+®_dcdc2 {
+ regulator-always-on;
+ regulator-min-microvolt = <700000>;
+ regulator-max-microvolt = <1100000>;
+ regulator-name = "vdd-cpua";
+};
+
+®_dcdc3 {
+ regulator-always-on;
+ regulator-min-microvolt = <700000>;
+ regulator-max-microvolt = <1100000>;
+ regulator-name = "vdd-cpub";
+};
+
+®_dcdc4 {
+ regulator-min-microvolt = <700000>;
+ regulator-max-microvolt = <1100000>;
+ regulator-name = "vdd-gpu";
+};
+
+®_dcdc5 {
+ regulator-always-on;
+ regulator-min-microvolt = <1500000>;
+ regulator-max-microvolt = <1500000>;
+ regulator-name = "vcc-dram";
+};
+
+®_dcdc6 {
+ regulator-always-on;
+ regulator-min-microvolt = <900000>;
+ regulator-max-microvolt = <900000>;
+ regulator-name = "vdd-sys";
+};
+
+®_dldo2 {
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "dp-pwr";
+};
+
+®_dldo3 {
+ regulator-always-on;
+ regulator-min-microvolt = <2500000>;
+ regulator-max-microvolt = <2500000>;
+ regulator-name = "ephy-io";
+};
+
+®_dldo4 {
+ /*
+ * The PHY requires 20ms after all voltages are applied until core
+ * logic is ready and 30ms after the reset pin is de-asserted.
+ * Set a 100ms delay to account for PMIC ramp time and board traces.
+ */
+ regulator-enable-ramp-delay = <100000>;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "ephy";
+};
+
+®_drivevbus {
+ regulator-name = "usb0-vbus";
+ status = "okay";
+};
+
+®_eldo1 {
+ regulator-min-microvolt = <1200000>;
+ regulator-max-microvolt = <1200000>;
+ regulator-name = "dp-bridge-1";
+};
+
+®_eldo2 {
+ regulator-min-microvolt = <1200000>;
+ regulator-max-microvolt = <1200000>;
+ regulator-name = "dp-bridge-2";
+};
+
+®_fldo1 {
+ /* TODO should be handled by USB PHY */
+ regulator-always-on;
+ regulator-min-microvolt = <1080000>;
+ regulator-max-microvolt = <1320000>;
+ regulator-name = "vdd12-hsic";
+};
+
+®_fldo2 {
+ /*
+ * Despite the embedded CPUs core not being used in any way,
+ * this must remain on or the system will hang.
+ */
+ regulator-always-on;
+ regulator-min-microvolt = <700000>;
+ regulator-max-microvolt = <1100000>;
+ regulator-name = "vdd-cpus";
+};
+
+®_rtc_ldo {
+ regulator-name = "vcc-rtc";
+};
+
+®_sw {
+ regulator-name = "vcc-wifi-io";
+};
+
+&spdif {
status = "okay";
};
&uart0 {
pinctrl-names = "default";
- pinctrl-0 = <&uart0_pins_b>;
+ pinctrl-0 = <&uart0_pb_pins>;
status = "okay";
};
&usb_otg {
status = "okay";
};
+
+&usbphy {
+ usb1_vbus-supply = <®_usb1_vbus>;
+ usb2_vbus-supply = <®_usb2_vbus>;
+ status = "okay";
+};
diff --git a/arch/arm/dts/sun8i-a83t-tbs-a711.dts b/arch/arm/dts/sun8i-a83t-tbs-a711.dts
index 80e8b1cc90..1537ce148c 100644
--- a/arch/arm/dts/sun8i-a83t-tbs-a711.dts
+++ b/arch/arm/dts/sun8i-a83t-tbs-a711.dts
@@ -1,6 +1,6 @@
/*
- * Copyright 2017 Ondřej Jirman
- * Ondřej Jirman <megous@megous.com>
+ * Copyright (C) 2017 Touchless Biometric Systems AG
+ * Tomas Novotny <tomas@novotny.cz>
*
* This file is dual-licensed: you can use it either under the terms
* of the GPL or the X11 license, at your option. Note that this dual
@@ -44,33 +44,380 @@
/dts-v1/;
#include "sun8i-a83t.dtsi"
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/pwm/pwm.h>
+
/ {
model = "TBS A711 Tablet";
compatible = "tbs-biometrics,a711", "allwinner,sun8i-a83t";
aliases {
serial0 = &uart0;
+ serial1 = &uart1;
};
chosen {
stdout-path = "serial0:115200n8";
};
+
+ backlight: backlight {
+ compatible = "pwm-backlight";
+ pwms = <&pwm 0 50000 PWM_POLARITY_INVERTED>;
+ enable-gpios = <&pio 3 29 GPIO_ACTIVE_HIGH>;
+
+ brightness-levels = <0 1 2 4 8 16 32 64 128 255>;
+ default-brightness-level = <9>;
+ };
+
+ panel {
+ compatible = "tbs,a711-panel", "panel-lvds";
+ backlight = <&backlight>;
+ power-supply = <®_sw>;
+
+ width-mm = <153>;
+ height-mm = <90>;
+ data-mapping = "vesa-24";
+
+ panel-timing {
+ /* 1024x600 @60Hz */
+ clock-frequency = <52000000>;
+ hactive = <1024>;
+ vactive = <600>;
+ hsync-len = <20>;
+ hfront-porch = <180>;
+ hback-porch = <160>;
+ vfront-porch = <12>;
+ vback-porch = <23>;
+ vsync-len = <5>;
+ };
+
+ port {
+ panel_input: endpoint {
+ remote-endpoint = <&tcon0_out_lcd>;
+ };
+ };
+ };
+
+ reg_vbat: reg-vbat {
+ compatible = "regulator-fixed";
+ regulator-name = "vbat";
+ regulator-min-microvolt = <3700000>;
+ regulator-max-microvolt = <3700000>;
+ };
+
+ reg_vmain: reg-vmain {
+ compatible = "regulator-fixed";
+ regulator-name = "vmain";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ gpio = <&r_pio 0 9 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ vin-supply = <®_vbat>;
+ };
+
+ wifi_pwrseq: wifi_pwrseq {
+ compatible = "mmc-pwrseq-simple";
+ reset-gpios = <&r_pio 0 2 GPIO_ACTIVE_LOW>; /* PL2 WL-PMU-EN */
+
+ /*
+ * This is actually Bluetooth's clock, but we have to
+ * hook it up somewheere
+ */
+ clocks = <&ac100_rtc 1>;
+ clock-names = "ext_clock";
+ };
+};
+
+&cpu0 {
+ cpu-supply = <®_dcdc2>;
+};
+
+&cpu100 {
+ cpu-supply = <®_dcdc3>;
+};
+
+&de {
+ status = "okay";
};
+/*
+ * An USB-2 hub is connected here, which also means we don't need to
+ * enable the OHCI controller.
+ */
&ehci0 {
status = "okay";
};
-&ohci0 {
+/*
+ * There's a modem connected here that needs to be initialised before
+ * being able to be enumerated.
+ */
+&ehci1 {
+ status = "okay";
+};
+
+&mmc0 {
+ vmmc-supply = <®_dcdc1>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&mmc0_pins>;
+ cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>;
+ status = "okay";
+};
+
+&mmc1 {
+ mmc-pwrseq = <&wifi_pwrseq>;
+ bus-width = <4>;
+ vmmc-supply = <®_dldo1>;
+ vqmmc-supply = <®_dldo1>;
+ non-removable;
+ wakeup-source;
+ status = "okay";
+
+ brcmf: wifi at 1 {
+ reg = <1>;
+ compatible = "brcm,bcm4329-fmac";
+ interrupt-parent = <&r_pio>;
+ interrupts = <0 3 IRQ_TYPE_LEVEL_LOW>; /* PL3 WL_WAKE_UP */
+ interrupt-names = "host-wake";
+ };
+};
+
+&mmc2 {
+ pinctrl-0 = <&mmc2_8bit_emmc_pins>;
+ pinctrl-names = "default";
+ vmmc-supply = <®_dcdc1>;
+ vqmmc-supply = <®_dcdc1>;
+ bus-width = <8>;
+ non-removable;
+ cap-mmc-hw-reset;
+ status = "okay";
+};
+
+&pwm {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pwm_pin>;
+ status = "okay";
+};
+
+&r_rsb {
+ status = "okay";
+
+ axp81x: pmic at 3a3 {
+ compatible = "x-powers,axp813";
+ reg = <0x3a3>;
+ interrupt-parent = <&r_intc>;
+ interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
+ swin-supply = <®_dcdc1>;
+ x-powers,drive-vbus-en;
+ };
+
+ ac100: codec at e89 {
+ compatible = "x-powers,ac100";
+ reg = <0xe89>;
+
+ ac100_codec: codec {
+ compatible = "x-powers,ac100-codec";
+ interrupt-parent = <&r_pio>;
+ interrupts = <0 12 IRQ_TYPE_LEVEL_LOW>; /* PL12 */
+ #clock-cells = <0>;
+ clock-output-names = "4M_adda";
+ };
+
+ ac100_rtc: rtc {
+ compatible = "x-powers,ac100-rtc";
+ interrupt-parent = <&r_intc>;
+ interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
+ clocks = <&ac100_codec>;
+ #clock-cells = <1>;
+ clock-output-names = "cko1_rtc",
+ "cko2_rtc",
+ "cko3_rtc";
+ };
+ };
+
+};
+
+#include "axp81x.dtsi"
+
+&battery_power_supply {
+ status = "okay";
+};
+
+®_aldo1 {
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "vcc-1.8";
+};
+
+®_aldo2 {
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-always-on;
+ regulator-name = "vdd-drampll";
+};
+
+®_aldo3 {
+ regulator-min-microvolt = <3000000>;
+ regulator-max-microvolt = <3000000>;
+ regulator-always-on;
+ regulator-name = "avcc";
+};
+
+®_dcdc1 {
+ regulator-min-microvolt = <3100000>;
+ regulator-max-microvolt = <3100000>;
+ regulator-always-on;
+ regulator-name = "vcc-io";
+};
+
+®_dcdc2 {
+ regulator-min-microvolt = <700000>;
+ regulator-max-microvolt = <1100000>;
+ regulator-always-on;
+ regulator-name = "vdd-cpu-A";
+};
+
+®_dcdc3 {
+ regulator-min-microvolt = <700000>;
+ regulator-max-microvolt = <1100000>;
+ regulator-always-on;
+ regulator-name = "vdd-cpu-B";
+};
+
+®_dcdc4 {
+ regulator-min-microvolt = <700000>;
+ regulator-max-microvolt = <1100000>;
+ regulator-name = "vdd-gpu";
+};
+
+®_dcdc5 {
+ regulator-min-microvolt = <1200000>;
+ regulator-max-microvolt = <1500000>;
+ regulator-always-on;
+ regulator-name = "vcc-dram";
+};
+
+®_dcdc6 {
+ regulator-min-microvolt = <900000>;
+ regulator-max-microvolt = <900000>;
+ regulator-always-on;
+ regulator-name = "vdd-sys";
+};
+
+®_dldo1 {
+ regulator-min-microvolt = <3100000>;
+ regulator-max-microvolt = <3100000>;
+ regulator-name = "vcc-wifi-io";
+};
+
+®_dldo2 {
+ regulator-min-microvolt = <2800000>;
+ regulator-max-microvolt = <4200000>;
+ regulator-name = "vcc-mipi";
+};
+
+®_dldo3 {
+ regulator-min-microvolt = <2800000>;
+ regulator-max-microvolt = <2800000>;
+ regulator-name = "vdd-csi";
+};
+
+®_dldo4 {
+ regulator-min-microvolt = <2800000>;
+ regulator-max-microvolt = <2800000>;
+ regulator-name = "avdd-csi";
+};
+
+®_drivevbus {
+ regulator-name = "usb0-vbus";
status = "okay";
};
+®_eldo1 {
+ regulator-min-microvolt = <1200000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "dvdd-csi-r";
+};
+
+®_eldo2 {
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "vcc-dsi";
+};
+
+®_eldo3 {
+ regulator-min-microvolt = <1200000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "dvdd-csi-f";
+};
+
+®_fldo1 {
+ regulator-min-microvolt = <1200000>;
+ regulator-max-microvolt = <1200000>;
+ regulator-name = "vcc-hsic";
+};
+
+®_fldo2 {
+ regulator-min-microvolt = <700000>;
+ regulator-max-microvolt = <1100000>;
+ regulator-always-on;
+ regulator-name = "vdd-cpus";
+};
+
+®_ldo_io0 {
+ regulator-min-microvolt = <3100000>;
+ regulator-max-microvolt = <3100000>;
+ regulator-name = "vcc-ctp";
+ status = "okay";
+};
+
+®_ldo_io1 {
+ regulator-min-microvolt = <3100000>;
+ regulator-max-microvolt = <3100000>;
+ regulator-name = "vcc-vb";
+ status = "okay";
+};
+
+®_sw {
+ regulator-min-microvolt = <3100000>;
+ regulator-max-microvolt = <3100000>;
+ regulator-name = "vcc-lcd";
+};
+
+&tcon0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&lcd_lvds_pins>;
+};
+
+&tcon0_out {
+ tcon0_out_lcd: endpoint at 0 {
+ reg = <0>;
+ remote-endpoint = <&panel_input>;
+ };
+};
+
&uart0 {
pinctrl-names = "default";
- pinctrl-0 = <&uart0_pins_b>;
+ pinctrl-0 = <&uart0_pb_pins>;
+ status = "okay";
+};
+
+/* There's the BT part of the AP6210 connected to that UART */
+&uart1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart1_pins>, <&uart1_rts_cts_pins>;
status = "okay";
};
&usb_otg {
+ dr_mode = "otg";
+ status = "okay";
+};
+
+&usbphy {
+ usb0_id_det-gpios = <&pio 7 11 GPIO_ACTIVE_HIGH>; /* PH11 */
+ usb0_vbus-supply = <®_drivevbus>;
+ usb1_vbus_supply = <®_vmain>;
+ usb2_vbus_supply = <®_vmain>;
status = "okay";
};
diff --git a/arch/arm/dts/sun8i-a83t.dtsi b/arch/arm/dts/sun8i-a83t.dtsi
index 2953e0fdac..2be23d6009 100644
--- a/arch/arm/dts/sun8i-a83t.dtsi
+++ b/arch/arm/dts/sun8i-a83t.dtsi
@@ -40,67 +40,99 @@
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
-
*/
-#include "skeleton.dtsi"
-
#include <dt-bindings/interrupt-controller/arm-gic.h>
-#include <dt-bindings/pinctrl/sun4i-a10.h>
+#include <dt-bindings/clock/sun8i-a83t-ccu.h>
+#include <dt-bindings/clock/sun8i-de2.h>
+#include <dt-bindings/clock/sun8i-r-ccu.h>
+#include <dt-bindings/reset/sun8i-a83t-ccu.h>
+#include <dt-bindings/reset/sun8i-de2.h>
+#include <dt-bindings/reset/sun8i-r-ccu.h>
/ {
interrupt-parent = <&gic>;
+ #address-cells = <1>;
+ #size-cells = <1>;
cpus {
#address-cells = <1>;
#size-cells = <0>;
- cpu at 0 {
+ cpu0: cpu at 0 {
+ clocks = <&ccu CLK_C0CPUX>;
+ clock-names = "cpu";
compatible = "arm,cortex-a7";
device_type = "cpu";
+ operating-points-v2 = <&cpu0_opp_table>;
+ cci-control-port = <&cci_control0>;
+ enable-method = "allwinner,sun8i-a83t-smp";
reg = <0>;
};
cpu at 1 {
compatible = "arm,cortex-a7";
device_type = "cpu";
+ operating-points-v2 = <&cpu0_opp_table>;
+ cci-control-port = <&cci_control0>;
+ enable-method = "allwinner,sun8i-a83t-smp";
reg = <1>;
};
cpu at 2 {
compatible = "arm,cortex-a7";
device_type = "cpu";
+ operating-points-v2 = <&cpu0_opp_table>;
+ cci-control-port = <&cci_control0>;
+ enable-method = "allwinner,sun8i-a83t-smp";
reg = <2>;
};
cpu at 3 {
compatible = "arm,cortex-a7";
device_type = "cpu";
+ operating-points-v2 = <&cpu0_opp_table>;
+ cci-control-port = <&cci_control0>;
+ enable-method = "allwinner,sun8i-a83t-smp";
reg = <3>;
};
- cpu at 100 {
+ cpu100: cpu at 100 {
+ clocks = <&ccu CLK_C1CPUX>;
+ clock-names = "cpu";
compatible = "arm,cortex-a7";
device_type = "cpu";
+ operating-points-v2 = <&cpu1_opp_table>;
+ cci-control-port = <&cci_control1>;
+ enable-method = "allwinner,sun8i-a83t-smp";
reg = <0x100>;
};
cpu at 101 {
compatible = "arm,cortex-a7";
device_type = "cpu";
+ operating-points-v2 = <&cpu1_opp_table>;
+ cci-control-port = <&cci_control1>;
+ enable-method = "allwinner,sun8i-a83t-smp";
reg = <0x101>;
};
cpu at 102 {
compatible = "arm,cortex-a7";
device_type = "cpu";
+ operating-points-v2 = <&cpu1_opp_table>;
+ cci-control-port = <&cci_control1>;
+ enable-method = "allwinner,sun8i-a83t-smp";
reg = <0x102>;
};
cpu at 103 {
compatible = "arm,cortex-a7";
device_type = "cpu";
+ operating-points-v2 = <&cpu1_opp_table>;
+ cci-control-port = <&cci_control1>;
+ enable-method = "allwinner,sun8i-a83t-smp";
reg = <0x103>;
};
};
@@ -123,6 +155,7 @@
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <24000000>;
+ clock-accuracy = <50000>;
clock-output-names = "osc24M";
};
@@ -148,48 +181,575 @@
};
};
+ de: display-engine {
+ compatible = "allwinner,sun8i-a83t-display-engine";
+ allwinner,pipelines = <&mixer0>, <&mixer1>;
+ status = "disabled";
+ };
+
+ memory {
+ reg = <0x40000000 0x80000000>;
+ device_type = "memory";
+ };
+
+ cpu0_opp_table: opp_table0 {
+ compatible = "operating-points-v2";
+ opp-shared;
+
+ opp-480000000 {
+ opp-hz = /bits/ 64 <480000000>;
+ opp-microvolt = <840000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ };
+
+ opp-600000000 {
+ opp-hz = /bits/ 64 <600000000>;
+ opp-microvolt = <840000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ };
+
+ opp-720000000 {
+ opp-hz = /bits/ 64 <720000000>;
+ opp-microvolt = <840000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ };
+
+ opp-864000000 {
+ opp-hz = /bits/ 64 <864000000>;
+ opp-microvolt = <840000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ };
+
+ opp-912000000 {
+ opp-hz = /bits/ 64 <912000000>;
+ opp-microvolt = <840000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ };
+
+ opp-1008000000 {
+ opp-hz = /bits/ 64 <1008000000>;
+ opp-microvolt = <840000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ };
+
+ opp-1128000000 {
+ opp-hz = /bits/ 64 <1128000000>;
+ opp-microvolt = <840000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ };
+
+ opp-1200000000 {
+ opp-hz = /bits/ 64 <1200000000>;
+ opp-microvolt = <840000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ };
+ };
+
+ cpu1_opp_table: opp_table1 {
+ compatible = "operating-points-v2";
+ opp-shared;
+
+ opp-480000000 {
+ opp-hz = /bits/ 64 <480000000>;
+ opp-microvolt = <840000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ };
+
+ opp-600000000 {
+ opp-hz = /bits/ 64 <600000000>;
+ opp-microvolt = <840000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ };
+
+ opp-720000000 {
+ opp-hz = /bits/ 64 <720000000>;
+ opp-microvolt = <840000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ };
+
+ opp-864000000 {
+ opp-hz = /bits/ 64 <864000000>;
+ opp-microvolt = <840000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ };
+
+ opp-912000000 {
+ opp-hz = /bits/ 64 <912000000>;
+ opp-microvolt = <840000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ };
+
+ opp-1008000000 {
+ opp-hz = /bits/ 64 <1008000000>;
+ opp-microvolt = <840000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ };
+
+ opp-1128000000 {
+ opp-hz = /bits/ 64 <1128000000>;
+ opp-microvolt = <840000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ };
+
+ opp-1200000000 {
+ opp-hz = /bits/ 64 <1200000000>;
+ opp-microvolt = <840000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ };
+ };
+
soc {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
ranges;
- pio: pinctrl at 01c20800 {
+ display_clocks: clock at 1000000 {
+ compatible = "allwinner,sun8i-a83t-de2-clk";
+ reg = <0x01000000 0x100000>;
+ clocks = <&ccu CLK_PLL_DE>,
+ <&ccu CLK_BUS_DE>;
+ clock-names = "mod",
+ "bus";
+ resets = <&ccu RST_BUS_DE>;
+ #clock-cells = <1>;
+ #reset-cells = <1>;
+ };
+
+ mixer0: mixer at 1100000 {
+ compatible = "allwinner,sun8i-a83t-de2-mixer-0";
+ reg = <0x01100000 0x100000>;
+ clocks = <&display_clocks CLK_BUS_MIXER0>,
+ <&display_clocks CLK_MIXER0>;
+ clock-names = "bus",
+ "mod";
+ resets = <&display_clocks RST_MIXER0>;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ mixer0_out: port at 1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <1>;
+
+ mixer0_out_tcon0: endpoint at 0 {
+ reg = <0>;
+ remote-endpoint = <&tcon0_in_mixer0>;
+ };
+ };
+ };
+ };
+
+ mixer1: mixer at 1200000 {
+ compatible = "allwinner,sun8i-a83t-de2-mixer-1";
+ reg = <0x01200000 0x100000>;
+ clocks = <&display_clocks CLK_BUS_MIXER1>,
+ <&display_clocks CLK_MIXER1>;
+ clock-names = "bus",
+ "mod";
+ resets = <&display_clocks RST_WB>;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ mixer1_out: port at 1 {
+ reg = <1>;
+
+ mixer1_out_tcon1: endpoint {
+ remote-endpoint = <&tcon1_in_mixer1>;
+ };
+ };
+ };
+ };
+
+ cpucfg at 1700000 {
+ compatible = "allwinner,sun8i-a83t-cpucfg";
+ reg = <0x01700000 0x400>;
+ };
+
+ cci at 1790000 {
+ compatible = "arm,cci-400";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ reg = <0x01790000 0x10000>;
+ ranges = <0x0 0x01790000 0x10000>;
+
+ cci_control0: slave-if at 4000 {
+ compatible = "arm,cci-400-ctrl-if";
+ interface-type = "ace";
+ reg = <0x4000 0x1000>;
+ };
+
+ cci_control1: slave-if at 5000 {
+ compatible = "arm,cci-400-ctrl-if";
+ interface-type = "ace";
+ reg = <0x5000 0x1000>;
+ };
+
+ pmu at 9000 {
+ compatible = "arm,cci-400-pmu,r1";
+ reg = <0x9000 0x5000>;
+ interrupts = <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
+ };
+ };
+
+ syscon: syscon at 1c00000 {
+ compatible = "allwinner,sun8i-a83t-system-controller",
+ "syscon";
+ reg = <0x01c00000 0x1000>;
+ };
+
+ dma: dma-controller at 1c02000 {
+ compatible = "allwinner,sun8i-a83t-dma";
+ reg = <0x01c02000 0x1000>;
+ interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&ccu CLK_BUS_DMA>;
+ resets = <&ccu RST_BUS_DMA>;
+ #dma-cells = <1>;
+ };
+
+ tcon0: lcd-controller at 1c0c000 {
+ compatible = "allwinner,sun8i-a83t-tcon-lcd";
+ reg = <0x01c0c000 0x1000>;
+ interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&ccu CLK_BUS_TCON0>, <&ccu CLK_TCON0>;
+ clock-names = "ahb", "tcon-ch0";
+ clock-output-names = "tcon-pixel-clock";
+ resets = <&ccu RST_BUS_TCON0>, <&ccu RST_BUS_LVDS>;
+ reset-names = "lcd", "lvds";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ tcon0_in: port at 0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0>;
+
+ tcon0_in_mixer0: endpoint at 0 {
+ reg = <0>;
+ remote-endpoint = <&mixer0_out_tcon0>;
+ };
+ };
+
+ tcon0_out: port at 1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <1>;
+ };
+ };
+ };
+
+ tcon1: lcd-controller at 1c0d000 {
+ compatible = "allwinner,sun8i-a83t-tcon-tv";
+ reg = <0x01c0d000 0x1000>;
+ interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&ccu CLK_BUS_TCON1>, <&ccu CLK_TCON1>;
+ clock-names = "ahb", "tcon-ch1";
+ resets = <&ccu RST_BUS_TCON1>;
+ reset-names = "lcd";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ tcon1_in: port at 0 {
+ reg = <0>;
+
+ tcon1_in_mixer1: endpoint {
+ remote-endpoint = <&mixer1_out_tcon1>;
+ };
+ };
+
+ tcon1_out: port at 1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <1>;
+
+ tcon1_out_hdmi: endpoint at 1 {
+ reg = <1>;
+ remote-endpoint = <&hdmi_in_tcon1>;
+ };
+ };
+ };
+ };
+
+ mmc0: mmc at 1c0f000 {
+ compatible = "allwinner,sun8i-a83t-mmc",
+ "allwinner,sun7i-a20-mmc";
+ reg = <0x01c0f000 0x1000>;
+ clocks = <&ccu CLK_BUS_MMC0>,
+ <&ccu CLK_MMC0>,
+ <&ccu CLK_MMC0_OUTPUT>,
+ <&ccu CLK_MMC0_SAMPLE>;
+ clock-names = "ahb",
+ "mmc",
+ "output",
+ "sample";
+ resets = <&ccu RST_BUS_MMC0>;
+ reset-names = "ahb";
+ interrupts = <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>;
+ status = "disabled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ mmc1: mmc at 1c10000 {
+ compatible = "allwinner,sun8i-a83t-mmc",
+ "allwinner,sun7i-a20-mmc";
+ reg = <0x01c10000 0x1000>;
+ clocks = <&ccu CLK_BUS_MMC1>,
+ <&ccu CLK_MMC1>,
+ <&ccu CLK_MMC1_OUTPUT>,
+ <&ccu CLK_MMC1_SAMPLE>;
+ clock-names = "ahb",
+ "mmc",
+ "output",
+ "sample";
+ resets = <&ccu RST_BUS_MMC1>;
+ reset-names = "ahb";
+ interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&mmc1_pins>;
+ status = "disabled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ mmc2: mmc at 1c11000 {
+ compatible = "allwinner,sun8i-a83t-emmc";
+ reg = <0x01c11000 0x1000>;
+ clocks = <&ccu CLK_BUS_MMC2>,
+ <&ccu CLK_MMC2>,
+ <&ccu CLK_MMC2_OUTPUT>,
+ <&ccu CLK_MMC2_SAMPLE>;
+ clock-names = "ahb",
+ "mmc",
+ "output",
+ "sample";
+ resets = <&ccu RST_BUS_MMC2>;
+ reset-names = "ahb";
+ interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
+ status = "disabled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ sid: eeprom at 1c14000 {
+ compatible = "allwinner,sun8i-a83t-sid";
+ reg = <0x1c14000 0x400>;
+ };
+
+ usb_otg: usb at 1c19000 {
+ compatible = "allwinner,sun8i-a83t-musb",
+ "allwinner,sun8i-a33-musb";
+ reg = <0x01c19000 0x0400>;
+ clocks = <&ccu CLK_BUS_OTG>;
+ resets = <&ccu RST_BUS_OTG>;
+ interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "mc";
+ phys = <&usbphy 0>;
+ phy-names = "usb";
+ extcon = <&usbphy 0>;
+ status = "disabled";
+ };
+
+ usbphy: phy at 1c19400 {
+ compatible = "allwinner,sun8i-a83t-usb-phy";
+ reg = <0x01c19400 0x10>,
+ <0x01c1a800 0x14>,
+ <0x01c1b800 0x14>;
+ reg-names = "phy_ctrl",
+ "pmu1",
+ "pmu2";
+ clocks = <&ccu CLK_USB_PHY0>,
+ <&ccu CLK_USB_PHY1>,
+ <&ccu CLK_USB_HSIC>,
+ <&ccu CLK_USB_HSIC_12M>;
+ clock-names = "usb0_phy",
+ "usb1_phy",
+ "usb2_phy",
+ "usb2_hsic_12M";
+ resets = <&ccu RST_USB_PHY0>,
+ <&ccu RST_USB_PHY1>,
+ <&ccu RST_USB_HSIC>;
+ reset-names = "usb0_reset",
+ "usb1_reset",
+ "usb2_reset";
+ status = "disabled";
+ #phy-cells = <1>;
+ };
+
+ ehci0: usb at 1c1a000 {
+ compatible = "allwinner,sun8i-a83t-ehci",
+ "generic-ehci";
+ reg = <0x01c1a000 0x100>;
+ interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&ccu CLK_BUS_EHCI0>;
+ resets = <&ccu RST_BUS_EHCI0>;
+ phys = <&usbphy 1>;
+ phy-names = "usb";
+ status = "disabled";
+ };
+
+ ohci0: usb at 1c1a400 {
+ compatible = "allwinner,sun8i-a83t-ohci",
+ "generic-ohci";
+ reg = <0x01c1a400 0x100>;
+ interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&ccu CLK_BUS_OHCI0>, <&ccu CLK_USB_OHCI0>;
+ resets = <&ccu RST_BUS_OHCI0>;
+ phys = <&usbphy 1>;
+ phy-names = "usb";
+ status = "disabled";
+ };
+
+ ehci1: usb at 1c1b000 {
+ compatible = "allwinner,sun8i-a83t-ehci",
+ "generic-ehci";
+ reg = <0x01c1b000 0x100>;
+ interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&ccu CLK_BUS_EHCI1>;
+ resets = <&ccu RST_BUS_EHCI1>;
+ phys = <&usbphy 2>;
+ phy-names = "usb";
+ status = "disabled";
+ };
+
+ ccu: clock at 1c20000 {
+ compatible = "allwinner,sun8i-a83t-ccu";
+ reg = <0x01c20000 0x400>;
+ clocks = <&osc24M>, <&osc16Md512>;
+ clock-names = "hosc", "losc";
+ #clock-cells = <1>;
+ #reset-cells = <1>;
+ };
+
+ pio: pinctrl at 1c20800 {
compatible = "allwinner,sun8i-a83t-pinctrl";
interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
reg = <0x01c20800 0x400>;
- clocks = <&osc24M>;
+ clocks = <&ccu CLK_BUS_PIO>, <&osc24M>, <&osc16Md512>;
+ clock-names = "apb", "hosc", "losc";
gpio-controller;
interrupt-controller;
#interrupt-cells = <3>;
#gpio-cells = <3>;
- mmc0_pins_a: mmc0 at 0 {
- allwinner,pins = "PF0", "PF1", "PF2",
- "PF3", "PF4", "PF5";
- allwinner,function = "mmc0";
- allwinner,drive = <SUN4I_PINCTRL_30_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ emac_rgmii_pins: emac-rgmii-pins {
+ pins = "PD2", "PD3", "PD4", "PD5", "PD6", "PD7",
+ "PD11", "PD12", "PD13", "PD14", "PD18",
+ "PD19", "PD21", "PD22", "PD23";
+ function = "gmac";
+ /*
+ * data lines in RGMII mode use DDR mode
+ * and need a higher signal drive strength
+ */
+ drive-strength = <40>;
+ };
+
+ hdmi_pins: hdmi-pins {
+ pins = "PH6", "PH7", "PH8";
+ function = "hdmi";
+ };
+
+ i2c0_pins: i2c0-pins {
+ pins = "PH0", "PH1";
+ function = "i2c0";
+ };
+
+ i2c1_pins: i2c1-pins {
+ pins = "PH2", "PH3";
+ function = "i2c1";
+ };
+
+ i2c2_ph_pins: i2c2-ph-pins {
+ pins = "PH4", "PH5";
+ function = "i2c2";
+ };
+
+ i2s1_pins: i2s1-pins {
+ /* I2S1 does not have external MCLK pin */
+ pins = "PG10", "PG11", "PG12", "PG13";
+ function = "i2s1";
+ };
+
+ lcd_lvds_pins: lcd-lvds-pins {
+ pins = "PD18", "PD19", "PD20", "PD21", "PD22",
+ "PD23", "PD24", "PD25", "PD26", "PD27";
+ function = "lvds0";
+ };
+
+ mmc0_pins: mmc0-pins {
+ pins = "PF0", "PF1", "PF2",
+ "PF3", "PF4", "PF5";
+ function = "mmc0";
+ drive-strength = <30>;
+ bias-pull-up;
+ };
+
+ mmc1_pins: mmc1-pins {
+ pins = "PG0", "PG1", "PG2",
+ "PG3", "PG4", "PG5";
+ function = "mmc1";
+ drive-strength = <30>;
+ bias-pull-up;
+ };
+
+ mmc2_8bit_emmc_pins: mmc2-8bit-emmc-pins {
+ pins = "PC5", "PC6", "PC8", "PC9",
+ "PC10", "PC11", "PC12", "PC13",
+ "PC14", "PC15", "PC16";
+ function = "mmc2";
+ drive-strength = <30>;
+ bias-pull-up;
+ };
+
+ pwm_pin: pwm-pin {
+ pins = "PD28";
+ function = "pwm";
+ };
+
+ spdif_tx_pin: spdif-tx-pin {
+ pins = "PE18";
+ function = "spdif";
+ };
+
+ uart0_pb_pins: uart0-pb-pins {
+ pins = "PB9", "PB10";
+ function = "uart0";
+ };
+
+ uart0_pf_pins: uart0-pf-pins {
+ pins = "PF2", "PF4";
+ function = "uart0";
};
- uart0_pins_a: uart0 at 0 {
- allwinner,pins = "PF2", "PF4";
- allwinner,function = "uart0";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ uart1_pins: uart1-pins {
+ pins = "PG6", "PG7";
+ function = "uart1";
};
- uart0_pins_b: uart0 at 1 {
- allwinner,pins = "PB9", "PB10";
- allwinner,function = "uart0";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ uart1_rts_cts_pins: uart1-rts-cts-pins {
+ pins = "PG8", "PG9";
+ function = "uart1";
};
};
- timer at 01c20c00 {
+ timer at 1c20c00 {
compatible = "allwinner,sun4i-a10-timer";
reg = <0x01c20c00 0xa0>;
interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
@@ -197,27 +757,166 @@
clocks = <&osc24M>;
};
- watchdog at 01c20ca0 {
+ watchdog at 1c20ca0 {
compatible = "allwinner,sun6i-a31-wdt";
reg = <0x01c20ca0 0x20>;
interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&osc24M>;
};
- uart0: serial at 01c28000 {
+ spdif: spdif at 1c21000 {
+ #sound-dai-cells = <0>;
+ compatible = "allwinner,sun8i-a83t-spdif",
+ "allwinner,sun8i-h3-spdif";
+ reg = <0x01c21000 0x400>;
+ interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&ccu CLK_BUS_SPDIF>, <&ccu CLK_SPDIF>;
+ resets = <&ccu RST_BUS_SPDIF>;
+ clock-names = "apb", "spdif";
+ dmas = <&dma 2>;
+ dma-names = "tx";
+ pinctrl-names = "default";
+ pinctrl-0 = <&spdif_tx_pin>;
+ status = "disabled";
+ };
+
+ i2s0: i2s at 1c22000 {
+ #sound-dai-cells = <0>;
+ compatible = "allwinner,sun8i-a83t-i2s";
+ reg = <0x01c22000 0x400>;
+ interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&ccu CLK_BUS_I2S0>, <&ccu CLK_I2S0>;
+ clock-names = "apb", "mod";
+ dmas = <&dma 3>, <&dma 3>;
+ resets = <&ccu RST_BUS_I2S0>;
+ dma-names = "rx", "tx";
+ status = "disabled";
+ };
+
+ i2s1: i2s at 1c22400 {
+ #sound-dai-cells = <0>;
+ compatible = "allwinner,sun8i-a83t-i2s";
+ reg = <0x01c22400 0x400>;
+ interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&ccu CLK_BUS_I2S1>, <&ccu CLK_I2S1>;
+ clock-names = "apb", "mod";
+ dmas = <&dma 4>, <&dma 4>;
+ resets = <&ccu RST_BUS_I2S1>;
+ dma-names = "rx", "tx";
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2s1_pins>;
+ status = "disabled";
+ };
+
+ i2s2: i2s at 1c22800 {
+ #sound-dai-cells = <0>;
+ compatible = "allwinner,sun8i-a83t-i2s";
+ reg = <0x01c22800 0x400>;
+ interrupts = <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&ccu CLK_BUS_I2S2>, <&ccu CLK_I2S2>;
+ clock-names = "apb", "mod";
+ dmas = <&dma 27>;
+ resets = <&ccu RST_BUS_I2S2>;
+ dma-names = "tx";
+ status = "disabled";
+ };
+
+ pwm: pwm at 1c21400 {
+ compatible = "allwinner,sun8i-a83t-pwm",
+ "allwinner,sun8i-h3-pwm";
+ reg = <0x01c21400 0x400>;
+ clocks = <&osc24M>;
+ #pwm-cells = <3>;
+ status = "disabled";
+ };
+
+ uart0: serial at 1c28000 {
compatible = "snps,dw-apb-uart";
reg = <0x01c28000 0x400>;
interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>;
reg-shift = <2>;
reg-io-width = <4>;
- clocks = <&osc24M>;
+ clocks = <&ccu CLK_BUS_UART0>;
+ resets = <&ccu RST_BUS_UART0>;
status = "disabled";
};
- gic: interrupt-controller at 01c81000 {
+ uart1: serial at 1c28400 {
+ compatible = "snps,dw-apb-uart";
+ reg = <0x01c28400 0x400>;
+ interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
+ reg-shift = <2>;
+ reg-io-width = <4>;
+ clocks = <&ccu CLK_BUS_UART1>;
+ resets = <&ccu RST_BUS_UART1>;
+ status = "disabled";
+ };
+
+ i2c0: i2c at 1c2ac00 {
+ compatible = "allwinner,sun8i-a83t-i2c",
+ "allwinner,sun6i-a31-i2c";
+ reg = <0x01c2ac00 0x400>;
+ interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&ccu CLK_BUS_I2C0>;
+ resets = <&ccu RST_BUS_I2C0>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c0_pins>;
+ status = "disabled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ i2c1: i2c at 1c2b000 {
+ compatible = "allwinner,sun8i-a83t-i2c",
+ "allwinner,sun6i-a31-i2c";
+ reg = <0x01c2b000 0x400>;
+ interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&ccu CLK_BUS_I2C1>;
+ resets = <&ccu RST_BUS_I2C1>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c1_pins>;
+ status = "disabled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ i2c2: i2c at 1c2b400 {
+ compatible = "allwinner,sun8i-a83t-i2c",
+ "allwinner,sun6i-a31-i2c";
+ reg = <0x01c2b400 0x400>;
+ interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&ccu CLK_BUS_I2C2>;
+ resets = <&ccu RST_BUS_I2C2>;
+ status = "disabled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ emac: ethernet at 1c30000 {
+ compatible = "allwinner,sun8i-a83t-emac";
+ syscon = <&syscon>;
+ reg = <0x01c30000 0x104>;
+ interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "macirq";
+ resets = <&ccu 13>;
+ reset-names = "stmmaceth";
+ clocks = <&ccu 27>;
+ clock-names = "stmmaceth";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+
+ mdio: mdio {
+ compatible = "snps,dwmac-mdio";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+ };
+
+ gic: interrupt-controller at 1c81000 {
compatible = "arm,cortex-a7-gic", "arm,cortex-a15-gic";
reg = <0x01c81000 0x1000>,
- <0x01c82000 0x1000>,
+ <0x01c82000 0x2000>,
<0x01c84000 0x2000>,
<0x01c86000 0x2000>;
interrupt-controller;
@@ -225,59 +924,107 @@
interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_HIGH)>;
};
- usb_otg: usb at 01c19000 {
- compatible = "allwinner,sun8i-a33-musb";
- reg = <0x01c19000 0x400>;
- interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "mc";
- phys = <&usbphy 0>;
- phy-names = "usb";
+ hdmi: hdmi at 1ee0000 {
+ compatible = "allwinner,sun8i-a83t-dw-hdmi";
+ reg = <0x01ee0000 0x10000>;
+ reg-io-width = <1>;
+ interrupts = <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&ccu CLK_BUS_HDMI>, <&ccu CLK_HDMI_SLOW>,
+ <&ccu CLK_HDMI>;
+ clock-names = "iahb", "isfr", "tmds";
+ resets = <&ccu RST_BUS_HDMI1>;
+ reset-names = "ctrl";
+ phys = <&hdmi_phy>;
+ phy-names = "hdmi-phy";
+ pinctrl-names = "default";
+ pinctrl-0 = <&hdmi_pins>;
status = "disabled";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ hdmi_in: port at 0 {
+ reg = <0>;
+
+ hdmi_in_tcon1: endpoint {
+ remote-endpoint = <&tcon1_out_hdmi>;
+ };
+ };
+
+ hdmi_out: port at 1 {
+ reg = <1>;
+ };
+ };
};
- usbphy: phy at 1c19400 {
- compatible = "allwinner,sun8i-a83t-usb-phy";
- reg = <0x01c19400 0x10>,
- <0x01c1a800 0x14>,
- <0x01c1b800 0x14>;
- reg-names = "phy_ctrl",
- "pmu1",
- "pmu2";
- status = "disabled";
- #phy-cells = <1>;
+ hdmi_phy: hdmi-phy at 1ef0000 {
+ compatible = "allwinner,sun8i-a83t-hdmi-phy";
+ reg = <0x01ef0000 0x10000>;
+ clocks = <&ccu CLK_BUS_HDMI>, <&ccu CLK_HDMI_SLOW>;
+ clock-names = "bus", "mod";
+ resets = <&ccu RST_BUS_HDMI0>;
+ reset-names = "phy";
+ #phy-cells = <0>;
};
- ehci0: usb at 01c1a000 {
- compatible = "allwinner,sun8i-a83t-ehci", "generic-ehci";
- reg = <0x01c1a000 0x100>;
- interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
- phys = <&usbphy 1>;
- phy-names = "usb";
- status = "disabled";
+ r_intc: interrupt-controller at 1f00c00 {
+ compatible = "allwinner,sun8i-a83t-r-intc",
+ "allwinner,sun6i-a31-r-intc";
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ reg = <0x01f00c00 0x400>;
+ interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
};
- ohci0: usb at 01c1a400 {
- compatible = "allwinner,sun8i-a83t-ohci", "generic-ohci";
- reg = <0x01c1a400 0x100>;
- interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
- phys = <&usbphy 1>;
- phy-names = "usb";
- status = "disabled";
+ r_ccu: clock at 1f01400 {
+ compatible = "allwinner,sun8i-a83t-r-ccu";
+ reg = <0x01f01400 0x400>;
+ clocks = <&osc24M>, <&osc16Md512>, <&osc16M>,
+ <&ccu 6>;
+ clock-names = "hosc", "losc", "iosc", "pll-periph";
+ #clock-cells = <1>;
+ #reset-cells = <1>;
};
- ehci1: usb at 01c1b000 {
- compatible = "allwinner,sun8i-a83t-ehci", "generic-ehci";
- reg = <0x01c1b000 0x100>;
- interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
- phys = <&usbphy 2>;
- phy-names = "usb";
- status = "disabled";
+ r_cpucfg at 1f01c00 {
+ compatible = "allwinner,sun8i-a83t-r-cpucfg";
+ reg = <0x1f01c00 0x400>;
};
- r_pio: pinctrl at 01f02c00 {
+ r_pio: pinctrl at 1f02c00 {
compatible = "allwinner,sun8i-a83t-r-pinctrl";
reg = <0x01f02c00 0x400>;
interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&r_ccu CLK_APB0_PIO>, <&osc24M>,
+ <&osc16Md512>;
+ clock-names = "apb", "hosc", "losc";
+ gpio-controller;
+ #gpio-cells = <3>;
+ interrupt-controller;
+ #interrupt-cells = <3>;
+
+ r_rsb_pins: r-rsb-pins {
+ pins = "PL0", "PL1";
+ function = "s_rsb";
+ drive-strength = <20>;
+ bias-pull-up;
+ };
+ };
+
+ r_rsb: rsb at 1f03400 {
+ compatible = "allwinner,sun8i-a83t-rsb",
+ "allwinner,sun8i-a23-rsb";
+ reg = <0x01f03400 0x400>;
+ interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&r_ccu CLK_APB0_RSB>;
+ clock-frequency = <3000000>;
+ resets = <&r_ccu RST_APB0_RSB>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&r_rsb_pins>;
+ status = "disabled";
+ #address-cells = <1>;
+ #size-cells = <0>;
};
};
};
diff --git a/include/dt-bindings/clock/sun8i-a83t-ccu.h b/include/dt-bindings/clock/sun8i-a83t-ccu.h
new file mode 100644
index 0000000000..78af5085f6
--- /dev/null
+++ b/include/dt-bindings/clock/sun8i-a83t-ccu.h
@@ -0,0 +1,140 @@
+/*
+ * Copyright (C) 2017 Chen-Yu Tsai <wens@csie.org>
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ * a) This file is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This file is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ * b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#ifndef _DT_BINDINGS_CLOCK_SUN8I_A83T_CCU_H_
+#define _DT_BINDINGS_CLOCK_SUN8I_A83T_CCU_H_
+
+#define CLK_PLL_PERIPH 6
+
+#define CLK_PLL_DE 9
+
+#define CLK_C0CPUX 11
+#define CLK_C1CPUX 12
+
+#define CLK_BUS_MIPI_DSI 19
+#define CLK_BUS_SS 20
+#define CLK_BUS_DMA 21
+#define CLK_BUS_MMC0 22
+#define CLK_BUS_MMC1 23
+#define CLK_BUS_MMC2 24
+#define CLK_BUS_NAND 25
+#define CLK_BUS_DRAM 26
+#define CLK_BUS_EMAC 27
+#define CLK_BUS_HSTIMER 28
+#define CLK_BUS_SPI0 29
+#define CLK_BUS_SPI1 30
+#define CLK_BUS_OTG 31
+#define CLK_BUS_EHCI0 32
+#define CLK_BUS_EHCI1 33
+#define CLK_BUS_OHCI0 34
+
+#define CLK_BUS_VE 35
+#define CLK_BUS_TCON0 36
+#define CLK_BUS_TCON1 37
+#define CLK_BUS_CSI 38
+#define CLK_BUS_HDMI 39
+#define CLK_BUS_DE 40
+#define CLK_BUS_GPU 41
+#define CLK_BUS_MSGBOX 42
+#define CLK_BUS_SPINLOCK 43
+
+#define CLK_BUS_SPDIF 44
+#define CLK_BUS_PIO 45
+#define CLK_BUS_I2S0 46
+#define CLK_BUS_I2S1 47
+#define CLK_BUS_I2S2 48
+#define CLK_BUS_TDM 49
+
+#define CLK_BUS_I2C0 50
+#define CLK_BUS_I2C1 51
+#define CLK_BUS_I2C2 52
+#define CLK_BUS_UART0 53
+#define CLK_BUS_UART1 54
+#define CLK_BUS_UART2 55
+#define CLK_BUS_UART3 56
+#define CLK_BUS_UART4 57
+
+#define CLK_NAND 59
+#define CLK_MMC0 60
+#define CLK_MMC0_SAMPLE 61
+#define CLK_MMC0_OUTPUT 62
+#define CLK_MMC1 63
+#define CLK_MMC1_SAMPLE 64
+#define CLK_MMC1_OUTPUT 65
+#define CLK_MMC2 66
+#define CLK_MMC2_SAMPLE 67
+#define CLK_MMC2_OUTPUT 68
+#define CLK_SS 69
+#define CLK_SPI0 70
+#define CLK_SPI1 71
+#define CLK_I2S0 72
+#define CLK_I2S1 73
+#define CLK_I2S2 74
+#define CLK_TDM 75
+#define CLK_SPDIF 76
+#define CLK_USB_PHY0 77
+#define CLK_USB_PHY1 78
+#define CLK_USB_HSIC 79
+#define CLK_USB_HSIC_12M 80
+#define CLK_USB_OHCI0 81
+
+#define CLK_DRAM_VE 83
+#define CLK_DRAM_CSI 84
+
+#define CLK_TCON0 85
+#define CLK_TCON1 86
+#define CLK_CSI_MISC 87
+#define CLK_MIPI_CSI 88
+#define CLK_CSI_MCLK 89
+#define CLK_CSI_SCLK 90
+#define CLK_VE 91
+#define CLK_AVS 92
+#define CLK_HDMI 93
+#define CLK_HDMI_SLOW 94
+
+#define CLK_MIPI_DSI0 96
+#define CLK_MIPI_DSI1 97
+#define CLK_GPU_CORE 98
+#define CLK_GPU_MEMORY 99
+#define CLK_GPU_HYD 100
+
+#endif /* _DT_BINDINGS_CLOCK_SUN8I_A83T_CCU_H_ */
diff --git a/include/dt-bindings/reset/sun8i-a83t-ccu.h b/include/dt-bindings/reset/sun8i-a83t-ccu.h
new file mode 100644
index 0000000000..784f6e1166
--- /dev/null
+++ b/include/dt-bindings/reset/sun8i-a83t-ccu.h
@@ -0,0 +1,98 @@
+/*
+ * Copyright (C) 2017 Chen-Yu Tsai <wens@csie.org>
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ * a) This file is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This file is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ * b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#ifndef _DT_BINDINGS_RESET_SUN8I_A83T_CCU_H_
+#define _DT_BINDINGS_RESET_SUN8I_A83T_CCU_H_
+
+#define RST_USB_PHY0 0
+#define RST_USB_PHY1 1
+#define RST_USB_HSIC 2
+
+#define RST_DRAM 3
+#define RST_MBUS 4
+
+#define RST_BUS_MIPI_DSI 5
+#define RST_BUS_SS 6
+#define RST_BUS_DMA 7
+#define RST_BUS_MMC0 8
+#define RST_BUS_MMC1 9
+#define RST_BUS_MMC2 10
+#define RST_BUS_NAND 11
+#define RST_BUS_DRAM 12
+#define RST_BUS_EMAC 13
+#define RST_BUS_HSTIMER 14
+#define RST_BUS_SPI0 15
+#define RST_BUS_SPI1 16
+#define RST_BUS_OTG 17
+#define RST_BUS_EHCI0 18
+#define RST_BUS_EHCI1 19
+#define RST_BUS_OHCI0 20
+
+#define RST_BUS_VE 21
+#define RST_BUS_TCON0 22
+#define RST_BUS_TCON1 23
+#define RST_BUS_CSI 24
+#define RST_BUS_HDMI0 25
+#define RST_BUS_HDMI1 26
+#define RST_BUS_DE 27
+#define RST_BUS_GPU 28
+#define RST_BUS_MSGBOX 29
+#define RST_BUS_SPINLOCK 30
+
+#define RST_BUS_LVDS 31
+
+#define RST_BUS_SPDIF 32
+#define RST_BUS_I2S0 33
+#define RST_BUS_I2S1 34
+#define RST_BUS_I2S2 35
+#define RST_BUS_TDM 36
+
+#define RST_BUS_I2C0 37
+#define RST_BUS_I2C1 38
+#define RST_BUS_I2C2 39
+#define RST_BUS_UART0 40
+#define RST_BUS_UART1 41
+#define RST_BUS_UART2 42
+#define RST_BUS_UART3 43
+#define RST_BUS_UART4 44
+
+#endif /* _DT_BINDINGS_RESET_SUN8I_A83T_CCU_H_ */
--
2.18.0.321.gffc6fa0e3
^ permalink raw reply related [flat|nested] 11+ messages in thread
* [U-Boot] [PATCH v2 7/7] ARM: dts: sun8i: Update R40/V40 dts(i) files from Linux-v4.18-rc3
2018-08-09 13:08 [U-Boot] [PATCH v2 0/7] ARM: dts: sunxi: Update dts(i) files from Linux-v4.18-rc3 Jagan Teki
` (5 preceding siblings ...)
2018-08-09 13:08 ` [U-Boot] [PATCH v2 6/7] ARM: dts: sun8i: Update A83T " Jagan Teki
@ 2018-08-09 13:08 ` Jagan Teki
2018-08-13 7:42 ` Jagan Teki
2018-08-26 10:47 ` [U-Boot] [PATCH v2 0/7] ARM: dts: sunxi: Update " Jagan Teki
7 siblings, 1 reply; 11+ messages in thread
From: Jagan Teki @ 2018-08-09 13:08 UTC (permalink / raw)
To: u-boot
Update all R40/V40 devicetree dtsi and dtsi files from Linux-v4.18-rc3
with below commit:
R40:
commit c36fd5a48bd20820855e3e91a89297eeaa31836e
Author: Chen-Yu Tsai <wens@csie.org>
Date: Wed May 2 00:12:25 2018 +0800
ARM: dts: sun8i: r40: bananapi-m2-ultra: Enable GMAC ethernet controller
V40:
commit c5f0bb472795170ab5c33be12e29ce7465fb31ed
Author: Icenowy Zheng <icenowy@aosc.io>
Date: Fri Apr 6 22:03:44 2018 +0800
ARM: sun8i: v40: enable USB host ports for Banana Pi M2 Berry
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
---
arch/arm/dts/sun8i-r40-bananapi-m2-ultra.dts | 168 +++++++++-
arch/arm/dts/sun8i-r40.dtsi | 303 +++++++++++++++++--
arch/arm/dts/sun8i-v40-bananapi-m2-berry.dts | 50 +++
3 files changed, 486 insertions(+), 35 deletions(-)
diff --git a/arch/arm/dts/sun8i-r40-bananapi-m2-ultra.dts b/arch/arm/dts/sun8i-r40-bananapi-m2-ultra.dts
index 28c9158302..25fb048c7d 100644
--- a/arch/arm/dts/sun8i-r40-bananapi-m2-ultra.dts
+++ b/arch/arm/dts/sun8i-r40-bananapi-m2-ultra.dts
@@ -1,5 +1,6 @@
/*
- * Copyright (C) 2016 Chen-Yu Tsai <wens@csie.org>
+ * Copyright (C) 2017 Chen-Yu Tsai <wens@csie.org>
+ * Copyright (C) 2017 Icenowy Zheng <icenowy@aosc.io>
*
* This file is dual-licensed: you can use it either under the terms
* of the GPL or the X11 license, at your option. Note that this dual
@@ -43,6 +44,8 @@
/dts-v1/;
#include "sun8i-r40.dtsi"
+#include <dt-bindings/gpio/gpio.h>
+
/ {
model = "Banana Pi BPI-M2-Ultra";
compatible = "sinovoip,bpi-m2-ultra", "allwinner,sun8i-r40";
@@ -55,17 +58,47 @@
chosen {
stdout-path = "serial0:115200n8";
};
+
+ leds {
+ compatible = "gpio-leds";
+
+ pwr-led {
+ label = "bananapi:red:pwr";
+ gpios = <&pio 7 20 GPIO_ACTIVE_HIGH>;
+ default-state = "on";
+ };
+
+ user-led-green {
+ label = "bananapi:green:user";
+ gpios = <&pio 7 21 GPIO_ACTIVE_HIGH>;
+ };
+
+ user-led-blue {
+ label = "bananapi:blue:user";
+ gpios = <&pio 7 22 GPIO_ACTIVE_HIGH>;
+ };
+ };
+
+ reg_vcc5v0: vcc5v0 {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc5v0";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ gpio = <&pio 7 23 GPIO_ACTIVE_HIGH>; /* PH23 */
+ enable-active-high;
+ };
+
+ wifi_pwrseq: wifi_pwrseq {
+ compatible = "mmc-pwrseq-simple";
+ reset-gpios = <&pio 6 10 GPIO_ACTIVE_LOW>; /* PG10 WIFI_EN */
+ };
};
-&i2c0 {
- pinctrl-names = "default";
- pinctrl-0 = <&i2c0_pins>;
+&ehci1 {
status = "okay";
};
-&uart0 {
- pinctrl-names = "default";
- pinctrl-0 = <&uart0_pb_pins>;
+&ehci2 {
status = "okay";
};
@@ -74,6 +107,7 @@
pinctrl-0 = <&gmac_rgmii_pins>;
phy-handle = <&phy1>;
phy-mode = "rgmii";
+ phy-supply = <®_dc1sw>;
status = "okay";
};
@@ -83,3 +117,123 @@
reg = <1>;
};
};
+
+&i2c0 {
+ status = "okay";
+
+ axp22x: pmic at 34 {
+ compatible = "x-powers,axp221";
+ reg = <0x34>;
+ interrupt-parent = <&nmi_intc>;
+ interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
+ };
+};
+
+#include "axp22x.dtsi"
+
+&mmc0 {
+ vmmc-supply = <®_dcdc1>;
+ bus-width = <4>;
+ cd-gpios = <&pio 7 13 GPIO_ACTIVE_HIGH>; /* PH13 */
+ cd-inverted;
+ status = "okay";
+};
+
+&mmc1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&mmc1_pg_pins>;
+ vmmc-supply = <®_dldo2>;
+ vqmmc-supply = <®_dldo1>;
+ mmc-pwrseq = <&wifi_pwrseq>;
+ bus-width = <4>;
+ non-removable;
+ status = "okay";
+};
+
+&mmc2 {
+ vmmc-supply = <®_dcdc1>;
+ vqmmc-supply = <®_dcdc1>;
+ bus-width = <8>;
+ non-removable;
+ status = "okay";
+};
+
+&ohci1 {
+ status = "okay";
+};
+
+&ohci2 {
+ status = "okay";
+};
+
+®_aldo2 {
+ regulator-always-on;
+ regulator-min-microvolt = <2500000>;
+ regulator-max-microvolt = <2500000>;
+ regulator-name = "vcc-pa";
+};
+
+®_aldo3 {
+ regulator-always-on;
+ regulator-min-microvolt = <2700000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "avcc";
+};
+
+®_dc1sw {
+ regulator-min-microvolt = <3000000>;
+ regulator-max-microvolt = <3000000>;
+ regulator-name = "vcc-gmac-phy";
+};
+
+®_dcdc1 {
+ regulator-always-on;
+ regulator-min-microvolt = <3000000>;
+ regulator-max-microvolt = <3000000>;
+ regulator-name = "vcc-3v0";
+};
+
+®_dcdc2 {
+ regulator-always-on;
+ regulator-min-microvolt = <1000000>;
+ regulator-max-microvolt = <1300000>;
+ regulator-name = "vdd-cpu";
+};
+
+®_dcdc3 {
+ regulator-always-on;
+ regulator-min-microvolt = <1000000>;
+ regulator-max-microvolt = <1300000>;
+ regulator-name = "vdd-sys";
+};
+
+®_dcdc5 {
+ regulator-always-on;
+ regulator-min-microvolt = <1500000>;
+ regulator-max-microvolt = <1500000>;
+ regulator-name = "vcc-dram";
+};
+
+®_dldo1 {
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc-wifi-io";
+};
+
+®_dldo2 {
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc-wifi";
+};
+
+&uart0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart0_pb_pins>;
+ status = "okay";
+};
+
+&usbphy {
+ usb1_vbus-supply = <®_vcc5v0>;
+ usb2_vbus-supply = <®_vcc5v0>;
+ status = "okay";
+};
diff --git a/arch/arm/dts/sun8i-r40.dtsi b/arch/arm/dts/sun8i-r40.dtsi
index 2cdfb54282..bd97ca3dc2 100644
--- a/arch/arm/dts/sun8i-r40.dtsi
+++ b/arch/arm/dts/sun8i-r40.dtsi
@@ -1,7 +1,6 @@
/*
- * Copyright 2016 Chen-Yu Tsai
- *
- * Chen-Yu Tsai <wens@csie.org>
+ * Copyright 2017 Chen-Yu Tsai <wens@csie.org>
+ * Copyright 2017 Icenowy Zheng <icenowy@aosc.io>
*
* This file is dual-licensed: you can use it either under the terms
* of the GPL or the X11 license, at your option. Note that this dual
@@ -51,24 +50,19 @@
#size-cells = <1>;
interrupt-parent = <&gic>;
- aliases {
- };
-
- chosen {
- };
-
clocks {
#address-cells = <1>;
#size-cells = <1>;
ranges;
- osc24M: osc24M_clk {
+ osc24M: osc24M {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <24000000>;
+ clock-output-names = "osc24M";
};
- osc32k: osc32k_clk {
+ osc32k: osc32k {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <32768>;
@@ -80,7 +74,7 @@
#address-cells = <1>;
#size-cells = <0>;
- cpu0: cpu at 0 {
+ cpu at 0 {
compatible = "arm,cortex-a7";
device_type = "cpu";
reg = <0>;
@@ -105,11 +99,6 @@
};
};
- memory at 40000000 {
- device_type = "memory";
- reg = <0x40000000 0x80000000>;
- };
-
soc {
compatible = "simple-bus";
#address-cells = <1>;
@@ -140,6 +129,122 @@
#size-cells = <0>;
};
+ mmc1: mmc at 1c10000 {
+ compatible = "allwinner,sun8i-r40-mmc",
+ "allwinner,sun50i-a64-mmc";
+ reg = <0x01c10000 0x1000>;
+ clocks = <&ccu CLK_BUS_MMC1>, <&ccu CLK_MMC1>;
+ clock-names = "ahb", "mmc";
+ resets = <&ccu RST_BUS_MMC1>;
+ reset-names = "ahb";
+ interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
+ status = "disabled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ mmc2: mmc at 1c11000 {
+ compatible = "allwinner,sun8i-r40-emmc",
+ "allwinner,sun50i-a64-emmc";
+ reg = <0x01c11000 0x1000>;
+ clocks = <&ccu CLK_BUS_MMC2>, <&ccu CLK_MMC2>;
+ clock-names = "ahb", "mmc";
+ resets = <&ccu RST_BUS_MMC2>;
+ reset-names = "ahb";
+ pinctrl-0 = <&mmc2_pins>;
+ pinctrl-names = "default";
+ interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
+ status = "disabled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ mmc3: mmc at 1c12000 {
+ compatible = "allwinner,sun8i-r40-mmc",
+ "allwinner,sun50i-a64-mmc";
+ reg = <0x01c12000 0x1000>;
+ clocks = <&ccu CLK_BUS_MMC3>, <&ccu CLK_MMC3>;
+ clock-names = "ahb", "mmc";
+ resets = <&ccu RST_BUS_MMC3>;
+ reset-names = "ahb";
+ interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
+ status = "disabled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ usbphy: phy at 1c13400 {
+ compatible = "allwinner,sun8i-r40-usb-phy";
+ reg = <0x01c13400 0x14>,
+ <0x01c14800 0x4>,
+ <0x01c19800 0x4>,
+ <0x01c1c800 0x4>;
+ reg-names = "phy_ctrl",
+ "pmu0",
+ "pmu1",
+ "pmu2";
+ clocks = <&ccu CLK_USB_PHY0>,
+ <&ccu CLK_USB_PHY1>,
+ <&ccu CLK_USB_PHY2>;
+ clock-names = "usb0_phy",
+ "usb1_phy",
+ "usb2_phy";
+ resets = <&ccu RST_USB_PHY0>,
+ <&ccu RST_USB_PHY1>,
+ <&ccu RST_USB_PHY2>;
+ reset-names = "usb0_reset",
+ "usb1_reset",
+ "usb2_reset";
+ status = "disabled";
+ #phy-cells = <1>;
+ };
+
+ ehci1: usb at 1c19000 {
+ compatible = "allwinner,sun8i-r40-ehci", "generic-ehci";
+ reg = <0x01c19000 0x100>;
+ interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&ccu CLK_BUS_EHCI1>;
+ resets = <&ccu RST_BUS_EHCI1>;
+ phys = <&usbphy 1>;
+ phy-names = "usb";
+ status = "disabled";
+ };
+
+ ohci1: usb at 1c19400 {
+ compatible = "allwinner,sun8i-r40-ohci", "generic-ohci";
+ reg = <0x01c19400 0x100>;
+ interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&ccu CLK_BUS_OHCI1>,
+ <&ccu CLK_USB_OHCI1>;
+ resets = <&ccu RST_BUS_OHCI1>;
+ phys = <&usbphy 1>;
+ phy-names = "usb";
+ status = "disabled";
+ };
+
+ ehci2: usb at 1c1c000 {
+ compatible = "allwinner,sun8i-r40-ehci", "generic-ehci";
+ reg = <0x01c1c000 0x100>;
+ interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&ccu CLK_BUS_EHCI2>;
+ resets = <&ccu RST_BUS_EHCI2>;
+ phys = <&usbphy 2>;
+ phy-names = "usb";
+ status = "disabled";
+ };
+
+ ohci2: usb at 1c1c400 {
+ compatible = "allwinner,sun8i-r40-ohci", "generic-ohci";
+ reg = <0x01c1c400 0x100>;
+ interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&ccu CLK_BUS_OHCI2>,
+ <&ccu CLK_USB_OHCI2>;
+ resets = <&ccu RST_BUS_OHCI2>;
+ phys = <&usbphy 2>;
+ phy-names = "usb";
+ status = "disabled";
+ };
+
ccu: clock at 1c20000 {
compatible = "allwinner,sun8i-r40-ccu";
reg = <0x01c20000 0x400>;
@@ -153,8 +258,7 @@
compatible = "allwinner,sun8i-r40-pinctrl";
reg = <0x01c20800 0x400>;
interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
- /* apb should be replaced once CCU is implemented */
- clocks = <&osc24M>, <&osc24M>, <&osc32k>;
+ clocks = <&ccu CLK_BUS_PIO>, <&osc24M>, <&osc32k>;
clock-names = "apb", "hosc", "losc";
gpio-controller;
interrupt-controller;
@@ -174,10 +278,9 @@
drive-strength = <40>;
};
- i2c0_pins: i2c0_pins {
+ i2c0_pins: i2c0-pins {
pins = "PB0", "PB1";
function = "i2c0";
- bias-pull-up;
};
mmc0_pins: mmc0-pins {
@@ -188,20 +291,119 @@
bias-pull-up;
};
- uart0_pb_pins: uart0_pb_pins {
+ mmc1_pg_pins: mmc1-pg-pins {
+ pins = "PG0", "PG1", "PG2",
+ "PG3", "PG4", "PG5";
+ function = "mmc1";
+ drive-strength = <30>;
+ bias-pull-up;
+ };
+
+ mmc2_pins: mmc2-pins {
+ pins = "PC5", "PC6", "PC7", "PC8", "PC9",
+ "PC10", "PC11", "PC12", "PC13", "PC14",
+ "PC15", "PC24";
+ function = "mmc2";
+ drive-strength = <30>;
+ bias-pull-up;
+ };
+
+ uart0_pb_pins: uart0-pb-pins {
pins = "PB22", "PB23";
function = "uart0";
- bias-pull-up;
};
};
+ wdt: watchdog at 1c20c90 {
+ compatible = "allwinner,sun4i-a10-wdt";
+ reg = <0x01c20c90 0x10>;
+ };
+
uart0: serial at 1c28000 {
compatible = "snps,dw-apb-uart";
reg = <0x01c28000 0x400>;
interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
reg-shift = <2>;
reg-io-width = <4>;
- clocks = <&osc24M>;
+ clocks = <&ccu CLK_BUS_UART0>;
+ resets = <&ccu RST_BUS_UART0>;
+ status = "disabled";
+ };
+
+ uart1: serial at 1c28400 {
+ compatible = "snps,dw-apb-uart";
+ reg = <0x01c28400 0x400>;
+ interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
+ reg-shift = <2>;
+ reg-io-width = <4>;
+ clocks = <&ccu CLK_BUS_UART1>;
+ resets = <&ccu RST_BUS_UART1>;
+ status = "disabled";
+ };
+
+ uart2: serial at 1c28800 {
+ compatible = "snps,dw-apb-uart";
+ reg = <0x01c28800 0x400>;
+ interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
+ reg-shift = <2>;
+ reg-io-width = <4>;
+ clocks = <&ccu CLK_BUS_UART2>;
+ resets = <&ccu RST_BUS_UART2>;
+ status = "disabled";
+ };
+
+ uart3: serial at 1c28c00 {
+ compatible = "snps,dw-apb-uart";
+ reg = <0x01c28c00 0x400>;
+ interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
+ reg-shift = <2>;
+ reg-io-width = <4>;
+ clocks = <&ccu CLK_BUS_UART3>;
+ resets = <&ccu RST_BUS_UART3>;
+ status = "disabled";
+ };
+
+ uart4: serial at 1c29000 {
+ compatible = "snps,dw-apb-uart";
+ reg = <0x01c29000 0x400>;
+ interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
+ reg-shift = <2>;
+ reg-io-width = <4>;
+ clocks = <&ccu CLK_BUS_UART4>;
+ resets = <&ccu RST_BUS_UART4>;
+ status = "disabled";
+ };
+
+ uart5: serial at 1c29400 {
+ compatible = "snps,dw-apb-uart";
+ reg = <0x01c29400 0x400>;
+ interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>;
+ reg-shift = <2>;
+ reg-io-width = <4>;
+ clocks = <&ccu CLK_BUS_UART5>;
+ resets = <&ccu RST_BUS_UART5>;
+ status = "disabled";
+ };
+
+ uart6: serial at 1c29800 {
+ compatible = "snps,dw-apb-uart";
+ reg = <0x01c29800 0x400>;
+ interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
+ reg-shift = <2>;
+ reg-io-width = <4>;
+ clocks = <&ccu CLK_BUS_UART6>;
+ resets = <&ccu RST_BUS_UART6>;
+ status = "disabled";
+ };
+
+ uart7: serial at 1c29c00 {
+ compatible = "snps,dw-apb-uart";
+ reg = <0x01c29c00 0x400>;
+ interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
+ reg-shift = <2>;
+ reg-io-width = <4>;
+ clocks = <&ccu CLK_BUS_UART7>;
+ resets = <&ccu RST_BUS_UART7>;
status = "disabled";
};
@@ -209,7 +411,54 @@
compatible = "allwinner,sun6i-a31-i2c";
reg = <0x01c2ac00 0x400>;
interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&osc24M>;
+ clocks = <&ccu CLK_BUS_I2C0>;
+ resets = <&ccu RST_BUS_I2C0>;
+ pinctrl-0 = <&i2c0_pins>;
+ pinctrl-names = "default";
+ status = "disabled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ i2c1: i2c at 1c2b000 {
+ compatible = "allwinner,sun6i-a31-i2c";
+ reg = <0x01c2b000 0x400>;
+ interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&ccu CLK_BUS_I2C1>;
+ resets = <&ccu RST_BUS_I2C1>;
+ status = "disabled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ i2c2: i2c at 1c2b400 {
+ compatible = "allwinner,sun6i-a31-i2c";
+ reg = <0x01c2b400 0x400>;
+ interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&ccu CLK_BUS_I2C2>;
+ resets = <&ccu RST_BUS_I2C2>;
+ status = "disabled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ i2c3: i2c at 1c2b800 {
+ compatible = "allwinner,sun6i-a31-i2c";
+ reg = <0x01c2b800 0x400>;
+ interrupts = <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&ccu CLK_BUS_I2C3>;
+ resets = <&ccu RST_BUS_I2C3>;
+ status = "disabled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ i2c4: i2c at 1c2c000 {
+ compatible = "allwinner,sun6i-a31-i2c";
+ reg = <0x01c2c000 0x400>;
+ interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&ccu CLK_BUS_I2C4>;
+ resets = <&ccu RST_BUS_I2C4>;
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
@@ -237,7 +486,7 @@
};
gic: interrupt-controller at 1c81000 {
- compatible = "arm,cortex-a7-gic", "arm,cortex-a15-gic";
+ compatible = "arm,gic-400";
reg = <0x01c81000 0x1000>,
<0x01c82000 0x1000>,
<0x01c84000 0x2000>,
@@ -254,7 +503,5 @@
<GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
- clock-frequency = <24000000>;
- arm,cpu-registers-not-fw-configured;
};
};
diff --git a/arch/arm/dts/sun8i-v40-bananapi-m2-berry.dts b/arch/arm/dts/sun8i-v40-bananapi-m2-berry.dts
index 193d9b29ec..35859d8f32 100644
--- a/arch/arm/dts/sun8i-v40-bananapi-m2-berry.dts
+++ b/arch/arm/dts/sun8i-v40-bananapi-m2-berry.dts
@@ -56,6 +56,40 @@
chosen {
stdout-path = "serial0:115200n8";
};
+
+ leds {
+ compatible = "gpio-leds";
+
+ pwr-led {
+ label = "bananapi:red:pwr";
+ gpios = <&pio 7 20 GPIO_ACTIVE_HIGH>;
+ default-state = "on";
+ };
+
+ user-led {
+ label = "bananapi:green:user";
+ gpios = <&pio 7 21 GPIO_ACTIVE_HIGH>;
+ };
+ };
+
+ reg_vcc5v0: vcc5v0 {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc5v0";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ gpio = <&pio 7 23 GPIO_ACTIVE_HIGH>; /* PH23 */
+ enable-active-high;
+ };
+
+ wifi_pwrseq: wifi_pwrseq {
+ compatible = "mmc-pwrseq-simple";
+ reset-gpios = <&pio 6 10 GPIO_ACTIVE_LOW>; /* PG10 WIFI_EN */
+ };
+};
+
+&ehci1 {
+ /* Terminus Tech FE 1.1s 4-port USB 2.0 hub here */
+ status = "okay";
};
&i2c0 {
@@ -125,8 +159,24 @@
status = "okay";
};
+&mmc1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&mmc1_pg_pins>;
+ vmmc-supply = <®_dldo2>;
+ vqmmc-supply = <®_dldo1>;
+ mmc-pwrseq = <&wifi_pwrseq>;
+ bus-width = <4>;
+ non-removable;
+ status = "okay";
+};
+
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_pb_pins>;
status = "okay";
};
+
+&usbphy {
+ usb1_vbus-supply = <®_vcc5v0>;
+ status = "okay";
+};
--
2.18.0.321.gffc6fa0e3
^ permalink raw reply related [flat|nested] 11+ messages in thread
* [U-Boot] [PATCH v2 7/7] ARM: dts: sun8i: Update R40/V40 dts(i) files from Linux-v4.18-rc3
2018-08-09 13:08 ` [U-Boot] [PATCH v2 7/7] ARM: dts: sun8i: Update R40/V40 " Jagan Teki
@ 2018-08-13 7:42 ` Jagan Teki
2018-08-13 10:34 ` Jagan Teki
0 siblings, 1 reply; 11+ messages in thread
From: Jagan Teki @ 2018-08-13 7:42 UTC (permalink / raw)
To: u-boot
On Thu, Aug 9, 2018 at 6:38 PM, Jagan Teki <jagan@amarulasolutions.com> wrote:
> Update all R40/V40 devicetree dtsi and dtsi files from Linux-v4.18-rc3
> with below commit:
>
> R40:
> commit c36fd5a48bd20820855e3e91a89297eeaa31836e
> Author: Chen-Yu Tsai <wens@csie.org>
> Date: Wed May 2 00:12:25 2018 +0800
>
> ARM: dts: sun8i: r40: bananapi-m2-ultra: Enable GMAC ethernet controller
>
> V40:
> commit c5f0bb472795170ab5c33be12e29ce7465fb31ed
> Author: Icenowy Zheng <icenowy@aosc.io>
> Date: Fri Apr 6 22:03:44 2018 +0800
>
> ARM: sun8i: v40: enable USB host ports for Banana Pi M2 Berry
>
> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
> ---
Tested-by: Jagan Teki <jagan@amarulasolutions.com> # BPI-M2-Ultra, BPI-M2-Berry
^ permalink raw reply [flat|nested] 11+ messages in thread
* [U-Boot] [PATCH v2 7/7] ARM: dts: sun8i: Update R40/V40 dts(i) files from Linux-v4.18-rc3
2018-08-13 7:42 ` Jagan Teki
@ 2018-08-13 10:34 ` Jagan Teki
0 siblings, 0 replies; 11+ messages in thread
From: Jagan Teki @ 2018-08-13 10:34 UTC (permalink / raw)
To: u-boot
On Mon, Aug 13, 2018 at 1:12 PM, Jagan Teki <jagan@amarulasolutions.com> wrote:
> On Thu, Aug 9, 2018 at 6:38 PM, Jagan Teki <jagan@amarulasolutions.com> wrote:
>> Update all R40/V40 devicetree dtsi and dtsi files from Linux-v4.18-rc3
>> with below commit:
>>
>> R40:
>> commit c36fd5a48bd20820855e3e91a89297eeaa31836e
>> Author: Chen-Yu Tsai <wens@csie.org>
>> Date: Wed May 2 00:12:25 2018 +0800
>>
>> ARM: dts: sun8i: r40: bananapi-m2-ultra: Enable GMAC ethernet controller
>>
>> V40:
>> commit c5f0bb472795170ab5c33be12e29ce7465fb31ed
>> Author: Icenowy Zheng <icenowy@aosc.io>
>> Date: Fri Apr 6 22:03:44 2018 +0800
>>
>> ARM: sun8i: v40: enable USB host ports for Banana Pi M2 Berry
>>
>> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
>> ---
>
> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # BPI-M2-Ultra, BPI-M2-Berry
Applied to u-boot-sunxi/master
^ permalink raw reply [flat|nested] 11+ messages in thread
* [U-Boot] [PATCH v2 0/7] ARM: dts: sunxi: Update dts(i) files from Linux-v4.18-rc3
2018-08-09 13:08 [U-Boot] [PATCH v2 0/7] ARM: dts: sunxi: Update dts(i) files from Linux-v4.18-rc3 Jagan Teki
` (6 preceding siblings ...)
2018-08-09 13:08 ` [U-Boot] [PATCH v2 7/7] ARM: dts: sun8i: Update R40/V40 " Jagan Teki
@ 2018-08-26 10:47 ` Jagan Teki
7 siblings, 0 replies; 11+ messages in thread
From: Jagan Teki @ 2018-08-26 10:47 UTC (permalink / raw)
To: u-boot
On Thu, Aug 9, 2018 at 6:38 PM, Jagan Teki <jagan@amarulasolutions.com> wrote:
> This series is trying to update SoC dtsi and board dts files
> for Allwinner sun4i, 5i, 6i, 8i-a23/a33/a83t, r40 SoC's
> from Linux-4.18-rc3
>
> These update is useful for supporting features
> CLK, RESET, DM_MMC etc
>
> Since H3/H5/A64 is already updated with Linux-4.18-rc3,
> this series use same version to maintain proper
> compatibility for all SoC platforms syncs.
>
> Changes for v2:
> - Update commit subject line with Linux-v4.18-rc3
>
> thanks,
> Jagan.
>
> Jagan Teki (7):
> ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3
> ARM: dts: sun5i: Update A10s/A13/gr8/r8 dts(i) files from
> Linux-v4.18-rc3
> ARM: dts: sun6i: Update A31/A31s dts(i) files from Linux-v4.18-rc3
> ARM: dts: sun7i: Update A20 dts(i) files from Linux-v4.18-rc3
> ARM: dts: sun8i: Update A23/A33/r16 dts(i) files from Linux-v4.18-rc3
Applied to u-boot-sunxi/next
^ permalink raw reply [flat|nested] 11+ messages in thread
end of thread, other threads:[~2018-08-26 10:47 UTC | newest]
Thread overview: 11+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2018-08-09 13:08 [U-Boot] [PATCH v2 0/7] ARM: dts: sunxi: Update dts(i) files from Linux-v4.18-rc3 Jagan Teki
2018-08-09 13:08 ` [U-Boot] [PATCH v2 1/7] ARM: dts: sun4i: Update A10 " Jagan Teki
2018-08-09 13:08 ` [U-Boot] [PATCH v2 2/7] ARM: dts: sun5i: Update A10s/A13/gr8/r8 " Jagan Teki
2018-08-09 13:08 ` [U-Boot] [PATCH v2 3/7] ARM: dts: sun6i: Update A31/A31s " Jagan Teki
2018-08-09 13:08 ` [U-Boot] [PATCH v2 4/7] ARM: dts: sun7i: Update A20 " Jagan Teki
2018-08-09 13:08 ` [U-Boot] [PATCH v2 5/7] ARM: dts: sun8i: Update A23/A33/r16 " Jagan Teki
2018-08-09 13:08 ` [U-Boot] [PATCH v2 6/7] ARM: dts: sun8i: Update A83T " Jagan Teki
2018-08-09 13:08 ` [U-Boot] [PATCH v2 7/7] ARM: dts: sun8i: Update R40/V40 " Jagan Teki
2018-08-13 7:42 ` Jagan Teki
2018-08-13 10:34 ` Jagan Teki
2018-08-26 10:47 ` [U-Boot] [PATCH v2 0/7] ARM: dts: sunxi: Update " Jagan Teki
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