* [PATCH] drm/i915: Correct CSB probing for engine state dumper
@ 2018-08-17 8:50 Chris Wilson
2018-08-17 9:45 ` ✓ Fi.CI.BAT: success for " Patchwork
` (2 more replies)
0 siblings, 3 replies; 6+ messages in thread
From: Chris Wilson @ 2018-08-17 8:50 UTC (permalink / raw)
To: intel-gfx; +Cc: Mika Kuoppala
Since we no longer maintain our read position in the CSB pointers
register, it always returns 0 and not where we last read up to. As a
result the CSB probing in the state dumper starts from 0, either missing
entries or showing stale one.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Mika Kuoppala <mika.kuoppala@intel.com>
---
drivers/gpu/drm/i915/intel_engine_cs.c | 24 ++++++++++++------------
1 file changed, 12 insertions(+), 12 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_engine_cs.c b/drivers/gpu/drm/i915/intel_engine_cs.c
index 8628567d8f6e..49b580c188eb 100644
--- a/drivers/gpu/drm/i915/intel_engine_cs.c
+++ b/drivers/gpu/drm/i915/intel_engine_cs.c
@@ -1345,20 +1345,20 @@ static void intel_engine_print_registers(const struct intel_engine_cs *engine,
if (HAS_EXECLISTS(dev_priv)) {
const u32 *hws = &engine->status_page.page_addr[I915_HWS_CSB_BUF0_INDEX];
- u32 ptr, read, write;
unsigned int idx;
+ u8 read, write;
drm_printf(m, "\tExeclist status: 0x%08x %08x\n",
I915_READ(RING_EXECLIST_STATUS_LO(engine)),
I915_READ(RING_EXECLIST_STATUS_HI(engine)));
- ptr = I915_READ(RING_CONTEXT_STATUS_PTR(engine));
- read = GEN8_CSB_READ_PTR(ptr);
- write = GEN8_CSB_WRITE_PTR(ptr);
- drm_printf(m, "\tExeclist CSB read %d [%d cached], write %d [%d from hws], tasklet queued? %s (%s)\n",
- read, execlists->csb_head,
- write,
- intel_read_status_page(engine, intel_hws_csb_write_index(engine->i915)),
+ read = execlists->csb_head;
+ write = intel_read_status_page(engine,
+ intel_hws_csb_write_index(dev_priv));
+
+ drm_printf(m, "\tExeclist CSB read %d, write %d [mmio:%d], tasklet queued? %s (%s)\n",
+ read, write,
+ GEN8_CSB_WRITE_PTR(I915_READ(RING_CONTEXT_STATUS_PTR(engine))),
yesno(test_bit(TASKLET_STATE_SCHED,
&engine->execlists.tasklet.state)),
enableddisabled(!atomic_read(&engine->execlists.tasklet.count)));
@@ -1370,12 +1370,12 @@ static void intel_engine_print_registers(const struct intel_engine_cs *engine,
write += GEN8_CSB_ENTRIES;
while (read < write) {
idx = ++read % GEN8_CSB_ENTRIES;
- drm_printf(m, "\tExeclist CSB[%d]: 0x%08x [0x%08x in hwsp], context: %d [%d in hwsp]\n",
+ drm_printf(m, "\tExeclist CSB[%d]: 0x%08x [mmio:0x%08x], context: %d [mmio:%d]\n",
idx,
- I915_READ(RING_CONTEXT_STATUS_BUF_LO(engine, idx)),
hws[idx * 2],
- I915_READ(RING_CONTEXT_STATUS_BUF_HI(engine, idx)),
- hws[idx * 2 + 1]);
+ I915_READ(RING_CONTEXT_STATUS_BUF_LO(engine, idx)),
+ hws[idx * 2 + 1],
+ I915_READ(RING_CONTEXT_STATUS_BUF_HI(engine, idx)));
}
rcu_read_lock();
--
2.18.0
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 6+ messages in thread
* ✓ Fi.CI.BAT: success for drm/i915: Correct CSB probing for engine state dumper
2018-08-17 8:50 [PATCH] drm/i915: Correct CSB probing for engine state dumper Chris Wilson
@ 2018-08-17 9:45 ` Patchwork
2018-08-17 11:48 ` ✓ Fi.CI.IGT: " Patchwork
2018-08-21 7:58 ` [PATCH] " Mika Kuoppala
2 siblings, 0 replies; 6+ messages in thread
From: Patchwork @ 2018-08-17 9:45 UTC (permalink / raw)
To: Chris Wilson; +Cc: intel-gfx
== Series Details ==
Series: drm/i915: Correct CSB probing for engine state dumper
URL : https://patchwork.freedesktop.org/series/48381/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4684 -> Patchwork_9967 =
== Summary - SUCCESS ==
No regressions found.
External URL: https://patchwork.freedesktop.org/api/1.0/series/48381/revisions/1/mbox/
== Possible new issues ==
Here are the unknown changes that may have been introduced in Patchwork_9967:
=== IGT changes ===
==== Possible regressions ====
{igt@pm_rpm@module-reload}:
{fi-bdw-samus}: NOTRUN -> DMESG-FAIL
==== Warnings ====
{igt@pm_rpm@module-reload}:
fi-cnl-psr: WARN (fdo#107602) -> FAIL
== Known issues ==
Here are the changes found in Patchwork_9967 that come from known issues:
=== IGT changes ===
==== Issues hit ====
igt@drv_module_reload@basic-reload-inject:
fi-hsw-4770r: PASS -> DMESG-WARN (fdo#107425)
igt@drv_selftest@live_coherency:
fi-gdg-551: PASS -> DMESG-FAIL (fdo#107164)
igt@drv_selftest@live_hangcheck:
fi-bxt-dsi: NOTRUN -> DMESG-FAIL (fdo#106560)
{igt@kms_psr@primary_page_flip}:
{fi-icl-u}: NOTRUN -> FAIL (fdo#107383) +3
{igt@kms_psr@sprite_plane_onoff}:
{fi-bdw-samus}: NOTRUN -> FAIL (fdo#107360)
{igt@pm_rpm@module-reload}:
fi-bxt-dsi: NOTRUN -> WARN (fdo#107602)
{fi-icl-u}: NOTRUN -> WARN (fdo#107602)
==== Possible fixes ====
igt@drv_selftest@live_hangcheck:
fi-skl-guc: DMESG-FAIL (fdo#107174, fdo#106685) -> PASS
fi-kbl-guc: DMESG-FAIL (fdo#106947, fdo#106560) -> PASS
fi-bxt-j4205: DMESG-FAIL (fdo#106560) -> PASS
igt@kms_pipe_crc_basic@suspend-read-crc-pipe-c:
fi-bxt-dsi: INCOMPLETE (fdo#103927) -> PASS
{igt@kms_psr@primary_mmap_gtt}:
fi-cnl-psr: DMESG-WARN (fdo#107372) -> PASS
{igt@pm_rpm@module-reload}:
fi-hsw-4770r: WARN (fdo#107602) -> SKIP
==== Warnings ====
{igt@kms_psr@primary_page_flip}:
fi-cnl-psr: DMESG-WARN (fdo#107372) -> DMESG-FAIL (fdo#107372)
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
fdo#103927 https://bugs.freedesktop.org/show_bug.cgi?id=103927
fdo#106560 https://bugs.freedesktop.org/show_bug.cgi?id=106560
fdo#106685 https://bugs.freedesktop.org/show_bug.cgi?id=106685
fdo#106947 https://bugs.freedesktop.org/show_bug.cgi?id=106947
fdo#107164 https://bugs.freedesktop.org/show_bug.cgi?id=107164
fdo#107174 https://bugs.freedesktop.org/show_bug.cgi?id=107174
fdo#107360 https://bugs.freedesktop.org/show_bug.cgi?id=107360
fdo#107372 https://bugs.freedesktop.org/show_bug.cgi?id=107372
fdo#107383 https://bugs.freedesktop.org/show_bug.cgi?id=107383
fdo#107425 https://bugs.freedesktop.org/show_bug.cgi?id=107425
fdo#107602 https://bugs.freedesktop.org/show_bug.cgi?id=107602
== Participating hosts (52 -> 48) ==
Additional (2): fi-icl-u fi-bdw-samus
Missing (6): fi-kbl-soraka fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-ctg-p8600
== Build changes ==
* Linux: CI_DRM_4684 -> Patchwork_9967
CI_DRM_4684: bb1a6d0044581c5d8867afde39111ea4605c644d @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_4604: 2a5777f8a694f1f8edcf021afb1ef36192c6762d @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_9967: 07c864e7d77d35c06a19a8bba35a248a1de2190d @ git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
07c864e7d77d drm/i915: Correct CSB probing for engine state dumper
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_9967/issues.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 6+ messages in thread
* ✓ Fi.CI.IGT: success for drm/i915: Correct CSB probing for engine state dumper
2018-08-17 8:50 [PATCH] drm/i915: Correct CSB probing for engine state dumper Chris Wilson
2018-08-17 9:45 ` ✓ Fi.CI.BAT: success for " Patchwork
@ 2018-08-17 11:48 ` Patchwork
2018-08-21 7:58 ` [PATCH] " Mika Kuoppala
2 siblings, 0 replies; 6+ messages in thread
From: Patchwork @ 2018-08-17 11:48 UTC (permalink / raw)
To: Chris Wilson; +Cc: intel-gfx
== Series Details ==
Series: drm/i915: Correct CSB probing for engine state dumper
URL : https://patchwork.freedesktop.org/series/48381/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4684_full -> Patchwork_9967_full =
== Summary - WARNING ==
Minor unknown changes coming with Patchwork_9967_full need to be verified
manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_9967_full, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
== Possible new issues ==
Here are the unknown changes that may have been introduced in Patchwork_9967_full:
=== IGT changes ===
==== Warnings ====
igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-shrfb-pgflip-blt:
shard-hsw: PASS -> SKIP
igt@pm_rc6_residency@rc6-accuracy:
shard-snb: SKIP -> PASS
== Known issues ==
Here are the changes found in Patchwork_9967_full that come from known issues:
=== IGT changes ===
==== Issues hit ====
igt@gem_exec_schedule@pi-ringfull-blt:
shard-kbl: NOTRUN -> FAIL (fdo#103158)
igt@gem_mocs_settings@mocs-rc6-bsd1:
shard-snb: SKIP -> INCOMPLETE (fdo#105411)
igt@kms_setmode@basic:
shard-kbl: PASS -> FAIL (fdo#99912)
igt@kms_sysfs_edid_timing:
shard-kbl: NOTRUN -> FAIL (fdo#100047)
==== Possible fixes ====
igt@kms_draw_crc@draw-method-xrgb8888-mmap-wc-ytiled:
shard-glk: FAIL (fdo#103184) -> PASS
igt@kms_setmode@basic:
shard-apl: FAIL (fdo#99912) -> PASS
igt@prime_vgem@basic-fence-flip:
shard-snb: FAIL (fdo#104008) -> PASS
fdo#100047 https://bugs.freedesktop.org/show_bug.cgi?id=100047
fdo#103158 https://bugs.freedesktop.org/show_bug.cgi?id=103158
fdo#103184 https://bugs.freedesktop.org/show_bug.cgi?id=103184
fdo#104008 https://bugs.freedesktop.org/show_bug.cgi?id=104008
fdo#105411 https://bugs.freedesktop.org/show_bug.cgi?id=105411
fdo#99912 https://bugs.freedesktop.org/show_bug.cgi?id=99912
== Participating hosts (5 -> 5) ==
No changes in participating hosts
== Build changes ==
* Linux: CI_DRM_4684 -> Patchwork_9967
CI_DRM_4684: bb1a6d0044581c5d8867afde39111ea4605c644d @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_4604: 2a5777f8a694f1f8edcf021afb1ef36192c6762d @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_9967: 07c864e7d77d35c06a19a8bba35a248a1de2190d @ git://anongit.freedesktop.org/gfx-ci/linux
piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_9967/shards.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH] drm/i915: Correct CSB probing for engine state dumper
2018-08-17 8:50 [PATCH] drm/i915: Correct CSB probing for engine state dumper Chris Wilson
2018-08-17 9:45 ` ✓ Fi.CI.BAT: success for " Patchwork
2018-08-17 11:48 ` ✓ Fi.CI.IGT: " Patchwork
@ 2018-08-21 7:58 ` Mika Kuoppala
2018-08-21 8:10 ` Chris Wilson
2 siblings, 1 reply; 6+ messages in thread
From: Mika Kuoppala @ 2018-08-21 7:58 UTC (permalink / raw)
To: Chris Wilson, intel-gfx
Chris Wilson <chris@chris-wilson.co.uk> writes:
> Since we no longer maintain our read position in the CSB pointers
> register, it always returns 0 and not where we last read up to. As a
> result the CSB probing in the state dumper starts from 0, either missing
> entries or showing stale one.
>
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Mika Kuoppala <mika.kuoppala@intel.com>
> ---
> drivers/gpu/drm/i915/intel_engine_cs.c | 24 ++++++++++++------------
> 1 file changed, 12 insertions(+), 12 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_engine_cs.c b/drivers/gpu/drm/i915/intel_engine_cs.c
> index 8628567d8f6e..49b580c188eb 100644
> --- a/drivers/gpu/drm/i915/intel_engine_cs.c
> +++ b/drivers/gpu/drm/i915/intel_engine_cs.c
> @@ -1345,20 +1345,20 @@ static void intel_engine_print_registers(const struct intel_engine_cs *engine,
>
> if (HAS_EXECLISTS(dev_priv)) {
> const u32 *hws = &engine->status_page.page_addr[I915_HWS_CSB_BUF0_INDEX];
> - u32 ptr, read, write;
> unsigned int idx;
> + u8 read, write;
>
> drm_printf(m, "\tExeclist status: 0x%08x %08x\n",
> I915_READ(RING_EXECLIST_STATUS_LO(engine)),
> I915_READ(RING_EXECLIST_STATUS_HI(engine)));
>
> - ptr = I915_READ(RING_CONTEXT_STATUS_PTR(engine));
> - read = GEN8_CSB_READ_PTR(ptr);
> - write = GEN8_CSB_WRITE_PTR(ptr);
> - drm_printf(m, "\tExeclist CSB read %d [%d cached], write %d [%d from hws], tasklet queued? %s (%s)\n",
> - read, execlists->csb_head,
> - write,
> - intel_read_status_page(engine, intel_hws_csb_write_index(engine->i915)),
> + read = execlists->csb_head;
> + write = intel_read_status_page(engine,
> + intel_hws_csb_write_index(dev_priv));
> +
> + drm_printf(m, "\tExeclist CSB read %d, write %d [mmio:%d], tasklet queued? %s (%s)\n",
> + read, write,
In here I was thinking that we want to keep the write as 32bit so it
would show weirdness in here with %d. But the odds of that to happen
with only in this status page entry...
Reviewed-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
> + GEN8_CSB_WRITE_PTR(I915_READ(RING_CONTEXT_STATUS_PTR(engine))),
> yesno(test_bit(TASKLET_STATE_SCHED,
> &engine->execlists.tasklet.state)),
> enableddisabled(!atomic_read(&engine->execlists.tasklet.count)));
> @@ -1370,12 +1370,12 @@ static void intel_engine_print_registers(const struct intel_engine_cs *engine,
> write += GEN8_CSB_ENTRIES;
> while (read < write) {
> idx = ++read % GEN8_CSB_ENTRIES;
> - drm_printf(m, "\tExeclist CSB[%d]: 0x%08x [0x%08x in hwsp], context: %d [%d in hwsp]\n",
> + drm_printf(m, "\tExeclist CSB[%d]: 0x%08x [mmio:0x%08x], context: %d [mmio:%d]\n",
> idx,
> - I915_READ(RING_CONTEXT_STATUS_BUF_LO(engine, idx)),
> hws[idx * 2],
> - I915_READ(RING_CONTEXT_STATUS_BUF_HI(engine, idx)),
> - hws[idx * 2 + 1]);
> + I915_READ(RING_CONTEXT_STATUS_BUF_LO(engine, idx)),
> + hws[idx * 2 + 1],
> + I915_READ(RING_CONTEXT_STATUS_BUF_HI(engine, idx)));
> }
>
> rcu_read_lock();
> --
> 2.18.0
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH] drm/i915: Correct CSB probing for engine state dumper
2018-08-21 7:58 ` [PATCH] " Mika Kuoppala
@ 2018-08-21 8:10 ` Chris Wilson
2018-08-22 13:21 ` Mika Kuoppala
0 siblings, 1 reply; 6+ messages in thread
From: Chris Wilson @ 2018-08-21 8:10 UTC (permalink / raw)
To: Mika Kuoppala, intel-gfx
Quoting Mika Kuoppala (2018-08-21 08:58:26)
> Chris Wilson <chris@chris-wilson.co.uk> writes:
>
> > Since we no longer maintain our read position in the CSB pointers
> > register, it always returns 0 and not where we last read up to. As a
> > result the CSB probing in the state dumper starts from 0, either missing
> > entries or showing stale one.
> >
> > Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> > Cc: Mika Kuoppala <mika.kuoppala@intel.com>
> > ---
> > drivers/gpu/drm/i915/intel_engine_cs.c | 24 ++++++++++++------------
> > 1 file changed, 12 insertions(+), 12 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/intel_engine_cs.c b/drivers/gpu/drm/i915/intel_engine_cs.c
> > index 8628567d8f6e..49b580c188eb 100644
> > --- a/drivers/gpu/drm/i915/intel_engine_cs.c
> > +++ b/drivers/gpu/drm/i915/intel_engine_cs.c
> > @@ -1345,20 +1345,20 @@ static void intel_engine_print_registers(const struct intel_engine_cs *engine,
> >
> > if (HAS_EXECLISTS(dev_priv)) {
> > const u32 *hws = &engine->status_page.page_addr[I915_HWS_CSB_BUF0_INDEX];
> > - u32 ptr, read, write;
> > unsigned int idx;
> > + u8 read, write;
> >
> > drm_printf(m, "\tExeclist status: 0x%08x %08x\n",
> > I915_READ(RING_EXECLIST_STATUS_LO(engine)),
> > I915_READ(RING_EXECLIST_STATUS_HI(engine)));
> >
> > - ptr = I915_READ(RING_CONTEXT_STATUS_PTR(engine));
> > - read = GEN8_CSB_READ_PTR(ptr);
> > - write = GEN8_CSB_WRITE_PTR(ptr);
> > - drm_printf(m, "\tExeclist CSB read %d [%d cached], write %d [%d from hws], tasklet queued? %s (%s)\n",
> > - read, execlists->csb_head,
> > - write,
> > - intel_read_status_page(engine, intel_hws_csb_write_index(engine->i915)),
> > + read = execlists->csb_head;
> > + write = intel_read_status_page(engine,
> > + intel_hws_csb_write_index(dev_priv));
> > +
> > + drm_printf(m, "\tExeclist CSB read %d, write %d [mmio:%d], tasklet queued? %s (%s)\n",
> > + read, write,
>
> In here I was thinking that we want to keep the write as 32bit so it
> would show weirdness in here with %d. But the odds of that to happen
> with only in this status page entry...
Hmm, it was u8 for automatically truncating execlists->csb_write...
Oh, this should have been write = READ_ONCE(*execlists->csb_write);
Mind if I make that change?
-Chris
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH] drm/i915: Correct CSB probing for engine state dumper
2018-08-21 8:10 ` Chris Wilson
@ 2018-08-22 13:21 ` Mika Kuoppala
0 siblings, 0 replies; 6+ messages in thread
From: Mika Kuoppala @ 2018-08-22 13:21 UTC (permalink / raw)
To: Chris Wilson, intel-gfx
Chris Wilson <chris@chris-wilson.co.uk> writes:
> Quoting Mika Kuoppala (2018-08-21 08:58:26)
>> Chris Wilson <chris@chris-wilson.co.uk> writes:
>>
>> > Since we no longer maintain our read position in the CSB pointers
>> > register, it always returns 0 and not where we last read up to. As a
>> > result the CSB probing in the state dumper starts from 0, either missing
>> > entries or showing stale one.
>> >
>> > Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
>> > Cc: Mika Kuoppala <mika.kuoppala@intel.com>
>> > ---
>> > drivers/gpu/drm/i915/intel_engine_cs.c | 24 ++++++++++++------------
>> > 1 file changed, 12 insertions(+), 12 deletions(-)
>> >
>> > diff --git a/drivers/gpu/drm/i915/intel_engine_cs.c b/drivers/gpu/drm/i915/intel_engine_cs.c
>> > index 8628567d8f6e..49b580c188eb 100644
>> > --- a/drivers/gpu/drm/i915/intel_engine_cs.c
>> > +++ b/drivers/gpu/drm/i915/intel_engine_cs.c
>> > @@ -1345,20 +1345,20 @@ static void intel_engine_print_registers(const struct intel_engine_cs *engine,
>> >
>> > if (HAS_EXECLISTS(dev_priv)) {
>> > const u32 *hws = &engine->status_page.page_addr[I915_HWS_CSB_BUF0_INDEX];
>> > - u32 ptr, read, write;
>> > unsigned int idx;
>> > + u8 read, write;
>> >
>> > drm_printf(m, "\tExeclist status: 0x%08x %08x\n",
>> > I915_READ(RING_EXECLIST_STATUS_LO(engine)),
>> > I915_READ(RING_EXECLIST_STATUS_HI(engine)));
>> >
>> > - ptr = I915_READ(RING_CONTEXT_STATUS_PTR(engine));
>> > - read = GEN8_CSB_READ_PTR(ptr);
>> > - write = GEN8_CSB_WRITE_PTR(ptr);
>> > - drm_printf(m, "\tExeclist CSB read %d [%d cached], write %d [%d from hws], tasklet queued? %s (%s)\n",
>> > - read, execlists->csb_head,
>> > - write,
>> > - intel_read_status_page(engine, intel_hws_csb_write_index(engine->i915)),
>> > + read = execlists->csb_head;
>> > + write = intel_read_status_page(engine,
>> > + intel_hws_csb_write_index(dev_priv));
>> > +
>> > + drm_printf(m, "\tExeclist CSB read %d, write %d [mmio:%d], tasklet queued? %s (%s)\n",
>> > + read, write,
>>
>> In here I was thinking that we want to keep the write as 32bit so it
>> would show weirdness in here with %d. But the odds of that to happen
>> with only in this status page entry...
>
> Hmm, it was u8 for automatically truncating execlists->csb_write...
> Oh, this should have been write = READ_ONCE(*execlists->csb_write);
>
> Mind if I make that change?
Please do.
-Mika
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 6+ messages in thread
end of thread, other threads:[~2018-08-22 13:23 UTC | newest]
Thread overview: 6+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2018-08-17 8:50 [PATCH] drm/i915: Correct CSB probing for engine state dumper Chris Wilson
2018-08-17 9:45 ` ✓ Fi.CI.BAT: success for " Patchwork
2018-08-17 11:48 ` ✓ Fi.CI.IGT: " Patchwork
2018-08-21 7:58 ` [PATCH] " Mika Kuoppala
2018-08-21 8:10 ` Chris Wilson
2018-08-22 13:21 ` Mika Kuoppala
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.