From: Jun Yao <yaojun8558363@gmail.com> To: linux-arm-kernel@lists.infradead.org Cc: catalin.marinas@arm.com, will.deacon@arm.com, james.morse@arm.com, linux-kernel@vger.kernel.org Subject: [RESEND PATCH v4 2/6] arm64/mm: Pass ttbr1 as a parameter to __enable_mmu(). Date: Wed, 22 Aug 2018 17:54:28 +0800 [thread overview] Message-ID: <20180822095432.12125-3-yaojun8558363@gmail.com> (raw) In-Reply-To: <20180822095432.12125-1-yaojun8558363@gmail.com> The kernel sets up the initial page table in the init_pg_dir. However, it will create the final page table in the swapper_pg_dir during the initialization process. We need to let __enable_mmu() know which page table to use. Signed-off-by: Jun Yao <yaojun8558363@gmail.com> --- arch/arm64/kernel/head.S | 21 ++++++++++++--------- arch/arm64/kernel/sleep.S | 1 + 2 files changed, 13 insertions(+), 9 deletions(-) diff --git a/arch/arm64/kernel/head.S b/arch/arm64/kernel/head.S index 2c83a8c47e3f..c3e4b1886cde 100644 --- a/arch/arm64/kernel/head.S +++ b/arch/arm64/kernel/head.S @@ -714,6 +714,7 @@ secondary_startup: * Common entry point for secondary CPUs. */ bl __cpu_setup // initialise processor + adrp x1, swapper_pg_dir bl __enable_mmu ldr x8, =__secondary_switched br x8 @@ -756,6 +757,7 @@ ENDPROC(__secondary_switched) * Enable the MMU. * * x0 = SCTLR_EL1 value for turning on the MMU. + * x1 = TTBR1_EL1 value for turning on the MMU. * * Returns to the caller via x30/lr. This requires the caller to be covered * by the .idmap.text section. @@ -764,15 +766,15 @@ ENDPROC(__secondary_switched) * If it isn't, park the CPU */ ENTRY(__enable_mmu) - mrs x1, ID_AA64MMFR0_EL1 - ubfx x2, x1, #ID_AA64MMFR0_TGRAN_SHIFT, 4 - cmp x2, #ID_AA64MMFR0_TGRAN_SUPPORTED + mrs x5, ID_AA64MMFR0_EL1 + ubfx x6, x5, #ID_AA64MMFR0_TGRAN_SHIFT, 4 + cmp x6, #ID_AA64MMFR0_TGRAN_SUPPORTED b.ne __no_granule_support - update_early_cpu_boot_status 0, x1, x2 - adrp x1, idmap_pg_dir - adrp x2, swapper_pg_dir - phys_to_ttbr x3, x1 - phys_to_ttbr x4, x2 + update_early_cpu_boot_status 0, x5, x6 + adrp x5, idmap_pg_dir + mov x6, x1 + phys_to_ttbr x3, x5 + phys_to_ttbr x4, x6 msr ttbr0_el1, x3 // load TTBR0 msr ttbr1_el1, x4 // load TTBR1 isb @@ -791,7 +793,7 @@ ENDPROC(__enable_mmu) __no_granule_support: /* Indicate that this CPU can't boot and is stuck in the kernel */ - update_early_cpu_boot_status CPU_STUCK_IN_KERNEL, x1, x2 + update_early_cpu_boot_status CPU_STUCK_IN_KERNEL, x5, x6 1: wfe wfi @@ -831,6 +833,7 @@ __primary_switch: mrs x20, sctlr_el1 // preserve old SCTLR_EL1 value #endif + adrp x1, swapper_pg_dir bl __enable_mmu #ifdef CONFIG_RELOCATABLE bl __relocate_kernel diff --git a/arch/arm64/kernel/sleep.S b/arch/arm64/kernel/sleep.S index bebec8ef9372..3e53ffa07994 100644 --- a/arch/arm64/kernel/sleep.S +++ b/arch/arm64/kernel/sleep.S @@ -101,6 +101,7 @@ ENTRY(cpu_resume) bl el2_setup // if in EL2 drop to EL1 cleanly bl __cpu_setup /* enable the MMU early - so we can access sleep_save_stash by va */ + adrp x1, swapper_pg_dir bl __enable_mmu ldr x8, =_cpu_resume br x8 -- 2.17.1
WARNING: multiple messages have this Message-ID (diff)
From: yaojun8558363@gmail.com (Jun Yao) To: linux-arm-kernel@lists.infradead.org Subject: [RESEND PATCH v4 2/6] arm64/mm: Pass ttbr1 as a parameter to __enable_mmu(). Date: Wed, 22 Aug 2018 17:54:28 +0800 [thread overview] Message-ID: <20180822095432.12125-3-yaojun8558363@gmail.com> (raw) In-Reply-To: <20180822095432.12125-1-yaojun8558363@gmail.com> The kernel sets up the initial page table in the init_pg_dir. However, it will create the final page table in the swapper_pg_dir during the initialization process. We need to let __enable_mmu() know which page table to use. Signed-off-by: Jun Yao <yaojun8558363@gmail.com> --- arch/arm64/kernel/head.S | 21 ++++++++++++--------- arch/arm64/kernel/sleep.S | 1 + 2 files changed, 13 insertions(+), 9 deletions(-) diff --git a/arch/arm64/kernel/head.S b/arch/arm64/kernel/head.S index 2c83a8c47e3f..c3e4b1886cde 100644 --- a/arch/arm64/kernel/head.S +++ b/arch/arm64/kernel/head.S @@ -714,6 +714,7 @@ secondary_startup: * Common entry point for secondary CPUs. */ bl __cpu_setup // initialise processor + adrp x1, swapper_pg_dir bl __enable_mmu ldr x8, =__secondary_switched br x8 @@ -756,6 +757,7 @@ ENDPROC(__secondary_switched) * Enable the MMU. * * x0 = SCTLR_EL1 value for turning on the MMU. + * x1 = TTBR1_EL1 value for turning on the MMU. * * Returns to the caller via x30/lr. This requires the caller to be covered * by the .idmap.text section. @@ -764,15 +766,15 @@ ENDPROC(__secondary_switched) * If it isn't, park the CPU */ ENTRY(__enable_mmu) - mrs x1, ID_AA64MMFR0_EL1 - ubfx x2, x1, #ID_AA64MMFR0_TGRAN_SHIFT, 4 - cmp x2, #ID_AA64MMFR0_TGRAN_SUPPORTED + mrs x5, ID_AA64MMFR0_EL1 + ubfx x6, x5, #ID_AA64MMFR0_TGRAN_SHIFT, 4 + cmp x6, #ID_AA64MMFR0_TGRAN_SUPPORTED b.ne __no_granule_support - update_early_cpu_boot_status 0, x1, x2 - adrp x1, idmap_pg_dir - adrp x2, swapper_pg_dir - phys_to_ttbr x3, x1 - phys_to_ttbr x4, x2 + update_early_cpu_boot_status 0, x5, x6 + adrp x5, idmap_pg_dir + mov x6, x1 + phys_to_ttbr x3, x5 + phys_to_ttbr x4, x6 msr ttbr0_el1, x3 // load TTBR0 msr ttbr1_el1, x4 // load TTBR1 isb @@ -791,7 +793,7 @@ ENDPROC(__enable_mmu) __no_granule_support: /* Indicate that this CPU can't boot and is stuck in the kernel */ - update_early_cpu_boot_status CPU_STUCK_IN_KERNEL, x1, x2 + update_early_cpu_boot_status CPU_STUCK_IN_KERNEL, x5, x6 1: wfe wfi @@ -831,6 +833,7 @@ __primary_switch: mrs x20, sctlr_el1 // preserve old SCTLR_EL1 value #endif + adrp x1, swapper_pg_dir bl __enable_mmu #ifdef CONFIG_RELOCATABLE bl __relocate_kernel diff --git a/arch/arm64/kernel/sleep.S b/arch/arm64/kernel/sleep.S index bebec8ef9372..3e53ffa07994 100644 --- a/arch/arm64/kernel/sleep.S +++ b/arch/arm64/kernel/sleep.S @@ -101,6 +101,7 @@ ENTRY(cpu_resume) bl el2_setup // if in EL2 drop to EL1 cleanly bl __cpu_setup /* enable the MMU early - so we can access sleep_save_stash by va */ + adrp x1, swapper_pg_dir bl __enable_mmu ldr x8, =_cpu_resume br x8 -- 2.17.1
next prev parent reply other threads:[~2018-08-22 9:54 UTC|newest] Thread overview: 34+ messages / expand[flat|nested] mbox.gz Atom feed top 2018-08-22 9:54 [RESEND PATCH v4 0/6] arm64/mm: Move swapper_pg_dir to rodata Jun Yao 2018-08-22 9:54 ` Jun Yao 2018-08-22 9:54 ` [RESEND PATCH v4 1/6] arm64/mm: Introduce the init_pg_dir Jun Yao 2018-08-22 9:54 ` Jun Yao 2018-09-07 9:57 ` James Morse 2018-09-07 9:57 ` James Morse 2018-08-22 9:54 ` Jun Yao [this message] 2018-08-22 9:54 ` [RESEND PATCH v4 2/6] arm64/mm: Pass ttbr1 as a parameter to __enable_mmu() Jun Yao 2018-09-07 9:57 ` James Morse 2018-09-07 9:57 ` James Morse 2018-08-22 9:54 ` [RESEND PATCH v4 3/6] arm64/mm: Create the initial page table in the init_pg_dir Jun Yao 2018-08-22 9:54 ` Jun Yao 2018-09-07 9:57 ` James Morse 2018-09-07 9:57 ` James Morse 2018-08-22 9:54 ` [RESEND PATCH v4 4/6] arm64/mm: Create the final page table directly in swapper_pg_dir Jun Yao 2018-08-22 9:54 ` Jun Yao 2018-09-07 9:57 ` James Morse 2018-09-07 9:57 ` James Morse 2018-08-22 9:54 ` [RESEND PATCH v4 5/6] arm64/mm: Populate the swapper_pg_dir by fixmap Jun Yao 2018-08-22 9:54 ` Jun Yao 2018-09-07 9:58 ` James Morse 2018-09-07 9:58 ` James Morse 2018-09-10 11:41 ` Jun Yao 2018-09-10 11:41 ` Jun Yao 2018-09-14 8:44 ` James Morse 2018-09-14 8:44 ` James Morse 2018-09-13 10:50 ` Jun Yao 2018-09-13 10:50 ` Jun Yao 2018-09-14 8:38 ` James Morse 2018-09-14 8:38 ` James Morse 2018-08-22 9:54 ` [RESEND PATCH v4 6/6] arm64/mm: Move {idmap_pg_dir .. swapper_pg_dir} to rodata section Jun Yao 2018-08-22 9:54 ` Jun Yao 2018-09-07 9:57 ` [RESEND PATCH v4 0/6] arm64/mm: Move swapper_pg_dir to rodata James Morse 2018-09-07 9:57 ` James Morse
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