* [PATCH v3] drm/i915: clear error registers after error capture
@ 2018-08-30 11:55 Lionel Landwerlin
2018-08-30 12:04 ` Chris Wilson
` (2 more replies)
0 siblings, 3 replies; 5+ messages in thread
From: Lionel Landwerlin @ 2018-08-30 11:55 UTC (permalink / raw)
To: intel-gfx
We need to clear the register in order to get correct value after the
next potential hang.
v2: Centralize error register clearing in i915_irq.c (Chris)
v3: Don't read gen8 register on < gen6 (Chris)
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
---
drivers/gpu/drm/i915/i915_drv.h | 2 ++
drivers/gpu/drm/i915/i915_gem_gtt.c | 18 ++++++------------
drivers/gpu/drm/i915/i915_irq.c | 18 +++++++++++++++++-
3 files changed, 25 insertions(+), 13 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 40c93a37e385..34cca15be926 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -2817,6 +2817,8 @@ extern void intel_irq_fini(struct drm_i915_private *dev_priv);
int intel_irq_install(struct drm_i915_private *dev_priv);
void intel_irq_uninstall(struct drm_i915_private *dev_priv);
+void i915_clear_error_registers(struct drm_i915_private *dev_priv);
+
static inline bool intel_gvt_active(struct drm_i915_private *dev_priv)
{
return dev_priv->gvt;
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
index 4137af4bd8f5..d9d44639ba26 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -2337,7 +2337,7 @@ static bool needs_idle_maps(struct drm_i915_private *dev_priv)
return IS_GEN5(dev_priv) && IS_MOBILE(dev_priv) && intel_vtd_active();
}
-static void gen6_check_and_clear_faults(struct drm_i915_private *dev_priv)
+static void gen6_check_faults(struct drm_i915_private *dev_priv)
{
struct intel_engine_cs *engine;
enum intel_engine_id id;
@@ -2355,15 +2355,11 @@ static void gen6_check_and_clear_faults(struct drm_i915_private *dev_priv)
fault & RING_FAULT_GTTSEL_MASK ? "GGTT" : "PPGTT",
RING_FAULT_SRCID(fault),
RING_FAULT_FAULT_TYPE(fault));
- I915_WRITE(RING_FAULT_REG(engine),
- fault & ~RING_FAULT_VALID);
}
}
-
- POSTING_READ(RING_FAULT_REG(dev_priv->engine[RCS]));
}
-static void gen8_check_and_clear_faults(struct drm_i915_private *dev_priv)
+static void gen8_check_faults(struct drm_i915_private *dev_priv)
{
u32 fault = I915_READ(GEN8_RING_FAULT_REG);
@@ -2388,22 +2384,20 @@ static void gen8_check_and_clear_faults(struct drm_i915_private *dev_priv)
GEN8_RING_FAULT_ENGINE_ID(fault),
RING_FAULT_SRCID(fault),
RING_FAULT_FAULT_TYPE(fault));
- I915_WRITE(GEN8_RING_FAULT_REG,
- fault & ~RING_FAULT_VALID);
}
-
- POSTING_READ(GEN8_RING_FAULT_REG);
}
void i915_check_and_clear_faults(struct drm_i915_private *dev_priv)
{
/* From GEN8 onwards we only have one 'All Engine Fault Register' */
if (INTEL_GEN(dev_priv) >= 8)
- gen8_check_and_clear_faults(dev_priv);
+ gen8_check_faults(dev_priv);
else if (INTEL_GEN(dev_priv) >= 6)
- gen6_check_and_clear_faults(dev_priv);
+ gen6_check_faults(dev_priv);
else
return;
+
+ i915_clear_error_registers(dev_priv);
}
void i915_gem_suspend_gtt_mappings(struct drm_i915_private *dev_priv)
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index 8084e35b25c5..34b8307240df 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -3215,7 +3215,7 @@ static void i915_reset_device(struct drm_i915_private *dev_priv,
kobject_uevent_env(kobj, KOBJ_CHANGE, reset_done_event);
}
-static void i915_clear_error_registers(struct drm_i915_private *dev_priv)
+void i915_clear_error_registers(struct drm_i915_private *dev_priv)
{
u32 eir;
@@ -3238,6 +3238,22 @@ static void i915_clear_error_registers(struct drm_i915_private *dev_priv)
I915_WRITE(EMR, I915_READ(EMR) | eir);
I915_WRITE(IIR, I915_MASTER_ERROR_INTERRUPT);
}
+
+ if (INTEL_GEN(dev_priv) >= 8) {
+ struct intel_engine_cs *engine;
+ enum intel_engine_id id;
+
+ for_each_engine(engine, dev_priv, id) {
+ I915_WRITE(RING_FAULT_REG(engine),
+ I915_READ(RING_FAULT_REG(engine)) &
+ ~RING_FAULT_VALID);
+ }
+ POSTING_READ(RING_FAULT_REG(dev_priv->engine[RCS]));
+ } else if (INTEL_GEN(dev_priv) >= 6) {
+ I915_WRITE(GEN8_RING_FAULT_REG,
+ I915_READ(GEN8_RING_FAULT_REG) & ~RING_FAULT_VALID);
+ POSTING_READ(GEN8_RING_FAULT_REG);
+ }
}
/**
--
2.18.0
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^ permalink raw reply related [flat|nested] 5+ messages in thread
* Re: [PATCH v3] drm/i915: clear error registers after error capture
2018-08-30 11:55 [PATCH v3] drm/i915: clear error registers after error capture Lionel Landwerlin
@ 2018-08-30 12:04 ` Chris Wilson
2018-08-30 12:58 ` Lionel Landwerlin
2018-08-30 13:01 ` ✗ Fi.CI.SPARSE: warning for drm/i915: clear error registers after error capture (rev3) Patchwork
2018-08-30 13:21 ` ✓ Fi.CI.BAT: success " Patchwork
2 siblings, 1 reply; 5+ messages in thread
From: Chris Wilson @ 2018-08-30 12:04 UTC (permalink / raw)
To: Lionel Landwerlin, intel-gfx
Quoting Lionel Landwerlin (2018-08-30 12:55:32)
> + if (INTEL_GEN(dev_priv) >= 8) {
> + struct intel_engine_cs *engine;
> + enum intel_engine_id id;
> +
> + for_each_engine(engine, dev_priv, id) {
> + I915_WRITE(RING_FAULT_REG(engine),
> + I915_READ(RING_FAULT_REG(engine)) &
> + ~RING_FAULT_VALID);
> + }
> + POSTING_READ(RING_FAULT_REG(dev_priv->engine[RCS]));
> + } else if (INTEL_GEN(dev_priv) >= 6) {
> + I915_WRITE(GEN8_RING_FAULT_REG,
> + I915_READ(GEN8_RING_FAULT_REG) & ~RING_FAULT_VALID);
> + POSTING_READ(GEN8_RING_FAULT_REG);
> + }
Reversed! gen8 has the single reg, gen6 has one per engine.
-Chris
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^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH v3] drm/i915: clear error registers after error capture
2018-08-30 12:04 ` Chris Wilson
@ 2018-08-30 12:58 ` Lionel Landwerlin
0 siblings, 0 replies; 5+ messages in thread
From: Lionel Landwerlin @ 2018-08-30 12:58 UTC (permalink / raw)
To: Chris Wilson, intel-gfx
On 30/08/2018 13:04, Chris Wilson wrote:
> Quoting Lionel Landwerlin (2018-08-30 12:55:32)
>> + if (INTEL_GEN(dev_priv) >= 8) {
>> + struct intel_engine_cs *engine;
>> + enum intel_engine_id id;
>> +
>> + for_each_engine(engine, dev_priv, id) {
>> + I915_WRITE(RING_FAULT_REG(engine),
>> + I915_READ(RING_FAULT_REG(engine)) &
>> + ~RING_FAULT_VALID);
>> + }
>> + POSTING_READ(RING_FAULT_REG(dev_priv->engine[RCS]));
>> + } else if (INTEL_GEN(dev_priv) >= 6) {
>> + I915_WRITE(GEN8_RING_FAULT_REG,
>> + I915_READ(GEN8_RING_FAULT_REG) & ~RING_FAULT_VALID);
>> + POSTING_READ(GEN8_RING_FAULT_REG);
>> + }
> Reversed! gen8 has the single reg, gen6 has one per engine.
> -Chris
>
Oh... I'm really sorry...
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^ permalink raw reply [flat|nested] 5+ messages in thread
* ✗ Fi.CI.SPARSE: warning for drm/i915: clear error registers after error capture (rev3)
2018-08-30 11:55 [PATCH v3] drm/i915: clear error registers after error capture Lionel Landwerlin
2018-08-30 12:04 ` Chris Wilson
@ 2018-08-30 13:01 ` Patchwork
2018-08-30 13:21 ` ✓ Fi.CI.BAT: success " Patchwork
2 siblings, 0 replies; 5+ messages in thread
From: Patchwork @ 2018-08-30 13:01 UTC (permalink / raw)
To: Lionel Landwerlin; +Cc: intel-gfx
== Series Details ==
Series: drm/i915: clear error registers after error capture (rev3)
URL : https://patchwork.freedesktop.org/series/48939/
State : warning
== Summary ==
$ dim sparse origin/drm-tip
Commit: drm/i915: clear error registers after error capture
-drivers/gpu/drm/i915/selftests/../i915_drv.h:3685:16: warning: expression using sizeof(void)
+drivers/gpu/drm/i915/selftests/../i915_drv.h:3687:16: warning: expression using sizeof(void)
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^ permalink raw reply [flat|nested] 5+ messages in thread
* ✓ Fi.CI.BAT: success for drm/i915: clear error registers after error capture (rev3)
2018-08-30 11:55 [PATCH v3] drm/i915: clear error registers after error capture Lionel Landwerlin
2018-08-30 12:04 ` Chris Wilson
2018-08-30 13:01 ` ✗ Fi.CI.SPARSE: warning for drm/i915: clear error registers after error capture (rev3) Patchwork
@ 2018-08-30 13:21 ` Patchwork
2 siblings, 0 replies; 5+ messages in thread
From: Patchwork @ 2018-08-30 13:21 UTC (permalink / raw)
To: Lionel Landwerlin; +Cc: intel-gfx
== Series Details ==
Series: drm/i915: clear error registers after error capture (rev3)
URL : https://patchwork.freedesktop.org/series/48939/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4739 -> Patchwork_10047 =
== Summary - SUCCESS ==
No regressions found.
External URL: https://patchwork.freedesktop.org/api/1.0/series/48939/revisions/3/mbox/
== Known issues ==
Here are the changes found in Patchwork_10047 that come from known issues:
=== IGT changes ===
==== Issues hit ====
igt@gem_exec_suspend@basic-s4-devices:
fi-blb-e6850: PASS -> INCOMPLETE (fdo#107718)
igt@kms_pipe_crc_basic@nonblocking-crc-pipe-b:
{fi-byt-clapper}: PASS -> FAIL (fdo#107362)
==== Possible fixes ====
{igt@pm_rpm@module-reload}:
fi-cnl-psr: WARN (fdo#107602, fdo#107708) -> PASS
igt@prime_vgem@basic-fence-flip:
fi-ilk-650: FAIL (fdo#104008) -> PASS
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
fdo#104008 https://bugs.freedesktop.org/show_bug.cgi?id=104008
fdo#107362 https://bugs.freedesktop.org/show_bug.cgi?id=107362
fdo#107602 https://bugs.freedesktop.org/show_bug.cgi?id=107602
fdo#107708 https://bugs.freedesktop.org/show_bug.cgi?id=107708
fdo#107718 https://bugs.freedesktop.org/show_bug.cgi?id=107718
== Participating hosts (54 -> 49) ==
Missing (5): fi-ctg-p8600 fi-ilk-m540 fi-byt-squawks fi-bsw-cyan fi-hsw-4200u
== Build changes ==
* Linux: CI_DRM_4739 -> Patchwork_10047
CI_DRM_4739: f65e436af74d73b095b211d5294f5d7cd5132882 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_4612: e39e09910fc8e369e24f6a0cabaeb9356dbfae08 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_10047: 08f01e2ac3a1d218de2e842151480d3a7e1126da @ git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
08f01e2ac3a1 drm/i915: clear error registers after error capture
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_10047/issues.html
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2018-08-30 11:55 [PATCH v3] drm/i915: clear error registers after error capture Lionel Landwerlin
2018-08-30 12:04 ` Chris Wilson
2018-08-30 12:58 ` Lionel Landwerlin
2018-08-30 13:01 ` ✗ Fi.CI.SPARSE: warning for drm/i915: clear error registers after error capture (rev3) Patchwork
2018-08-30 13:21 ` ✓ Fi.CI.BAT: success " Patchwork
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