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From: Dmitry Osipenko <digetx@gmail.com>
To: Thierry Reding <thierry.reding@gmail.com>,
	Jonathan Hunter <jonathanh@nvidia.com>,
	Russell King <linux@armlinux.org.uk>
Cc: linux-arm-kernel@lists.infradead.org,
	linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: [PATCH v3 6/8] ARM: tegra: Always boot CPU in ARM-mode
Date: Thu, 30 Aug 2018 21:04:19 +0300	[thread overview]
Message-ID: <20180830180421.6415-7-digetx@gmail.com> (raw)
In-Reply-To: <20180830180421.6415-1-digetx@gmail.com>

CPU always jumps into reset handler in ARM-mode from the Trusted
Foundations firmware, hence let's make CPU to always jump into kernel
in ARM-mode regardless of the firmware presence to support. This is
required to make  Thumb-2 kernel working with the Trusted Foundations
firmware on Tegra30.

Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
---
 arch/arm/mach-tegra/reset-handler.S | 15 +++++++++++++--
 1 file changed, 13 insertions(+), 2 deletions(-)

diff --git a/arch/arm/mach-tegra/reset-handler.S b/arch/arm/mach-tegra/reset-handler.S
index a9f13230da2f..555c652f5a07 100644
--- a/arch/arm/mach-tegra/reset-handler.S
+++ b/arch/arm/mach-tegra/reset-handler.S
@@ -20,6 +20,7 @@
 #include <soc/tegra/flowctrl.h>
 #include <soc/tegra/fuse.h>
 
+#include <asm/assembler.h>
 #include <asm/asm-offsets.h>
 #include <asm/cache.h>
 
@@ -112,10 +113,20 @@ ENTRY(__tegra_cpu_reset_handler_start)
  * NOTE: This code is copied to IRAM. All code and data accesses
  *       must be position-independent.
  */
-
+	.arm
 	.align L1_CACHE_SHIFT
 ENTRY(__tegra_cpu_reset_handler)
 
+	/*
+	 * Tegra30 ignores first bit of the reset vector and always jumps
+	 * into kernel in .ARM mode from the firmware, hence force the mode
+	 * switch if kernel is compiled in Thumb-2.
+	 */
+ THUMB(	badr	r0, 1f		)
+ THUMB(	bx	r0		)
+ THUMB(	.thumb 			)
+ THUMB(	1: 			)
+
 	cpsid	aif, 0x13			@ SVC mode, interrupts disabled
 
 	tegra_get_soc_id TEGRA_APB_MISC_BASE, r6
@@ -215,7 +226,7 @@ __no_cpu0_chk:
 	ldr	lr, [r12, #RESET_DATA(STARTUP_SECONDARY)]
 	cmp	lr, #0
 	bleq	__die				@ no secondary startup handler
-	bx	lr
+	ret	lr
 #endif
 
 /*
-- 
2.18.0

WARNING: multiple messages have this Message-ID (diff)
From: digetx@gmail.com (Dmitry Osipenko)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v3 6/8] ARM: tegra: Always boot CPU in ARM-mode
Date: Thu, 30 Aug 2018 21:04:19 +0300	[thread overview]
Message-ID: <20180830180421.6415-7-digetx@gmail.com> (raw)
In-Reply-To: <20180830180421.6415-1-digetx@gmail.com>

CPU always jumps into reset handler in ARM-mode from the Trusted
Foundations firmware, hence let's make CPU to always jump into kernel
in ARM-mode regardless of the firmware presence to support. This is
required to make  Thumb-2 kernel working with the Trusted Foundations
firmware on Tegra30.

Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
---
 arch/arm/mach-tegra/reset-handler.S | 15 +++++++++++++--
 1 file changed, 13 insertions(+), 2 deletions(-)

diff --git a/arch/arm/mach-tegra/reset-handler.S b/arch/arm/mach-tegra/reset-handler.S
index a9f13230da2f..555c652f5a07 100644
--- a/arch/arm/mach-tegra/reset-handler.S
+++ b/arch/arm/mach-tegra/reset-handler.S
@@ -20,6 +20,7 @@
 #include <soc/tegra/flowctrl.h>
 #include <soc/tegra/fuse.h>
 
+#include <asm/assembler.h>
 #include <asm/asm-offsets.h>
 #include <asm/cache.h>
 
@@ -112,10 +113,20 @@ ENTRY(__tegra_cpu_reset_handler_start)
  * NOTE: This code is copied to IRAM. All code and data accesses
  *       must be position-independent.
  */
-
+	.arm
 	.align L1_CACHE_SHIFT
 ENTRY(__tegra_cpu_reset_handler)
 
+	/*
+	 * Tegra30 ignores first bit of the reset vector and always jumps
+	 * into kernel in .ARM mode from the firmware, hence force the mode
+	 * switch if kernel is compiled in Thumb-2.
+	 */
+ THUMB(	badr	r0, 1f		)
+ THUMB(	bx	r0		)
+ THUMB(	.thumb 			)
+ THUMB(	1: 			)
+
 	cpsid	aif, 0x13			@ SVC mode, interrupts disabled
 
 	tegra_get_soc_id TEGRA_APB_MISC_BASE, r6
@@ -215,7 +226,7 @@ __no_cpu0_chk:
 	ldr	lr, [r12, #RESET_DATA(STARTUP_SECONDARY)]
 	cmp	lr, #0
 	bleq	__die				@ no secondary startup handler
-	bx	lr
+	ret	lr
 #endif
 
 /*
-- 
2.18.0

  parent reply	other threads:[~2018-08-30 18:04 UTC|newest]

Thread overview: 20+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-08-30 18:04 [PATCH v3 0/8] Support Trusted Foundations firmware on Tegra30 Dmitry Osipenko
2018-08-30 18:04 ` Dmitry Osipenko
2018-08-30 18:04 ` [PATCH v3 1/8] ARM: trusted_foundations: Implement L2 cache initialization callback Dmitry Osipenko
2018-08-30 18:04   ` Dmitry Osipenko
2018-08-30 18:04 ` [PATCH v3 2/8] ARM: trusted_foundations: Make prepare_idle call to take mode argument Dmitry Osipenko
2018-08-30 18:04   ` Dmitry Osipenko
2018-08-30 18:04 ` [PATCH v3 3/8] ARM: trusted_foundations: Provide information about whether firmware is registered Dmitry Osipenko
2018-08-30 18:04   ` Dmitry Osipenko
2018-08-30 18:04 ` [PATCH v3 4/8] ARM: tegra: Setup L2 cache using Trusted Foundations firmware Dmitry Osipenko
2018-08-30 18:04   ` Dmitry Osipenko
2018-08-30 18:04 ` [PATCH v3 5/8] ARM: tegra: Don't apply CPU erratas in insecure mode Dmitry Osipenko
2018-08-30 18:04   ` Dmitry Osipenko
2018-08-30 18:04 ` Dmitry Osipenko [this message]
2018-08-30 18:04   ` [PATCH v3 6/8] ARM: tegra: Always boot CPU in ARM-mode Dmitry Osipenko
2018-08-30 18:04 ` [PATCH v3 7/8] ARM: tegra: Support L2 cache maintenance done via firmware Dmitry Osipenko
2018-08-30 18:04   ` Dmitry Osipenko
2018-08-30 18:04 ` [PATCH v3 8/8] ARM: tegra: Add firmware calls required for suspend-resume Dmitry Osipenko
2018-08-30 18:04   ` Dmitry Osipenko
2018-10-15 12:34 ` [PATCH v3 0/8] Support Trusted Foundations firmware on Tegra30 Dmitry Osipenko
2018-10-15 12:34   ` Dmitry Osipenko

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