* [PATCH] [intel-gfx] drm/i915/intel_csr.c Fix DMC FW Loading issue on ICL.
@ 2018-08-31 4:58 Jyoti Yadav
2018-08-31 5:26 ` ✗ Fi.CI.CHECKPATCH: warning for drm/i915/intel_csr.c Fix DMC FW Loading issue on ICL. (rev5) Patchwork
2018-08-31 5:42 ` ✓ Fi.CI.BAT: success " Patchwork
0 siblings, 2 replies; 3+ messages in thread
From: Jyoti Yadav @ 2018-08-31 4:58 UTC (permalink / raw)
To: intel-gfx
From: Jyoti <jyoti.r.yadav@intel.com>
This patch resolves the DMC FW loading issue.
Earlier DMC FW package have only one DMC FW for one stepping. But as such
there is no such restriction from Package side.
For ICL icl_dmc_ver1_07.bin binary package has DMC FW for 2 steppings.
So while reading the dmc_offset from package header, for 1st stepping offset
used to come 0x0 and was working fine till now.
But for second stepping and other steppings, offset is non zero numaber and is
in dwords. So we need to convert into bytes to fetch correct DMC FW from
correct place.
v2 : Added check for DMC FW max size for various gen. (Imre Deak)
v3 : Corrected naming convention for various gen. (Imre Deak)
v4 : Initalized max_fw_size to 0
v5: Corrected DMC FW MAX_SIZE for various gen. (Imre Deak)
Signed-off-by: Jyoti Yadav <jyoti.r.yadav@intel.com>
Reviewed-by: Imre Deak <imre.deak@intel.com>
---
drivers/gpu/drm/i915/intel_csr.c | 19 ++++++++++++++++---
1 file changed, 16 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_csr.c b/drivers/gpu/drm/i915/intel_csr.c
index 1ec4f09..dfdcfef 100644
--- a/drivers/gpu/drm/i915/intel_csr.c
+++ b/drivers/gpu/drm/i915/intel_csr.c
@@ -55,7 +55,9 @@
#define BXT_CSR_VERSION_REQUIRED CSR_VERSION(1, 7)
-#define CSR_MAX_FW_SIZE 0x2FFF
+#define BXT_CSR_MAX_FW_SIZE 0x3000
+#define GLK_CSR_MAX_FW_SIZE 0x4000
+#define ICL_CSR_MAX_FW_SIZE 0x6000
#define CSR_DEFAULT_FW_OFFSET 0xFFFFFFFF
struct intel_css_header {
@@ -279,6 +281,7 @@ static uint32_t *parse_csr_fw(struct drm_i915_private *dev_priv,
struct intel_csr *csr = &dev_priv->csr;
const struct stepping_info *si = intel_get_stepping_info(dev_priv);
uint32_t dmc_offset = CSR_DEFAULT_FW_OFFSET, readcount = 0, nbytes;
+ uint32_t max_fw_size = 0;
uint32_t i;
uint32_t *dmc_payload;
uint32_t required_version;
@@ -359,6 +362,8 @@ static uint32_t *parse_csr_fw(struct drm_i915_private *dev_priv,
si->stepping);
return NULL;
}
+ /* Convert dmc_offset into number of bytes. By default it is in dwords*/
+ dmc_offset *= 4;
readcount += dmc_offset;
/* Extract dmc_header information. */
@@ -391,8 +396,16 @@ static uint32_t *parse_csr_fw(struct drm_i915_private *dev_priv,
/* fw_size is in dwords, so multiplied by 4 to convert into bytes. */
nbytes = dmc_header->fw_size * 4;
- if (nbytes > CSR_MAX_FW_SIZE) {
- DRM_ERROR("DMC firmware too big (%u bytes)\n", nbytes);
+ if (INTEL_GEN(dev_priv) >= 11)
+ max_fw_size = ICL_CSR_MAX_FW_SIZE;
+ else if (IS_CANNONLAKE(dev_priv) || IS_GEMINILAKE(dev_priv))
+ max_fw_size = GLK_CSR_MAX_FW_SIZE;
+ else if (IS_GEN9(dev_priv))
+ max_fw_size = BXT_CSR_MAX_FW_SIZE;
+ else
+ MISSING_CASE(INTEL_REVID(dev_priv));
+ if (nbytes > max_fw_size) {
+ DRM_ERROR("DMC FW too big (%u bytes)\n", nbytes);
return NULL;
}
csr->dmc_fw_size = dmc_header->fw_size;
--
1.9.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 3+ messages in thread
* ✗ Fi.CI.CHECKPATCH: warning for drm/i915/intel_csr.c Fix DMC FW Loading issue on ICL. (rev5)
2018-08-31 4:58 [PATCH] [intel-gfx] drm/i915/intel_csr.c Fix DMC FW Loading issue on ICL Jyoti Yadav
@ 2018-08-31 5:26 ` Patchwork
2018-08-31 5:42 ` ✓ Fi.CI.BAT: success " Patchwork
1 sibling, 0 replies; 3+ messages in thread
From: Patchwork @ 2018-08-31 5:26 UTC (permalink / raw)
To: Jyoti Yadav; +Cc: intel-gfx
== Series Details ==
Series: drm/i915/intel_csr.c Fix DMC FW Loading issue on ICL. (rev5)
URL : https://patchwork.freedesktop.org/series/48803/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
5e4f9c90b0db drm/i915/intel_csr.c Fix DMC FW Loading issue on ICL.
-:10: WARNING:COMMIT_LOG_LONG_LINE: Possible unwrapped commit description (prefer a maximum 75 chars per line)
#10:
So while reading the dmc_offset from package header, for 1st stepping offset
-:18: WARNING:TYPO_SPELLING: 'Initalized' may be misspelled - perhaps 'Initialized'?
#18:
v4 : Initalized max_fw_size to 0
-:66: ERROR:TRAILING_WHITESPACE: trailing whitespace
#66: FILE: drivers/gpu/drm/i915/intel_csr.c:403:
+^Ielse if (IS_GEN9(dev_priv)) $
-:74: WARNING:NO_AUTHOR_SIGN_OFF: Missing Signed-off-by: line by nominal patch author 'Jyoti <jyoti.r.yadav@intel.com>'
total: 1 errors, 3 warnings, 0 checks, 43 lines checked
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 3+ messages in thread
* ✓ Fi.CI.BAT: success for drm/i915/intel_csr.c Fix DMC FW Loading issue on ICL. (rev5)
2018-08-31 4:58 [PATCH] [intel-gfx] drm/i915/intel_csr.c Fix DMC FW Loading issue on ICL Jyoti Yadav
2018-08-31 5:26 ` ✗ Fi.CI.CHECKPATCH: warning for drm/i915/intel_csr.c Fix DMC FW Loading issue on ICL. (rev5) Patchwork
@ 2018-08-31 5:42 ` Patchwork
1 sibling, 0 replies; 3+ messages in thread
From: Patchwork @ 2018-08-31 5:42 UTC (permalink / raw)
To: Jyoti Yadav; +Cc: intel-gfx
== Series Details ==
Series: drm/i915/intel_csr.c Fix DMC FW Loading issue on ICL. (rev5)
URL : https://patchwork.freedesktop.org/series/48803/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4745 -> Patchwork_10056 =
== Summary - SUCCESS ==
No regressions found.
External URL: https://patchwork.freedesktop.org/api/1.0/series/48803/revisions/5/mbox/
== Known issues ==
Here are the changes found in Patchwork_10056 that come from known issues:
=== IGT changes ===
==== Issues hit ====
igt@kms_frontbuffer_tracking@basic:
fi-hsw-peppy: PASS -> DMESG-WARN (fdo#102614)
{fi-byt-clapper}: PASS -> FAIL (fdo#103167)
igt@kms_pipe_crc_basic@nonblocking-crc-pipe-b:
{fi-byt-clapper}: PASS -> FAIL (fdo#107362)
==== Possible fixes ====
igt@kms_pipe_crc_basic@suspend-read-crc-pipe-b:
{fi-byt-clapper}: FAIL (fdo#103191, fdo#107362) -> PASS +1
{igt@kms_psr@primary_page_flip}:
fi-cnl-psr: FAIL (fdo#107336) -> PASS
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
fdo#102614 https://bugs.freedesktop.org/show_bug.cgi?id=102614
fdo#103167 https://bugs.freedesktop.org/show_bug.cgi?id=103167
fdo#103191 https://bugs.freedesktop.org/show_bug.cgi?id=103191
fdo#107336 https://bugs.freedesktop.org/show_bug.cgi?id=107336
fdo#107362 https://bugs.freedesktop.org/show_bug.cgi?id=107362
== Participating hosts (54 -> 49) ==
Missing (5): fi-ctg-p8600 fi-ilk-m540 fi-byt-squawks fi-bsw-cyan fi-hsw-4200u
== Build changes ==
* Linux: CI_DRM_4745 -> Patchwork_10056
CI_DRM_4745: 4ddf5e7833fae7268e674ddea403a24b36c8337d @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_4612: e39e09910fc8e369e24f6a0cabaeb9356dbfae08 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_10056: 5e4f9c90b0db307fceeab8c98f860cf4851aa382 @ git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
5e4f9c90b0db drm/i915/intel_csr.c Fix DMC FW Loading issue on ICL.
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_10056/issues.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 3+ messages in thread
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2018-08-31 4:58 [PATCH] [intel-gfx] drm/i915/intel_csr.c Fix DMC FW Loading issue on ICL Jyoti Yadav
2018-08-31 5:26 ` ✗ Fi.CI.CHECKPATCH: warning for drm/i915/intel_csr.c Fix DMC FW Loading issue on ICL. (rev5) Patchwork
2018-08-31 5:42 ` ✓ Fi.CI.BAT: success " Patchwork
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