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From: Christoph Hellwig <hch@infradead.org>
To: Atish Patra <atish.patra@wdc.com>
Cc: palmer@sifive.com, linux-riscv@lists.infradead.org,
	mark.rutland@arm.com, anup@brainfault.org, hch@infradead.org,
	tglx@linutronix.de, linux-kernel@vger.kernel.org,
	damein@vger.kernel.org
Subject: Re: [PATCH v2 2/3] RISC-V: Use Linux logical cpu number instead of hartid
Date: Thu, 30 Aug 2018 23:11:04 -0700	[thread overview]
Message-ID: <20180831061104.GB19292@infradead.org> (raw)
In-Reply-To: <1535445370-19004-3-git-send-email-atish.patra@wdc.com>

> -#define flush_tlb_all() sbi_remote_sfence_vma(NULL, 0, -1)
> +static inline void remote_sfence_vma(struct cpumask *cmask, unsigned long start,
> +				     unsigned long size)
> +{
> +	struct cpumask hmask;
> +
> +	riscv_cpuid_to_hartid_mask(cmask, &hmask);
> +	sbi_remote_sfence_vma(hmask.bits, start, size);
> +}
> +
> +#define flush_tlb_all() remote_sfence_vma(NULL, 0, -1)

flush_tlb_all passed NULL to sbi_remote_sfence_vma before, so this
changes what we pass.  I think we should keep the existing behavior.

> @@ -93,10 +94,11 @@ static inline void plic_toggle(int ctxid, int hwirq, int enable)
>  static inline void plic_irq_toggle(struct irq_data *d, int enable)
>  {
>  	int cpu;
> +	struct plic_handler *handler;
>  
>  	writel(enable, plic_regs + PRIORITY_BASE + d->hwirq * PRIORITY_PER_ID);
>  	for_each_cpu(cpu, irq_data_get_affinity_mask(d)) {
> -		struct plic_handler *handler = per_cpu_ptr(&plic_handlers, cpu);
> +		handler = per_cpu_ptr(&plic_handlers, cpu);

This looks like a spurious change.

WARNING: multiple messages have this Message-ID (diff)
From: hch@infradead.org (Christoph Hellwig)
To: linux-riscv@lists.infradead.org
Subject: [PATCH v2 2/3] RISC-V: Use Linux logical cpu number instead of hartid
Date: Thu, 30 Aug 2018 23:11:04 -0700	[thread overview]
Message-ID: <20180831061104.GB19292@infradead.org> (raw)
In-Reply-To: <1535445370-19004-3-git-send-email-atish.patra@wdc.com>

> -#define flush_tlb_all() sbi_remote_sfence_vma(NULL, 0, -1)
> +static inline void remote_sfence_vma(struct cpumask *cmask, unsigned long start,
> +				     unsigned long size)
> +{
> +	struct cpumask hmask;
> +
> +	riscv_cpuid_to_hartid_mask(cmask, &hmask);
> +	sbi_remote_sfence_vma(hmask.bits, start, size);
> +}
> +
> +#define flush_tlb_all() remote_sfence_vma(NULL, 0, -1)

flush_tlb_all passed NULL to sbi_remote_sfence_vma before, so this
changes what we pass.  I think we should keep the existing behavior.

> @@ -93,10 +94,11 @@ static inline void plic_toggle(int ctxid, int hwirq, int enable)
>  static inline void plic_irq_toggle(struct irq_data *d, int enable)
>  {
>  	int cpu;
> +	struct plic_handler *handler;
>  
>  	writel(enable, plic_regs + PRIORITY_BASE + d->hwirq * PRIORITY_PER_ID);
>  	for_each_cpu(cpu, irq_data_get_affinity_mask(d)) {
> -		struct plic_handler *handler = per_cpu_ptr(&plic_handlers, cpu);
> +		handler = per_cpu_ptr(&plic_handlers, cpu);

This looks like a spurious change.

  reply	other threads:[~2018-08-31  6:11 UTC|newest]

Thread overview: 36+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-08-28  8:36 [PATCH v2 0/3] RISC-V: Add new smp features Atish Patra
2018-08-28  8:36 ` [PATCH v2 1/3] RISC-V: Add logical CPU indexing for RISC-V Atish Patra
2018-08-31  6:03   ` Christoph Hellwig
2018-08-31  6:03     ` Christoph Hellwig
2018-09-04 17:59     ` Atish Patra
2018-09-04 17:59       ` Atish Patra
2018-08-28  8:36 ` [PATCH v2 2/3] RISC-V: Use Linux logical cpu number instead of hartid Atish Patra
2018-08-31  6:11   ` Christoph Hellwig [this message]
2018-08-31  6:11     ` Christoph Hellwig
2018-09-04 20:35     ` Atish Patra
2018-09-04 20:35       ` Atish Patra
2018-09-04 21:36       ` Christoph Hellwig
2018-09-04 21:36         ` Christoph Hellwig
2018-09-04 21:43         ` Atish Patra
2018-09-04 21:43           ` Atish Patra
2018-09-05 19:03           ` Christoph Hellwig
2018-09-05 19:03             ` Christoph Hellwig
2018-08-28  8:36 ` [PATCH v2 3/3] RISC-V: Support cpu hotplug Atish Patra
2018-08-31  6:18   ` Christoph Hellwig
2018-08-31  6:18     ` Christoph Hellwig
2018-09-04 18:08     ` Atish Patra
2018-09-04 18:08       ` Atish Patra
2018-09-04 21:36       ` Christoph Hellwig
2018-09-04 21:36         ` Christoph Hellwig
2018-09-04 21:40         ` Atish Patra
2018-09-04 21:40           ` Atish Patra
2018-08-30 13:53 ` [PATCH v2 0/3] RISC-V: Add new smp features Anup Patel
2018-08-30 13:53   ` Anup Patel
2018-08-30 14:11   ` Christoph Hellwig
2018-08-30 14:11     ` Christoph Hellwig
2018-08-30 14:15     ` Anup Patel
2018-08-30 14:15       ` Anup Patel
2018-08-30 14:18     ` Anup Patel
2018-08-30 14:18       ` Anup Patel
2018-08-30 16:04       ` Atish Patra
2018-08-30 16:04         ` Atish Patra

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