Re: [PATCH v2 5/8] pinctrl: sh-pfc: r8a77990: Add VIN pins, groups and functions

From: jacopo mondi <jacopo@jmondi.org>
To: Geert Uytterhoeven <geert@linux-m68k.org>,
	Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Cc: "Simon Horman" <horms@verge.net.au>,
	"Jacopo Mondi" <jacopo+renesas@jmondi.org>,
	"Laurent Pinchart" <laurent.pinchart@ideasonboard.com>,
	"Kieran Bingham" <kieran.bingham+renesas@ideasonboard.com>,
	"Niklas Söderlund" <niklas.soderlund+renesas@ragnatech.se>,
	"Magnus Damm" <damm+renesas@opensource.se>,
	"Ulrich Hecht" <ulrich.hecht+renesas@gmail.com>,
	Linux-Renesas <linux-renesas-soc@vger.kernel.org>
Subject: Re: [PATCH v2 5/8] pinctrl: sh-pfc: r8a77990: Add VIN pins, groups and functions
Date: Tue, 11 Sep 2018 10:54:24 +0200	[thread overview]
Message-ID: <20180911085424.GR28160@w540> (raw)
In-Reply-To: <CAMuHMdXbdm4=TzAkoc2KmS+m69ppOM6GXCgHTCoDS1-1MZ=RgQ@mail.gmail.com>

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Hi Geert,

On Tue, Sep 11, 2018 at 10:15:23AM +0200, Geert Uytterhoeven wrote:
> Hi Jacopo,
>
> On Tue, Sep 11, 2018 at 9:44 AM jacopo mondi <jacopo@jmondi.org> wrote:
> > On Mon, Sep 10, 2018 at 03:01:15PM +0200, Simon Horman wrote:
> > > On Wed, Sep 05, 2018 at 05:29:42PM +0200, Jacopo Mondi wrote:
> > > > This patch adds VIN{4,5} pins, groups and functions to the R8A77990 SoC.
>
> > Currently there are two open questions on this PFC patch:
>
> > 2) VIN5 synchronism signals (V/HSYNC, CLKENB, FIELD) are marked as
> >    "_A" only, while VIN4 ones have not _A or _B extensions and are
> >    shared between _A and _B group. The VIN5_#_A extension is an
> >    indication that synchronism signals for group _B are not
> >    multiplexed but active be default according to Morimoto-san, that
> >    is about to confirm this with HW team. In that case, we need to
> >    decide if to provide an 'vin5_sync_b' group anyway to let user
> >    select it from DTS. Otherwise it won't be possible to select
> >    synchronism pins for VIN5_B group (which is maybe fine if they're
> >    not multiplexed at all).
>
> If the a "B" sync group exists, the pins are probably configurable as GPIOs,
> too, so we probably do need a group for them in the driver.
>

The chip manual does not report any _b group, and I don't have any E3
pin-related documentation like I have for M3-W/N
(r01uh0802ej0100-r-car-3rd-pin.pdf,
ASOM-C18-201_R-CarM3_pinfunction.xls etc etc)

How to find it out? Morimoto-san have you heard any news from HW team?

Thanks
   j

> Gr{oetje,eeting}s,
>
>                         Geert
>
> --
> Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
>
> In personal conversations with technical people, I call myself a hacker. But
> when I'm talking to journalists I just say "programmer" or something like that.
>                                 -- Linus Torvalds

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