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From: "Michael S. Tsirkin" <mst@redhat.com>
To: Brijesh Singh <brijesh.singh@amd.com>
Cc: Igor Mammedov <imammedo@redhat.com>,
	qemu-devel@nongnu.org, Tom Lendacky <Thomas.Lendacky@amd.com>,
	Eduardo Habkost <ehabkost@redhat.com>,
	Paolo Bonzini <pbonzini@redhat.com>,
	Suravee Suthikulpanit <Suravee.Suthikulpanit@amd.com>,
	Richard Henderson <rth@twiddle.net>
Subject: Re: [Qemu-devel] [PATCH 4/6] i386: acpi: add IVHD device entry for IOAPIC
Date: Thu, 13 Sep 2018 14:18:47 -0400	[thread overview]
Message-ID: <20180913141145-mutt-send-email-mst@kernel.org> (raw)
In-Reply-To: <88997184-3509-4a6d-4fca-cd3fa64d1858@amd.com>

On Wed, Sep 12, 2018 at 02:24:52PM -0500, Brijesh Singh wrote:
> 
> 
> On 09/12/2018 11:35 AM, Igor Mammedov wrote:
> ...
> 
> > > +    /*
> > > +     * When interrupt remapping is enabled, Linux IOMMU driver also checks
> > > +     * for special IVHD device (type IO-APIC), which is typically presented
> > > +     * as PCI device 14:00.0.
> > Probably it shouldn't be a 'typically' device from somewhere but rather address
> > fetched from corresponding device model QEMU implements.
> > 
> 
> IOAPIC is not presented as a true PCI device to guest OS. When IOMMU is
> enabled a pseudo address space to added under root PCI bus. PCI 14:0.0
> presents to this pseudo device.
> 
> > 
> > > +     */
> > > +    if (s->intr_enabled) {
> > > +        build_append_int_noprefix(table_data, 0x0100a00000000048, 8);
> >                                                   ^^ this is incomprehensible,
> > where does this magic number comes from and how was it calculated?
> > 
> 
> In order to provide interrupt remap support, a special IVHD device need
> to be added,  the magic number uses the format defined in Table 95 (IVHD
> device entry type codes).
> 
> 0x01 00a0 00 00 0000 48
> 
> Byte 0: 0x48 (special device)
> Byte 1 & 2: must be zero
> Byte 3: 0 (dte setting)
> Byte 4: 0 (handle)
> Byte 5 & 6: IOAPIC devfn (14:0.0)

Do you mean *bus* devfn? devfn is 0.0.

> Byte 7: 0x1 (IOAPIC) - See Table 97 in spec


Above should go into code comment, along with
first (oldest) version of spec that has this table.
Additionally the number is IMHO more readable as:
	(0x1ull << 56) | (PCI_BUILD_BDF(14, 0) << 40) | 0x48

(assuming I got what it should be).

> 
> > > +    }
> > > +
> > >       build_header(linker, table_data, (void *)(table_data->data + iommu_start),
> > >                    "IVRS", table_data->len - iommu_start, 1, NULL, NULL);
> > >   }
> > 

  reply	other threads:[~2018-09-13 18:20 UTC|newest]

Thread overview: 31+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-09-11 16:49 [Qemu-devel] [PATCH 0/6] x86_iommu/amd: add interrupt remap support Brijesh Singh
2018-09-11 16:49 ` [Qemu-devel] [PATCH 1/6] x86_iommu: move the kernel-irqchip check in common code Brijesh Singh
2018-09-12  3:45   ` Peter Xu
2018-09-11 16:49 ` [Qemu-devel] [PATCH 2/6] x86_iommu/amd: Prepare for interrupt remap support Brijesh Singh
2018-09-12  3:52   ` Peter Xu
2018-09-12 18:59     ` Brijesh Singh
2018-09-13  3:15       ` Peter Xu
2018-09-13  8:15         ` Suravee Suthikulpanit
2018-09-13  8:48           ` Peter Xu
2018-09-13 14:47           ` Paolo Bonzini
2018-09-11 16:49 ` [Qemu-devel] [PATCH 3/6] x86_iommu/amd: Add interrupt remap support when VAPIC is not enabled Brijesh Singh
2018-09-12  3:37   ` Peter Xu
2018-09-12 18:50     ` Brijesh Singh
2018-09-13  2:59       ` Peter Xu
2018-09-11 16:49 ` [Qemu-devel] [PATCH 4/6] i386: acpi: add IVHD device entry for IOAPIC Brijesh Singh
2018-09-12  4:35   ` Peter Xu
2018-09-12 19:11     ` Brijesh Singh
2018-09-13  3:20       ` Peter Xu
2018-09-12 16:35   ` Igor Mammedov
2018-09-12 19:24     ` Brijesh Singh
2018-09-13 18:18       ` Michael S. Tsirkin [this message]
2018-09-13 22:20         ` Brijesh Singh
2018-09-13 22:29           ` Michael S. Tsirkin
2018-09-11 16:49 ` [Qemu-devel] [PATCH 6/6] x86_iommu/amd: Enable Guest virtual APIC support Brijesh Singh
2018-09-12  4:52   ` Peter Xu
2018-09-12 21:14     ` Brijesh Singh
2018-09-13  8:36       ` Suravee Suthikulpanit
2018-09-13 11:44         ` Peter Xu
2018-09-13  7:13     ` Suravee Suthikulpanit
2018-09-12 16:38   ` Igor Mammedov
     [not found] ` <1536684589-11718-6-git-send-email-brijesh.singh@amd.com>
2018-09-13  7:16   ` [Qemu-devel] [PATCH 5/6] x86_iommu/amd: Add interrupt remap support when VAPIC is enabled Suravee Suthikulpanit

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