All of lore.kernel.org
 help / color / mirror / Atom feed
From: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
To: Peter Xu <peterx@redhat.com>, Brijesh Singh <brijesh.singh@amd.com>
Cc: qemu-devel@nongnu.org, Tom Lendacky <Thomas.Lendacky@amd.com>,
	Eduardo Habkost <ehabkost@redhat.com>,
	"Michael S. Tsirkin" <mst@redhat.com>,
	Paolo Bonzini <pbonzini@redhat.com>,
	Richard Henderson <rth@twiddle.net>
Subject: Re: [Qemu-devel] [PATCH 6/6] x86_iommu/amd: Enable Guest virtual APIC support
Date: Thu, 13 Sep 2018 14:13:18 +0700	[thread overview]
Message-ID: <40dec19b-51d7-d0ad-e1c6-82e1c63dbe63@amd.com> (raw)
In-Reply-To: <20180912045233.GE3829@xz-x1>

Peter,

On 9/12/18 11:52 AM, Peter Xu wrote:
> On Tue, Sep 11, 2018 at 11:49:49AM -0500, Brijesh Singh wrote:
>> Now that amd-iommu support interrupt remapping, enable the GASup in IVRS
>> table and GASup in extended feature register to indicate that IOMMU
>> support guest virtual APIC mode.
>>
>> Note that the GAMSup is set to zero to indicate that  Guest Virtual
>> APIC does not support advanced interrupt features (i.e virtualized
>> interrupts using the guest virtual APIC).
>>
>> See Table 21 from IOMMU spec for interrupt virtualization controls
>>
>> IOMMU spec: https://support.amd.com/TechDocs/48882_IOMMU.pdf
>>
>> Cc: "Michael S. Tsirkin" <mst@redhat.com>
>> Cc: Paolo Bonzini <pbonzini@redhat.com>
>> Cc: Richard Henderson <rth@twiddle.net>
>> Cc: Eduardo Habkost <ehabkost@redhat.com>
>> Cc: Marcel Apfelbaum <marcel.apfelbaum@gmail.com>
>> Cc: Tom Lendacky <Thomas.Lendacky@amd.com>
>> Cc: Suravee Suthikulpanit <Suravee.Suthikulpanit@amd.com>
>> Signed-off-by: Brijesh Singh <brijesh.singh@amd.com>
>> ---
>>   hw/i386/acpi-build.c | 3 ++-
>>   hw/i386/amd_iommu.h  | 2 +-
>>   2 files changed, 3 insertions(+), 2 deletions(-)
>>
>> diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c
>> index 5c2c638..1cbc8ba 100644
>> --- a/hw/i386/acpi-build.c
>> +++ b/hw/i386/acpi-build.c
>> @@ -2565,7 +2565,8 @@ build_amd_iommu(GArray *table_data, BIOSLinker *linker)
>>       build_append_int_noprefix(table_data,
>>                                (48UL << 30) | /* HATS   */
>>                                (48UL << 28) | /* GATS   */
>> -                             (1UL << 2),    /* GTSup  */
>> +                             (1UL << 2)   | /* GTSup  */
>> +                             (1UL << 6),    /* GASup  */
> 
> Sorry if I misunderstood - is this for nested?
> 
> I'm a bit confused here... IIUC in your previous patches you didn't
> really implement guest_mode==1 case in IRTEs.  So if you have this set
> then the guest should be able to setup IRTEs with guest_mode==1?  How
> did it work?
> 
> Thanks,
> 

The naming of these bits are confusing. Please allow me to help explain.
There are two capability bits:

* GASup  : This is to allow 128-bit IRTE when GAEn is set.

* GAMSup : This is for Guest Virtual APIC mode support,
             which is not currently supported in vIOMMU.
            The commit message in patch 5 is incorrect.

Here, we set GASup in order to allow 128-bit IRTE support,
which is needed for some of future AMD IOMMU features.

Thanks,
Suravee

  parent reply	other threads:[~2018-09-13  7:13 UTC|newest]

Thread overview: 31+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-09-11 16:49 [Qemu-devel] [PATCH 0/6] x86_iommu/amd: add interrupt remap support Brijesh Singh
2018-09-11 16:49 ` [Qemu-devel] [PATCH 1/6] x86_iommu: move the kernel-irqchip check in common code Brijesh Singh
2018-09-12  3:45   ` Peter Xu
2018-09-11 16:49 ` [Qemu-devel] [PATCH 2/6] x86_iommu/amd: Prepare for interrupt remap support Brijesh Singh
2018-09-12  3:52   ` Peter Xu
2018-09-12 18:59     ` Brijesh Singh
2018-09-13  3:15       ` Peter Xu
2018-09-13  8:15         ` Suravee Suthikulpanit
2018-09-13  8:48           ` Peter Xu
2018-09-13 14:47           ` Paolo Bonzini
2018-09-11 16:49 ` [Qemu-devel] [PATCH 3/6] x86_iommu/amd: Add interrupt remap support when VAPIC is not enabled Brijesh Singh
2018-09-12  3:37   ` Peter Xu
2018-09-12 18:50     ` Brijesh Singh
2018-09-13  2:59       ` Peter Xu
2018-09-11 16:49 ` [Qemu-devel] [PATCH 4/6] i386: acpi: add IVHD device entry for IOAPIC Brijesh Singh
2018-09-12  4:35   ` Peter Xu
2018-09-12 19:11     ` Brijesh Singh
2018-09-13  3:20       ` Peter Xu
2018-09-12 16:35   ` Igor Mammedov
2018-09-12 19:24     ` Brijesh Singh
2018-09-13 18:18       ` Michael S. Tsirkin
2018-09-13 22:20         ` Brijesh Singh
2018-09-13 22:29           ` Michael S. Tsirkin
2018-09-11 16:49 ` [Qemu-devel] [PATCH 6/6] x86_iommu/amd: Enable Guest virtual APIC support Brijesh Singh
2018-09-12  4:52   ` Peter Xu
2018-09-12 21:14     ` Brijesh Singh
2018-09-13  8:36       ` Suravee Suthikulpanit
2018-09-13 11:44         ` Peter Xu
2018-09-13  7:13     ` Suravee Suthikulpanit [this message]
2018-09-12 16:38   ` Igor Mammedov
     [not found] ` <1536684589-11718-6-git-send-email-brijesh.singh@amd.com>
2018-09-13  7:16   ` [Qemu-devel] [PATCH 5/6] x86_iommu/amd: Add interrupt remap support when VAPIC is enabled Suravee Suthikulpanit

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=40dec19b-51d7-d0ad-e1c6-82e1c63dbe63@amd.com \
    --to=suravee.suthikulpanit@amd.com \
    --cc=Thomas.Lendacky@amd.com \
    --cc=brijesh.singh@amd.com \
    --cc=ehabkost@redhat.com \
    --cc=mst@redhat.com \
    --cc=pbonzini@redhat.com \
    --cc=peterx@redhat.com \
    --cc=qemu-devel@nongnu.org \
    --cc=rth@twiddle.net \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.