* [PATCH v4 0/2] Add support for RZ/A2 wdt
@ 2018-09-10 19:52 Chris Brandt
2018-09-10 19:52 ` [PATCH v4 1/2] watchdog: rza_wdt: Support longer timeouts Chris Brandt
2018-09-10 19:52 ` [PATCH v4 2/2] dt-bindings: watchdog: renesas-wdt: Add support for R7S9210 Chris Brandt
0 siblings, 2 replies; 5+ messages in thread
From: Chris Brandt @ 2018-09-10 19:52 UTC (permalink / raw)
To: Guenter Roeck, Wim Van Sebroeck, Rob Herring, Mark Rutland,
Geert Uytterhoeven
Cc: linux-watchdog, devicetree, linux-renesas-soc, Simon Horman,
Chris Brandt
Slightly modify the rza_wdt.c driver and update the binding docs.
Chris Brandt (2):
watchdog: rza_wdt: Support longer timeouts
dt-bindings: watchdog: renesas-wdt: Add support for R7S9210
.../devicetree/bindings/watchdog/renesas-wdt.txt | 1 +
drivers/watchdog/rza_wdt.c | 88 +++++++++++++++++-----
2 files changed, 71 insertions(+), 18 deletions(-)
--
2.16.1
^ permalink raw reply [flat|nested] 5+ messages in thread
* [PATCH v4 1/2] watchdog: rza_wdt: Support longer timeouts
2018-09-10 19:52 [PATCH v4 0/2] Add support for RZ/A2 wdt Chris Brandt
@ 2018-09-10 19:52 ` Chris Brandt
2018-09-16 0:54 ` [v4,1/2] " Guenter Roeck
2018-09-10 19:52 ` [PATCH v4 2/2] dt-bindings: watchdog: renesas-wdt: Add support for R7S9210 Chris Brandt
1 sibling, 1 reply; 5+ messages in thread
From: Chris Brandt @ 2018-09-10 19:52 UTC (permalink / raw)
To: Guenter Roeck, Wim Van Sebroeck, Rob Herring, Mark Rutland,
Geert Uytterhoeven
Cc: linux-watchdog, devicetree, linux-renesas-soc, Simon Horman,
Chris Brandt
The RZ/A2 watchdog timer extends the clock source options in order to
allow for longer timeouts.
Signed-off-by: Chris Brandt <chris.brandt@renesas.com>
---
v4:
* Documented CKS_3BIT/CKS_4BIT better
* Changed 16384 and 4194304 into #define
* Removed rza_wdt.timeout
* Removed extra ( ) from DIV_ROUND_UP
* Removed check for counter value > 256
* Added set_timeout function
* Removed checking for new timeout value in ping function
* Removed unneeded 'else' case when checking .data in probe
v3:
* Removed + 1 from DIV_ROUND_UP line
* resetting to 0 if time to big did not make as much sense are resetting
to 256
v2:
* use DIV_ROUND_UP
* use %u for pr_debug
* use of_match data to determine the size of CKS register
---
drivers/watchdog/rza_wdt.c | 88 ++++++++++++++++++++++++++++++++++++----------
1 file changed, 70 insertions(+), 18 deletions(-)
diff --git a/drivers/watchdog/rza_wdt.c b/drivers/watchdog/rza_wdt.c
index e618218d2374..aeca6b13c797 100644
--- a/drivers/watchdog/rza_wdt.c
+++ b/drivers/watchdog/rza_wdt.c
@@ -14,6 +14,7 @@
#include <linux/delay.h>
#include <linux/module.h>
#include <linux/of_address.h>
+#include <linux/of_device.h>
#include <linux/platform_device.h>
#include <linux/watchdog.h>
@@ -34,12 +35,45 @@
#define WRCSR_RSTE BIT(6)
#define WRCSR_CLEAR_WOVF 0xA500 /* special value */
+/* The maximum CKS register setting value to get the longest timeout */
+#define CKS_3BIT 0x7
+#define CKS_4BIT 0xF
+
+#define DIVIDER_3BIT 16384 /* Clock divider when CKS = 0x7 */
+#define DIVIDER_4BIT 4194304 /* Clock divider when CKS = 0xF */
+
struct rza_wdt {
struct watchdog_device wdev;
void __iomem *base;
struct clk *clk;
+ u8 count;
+ u8 cks;
};
+static void rza_wdt_calc_timeout(struct rza_wdt *priv, int timeout)
+{
+ unsigned long rate = clk_get_rate(priv->clk);
+ unsigned int ticks;
+
+ if (priv->cks == CKS_4BIT) {
+ ticks = DIV_ROUND_UP(timeout * rate, DIVIDER_4BIT);
+
+ /*
+ * Since max_timeout was set in probe, we know that the timeout
+ * value passed will never calculate to a tick value greater
+ * than 256.
+ */
+ priv->count = 256 - ticks;
+
+ } else {
+ /* Start timer with longest timeout */
+ priv->count = 0;
+ }
+
+ pr_debug("%s: timeout set to %u (WTCNT=%d)\n", __func__,
+ timeout, priv->count);
+}
+
static int rza_wdt_start(struct watchdog_device *wdev)
{
struct rza_wdt *priv = watchdog_get_drvdata(wdev);
@@ -51,13 +85,12 @@ static int rza_wdt_start(struct watchdog_device *wdev)
readb(priv->base + WRCSR);
writew(WRCSR_CLEAR_WOVF, priv->base + WRCSR);
- /*
- * Start timer with slowest clock source and reset option enabled.
- */
+ rza_wdt_calc_timeout(priv, wdev->timeout);
+
writew(WRCSR_MAGIC | WRCSR_RSTE, priv->base + WRCSR);
- writew(WTCNT_MAGIC | 0, priv->base + WTCNT);
- writew(WTCSR_MAGIC | WTSCR_WT | WTSCR_TME | WTSCR_CKS(7),
- priv->base + WTCSR);
+ writew(WTCNT_MAGIC | priv->count, priv->base + WTCNT);
+ writew(WTCSR_MAGIC | WTSCR_WT | WTSCR_TME |
+ WTSCR_CKS(priv->cks), priv->base + WTCSR);
return 0;
}
@@ -75,8 +108,17 @@ static int rza_wdt_ping(struct watchdog_device *wdev)
{
struct rza_wdt *priv = watchdog_get_drvdata(wdev);
- writew(WTCNT_MAGIC | 0, priv->base + WTCNT);
+ writew(WTCNT_MAGIC | priv->count, priv->base + WTCNT);
+ pr_debug("%s: timeout = %u\n", __func__, wdev->timeout);
+
+ return 0;
+}
+
+static int rza_set_timeout(struct watchdog_device *wdev, unsigned int timeout)
+{
+ wdev->timeout = timeout;
+ rza_wdt_start(wdev);
return 0;
}
@@ -121,6 +163,7 @@ static const struct watchdog_ops rza_wdt_ops = {
.start = rza_wdt_start,
.stop = rza_wdt_stop,
.ping = rza_wdt_ping,
+ .set_timeout = rza_set_timeout,
.restart = rza_wdt_restart,
};
@@ -150,20 +193,28 @@ static int rza_wdt_probe(struct platform_device *pdev)
return -ENOENT;
}
- /* Assume slowest clock rate possible (CKS=7) */
- rate /= 16384;
-
priv->wdev.info = &rza_wdt_ident,
priv->wdev.ops = &rza_wdt_ops,
priv->wdev.parent = &pdev->dev;
- /*
- * Since the max possible timeout of our 8-bit count register is less
- * than a second, we must use max_hw_heartbeat_ms.
- */
- priv->wdev.max_hw_heartbeat_ms = (1000 * U8_MAX) / rate;
- dev_dbg(&pdev->dev, "max hw timeout of %dms\n",
- priv->wdev.max_hw_heartbeat_ms);
+ priv->cks = (unsigned int)of_device_get_match_data(&pdev->dev);
+ if (priv->cks == CKS_4BIT) {
+ /* Assume slowest clock rate possible (CKS=0xF) */
+ priv->wdev.max_timeout = (DIVIDER_4BIT * U8_MAX) / rate;
+
+ } else if (priv->cks == CKS_3BIT) {
+ /* Assume slowest clock rate possible (CKS=7) */
+ rate /= DIVIDER_3BIT;
+
+ /*
+ * Since the max possible timeout of our 8-bit count
+ * register is less than a second, we must use
+ * max_hw_heartbeat_ms.
+ */
+ priv->wdev.max_hw_heartbeat_ms = (1000 * U8_MAX) / rate;
+ dev_dbg(&pdev->dev, "max hw timeout of %dms\n",
+ priv->wdev.max_hw_heartbeat_ms);
+ }
priv->wdev.min_timeout = 1;
priv->wdev.timeout = DEFAULT_TIMEOUT;
@@ -179,7 +230,8 @@ static int rza_wdt_probe(struct platform_device *pdev)
}
static const struct of_device_id rza_wdt_of_match[] = {
- { .compatible = "renesas,rza-wdt", },
+ { .compatible = "renesas,r7s9210-wdt", .data = (void *)CKS_4BIT, },
+ { .compatible = "renesas,rza-wdt", .data = (void *)CKS_3BIT, },
{ /* sentinel */ }
};
MODULE_DEVICE_TABLE(of, rza_wdt_of_match);
--
2.16.1
^ permalink raw reply related [flat|nested] 5+ messages in thread
* [PATCH v4 2/2] dt-bindings: watchdog: renesas-wdt: Add support for R7S9210
2018-09-10 19:52 [PATCH v4 0/2] Add support for RZ/A2 wdt Chris Brandt
2018-09-10 19:52 ` [PATCH v4 1/2] watchdog: rza_wdt: Support longer timeouts Chris Brandt
@ 2018-09-10 19:52 ` Chris Brandt
2018-09-16 0:55 ` [v4,2/2] " Guenter Roeck
1 sibling, 1 reply; 5+ messages in thread
From: Chris Brandt @ 2018-09-10 19:52 UTC (permalink / raw)
To: Guenter Roeck, Wim Van Sebroeck, Rob Herring, Mark Rutland,
Geert Uytterhoeven
Cc: linux-watchdog, devicetree, linux-renesas-soc, Simon Horman,
Chris Brandt
Document support for RZ/A2
Signed-off-by: Chris Brandt <chris.brandt@renesas.com>
---
Documentation/devicetree/bindings/watchdog/renesas-wdt.txt | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/watchdog/renesas-wdt.txt b/Documentation/devicetree/bindings/watchdog/renesas-wdt.txt
index 5d47a262474c..45a709dd0345 100644
--- a/Documentation/devicetree/bindings/watchdog/renesas-wdt.txt
+++ b/Documentation/devicetree/bindings/watchdog/renesas-wdt.txt
@@ -19,6 +19,7 @@ Required properties:
- "renesas,r8a77990-wdt" (R-Car E3)
- "renesas,r8a77995-wdt" (R-Car D3)
- "renesas,r7s72100-wdt" (RZ/A1)
+ - "renesas,r7s9210-wdt" (RZ/A2)
The generic compatible string must be:
- "renesas,rza-wdt" for RZ/A
- "renesas,rcar-gen2-wdt" for R-Car Gen2 and RZ/G
--
2.16.1
^ permalink raw reply related [flat|nested] 5+ messages in thread
* Re: [v4,1/2] watchdog: rza_wdt: Support longer timeouts
2018-09-10 19:52 ` [PATCH v4 1/2] watchdog: rza_wdt: Support longer timeouts Chris Brandt
@ 2018-09-16 0:54 ` Guenter Roeck
0 siblings, 0 replies; 5+ messages in thread
From: Guenter Roeck @ 2018-09-16 0:54 UTC (permalink / raw)
To: Chris Brandt
Cc: Wim Van Sebroeck, Rob Herring, Mark Rutland, Geert Uytterhoeven,
linux-watchdog, devicetree, linux-renesas-soc, Simon Horman
On Mon, Sep 10, 2018 at 02:52:32PM -0500, Chris Brandt wrote:
> The RZ/A2 watchdog timer extends the clock source options in order to
> allow for longer timeouts.
>
> Signed-off-by: Chris Brandt <chris.brandt@renesas.com>
Reviewed-by: Guenter Roeck <linux@roeck-us.net>
> ---
> v4:
> * Documented CKS_3BIT/CKS_4BIT better
> * Changed 16384 and 4194304 into #define
> * Removed rza_wdt.timeout
> * Removed extra ( ) from DIV_ROUND_UP
> * Removed check for counter value > 256
> * Added set_timeout function
> * Removed checking for new timeout value in ping function
> * Removed unneeded 'else' case when checking .data in probe
> v3:
> * Removed + 1 from DIV_ROUND_UP line
> * resetting to 0 if time to big did not make as much sense are resetting
> to 256
> v2:
> * use DIV_ROUND_UP
> * use %u for pr_debug
> * use of_match data to determine the size of CKS register
> ---
> drivers/watchdog/rza_wdt.c | 88 ++++++++++++++++++++++++++++++++++++----------
> 1 file changed, 70 insertions(+), 18 deletions(-)
>
> diff --git a/drivers/watchdog/rza_wdt.c b/drivers/watchdog/rza_wdt.c
> index e618218d2374..aeca6b13c797 100644
> --- a/drivers/watchdog/rza_wdt.c
> +++ b/drivers/watchdog/rza_wdt.c
> @@ -14,6 +14,7 @@
> #include <linux/delay.h>
> #include <linux/module.h>
> #include <linux/of_address.h>
> +#include <linux/of_device.h>
> #include <linux/platform_device.h>
> #include <linux/watchdog.h>
>
> @@ -34,12 +35,45 @@
> #define WRCSR_RSTE BIT(6)
> #define WRCSR_CLEAR_WOVF 0xA500 /* special value */
>
> +/* The maximum CKS register setting value to get the longest timeout */
> +#define CKS_3BIT 0x7
> +#define CKS_4BIT 0xF
> +
> +#define DIVIDER_3BIT 16384 /* Clock divider when CKS = 0x7 */
> +#define DIVIDER_4BIT 4194304 /* Clock divider when CKS = 0xF */
> +
> struct rza_wdt {
> struct watchdog_device wdev;
> void __iomem *base;
> struct clk *clk;
> + u8 count;
> + u8 cks;
> };
>
> +static void rza_wdt_calc_timeout(struct rza_wdt *priv, int timeout)
> +{
> + unsigned long rate = clk_get_rate(priv->clk);
> + unsigned int ticks;
> +
> + if (priv->cks == CKS_4BIT) {
> + ticks = DIV_ROUND_UP(timeout * rate, DIVIDER_4BIT);
> +
> + /*
> + * Since max_timeout was set in probe, we know that the timeout
> + * value passed will never calculate to a tick value greater
> + * than 256.
> + */
> + priv->count = 256 - ticks;
> +
> + } else {
> + /* Start timer with longest timeout */
> + priv->count = 0;
> + }
> +
> + pr_debug("%s: timeout set to %u (WTCNT=%d)\n", __func__,
> + timeout, priv->count);
> +}
> +
> static int rza_wdt_start(struct watchdog_device *wdev)
> {
> struct rza_wdt *priv = watchdog_get_drvdata(wdev);
> @@ -51,13 +85,12 @@ static int rza_wdt_start(struct watchdog_device *wdev)
> readb(priv->base + WRCSR);
> writew(WRCSR_CLEAR_WOVF, priv->base + WRCSR);
>
> - /*
> - * Start timer with slowest clock source and reset option enabled.
> - */
> + rza_wdt_calc_timeout(priv, wdev->timeout);
> +
> writew(WRCSR_MAGIC | WRCSR_RSTE, priv->base + WRCSR);
> - writew(WTCNT_MAGIC | 0, priv->base + WTCNT);
> - writew(WTCSR_MAGIC | WTSCR_WT | WTSCR_TME | WTSCR_CKS(7),
> - priv->base + WTCSR);
> + writew(WTCNT_MAGIC | priv->count, priv->base + WTCNT);
> + writew(WTCSR_MAGIC | WTSCR_WT | WTSCR_TME |
> + WTSCR_CKS(priv->cks), priv->base + WTCSR);
>
> return 0;
> }
> @@ -75,8 +108,17 @@ static int rza_wdt_ping(struct watchdog_device *wdev)
> {
> struct rza_wdt *priv = watchdog_get_drvdata(wdev);
>
> - writew(WTCNT_MAGIC | 0, priv->base + WTCNT);
> + writew(WTCNT_MAGIC | priv->count, priv->base + WTCNT);
>
> + pr_debug("%s: timeout = %u\n", __func__, wdev->timeout);
> +
> + return 0;
> +}
> +
> +static int rza_set_timeout(struct watchdog_device *wdev, unsigned int timeout)
> +{
> + wdev->timeout = timeout;
> + rza_wdt_start(wdev);
> return 0;
> }
>
> @@ -121,6 +163,7 @@ static const struct watchdog_ops rza_wdt_ops = {
> .start = rza_wdt_start,
> .stop = rza_wdt_stop,
> .ping = rza_wdt_ping,
> + .set_timeout = rza_set_timeout,
> .restart = rza_wdt_restart,
> };
>
> @@ -150,20 +193,28 @@ static int rza_wdt_probe(struct platform_device *pdev)
> return -ENOENT;
> }
>
> - /* Assume slowest clock rate possible (CKS=7) */
> - rate /= 16384;
> -
> priv->wdev.info = &rza_wdt_ident,
> priv->wdev.ops = &rza_wdt_ops,
> priv->wdev.parent = &pdev->dev;
>
> - /*
> - * Since the max possible timeout of our 8-bit count register is less
> - * than a second, we must use max_hw_heartbeat_ms.
> - */
> - priv->wdev.max_hw_heartbeat_ms = (1000 * U8_MAX) / rate;
> - dev_dbg(&pdev->dev, "max hw timeout of %dms\n",
> - priv->wdev.max_hw_heartbeat_ms);
> + priv->cks = (unsigned int)of_device_get_match_data(&pdev->dev);
> + if (priv->cks == CKS_4BIT) {
> + /* Assume slowest clock rate possible (CKS=0xF) */
> + priv->wdev.max_timeout = (DIVIDER_4BIT * U8_MAX) / rate;
> +
> + } else if (priv->cks == CKS_3BIT) {
> + /* Assume slowest clock rate possible (CKS=7) */
> + rate /= DIVIDER_3BIT;
> +
> + /*
> + * Since the max possible timeout of our 8-bit count
> + * register is less than a second, we must use
> + * max_hw_heartbeat_ms.
> + */
> + priv->wdev.max_hw_heartbeat_ms = (1000 * U8_MAX) / rate;
> + dev_dbg(&pdev->dev, "max hw timeout of %dms\n",
> + priv->wdev.max_hw_heartbeat_ms);
> + }
>
> priv->wdev.min_timeout = 1;
> priv->wdev.timeout = DEFAULT_TIMEOUT;
> @@ -179,7 +230,8 @@ static int rza_wdt_probe(struct platform_device *pdev)
> }
>
> static const struct of_device_id rza_wdt_of_match[] = {
> - { .compatible = "renesas,rza-wdt", },
> + { .compatible = "renesas,r7s9210-wdt", .data = (void *)CKS_4BIT, },
> + { .compatible = "renesas,rza-wdt", .data = (void *)CKS_3BIT, },
> { /* sentinel */ }
> };
> MODULE_DEVICE_TABLE(of, rza_wdt_of_match);
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [v4,2/2] dt-bindings: watchdog: renesas-wdt: Add support for R7S9210
2018-09-10 19:52 ` [PATCH v4 2/2] dt-bindings: watchdog: renesas-wdt: Add support for R7S9210 Chris Brandt
@ 2018-09-16 0:55 ` Guenter Roeck
0 siblings, 0 replies; 5+ messages in thread
From: Guenter Roeck @ 2018-09-16 0:55 UTC (permalink / raw)
To: Chris Brandt
Cc: Wim Van Sebroeck, Rob Herring, Mark Rutland, Geert Uytterhoeven,
linux-watchdog, devicetree, linux-renesas-soc, Simon Horman
On Mon, Sep 10, 2018 at 02:52:33PM -0500, Chris Brandt wrote:
> Document support for RZ/A2
>
> Signed-off-by: Chris Brandt <chris.brandt@renesas.com>
Reviewed-by: Guenter Roeck <linux@roeck-us.net>
> ---
> Documentation/devicetree/bindings/watchdog/renesas-wdt.txt | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/Documentation/devicetree/bindings/watchdog/renesas-wdt.txt b/Documentation/devicetree/bindings/watchdog/renesas-wdt.txt
> index 5d47a262474c..45a709dd0345 100644
> --- a/Documentation/devicetree/bindings/watchdog/renesas-wdt.txt
> +++ b/Documentation/devicetree/bindings/watchdog/renesas-wdt.txt
> @@ -19,6 +19,7 @@ Required properties:
> - "renesas,r8a77990-wdt" (R-Car E3)
> - "renesas,r8a77995-wdt" (R-Car D3)
> - "renesas,r7s72100-wdt" (RZ/A1)
> + - "renesas,r7s9210-wdt" (RZ/A2)
> The generic compatible string must be:
> - "renesas,rza-wdt" for RZ/A
> - "renesas,rcar-gen2-wdt" for R-Car Gen2 and RZ/G
^ permalink raw reply [flat|nested] 5+ messages in thread
end of thread, other threads:[~2018-09-16 0:55 UTC | newest]
Thread overview: 5+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2018-09-10 19:52 [PATCH v4 0/2] Add support for RZ/A2 wdt Chris Brandt
2018-09-10 19:52 ` [PATCH v4 1/2] watchdog: rza_wdt: Support longer timeouts Chris Brandt
2018-09-16 0:54 ` [v4,1/2] " Guenter Roeck
2018-09-10 19:52 ` [PATCH v4 2/2] dt-bindings: watchdog: renesas-wdt: Add support for R7S9210 Chris Brandt
2018-09-16 0:55 ` [v4,2/2] " Guenter Roeck
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