* [PATCH] drm/i915: Introduce BITS_PER_TYPE
@ 2018-09-26 10:47 Chris Wilson
2018-09-26 10:58 ` Jani Nikula
` (4 more replies)
0 siblings, 5 replies; 9+ messages in thread
From: Chris Wilson @ 2018-09-26 10:47 UTC (permalink / raw)
To: intel-gfx; +Cc: Jani Nikula
Borrow the idea from net_dim.h to simplify the common determination of
how many bits in a particular type (sizeof(type) * BITS_PER_BYTE).
Suggested-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Jani Nikula <jani.nikula@intel.com>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
---
drivers/gpu/drm/i915/i915_drv.c | 4 ++--
drivers/gpu/drm/i915/i915_gem.c | 2 +-
drivers/gpu/drm/i915/i915_query.c | 2 +-
drivers/gpu/drm/i915/i915_syncmap.c | 2 +-
drivers/gpu/drm/i915/i915_utils.h | 2 +-
drivers/gpu/drm/i915/intel_device_info.c | 3 +--
drivers/gpu/drm/i915/intel_engine_cs.c | 2 +-
7 files changed, 8 insertions(+), 9 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index 44e2c0f5ec50..ade9bca250fa 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -1649,8 +1649,8 @@ i915_driver_create(struct pci_dev *pdev, const struct pci_device_id *ent)
device_info->device_id = pdev->device;
BUILD_BUG_ON(INTEL_MAX_PLATFORMS >
- sizeof(device_info->platform_mask) * BITS_PER_BYTE);
- BUG_ON(device_info->gen > sizeof(device_info->gen_mask) * BITS_PER_BYTE);
+ BITS_PER_TYPE(device_info->platform_mask));
+ BUG_ON(device_info->gen > BITS_PER_TYPE(device_info->gen_mask));
return i915;
}
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index db9688d14912..717f4321e987 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -5959,7 +5959,7 @@ void i915_gem_track_fb(struct drm_i915_gem_object *old,
* the bits.
*/
BUILD_BUG_ON(INTEL_FRONTBUFFER_BITS_PER_PIPE * I915_MAX_PIPES >
- sizeof(atomic_t) * BITS_PER_BYTE);
+ BITS_PER_TYPE(atomic_t));
if (old) {
WARN_ON(!(atomic_read(&old->frontbuffer_bits) & frontbuffer_bits));
diff --git a/drivers/gpu/drm/i915/i915_query.c b/drivers/gpu/drm/i915/i915_query.c
index 3f502eef2431..5821002cad42 100644
--- a/drivers/gpu/drm/i915/i915_query.c
+++ b/drivers/gpu/drm/i915/i915_query.c
@@ -28,7 +28,7 @@ static int query_topology_info(struct drm_i915_private *dev_priv,
slice_length = sizeof(sseu->slice_mask);
subslice_length = sseu->max_slices *
DIV_ROUND_UP(sseu->max_subslices,
- sizeof(sseu->subslice_mask[0]) * BITS_PER_BYTE);
+ BITS_PER_TYPE(sseu->subslice_mask[0]));
eu_length = sseu->max_slices * sseu->max_subslices *
DIV_ROUND_UP(sseu->max_eus_per_subslice, BITS_PER_BYTE);
diff --git a/drivers/gpu/drm/i915/i915_syncmap.c b/drivers/gpu/drm/i915/i915_syncmap.c
index 58f8d0cc125c..60404dbb2e9f 100644
--- a/drivers/gpu/drm/i915/i915_syncmap.c
+++ b/drivers/gpu/drm/i915/i915_syncmap.c
@@ -92,7 +92,7 @@ void i915_syncmap_init(struct i915_syncmap **root)
{
BUILD_BUG_ON_NOT_POWER_OF_2(KSYNCMAP);
BUILD_BUG_ON_NOT_POWER_OF_2(SHIFT);
- BUILD_BUG_ON(KSYNCMAP > BITS_PER_BYTE * sizeof((*root)->bitmap));
+ BUILD_BUG_ON(KSYNCMAP > BITS_PER_TYPE((*root)->bitmap));
*root = NULL;
}
diff --git a/drivers/gpu/drm/i915/i915_utils.h b/drivers/gpu/drm/i915/i915_utils.h
index 395dd2511568..5858a43e19da 100644
--- a/drivers/gpu/drm/i915/i915_utils.h
+++ b/drivers/gpu/drm/i915/i915_utils.h
@@ -68,7 +68,7 @@
/* Note we don't consider signbits :| */
#define overflows_type(x, T) \
- (sizeof(x) > sizeof(T) && (x) >> (sizeof(T) * BITS_PER_BYTE))
+ (sizeof(x) > sizeof(T) && (x) >> BITS_PER_TYPE(T))
#define ptr_mask_bits(ptr, n) ({ \
unsigned long __v = (unsigned long)(ptr); \
diff --git a/drivers/gpu/drm/i915/intel_device_info.c b/drivers/gpu/drm/i915/intel_device_info.c
index 0ef0c6448d53..31f6be774833 100644
--- a/drivers/gpu/drm/i915/intel_device_info.c
+++ b/drivers/gpu/drm/i915/intel_device_info.c
@@ -750,8 +750,7 @@ void intel_device_info_runtime_init(struct intel_device_info *info)
info->num_scalers[PIPE_C] = 1;
}
- BUILD_BUG_ON(I915_NUM_ENGINES >
- sizeof(intel_ring_mask_t) * BITS_PER_BYTE);
+ BUILD_BUG_ON(I915_NUM_ENGINES > BITS_PER_TYPE(intel_ring_mask_t));
/*
* Skylake and Broxton currently don't expose the topmost plane as its
diff --git a/drivers/gpu/drm/i915/intel_engine_cs.c b/drivers/gpu/drm/i915/intel_engine_cs.c
index 217ed3ee1cab..6726d57f018f 100644
--- a/drivers/gpu/drm/i915/intel_engine_cs.c
+++ b/drivers/gpu/drm/i915/intel_engine_cs.c
@@ -335,7 +335,7 @@ int intel_engines_init_mmio(struct drm_i915_private *dev_priv)
WARN_ON(ring_mask == 0);
WARN_ON(ring_mask &
- GENMASK(sizeof(mask) * BITS_PER_BYTE - 1, I915_NUM_ENGINES));
+ GENMASK(BITS_PER_TYPE(mask) - 1, I915_NUM_ENGINES));
for (i = 0; i < ARRAY_SIZE(intel_engines); i++) {
if (!HAS_ENGINE(dev_priv, i))
--
2.19.0
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 9+ messages in thread
* Re: [PATCH] drm/i915: Introduce BITS_PER_TYPE
2018-09-26 10:47 [PATCH] drm/i915: Introduce BITS_PER_TYPE Chris Wilson
@ 2018-09-26 10:58 ` Jani Nikula
2018-09-26 10:59 ` Ville Syrjälä
` (3 subsequent siblings)
4 siblings, 0 replies; 9+ messages in thread
From: Jani Nikula @ 2018-09-26 10:58 UTC (permalink / raw)
To: Chris Wilson, intel-gfx
On Wed, 26 Sep 2018, Chris Wilson <chris@chris-wilson.co.uk> wrote:
> Borrow the idea from net_dim.h to simplify the common determination of
> how many bits in a particular type (sizeof(type) * BITS_PER_BYTE).
I guess the commit message was written before you added BITS_PER_TYPE to
bitops.h. With that updated,
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
> Suggested-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Cc: Jani Nikula <jani.nikula@intel.com>
> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
> Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
> ---
> drivers/gpu/drm/i915/i915_drv.c | 4 ++--
> drivers/gpu/drm/i915/i915_gem.c | 2 +-
> drivers/gpu/drm/i915/i915_query.c | 2 +-
> drivers/gpu/drm/i915/i915_syncmap.c | 2 +-
> drivers/gpu/drm/i915/i915_utils.h | 2 +-
> drivers/gpu/drm/i915/intel_device_info.c | 3 +--
> drivers/gpu/drm/i915/intel_engine_cs.c | 2 +-
> 7 files changed, 8 insertions(+), 9 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
> index 44e2c0f5ec50..ade9bca250fa 100644
> --- a/drivers/gpu/drm/i915/i915_drv.c
> +++ b/drivers/gpu/drm/i915/i915_drv.c
> @@ -1649,8 +1649,8 @@ i915_driver_create(struct pci_dev *pdev, const struct pci_device_id *ent)
> device_info->device_id = pdev->device;
>
> BUILD_BUG_ON(INTEL_MAX_PLATFORMS >
> - sizeof(device_info->platform_mask) * BITS_PER_BYTE);
> - BUG_ON(device_info->gen > sizeof(device_info->gen_mask) * BITS_PER_BYTE);
> + BITS_PER_TYPE(device_info->platform_mask));
> + BUG_ON(device_info->gen > BITS_PER_TYPE(device_info->gen_mask));
>
> return i915;
> }
> diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
> index db9688d14912..717f4321e987 100644
> --- a/drivers/gpu/drm/i915/i915_gem.c
> +++ b/drivers/gpu/drm/i915/i915_gem.c
> @@ -5959,7 +5959,7 @@ void i915_gem_track_fb(struct drm_i915_gem_object *old,
> * the bits.
> */
> BUILD_BUG_ON(INTEL_FRONTBUFFER_BITS_PER_PIPE * I915_MAX_PIPES >
> - sizeof(atomic_t) * BITS_PER_BYTE);
> + BITS_PER_TYPE(atomic_t));
>
> if (old) {
> WARN_ON(!(atomic_read(&old->frontbuffer_bits) & frontbuffer_bits));
> diff --git a/drivers/gpu/drm/i915/i915_query.c b/drivers/gpu/drm/i915/i915_query.c
> index 3f502eef2431..5821002cad42 100644
> --- a/drivers/gpu/drm/i915/i915_query.c
> +++ b/drivers/gpu/drm/i915/i915_query.c
> @@ -28,7 +28,7 @@ static int query_topology_info(struct drm_i915_private *dev_priv,
> slice_length = sizeof(sseu->slice_mask);
> subslice_length = sseu->max_slices *
> DIV_ROUND_UP(sseu->max_subslices,
> - sizeof(sseu->subslice_mask[0]) * BITS_PER_BYTE);
> + BITS_PER_TYPE(sseu->subslice_mask[0]));
> eu_length = sseu->max_slices * sseu->max_subslices *
> DIV_ROUND_UP(sseu->max_eus_per_subslice, BITS_PER_BYTE);
>
> diff --git a/drivers/gpu/drm/i915/i915_syncmap.c b/drivers/gpu/drm/i915/i915_syncmap.c
> index 58f8d0cc125c..60404dbb2e9f 100644
> --- a/drivers/gpu/drm/i915/i915_syncmap.c
> +++ b/drivers/gpu/drm/i915/i915_syncmap.c
> @@ -92,7 +92,7 @@ void i915_syncmap_init(struct i915_syncmap **root)
> {
> BUILD_BUG_ON_NOT_POWER_OF_2(KSYNCMAP);
> BUILD_BUG_ON_NOT_POWER_OF_2(SHIFT);
> - BUILD_BUG_ON(KSYNCMAP > BITS_PER_BYTE * sizeof((*root)->bitmap));
> + BUILD_BUG_ON(KSYNCMAP > BITS_PER_TYPE((*root)->bitmap));
> *root = NULL;
> }
>
> diff --git a/drivers/gpu/drm/i915/i915_utils.h b/drivers/gpu/drm/i915/i915_utils.h
> index 395dd2511568..5858a43e19da 100644
> --- a/drivers/gpu/drm/i915/i915_utils.h
> +++ b/drivers/gpu/drm/i915/i915_utils.h
> @@ -68,7 +68,7 @@
>
> /* Note we don't consider signbits :| */
> #define overflows_type(x, T) \
> - (sizeof(x) > sizeof(T) && (x) >> (sizeof(T) * BITS_PER_BYTE))
> + (sizeof(x) > sizeof(T) && (x) >> BITS_PER_TYPE(T))
>
> #define ptr_mask_bits(ptr, n) ({ \
> unsigned long __v = (unsigned long)(ptr); \
> diff --git a/drivers/gpu/drm/i915/intel_device_info.c b/drivers/gpu/drm/i915/intel_device_info.c
> index 0ef0c6448d53..31f6be774833 100644
> --- a/drivers/gpu/drm/i915/intel_device_info.c
> +++ b/drivers/gpu/drm/i915/intel_device_info.c
> @@ -750,8 +750,7 @@ void intel_device_info_runtime_init(struct intel_device_info *info)
> info->num_scalers[PIPE_C] = 1;
> }
>
> - BUILD_BUG_ON(I915_NUM_ENGINES >
> - sizeof(intel_ring_mask_t) * BITS_PER_BYTE);
> + BUILD_BUG_ON(I915_NUM_ENGINES > BITS_PER_TYPE(intel_ring_mask_t));
>
> /*
> * Skylake and Broxton currently don't expose the topmost plane as its
> diff --git a/drivers/gpu/drm/i915/intel_engine_cs.c b/drivers/gpu/drm/i915/intel_engine_cs.c
> index 217ed3ee1cab..6726d57f018f 100644
> --- a/drivers/gpu/drm/i915/intel_engine_cs.c
> +++ b/drivers/gpu/drm/i915/intel_engine_cs.c
> @@ -335,7 +335,7 @@ int intel_engines_init_mmio(struct drm_i915_private *dev_priv)
>
> WARN_ON(ring_mask == 0);
> WARN_ON(ring_mask &
> - GENMASK(sizeof(mask) * BITS_PER_BYTE - 1, I915_NUM_ENGINES));
> + GENMASK(BITS_PER_TYPE(mask) - 1, I915_NUM_ENGINES));
>
> for (i = 0; i < ARRAY_SIZE(intel_engines); i++) {
> if (!HAS_ENGINE(dev_priv, i))
--
Jani Nikula, Intel Open Source Graphics Center
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH] drm/i915: Introduce BITS_PER_TYPE
2018-09-26 10:47 [PATCH] drm/i915: Introduce BITS_PER_TYPE Chris Wilson
2018-09-26 10:58 ` Jani Nikula
@ 2018-09-26 10:59 ` Ville Syrjälä
2018-09-26 11:02 ` ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Introduce BITS_PER_TYPE (rev2) Patchwork
` (2 subsequent siblings)
4 siblings, 0 replies; 9+ messages in thread
From: Ville Syrjälä @ 2018-09-26 10:59 UTC (permalink / raw)
To: Chris Wilson; +Cc: Jani Nikula, intel-gfx
On Wed, Sep 26, 2018 at 11:47:07AM +0100, Chris Wilson wrote:
> Borrow the idea from net_dim.h to simplify the common determination of
> how many bits in a particular type (sizeof(type) * BITS_PER_BYTE).
>
> Suggested-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Cc: Jani Nikula <jani.nikula@intel.com>
> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
> Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
> drivers/gpu/drm/i915/i915_drv.c | 4 ++--
> drivers/gpu/drm/i915/i915_gem.c | 2 +-
> drivers/gpu/drm/i915/i915_query.c | 2 +-
> drivers/gpu/drm/i915/i915_syncmap.c | 2 +-
> drivers/gpu/drm/i915/i915_utils.h | 2 +-
> drivers/gpu/drm/i915/intel_device_info.c | 3 +--
> drivers/gpu/drm/i915/intel_engine_cs.c | 2 +-
> 7 files changed, 8 insertions(+), 9 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
> index 44e2c0f5ec50..ade9bca250fa 100644
> --- a/drivers/gpu/drm/i915/i915_drv.c
> +++ b/drivers/gpu/drm/i915/i915_drv.c
> @@ -1649,8 +1649,8 @@ i915_driver_create(struct pci_dev *pdev, const struct pci_device_id *ent)
> device_info->device_id = pdev->device;
>
> BUILD_BUG_ON(INTEL_MAX_PLATFORMS >
> - sizeof(device_info->platform_mask) * BITS_PER_BYTE);
> - BUG_ON(device_info->gen > sizeof(device_info->gen_mask) * BITS_PER_BYTE);
> + BITS_PER_TYPE(device_info->platform_mask));
> + BUG_ON(device_info->gen > BITS_PER_TYPE(device_info->gen_mask));
>
> return i915;
> }
> diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
> index db9688d14912..717f4321e987 100644
> --- a/drivers/gpu/drm/i915/i915_gem.c
> +++ b/drivers/gpu/drm/i915/i915_gem.c
> @@ -5959,7 +5959,7 @@ void i915_gem_track_fb(struct drm_i915_gem_object *old,
> * the bits.
> */
> BUILD_BUG_ON(INTEL_FRONTBUFFER_BITS_PER_PIPE * I915_MAX_PIPES >
> - sizeof(atomic_t) * BITS_PER_BYTE);
> + BITS_PER_TYPE(atomic_t));
>
> if (old) {
> WARN_ON(!(atomic_read(&old->frontbuffer_bits) & frontbuffer_bits));
> diff --git a/drivers/gpu/drm/i915/i915_query.c b/drivers/gpu/drm/i915/i915_query.c
> index 3f502eef2431..5821002cad42 100644
> --- a/drivers/gpu/drm/i915/i915_query.c
> +++ b/drivers/gpu/drm/i915/i915_query.c
> @@ -28,7 +28,7 @@ static int query_topology_info(struct drm_i915_private *dev_priv,
> slice_length = sizeof(sseu->slice_mask);
> subslice_length = sseu->max_slices *
> DIV_ROUND_UP(sseu->max_subslices,
> - sizeof(sseu->subslice_mask[0]) * BITS_PER_BYTE);
> + BITS_PER_TYPE(sseu->subslice_mask[0]));
> eu_length = sseu->max_slices * sseu->max_subslices *
> DIV_ROUND_UP(sseu->max_eus_per_subslice, BITS_PER_BYTE);
>
> diff --git a/drivers/gpu/drm/i915/i915_syncmap.c b/drivers/gpu/drm/i915/i915_syncmap.c
> index 58f8d0cc125c..60404dbb2e9f 100644
> --- a/drivers/gpu/drm/i915/i915_syncmap.c
> +++ b/drivers/gpu/drm/i915/i915_syncmap.c
> @@ -92,7 +92,7 @@ void i915_syncmap_init(struct i915_syncmap **root)
> {
> BUILD_BUG_ON_NOT_POWER_OF_2(KSYNCMAP);
> BUILD_BUG_ON_NOT_POWER_OF_2(SHIFT);
> - BUILD_BUG_ON(KSYNCMAP > BITS_PER_BYTE * sizeof((*root)->bitmap));
> + BUILD_BUG_ON(KSYNCMAP > BITS_PER_TYPE((*root)->bitmap));
> *root = NULL;
> }
>
> diff --git a/drivers/gpu/drm/i915/i915_utils.h b/drivers/gpu/drm/i915/i915_utils.h
> index 395dd2511568..5858a43e19da 100644
> --- a/drivers/gpu/drm/i915/i915_utils.h
> +++ b/drivers/gpu/drm/i915/i915_utils.h
> @@ -68,7 +68,7 @@
>
> /* Note we don't consider signbits :| */
> #define overflows_type(x, T) \
> - (sizeof(x) > sizeof(T) && (x) >> (sizeof(T) * BITS_PER_BYTE))
> + (sizeof(x) > sizeof(T) && (x) >> BITS_PER_TYPE(T))
>
> #define ptr_mask_bits(ptr, n) ({ \
> unsigned long __v = (unsigned long)(ptr); \
> diff --git a/drivers/gpu/drm/i915/intel_device_info.c b/drivers/gpu/drm/i915/intel_device_info.c
> index 0ef0c6448d53..31f6be774833 100644
> --- a/drivers/gpu/drm/i915/intel_device_info.c
> +++ b/drivers/gpu/drm/i915/intel_device_info.c
> @@ -750,8 +750,7 @@ void intel_device_info_runtime_init(struct intel_device_info *info)
> info->num_scalers[PIPE_C] = 1;
> }
>
> - BUILD_BUG_ON(I915_NUM_ENGINES >
> - sizeof(intel_ring_mask_t) * BITS_PER_BYTE);
> + BUILD_BUG_ON(I915_NUM_ENGINES > BITS_PER_TYPE(intel_ring_mask_t));
>
> /*
> * Skylake and Broxton currently don't expose the topmost plane as its
> diff --git a/drivers/gpu/drm/i915/intel_engine_cs.c b/drivers/gpu/drm/i915/intel_engine_cs.c
> index 217ed3ee1cab..6726d57f018f 100644
> --- a/drivers/gpu/drm/i915/intel_engine_cs.c
> +++ b/drivers/gpu/drm/i915/intel_engine_cs.c
> @@ -335,7 +335,7 @@ int intel_engines_init_mmio(struct drm_i915_private *dev_priv)
>
> WARN_ON(ring_mask == 0);
> WARN_ON(ring_mask &
> - GENMASK(sizeof(mask) * BITS_PER_BYTE - 1, I915_NUM_ENGINES));
> + GENMASK(BITS_PER_TYPE(mask) - 1, I915_NUM_ENGINES));
>
> for (i = 0; i < ARRAY_SIZE(intel_engines); i++) {
> if (!HAS_ENGINE(dev_priv, i))
> --
> 2.19.0
--
Ville Syrjälä
Intel
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 9+ messages in thread
* ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Introduce BITS_PER_TYPE (rev2)
2018-09-26 10:47 [PATCH] drm/i915: Introduce BITS_PER_TYPE Chris Wilson
2018-09-26 10:58 ` Jani Nikula
2018-09-26 10:59 ` Ville Syrjälä
@ 2018-09-26 11:02 ` Patchwork
2018-09-26 11:39 ` ✓ Fi.CI.BAT: success " Patchwork
2018-09-26 13:16 ` ✓ Fi.CI.IGT: " Patchwork
4 siblings, 0 replies; 9+ messages in thread
From: Patchwork @ 2018-09-26 11:02 UTC (permalink / raw)
To: Chris Wilson; +Cc: intel-gfx
== Series Details ==
Series: drm/i915: Introduce BITS_PER_TYPE (rev2)
URL : https://patchwork.freedesktop.org/series/46055/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
589510c0b758 drm/i915: Introduce BITS_PER_TYPE
-:30: WARNING:AVOID_BUG: Avoid crashing the kernel - try using WARN_ON & recovery code rather than BUG() or BUG_ON()
#30: FILE: drivers/gpu/drm/i915/i915_drv.c:1653:
+ BUG_ON(device_info->gen > BITS_PER_TYPE(device_info->gen_mask));
-:69: WARNING:CONSTANT_COMPARISON: Comparisons should place the constant on the right side of the test
#69: FILE: drivers/gpu/drm/i915/i915_syncmap.c:95:
+ BUILD_BUG_ON(KSYNCMAP > BITS_PER_TYPE((*root)->bitmap));
-:96: WARNING:CONSTANT_COMPARISON: Comparisons should place the constant on the right side of the test
#96: FILE: drivers/gpu/drm/i915/intel_device_info.c:753:
+ BUILD_BUG_ON(I915_NUM_ENGINES > BITS_PER_TYPE(intel_ring_mask_t));
total: 0 errors, 3 warnings, 0 checks, 59 lines checked
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 9+ messages in thread
* ✓ Fi.CI.BAT: success for drm/i915: Introduce BITS_PER_TYPE (rev2)
2018-09-26 10:47 [PATCH] drm/i915: Introduce BITS_PER_TYPE Chris Wilson
` (2 preceding siblings ...)
2018-09-26 11:02 ` ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Introduce BITS_PER_TYPE (rev2) Patchwork
@ 2018-09-26 11:39 ` Patchwork
2018-09-26 13:16 ` ✓ Fi.CI.IGT: " Patchwork
4 siblings, 0 replies; 9+ messages in thread
From: Patchwork @ 2018-09-26 11:39 UTC (permalink / raw)
To: Chris Wilson; +Cc: intel-gfx
== Series Details ==
Series: drm/i915: Introduce BITS_PER_TYPE (rev2)
URL : https://patchwork.freedesktop.org/series/46055/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4879 -> Patchwork_10282 =
== Summary - SUCCESS ==
No regressions found.
External URL: https://patchwork.freedesktop.org/api/1.0/series/46055/revisions/2/mbox/
== Known issues ==
Here are the changes found in Patchwork_10282 that come from known issues:
=== IGT changes ===
==== Issues hit ====
igt@gem_exec_suspend@basic-s3:
fi-bdw-samus: PASS -> INCOMPLETE (fdo#107773)
fi-blb-e6850: PASS -> INCOMPLETE (fdo#107718)
igt@kms_pipe_crc_basic@suspend-read-crc-pipe-b:
fi-cfl-8109u: PASS -> INCOMPLETE (fdo#106070)
igt@kms_pipe_crc_basic@suspend-read-crc-pipe-c:
fi-skl-caroline: PASS -> INCOMPLETE (fdo#107556, fdo#104108)
igt@kms_psr@primary_page_flip:
fi-kbl-7560u: PASS -> FAIL (fdo#107336)
igt@pm_rpm@module-reload:
fi-glk-j4005: PASS -> DMESG-WARN (fdo#107726)
==== Possible fixes ====
igt@kms_pipe_crc_basic@nonblocking-crc-pipe-a:
fi-byt-clapper: FAIL (fdo#107362) -> PASS
igt@kms_pipe_crc_basic@read-crc-pipe-b-frame-sequence:
fi-byt-clapper: FAIL (fdo#107362, fdo#103191) -> PASS
fdo#103191 https://bugs.freedesktop.org/show_bug.cgi?id=103191
fdo#104108 https://bugs.freedesktop.org/show_bug.cgi?id=104108
fdo#106070 https://bugs.freedesktop.org/show_bug.cgi?id=106070
fdo#107336 https://bugs.freedesktop.org/show_bug.cgi?id=107336
fdo#107362 https://bugs.freedesktop.org/show_bug.cgi?id=107362
fdo#107556 https://bugs.freedesktop.org/show_bug.cgi?id=107556
fdo#107718 https://bugs.freedesktop.org/show_bug.cgi?id=107718
fdo#107726 https://bugs.freedesktop.org/show_bug.cgi?id=107726
fdo#107773 https://bugs.freedesktop.org/show_bug.cgi?id=107773
== Participating hosts (46 -> 40) ==
Additional (1): fi-snb-2520m
Missing (7): fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-icl-u2 fi-bsw-cyan fi-ctg-p8600 fi-hsw-4770
== Build changes ==
* Linux: CI_DRM_4879 -> Patchwork_10282
CI_DRM_4879: 4479cfaa37f67802bf6d9af92ae703011926bcb8 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_4650: a6e21812d100dce68450727e79fc09e0c0033683 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_10282: 589510c0b758776b569e0c8eddf89295c18c6e5f @ git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
589510c0b758 drm/i915: Introduce BITS_PER_TYPE
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_10282/issues.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 9+ messages in thread
* ✓ Fi.CI.IGT: success for drm/i915: Introduce BITS_PER_TYPE (rev2)
2018-09-26 10:47 [PATCH] drm/i915: Introduce BITS_PER_TYPE Chris Wilson
` (3 preceding siblings ...)
2018-09-26 11:39 ` ✓ Fi.CI.BAT: success " Patchwork
@ 2018-09-26 13:16 ` Patchwork
4 siblings, 0 replies; 9+ messages in thread
From: Patchwork @ 2018-09-26 13:16 UTC (permalink / raw)
To: Chris Wilson; +Cc: intel-gfx
== Series Details ==
Series: drm/i915: Introduce BITS_PER_TYPE (rev2)
URL : https://patchwork.freedesktop.org/series/46055/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4879_full -> Patchwork_10282_full =
== Summary - WARNING ==
Minor unknown changes coming with Patchwork_10282_full need to be verified
manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_10282_full, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
== Possible new issues ==
Here are the unknown changes that may have been introduced in Patchwork_10282_full:
=== IGT changes ===
==== Warnings ====
igt@kms_busy@basic-modeset-b:
shard-snb: SKIP -> PASS
igt@kms_cursor_legacy@nonblocking-modeset-vs-cursor-atomic:
shard-snb: PASS -> SKIP
== Known issues ==
Here are the changes found in Patchwork_10282_full that come from known issues:
=== IGT changes ===
==== Issues hit ====
igt@gem_exec_await@wide-contexts:
shard-apl: PASS -> FAIL (fdo#106680)
igt@kms_cursor_legacy@cursora-vs-flipa-toggle:
shard-glk: PASS -> DMESG-WARN (fdo#105763, fdo#106538) +1
==== Possible fixes ====
igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-draw-mmap-wc:
shard-glk: FAIL (fdo#103167) -> PASS
fdo#103167 https://bugs.freedesktop.org/show_bug.cgi?id=103167
fdo#105763 https://bugs.freedesktop.org/show_bug.cgi?id=105763
fdo#106538 https://bugs.freedesktop.org/show_bug.cgi?id=106538
fdo#106680 https://bugs.freedesktop.org/show_bug.cgi?id=106680
== Participating hosts (6 -> 5) ==
Missing (1): shard-skl
== Build changes ==
* Linux: CI_DRM_4879 -> Patchwork_10282
* Piglit: None -> piglit_4509
CI_DRM_4879: 4479cfaa37f67802bf6d9af92ae703011926bcb8 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_4650: a6e21812d100dce68450727e79fc09e0c0033683 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_10282: 589510c0b758776b569e0c8eddf89295c18c6e5f @ git://anongit.freedesktop.org/gfx-ci/linux
piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_10282/shards.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH] drm/i915: Introduce BITS_PER_TYPE
2018-07-06 8:44 [PATCH] drm/i915: Introduce BITS_PER_TYPE Chris Wilson
2018-07-06 8:59 ` Tvrtko Ursulin
@ 2018-07-06 9:07 ` Jani Nikula
1 sibling, 0 replies; 9+ messages in thread
From: Jani Nikula @ 2018-07-06 9:07 UTC (permalink / raw)
To: Chris Wilson, intel-gfx
On Fri, 06 Jul 2018, Chris Wilson <chris@chris-wilson.co.uk> wrote:
> Borrow the idea from net_dim.h to simplify the common determination of
> how many bits in a particular type (sizeof(type) * BITS_PER_BYTE).
Nice. Follow-up, have that included in bitops.h?
BR,
Jani.
>
> Suggested-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Cc: Jani Nikula <jani.nikula@intel.com>
> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
> Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
> ---
> drivers/gpu/drm/i915/i915_drv.c | 4 ++--
> drivers/gpu/drm/i915/i915_gem.c | 2 +-
> drivers/gpu/drm/i915/i915_query.c | 2 +-
> drivers/gpu/drm/i915/i915_syncmap.c | 3 ++-
> drivers/gpu/drm/i915/i915_utils.h | 4 +++-
> drivers/gpu/drm/i915/intel_device_info.c | 3 +--
> drivers/gpu/drm/i915/intel_engine_cs.c | 2 +-
> 7 files changed, 11 insertions(+), 9 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
> index 0db3c83cce29..248c7db2ae2a 100644
> --- a/drivers/gpu/drm/i915/i915_drv.c
> +++ b/drivers/gpu/drm/i915/i915_drv.c
> @@ -887,8 +887,8 @@ static int i915_driver_init_early(struct drm_i915_private *dev_priv,
> device_info->device_id = dev_priv->drm.pdev->device;
>
> BUILD_BUG_ON(INTEL_MAX_PLATFORMS >
> - sizeof(device_info->platform_mask) * BITS_PER_BYTE);
> - BUG_ON(device_info->gen > sizeof(device_info->gen_mask) * BITS_PER_BYTE);
> + BITS_PER_TYPE(device_info->platform_mask));
> + BUG_ON(device_info->gen > BITS_PER_TYPE(device_info->gen_mask));
> spin_lock_init(&dev_priv->irq_lock);
> spin_lock_init(&dev_priv->gpu_error.lock);
> mutex_init(&dev_priv->backlight_lock);
> diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
> index 0c0a1a959d0b..0dc9caaa1dc9 100644
> --- a/drivers/gpu/drm/i915/i915_gem.c
> +++ b/drivers/gpu/drm/i915/i915_gem.c
> @@ -5880,7 +5880,7 @@ void i915_gem_track_fb(struct drm_i915_gem_object *old,
> * the bits.
> */
> BUILD_BUG_ON(INTEL_FRONTBUFFER_BITS_PER_PIPE * I915_MAX_PIPES >
> - sizeof(atomic_t) * BITS_PER_BYTE);
> + BITS_PER_TYPE(atomic_t));
>
> if (old) {
> WARN_ON(!(atomic_read(&old->frontbuffer_bits) & frontbuffer_bits));
> diff --git a/drivers/gpu/drm/i915/i915_query.c b/drivers/gpu/drm/i915/i915_query.c
> index 3f502eef2431..5821002cad42 100644
> --- a/drivers/gpu/drm/i915/i915_query.c
> +++ b/drivers/gpu/drm/i915/i915_query.c
> @@ -28,7 +28,7 @@ static int query_topology_info(struct drm_i915_private *dev_priv,
> slice_length = sizeof(sseu->slice_mask);
> subslice_length = sseu->max_slices *
> DIV_ROUND_UP(sseu->max_subslices,
> - sizeof(sseu->subslice_mask[0]) * BITS_PER_BYTE);
> + BITS_PER_TYPE(sseu->subslice_mask[0]));
> eu_length = sseu->max_slices * sseu->max_subslices *
> DIV_ROUND_UP(sseu->max_eus_per_subslice, BITS_PER_BYTE);
>
> diff --git a/drivers/gpu/drm/i915/i915_syncmap.c b/drivers/gpu/drm/i915/i915_syncmap.c
> index 58f8d0cc125c..1741db6fb0ce 100644
> --- a/drivers/gpu/drm/i915/i915_syncmap.c
> +++ b/drivers/gpu/drm/i915/i915_syncmap.c
> @@ -28,6 +28,7 @@
>
> #include "i915_gem.h" /* GEM_BUG_ON() */
> #include "i915_selftest.h"
> +#include "i915_utils.h" /* BITS_PER_TYPE() */
>
> #define SHIFT ilog2(KSYNCMAP)
> #define MASK (KSYNCMAP - 1)
> @@ -92,7 +93,7 @@ void i915_syncmap_init(struct i915_syncmap **root)
> {
> BUILD_BUG_ON_NOT_POWER_OF_2(KSYNCMAP);
> BUILD_BUG_ON_NOT_POWER_OF_2(SHIFT);
> - BUILD_BUG_ON(KSYNCMAP > BITS_PER_BYTE * sizeof((*root)->bitmap));
> + BUILD_BUG_ON(KSYNCMAP > BITS_PER_TYPE((*root)->bitmap));
> *root = NULL;
> }
>
> diff --git a/drivers/gpu/drm/i915/i915_utils.h b/drivers/gpu/drm/i915/i915_utils.h
> index 00165ad55fb3..617f02737fdf 100644
> --- a/drivers/gpu/drm/i915/i915_utils.h
> +++ b/drivers/gpu/drm/i915/i915_utils.h
> @@ -43,6 +43,8 @@
> #define MISSING_CASE(x) WARN(1, "Missing case (%s == %ld)\n", \
> __stringify(x), (long)(x))
>
> +#define BITS_PER_TYPE(T) (sizeof(T) * BITS_PER_BYTE)
> +
> #if GCC_VERSION >= 70000
> #define add_overflows(A, B) \
> __builtin_add_overflow_p((A), (B), (typeof((A) + (B)))0)
> @@ -68,7 +70,7 @@
>
> /* Note we don't consider signbits :| */
> #define overflows_type(x, T) \
> - (sizeof(x) > sizeof(T) && (x) >> (sizeof(T) * BITS_PER_BYTE))
> + (sizeof(x) > sizeof(T) && (x) >> BITS_PER_TYPE(T))
>
> #define ptr_mask_bits(ptr, n) ({ \
> unsigned long __v = (unsigned long)(ptr); \
> diff --git a/drivers/gpu/drm/i915/intel_device_info.c b/drivers/gpu/drm/i915/intel_device_info.c
> index 0fd13df424cf..1422758a4d36 100644
> --- a/drivers/gpu/drm/i915/intel_device_info.c
> +++ b/drivers/gpu/drm/i915/intel_device_info.c
> @@ -750,8 +750,7 @@ void intel_device_info_runtime_init(struct intel_device_info *info)
> info->num_scalers[PIPE_C] = 1;
> }
>
> - BUILD_BUG_ON(I915_NUM_ENGINES >
> - sizeof(intel_ring_mask_t) * BITS_PER_BYTE);
> + BUILD_BUG_ON(I915_NUM_ENGINES > BITS_PER_TYPE(intel_ring_mask_t));
>
> /*
> * Skylake and Broxton currently don't expose the topmost plane as its
> diff --git a/drivers/gpu/drm/i915/intel_engine_cs.c b/drivers/gpu/drm/i915/intel_engine_cs.c
> index 478c928912c4..b459a0819569 100644
> --- a/drivers/gpu/drm/i915/intel_engine_cs.c
> +++ b/drivers/gpu/drm/i915/intel_engine_cs.c
> @@ -333,7 +333,7 @@ int intel_engines_init_mmio(struct drm_i915_private *dev_priv)
>
> WARN_ON(ring_mask == 0);
> WARN_ON(ring_mask &
> - GENMASK(sizeof(mask) * BITS_PER_BYTE - 1, I915_NUM_ENGINES));
> + GENMASK(BITS_PER_TYPE(mask) - 1, I915_NUM_ENGINES));
>
> for (i = 0; i < ARRAY_SIZE(intel_engines); i++) {
> if (!HAS_ENGINE(dev_priv, i))
--
Jani Nikula, Intel Open Source Graphics Center
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH] drm/i915: Introduce BITS_PER_TYPE
2018-07-06 8:44 [PATCH] drm/i915: Introduce BITS_PER_TYPE Chris Wilson
@ 2018-07-06 8:59 ` Tvrtko Ursulin
2018-07-06 9:07 ` Jani Nikula
1 sibling, 0 replies; 9+ messages in thread
From: Tvrtko Ursulin @ 2018-07-06 8:59 UTC (permalink / raw)
To: Chris Wilson, intel-gfx; +Cc: Jani Nikula
On 06/07/2018 09:44, Chris Wilson wrote:
> Borrow the idea from net_dim.h to simplify the common determination of
> how many bits in a particular type (sizeof(type) * BITS_PER_BYTE).
>
> Suggested-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Cc: Jani Nikula <jani.nikula@intel.com>
> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
> Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
> ---
> drivers/gpu/drm/i915/i915_drv.c | 4 ++--
> drivers/gpu/drm/i915/i915_gem.c | 2 +-
> drivers/gpu/drm/i915/i915_query.c | 2 +-
> drivers/gpu/drm/i915/i915_syncmap.c | 3 ++-
> drivers/gpu/drm/i915/i915_utils.h | 4 +++-
> drivers/gpu/drm/i915/intel_device_info.c | 3 +--
> drivers/gpu/drm/i915/intel_engine_cs.c | 2 +-
> 7 files changed, 11 insertions(+), 9 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
> index 0db3c83cce29..248c7db2ae2a 100644
> --- a/drivers/gpu/drm/i915/i915_drv.c
> +++ b/drivers/gpu/drm/i915/i915_drv.c
> @@ -887,8 +887,8 @@ static int i915_driver_init_early(struct drm_i915_private *dev_priv,
> device_info->device_id = dev_priv->drm.pdev->device;
>
> BUILD_BUG_ON(INTEL_MAX_PLATFORMS >
> - sizeof(device_info->platform_mask) * BITS_PER_BYTE);
> - BUG_ON(device_info->gen > sizeof(device_info->gen_mask) * BITS_PER_BYTE);
> + BITS_PER_TYPE(device_info->platform_mask));
> + BUG_ON(device_info->gen > BITS_PER_TYPE(device_info->gen_mask));
> spin_lock_init(&dev_priv->irq_lock);
> spin_lock_init(&dev_priv->gpu_error.lock);
> mutex_init(&dev_priv->backlight_lock);
> diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
> index 0c0a1a959d0b..0dc9caaa1dc9 100644
> --- a/drivers/gpu/drm/i915/i915_gem.c
> +++ b/drivers/gpu/drm/i915/i915_gem.c
> @@ -5880,7 +5880,7 @@ void i915_gem_track_fb(struct drm_i915_gem_object *old,
> * the bits.
> */
> BUILD_BUG_ON(INTEL_FRONTBUFFER_BITS_PER_PIPE * I915_MAX_PIPES >
> - sizeof(atomic_t) * BITS_PER_BYTE);
> + BITS_PER_TYPE(atomic_t));
>
> if (old) {
> WARN_ON(!(atomic_read(&old->frontbuffer_bits) & frontbuffer_bits));
> diff --git a/drivers/gpu/drm/i915/i915_query.c b/drivers/gpu/drm/i915/i915_query.c
> index 3f502eef2431..5821002cad42 100644
> --- a/drivers/gpu/drm/i915/i915_query.c
> +++ b/drivers/gpu/drm/i915/i915_query.c
> @@ -28,7 +28,7 @@ static int query_topology_info(struct drm_i915_private *dev_priv,
> slice_length = sizeof(sseu->slice_mask);
> subslice_length = sseu->max_slices *
> DIV_ROUND_UP(sseu->max_subslices,
> - sizeof(sseu->subslice_mask[0]) * BITS_PER_BYTE);
> + BITS_PER_TYPE(sseu->subslice_mask[0]));
> eu_length = sseu->max_slices * sseu->max_subslices *
> DIV_ROUND_UP(sseu->max_eus_per_subslice, BITS_PER_BYTE);
>
> diff --git a/drivers/gpu/drm/i915/i915_syncmap.c b/drivers/gpu/drm/i915/i915_syncmap.c
> index 58f8d0cc125c..1741db6fb0ce 100644
> --- a/drivers/gpu/drm/i915/i915_syncmap.c
> +++ b/drivers/gpu/drm/i915/i915_syncmap.c
> @@ -28,6 +28,7 @@
>
> #include "i915_gem.h" /* GEM_BUG_ON() */
> #include "i915_selftest.h"
> +#include "i915_utils.h" /* BITS_PER_TYPE() */
>
> #define SHIFT ilog2(KSYNCMAP)
> #define MASK (KSYNCMAP - 1)
> @@ -92,7 +93,7 @@ void i915_syncmap_init(struct i915_syncmap **root)
> {
> BUILD_BUG_ON_NOT_POWER_OF_2(KSYNCMAP);
> BUILD_BUG_ON_NOT_POWER_OF_2(SHIFT);
> - BUILD_BUG_ON(KSYNCMAP > BITS_PER_BYTE * sizeof((*root)->bitmap));
> + BUILD_BUG_ON(KSYNCMAP > BITS_PER_TYPE((*root)->bitmap));
> *root = NULL;
> }
>
> diff --git a/drivers/gpu/drm/i915/i915_utils.h b/drivers/gpu/drm/i915/i915_utils.h
> index 00165ad55fb3..617f02737fdf 100644
> --- a/drivers/gpu/drm/i915/i915_utils.h
> +++ b/drivers/gpu/drm/i915/i915_utils.h
> @@ -43,6 +43,8 @@
> #define MISSING_CASE(x) WARN(1, "Missing case (%s == %ld)\n", \
> __stringify(x), (long)(x))
>
> +#define BITS_PER_TYPE(T) (sizeof(T) * BITS_PER_BYTE)
> +
> #if GCC_VERSION >= 70000
> #define add_overflows(A, B) \
> __builtin_add_overflow_p((A), (B), (typeof((A) + (B)))0)
> @@ -68,7 +70,7 @@
>
> /* Note we don't consider signbits :| */
> #define overflows_type(x, T) \
> - (sizeof(x) > sizeof(T) && (x) >> (sizeof(T) * BITS_PER_BYTE))
> + (sizeof(x) > sizeof(T) && (x) >> BITS_PER_TYPE(T))
>
> #define ptr_mask_bits(ptr, n) ({ \
> unsigned long __v = (unsigned long)(ptr); \
> diff --git a/drivers/gpu/drm/i915/intel_device_info.c b/drivers/gpu/drm/i915/intel_device_info.c
> index 0fd13df424cf..1422758a4d36 100644
> --- a/drivers/gpu/drm/i915/intel_device_info.c
> +++ b/drivers/gpu/drm/i915/intel_device_info.c
> @@ -750,8 +750,7 @@ void intel_device_info_runtime_init(struct intel_device_info *info)
> info->num_scalers[PIPE_C] = 1;
> }
>
> - BUILD_BUG_ON(I915_NUM_ENGINES >
> - sizeof(intel_ring_mask_t) * BITS_PER_BYTE);
> + BUILD_BUG_ON(I915_NUM_ENGINES > BITS_PER_TYPE(intel_ring_mask_t));
>
> /*
> * Skylake and Broxton currently don't expose the topmost plane as its
> diff --git a/drivers/gpu/drm/i915/intel_engine_cs.c b/drivers/gpu/drm/i915/intel_engine_cs.c
> index 478c928912c4..b459a0819569 100644
> --- a/drivers/gpu/drm/i915/intel_engine_cs.c
> +++ b/drivers/gpu/drm/i915/intel_engine_cs.c
> @@ -333,7 +333,7 @@ int intel_engines_init_mmio(struct drm_i915_private *dev_priv)
>
> WARN_ON(ring_mask == 0);
> WARN_ON(ring_mask &
> - GENMASK(sizeof(mask) * BITS_PER_BYTE - 1, I915_NUM_ENGINES));
> + GENMASK(BITS_PER_TYPE(mask) - 1, I915_NUM_ENGINES));
>
> for (i = 0; i < ARRAY_SIZE(intel_engines); i++) {
> if (!HAS_ENGINE(dev_priv, i))
>
Looks fine to me.
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Regards,
Tvrtko
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 9+ messages in thread
* [PATCH] drm/i915: Introduce BITS_PER_TYPE
@ 2018-07-06 8:44 Chris Wilson
2018-07-06 8:59 ` Tvrtko Ursulin
2018-07-06 9:07 ` Jani Nikula
0 siblings, 2 replies; 9+ messages in thread
From: Chris Wilson @ 2018-07-06 8:44 UTC (permalink / raw)
To: intel-gfx; +Cc: Jani Nikula
Borrow the idea from net_dim.h to simplify the common determination of
how many bits in a particular type (sizeof(type) * BITS_PER_BYTE).
Suggested-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Jani Nikula <jani.nikula@intel.com>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
---
drivers/gpu/drm/i915/i915_drv.c | 4 ++--
drivers/gpu/drm/i915/i915_gem.c | 2 +-
drivers/gpu/drm/i915/i915_query.c | 2 +-
drivers/gpu/drm/i915/i915_syncmap.c | 3 ++-
drivers/gpu/drm/i915/i915_utils.h | 4 +++-
drivers/gpu/drm/i915/intel_device_info.c | 3 +--
drivers/gpu/drm/i915/intel_engine_cs.c | 2 +-
7 files changed, 11 insertions(+), 9 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index 0db3c83cce29..248c7db2ae2a 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -887,8 +887,8 @@ static int i915_driver_init_early(struct drm_i915_private *dev_priv,
device_info->device_id = dev_priv->drm.pdev->device;
BUILD_BUG_ON(INTEL_MAX_PLATFORMS >
- sizeof(device_info->platform_mask) * BITS_PER_BYTE);
- BUG_ON(device_info->gen > sizeof(device_info->gen_mask) * BITS_PER_BYTE);
+ BITS_PER_TYPE(device_info->platform_mask));
+ BUG_ON(device_info->gen > BITS_PER_TYPE(device_info->gen_mask));
spin_lock_init(&dev_priv->irq_lock);
spin_lock_init(&dev_priv->gpu_error.lock);
mutex_init(&dev_priv->backlight_lock);
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 0c0a1a959d0b..0dc9caaa1dc9 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -5880,7 +5880,7 @@ void i915_gem_track_fb(struct drm_i915_gem_object *old,
* the bits.
*/
BUILD_BUG_ON(INTEL_FRONTBUFFER_BITS_PER_PIPE * I915_MAX_PIPES >
- sizeof(atomic_t) * BITS_PER_BYTE);
+ BITS_PER_TYPE(atomic_t));
if (old) {
WARN_ON(!(atomic_read(&old->frontbuffer_bits) & frontbuffer_bits));
diff --git a/drivers/gpu/drm/i915/i915_query.c b/drivers/gpu/drm/i915/i915_query.c
index 3f502eef2431..5821002cad42 100644
--- a/drivers/gpu/drm/i915/i915_query.c
+++ b/drivers/gpu/drm/i915/i915_query.c
@@ -28,7 +28,7 @@ static int query_topology_info(struct drm_i915_private *dev_priv,
slice_length = sizeof(sseu->slice_mask);
subslice_length = sseu->max_slices *
DIV_ROUND_UP(sseu->max_subslices,
- sizeof(sseu->subslice_mask[0]) * BITS_PER_BYTE);
+ BITS_PER_TYPE(sseu->subslice_mask[0]));
eu_length = sseu->max_slices * sseu->max_subslices *
DIV_ROUND_UP(sseu->max_eus_per_subslice, BITS_PER_BYTE);
diff --git a/drivers/gpu/drm/i915/i915_syncmap.c b/drivers/gpu/drm/i915/i915_syncmap.c
index 58f8d0cc125c..1741db6fb0ce 100644
--- a/drivers/gpu/drm/i915/i915_syncmap.c
+++ b/drivers/gpu/drm/i915/i915_syncmap.c
@@ -28,6 +28,7 @@
#include "i915_gem.h" /* GEM_BUG_ON() */
#include "i915_selftest.h"
+#include "i915_utils.h" /* BITS_PER_TYPE() */
#define SHIFT ilog2(KSYNCMAP)
#define MASK (KSYNCMAP - 1)
@@ -92,7 +93,7 @@ void i915_syncmap_init(struct i915_syncmap **root)
{
BUILD_BUG_ON_NOT_POWER_OF_2(KSYNCMAP);
BUILD_BUG_ON_NOT_POWER_OF_2(SHIFT);
- BUILD_BUG_ON(KSYNCMAP > BITS_PER_BYTE * sizeof((*root)->bitmap));
+ BUILD_BUG_ON(KSYNCMAP > BITS_PER_TYPE((*root)->bitmap));
*root = NULL;
}
diff --git a/drivers/gpu/drm/i915/i915_utils.h b/drivers/gpu/drm/i915/i915_utils.h
index 00165ad55fb3..617f02737fdf 100644
--- a/drivers/gpu/drm/i915/i915_utils.h
+++ b/drivers/gpu/drm/i915/i915_utils.h
@@ -43,6 +43,8 @@
#define MISSING_CASE(x) WARN(1, "Missing case (%s == %ld)\n", \
__stringify(x), (long)(x))
+#define BITS_PER_TYPE(T) (sizeof(T) * BITS_PER_BYTE)
+
#if GCC_VERSION >= 70000
#define add_overflows(A, B) \
__builtin_add_overflow_p((A), (B), (typeof((A) + (B)))0)
@@ -68,7 +70,7 @@
/* Note we don't consider signbits :| */
#define overflows_type(x, T) \
- (sizeof(x) > sizeof(T) && (x) >> (sizeof(T) * BITS_PER_BYTE))
+ (sizeof(x) > sizeof(T) && (x) >> BITS_PER_TYPE(T))
#define ptr_mask_bits(ptr, n) ({ \
unsigned long __v = (unsigned long)(ptr); \
diff --git a/drivers/gpu/drm/i915/intel_device_info.c b/drivers/gpu/drm/i915/intel_device_info.c
index 0fd13df424cf..1422758a4d36 100644
--- a/drivers/gpu/drm/i915/intel_device_info.c
+++ b/drivers/gpu/drm/i915/intel_device_info.c
@@ -750,8 +750,7 @@ void intel_device_info_runtime_init(struct intel_device_info *info)
info->num_scalers[PIPE_C] = 1;
}
- BUILD_BUG_ON(I915_NUM_ENGINES >
- sizeof(intel_ring_mask_t) * BITS_PER_BYTE);
+ BUILD_BUG_ON(I915_NUM_ENGINES > BITS_PER_TYPE(intel_ring_mask_t));
/*
* Skylake and Broxton currently don't expose the topmost plane as its
diff --git a/drivers/gpu/drm/i915/intel_engine_cs.c b/drivers/gpu/drm/i915/intel_engine_cs.c
index 478c928912c4..b459a0819569 100644
--- a/drivers/gpu/drm/i915/intel_engine_cs.c
+++ b/drivers/gpu/drm/i915/intel_engine_cs.c
@@ -333,7 +333,7 @@ int intel_engines_init_mmio(struct drm_i915_private *dev_priv)
WARN_ON(ring_mask == 0);
WARN_ON(ring_mask &
- GENMASK(sizeof(mask) * BITS_PER_BYTE - 1, I915_NUM_ENGINES));
+ GENMASK(BITS_PER_TYPE(mask) - 1, I915_NUM_ENGINES));
for (i = 0; i < ARRAY_SIZE(intel_engines); i++) {
if (!HAS_ENGINE(dev_priv, i))
--
2.18.0
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 9+ messages in thread
end of thread, other threads:[~2018-09-26 13:16 UTC | newest]
Thread overview: 9+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2018-09-26 10:47 [PATCH] drm/i915: Introduce BITS_PER_TYPE Chris Wilson
2018-09-26 10:58 ` Jani Nikula
2018-09-26 10:59 ` Ville Syrjälä
2018-09-26 11:02 ` ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Introduce BITS_PER_TYPE (rev2) Patchwork
2018-09-26 11:39 ` ✓ Fi.CI.BAT: success " Patchwork
2018-09-26 13:16 ` ✓ Fi.CI.IGT: " Patchwork
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2018-07-06 8:44 [PATCH] drm/i915: Introduce BITS_PER_TYPE Chris Wilson
2018-07-06 8:59 ` Tvrtko Ursulin
2018-07-06 9:07 ` Jani Nikula
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