* [PATCH v4] ARM: dts: dra7: Fix up unaligned access setting for PCIe EP
@ 2018-09-25 5:21 ` Vignesh R
0 siblings, 0 replies; 5+ messages in thread
From: Vignesh R @ 2018-09-25 5:21 UTC (permalink / raw)
To: Tony Lindgren; +Cc: linux-omap, devicetree, linux-kernel, Vignesh R
Bit positions of PCIE_SS1_AXI2OCP_LEGACY_MODE_ENABLE and
PCIE_SS1_AXI2OCP_LEGACY_MODE_ENABLE in CTRL_CORE_SMA_SW_7 are
incorrectly documented in the TRM. In fact, the bit positions are
swapped. Update the DT bindings for PCIe EP to reflect the same.
Fixes: d23f3839fe97 ("ARM: dts: DRA7: Add pcie1 dt node for EP mode")
Cc: stable@vger.kernel.org
Signed-off-by: Vignesh R <vigneshr@ti.com>
---
This patch is split from v3 here:
https://lore.kernel.org/patchwork/cover/967020/
Patch can be applied standalone and has no dependencies on other patches
in v3.
arch/arm/boot/dts/dra7.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
index 1050da6c6d35..fc50d6a8e51a 100644
--- a/arch/arm/boot/dts/dra7.dtsi
+++ b/arch/arm/boot/dts/dra7.dtsi
@@ -355,7 +355,7 @@
ti,hwmods = "pcie1";
phys = <&pcie1_phy>;
phy-names = "pcie-phy0";
- ti,syscon-unaligned-access = <&scm_conf1 0x14 2>;
+ ti,syscon-unaligned-access = <&scm_conf1 0x14 1>;
status = "disabled";
};
};
--
2.19.0
^ permalink raw reply related [flat|nested] 5+ messages in thread* [PATCH v4] ARM: dts: dra7: Fix up unaligned access setting for PCIe EP
@ 2018-09-25 5:21 ` Vignesh R
0 siblings, 0 replies; 5+ messages in thread
From: Vignesh R @ 2018-09-25 5:21 UTC (permalink / raw)
To: Tony Lindgren; +Cc: linux-omap, devicetree, linux-kernel, Vignesh R
Bit positions of PCIE_SS1_AXI2OCP_LEGACY_MODE_ENABLE and
PCIE_SS1_AXI2OCP_LEGACY_MODE_ENABLE in CTRL_CORE_SMA_SW_7 are
incorrectly documented in the TRM. In fact, the bit positions are
swapped. Update the DT bindings for PCIe EP to reflect the same.
Fixes: d23f3839fe97 ("ARM: dts: DRA7: Add pcie1 dt node for EP mode")
Cc: stable@vger.kernel.org
Signed-off-by: Vignesh R <vigneshr@ti.com>
---
This patch is split from v3 here:
https://lore.kernel.org/patchwork/cover/967020/
Patch can be applied standalone and has no dependencies on other patches
in v3.
arch/arm/boot/dts/dra7.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
index 1050da6c6d35..fc50d6a8e51a 100644
--- a/arch/arm/boot/dts/dra7.dtsi
+++ b/arch/arm/boot/dts/dra7.dtsi
@@ -355,7 +355,7 @@
ti,hwmods = "pcie1";
phys = <&pcie1_phy>;
phy-names = "pcie-phy0";
- ti,syscon-unaligned-access = <&scm_conf1 0x14 2>;
+ ti,syscon-unaligned-access = <&scm_conf1 0x14 1>;
status = "disabled";
};
};
--
2.19.0
^ permalink raw reply related [flat|nested] 5+ messages in thread* Re: [PATCH v4] ARM: dts: dra7: Fix up unaligned access setting for PCIe EP
2018-09-25 5:21 ` Vignesh R
(?)
@ 2018-09-26 17:27 ` Tony Lindgren
2018-09-28 5:28 ` Vignesh R
-1 siblings, 1 reply; 5+ messages in thread
From: Tony Lindgren @ 2018-09-26 17:27 UTC (permalink / raw)
To: Vignesh R; +Cc: linux-omap, devicetree, linux-kernel
* Vignesh R <vigneshr@ti.com> [180924 22:25]:
> Bit positions of PCIE_SS1_AXI2OCP_LEGACY_MODE_ENABLE and
> PCIE_SS1_AXI2OCP_LEGACY_MODE_ENABLE in CTRL_CORE_SMA_SW_7 are
> incorrectly documented in the TRM. In fact, the bit positions are
> swapped. Update the DT bindings for PCIe EP to reflect the same.
>
> Fixes: d23f3839fe97 ("ARM: dts: DRA7: Add pcie1 dt node for EP mode")
> Cc: stable@vger.kernel.org
> Signed-off-by: Vignesh R <vigneshr@ti.com>
> ---
>
> This patch is split from v3 here:
> https://lore.kernel.org/patchwork/cover/967020/
> Patch can be applied standalone and has no dependencies on other patches
> in v3.
Hmm is this needed for v4.19-rc cycle or can this wait for
v4.20 merge window?
Regards,
Tony
^ permalink raw reply [flat|nested] 5+ messages in thread* Re: [PATCH v4] ARM: dts: dra7: Fix up unaligned access setting for PCIe EP
2018-09-26 17:27 ` Tony Lindgren
@ 2018-09-28 5:28 ` Vignesh R
2018-09-28 17:26 ` Tony Lindgren
0 siblings, 1 reply; 5+ messages in thread
From: Vignesh R @ 2018-09-28 5:28 UTC (permalink / raw)
To: Tony Lindgren; +Cc: linux-omap, devicetree, linux-kernel
On Wednesday 26 September 2018 10:57 PM, Tony Lindgren wrote:
> * Vignesh R <vigneshr@ti.com> [180924 22:25]:
>> Bit positions of PCIE_SS1_AXI2OCP_LEGACY_MODE_ENABLE and
>> PCIE_SS1_AXI2OCP_LEGACY_MODE_ENABLE in CTRL_CORE_SMA_SW_7 are
>> incorrectly documented in the TRM. In fact, the bit positions are
>> swapped. Update the DT bindings for PCIe EP to reflect the same.
>>
>> Fixes: d23f3839fe97 ("ARM: dts: DRA7: Add pcie1 dt node for EP mode")
>> Cc: stable@vger.kernel.org
>> Signed-off-by: Vignesh R <vigneshr@ti.com>
>> ---
>>
>> This patch is split from v3 here:
>> https://lore.kernel.org/patchwork/cover/967020/
>> Patch can be applied standalone and has no dependencies on other patches
>> in v3.
>
> Hmm is this needed for v4.19-rc cycle or can this wait for
> v4.20 merge window?
>
v4.20 should be fine.
--
Regards
Vignesh
^ permalink raw reply [flat|nested] 5+ messages in thread* Re: [PATCH v4] ARM: dts: dra7: Fix up unaligned access setting for PCIe EP
2018-09-28 5:28 ` Vignesh R
@ 2018-09-28 17:26 ` Tony Lindgren
0 siblings, 0 replies; 5+ messages in thread
From: Tony Lindgren @ 2018-09-28 17:26 UTC (permalink / raw)
To: Vignesh R; +Cc: linux-omap, devicetree, linux-kernel
* Vignesh R <vigneshr@ti.com> [180928 05:31]:
>
>
> On Wednesday 26 September 2018 10:57 PM, Tony Lindgren wrote:
> > * Vignesh R <vigneshr@ti.com> [180924 22:25]:
> >> Bit positions of PCIE_SS1_AXI2OCP_LEGACY_MODE_ENABLE and
> >> PCIE_SS1_AXI2OCP_LEGACY_MODE_ENABLE in CTRL_CORE_SMA_SW_7 are
> >> incorrectly documented in the TRM. In fact, the bit positions are
> >> swapped. Update the DT bindings for PCIe EP to reflect the same.
> >>
> >> Fixes: d23f3839fe97 ("ARM: dts: DRA7: Add pcie1 dt node for EP mode")
> >> Cc: stable@vger.kernel.org
> >> Signed-off-by: Vignesh R <vigneshr@ti.com>
> >> ---
> >>
> >> This patch is split from v3 here:
> >> https://lore.kernel.org/patchwork/cover/967020/
> >> Patch can be applied standalone and has no dependencies on other patches
> >> in v3.
> >
> > Hmm is this needed for v4.19-rc cycle or can this wait for
> > v4.20 merge window?
> >
>
> v4.20 should be fine.
OK thanks applying into omap-for-v4.20/dt then.
Tony
^ permalink raw reply [flat|nested] 5+ messages in thread
end of thread, other threads:[~2018-09-28 17:26 UTC | newest]
Thread overview: 5+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2018-09-25 5:21 [PATCH v4] ARM: dts: dra7: Fix up unaligned access setting for PCIe EP Vignesh R
2018-09-25 5:21 ` Vignesh R
2018-09-26 17:27 ` Tony Lindgren
2018-09-28 5:28 ` Vignesh R
2018-09-28 17:26 ` Tony Lindgren
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.