* [U-Boot] [PATCH] sunxi: fix DRAM gate/reset sequence of H6
@ 2018-10-06 15:23 Icenowy Zheng
2018-10-08 7:38 ` Maxime Ripard
0 siblings, 1 reply; 3+ messages in thread
From: Icenowy Zheng @ 2018-10-06 15:23 UTC (permalink / raw)
To: u-boot
Currently the DRAM bus gate and reset is changed at the same time in
H6 DRAM initialization code, which disobeys the user manual's
programming guide.
Fix the sequence by follow the sequence suggested by the user manual
(ungate the bus clock after release the reset signal).
By some experiments it seems to fix the DRAM size detection failure that
rarely happens.
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
---
arch/arm/mach-sunxi/dram_sun50i_h6.c | 6 +++++-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/arch/arm/mach-sunxi/dram_sun50i_h6.c b/arch/arm/mach-sunxi/dram_sun50i_h6.c
index 6b94cf38c5..5da90a2835 100644
--- a/arch/arm/mach-sunxi/dram_sun50i_h6.c
+++ b/arch/arm/mach-sunxi/dram_sun50i_h6.c
@@ -299,6 +299,8 @@ static void mctl_sys_init(struct dram_para *para)
/* Put all DRAM-related blocks to reset state */
clrbits_le32(&ccm->mbus_cfg, MBUS_ENABLE | MBUS_RESET);
+ clrbits_le32(&ccm->dram_gate_reset, BIT(0));
+ udelay(5);
writel(0, &ccm->dram_gate_reset);
clrbits_le32(&ccm->pll5_cfg, CCM_PLL5_CTRL_EN);
clrbits_le32(&ccm->dram_clk_cfg, DRAM_MOD_RESET);
@@ -313,7 +315,9 @@ static void mctl_sys_init(struct dram_para *para)
/* Configure DRAM mod clock */
writel(DRAM_CLK_SRC_PLL5, &ccm->dram_clk_cfg);
setbits_le32(&ccm->dram_clk_cfg, DRAM_CLK_UPDATE);
- writel(BIT(0) | BIT(RESET_SHIFT), &ccm->dram_gate_reset);
+ writel(BIT(RESET_SHIFT), &ccm->dram_gate_reset);
+ udelay(5);
+ setbits_le32(&ccm->dram_gate_reset, BIT(0));
/* Disable all channels */
writel(0, &mctl_com->maer0);
--
2.18.0
^ permalink raw reply related [flat|nested] 3+ messages in thread
* [U-Boot] [PATCH] sunxi: fix DRAM gate/reset sequence of H6
2018-10-06 15:23 [U-Boot] [PATCH] sunxi: fix DRAM gate/reset sequence of H6 Icenowy Zheng
@ 2018-10-08 7:38 ` Maxime Ripard
2018-10-10 6:35 ` [U-Boot] [linux-sunxi] " Jagan Teki
0 siblings, 1 reply; 3+ messages in thread
From: Maxime Ripard @ 2018-10-08 7:38 UTC (permalink / raw)
To: u-boot
On Sat, Oct 06, 2018 at 11:23:32PM +0800, Icenowy Zheng wrote:
> Currently the DRAM bus gate and reset is changed at the same time in
> H6 DRAM initialization code, which disobeys the user manual's
> programming guide.
>
> Fix the sequence by follow the sequence suggested by the user manual
> (ungate the bus clock after release the reset signal).
>
> By some experiments it seems to fix the DRAM size detection failure that
> rarely happens.
>
> Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Thanks!
Maxime
--
Maxime Ripard, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
-------------- next part --------------
A non-text attachment was scrubbed...
Name: signature.asc
Type: application/pgp-signature
Size: 833 bytes
Desc: not available
URL: <http://lists.denx.de/pipermail/u-boot/attachments/20181008/16d4296a/attachment.sig>
^ permalink raw reply [flat|nested] 3+ messages in thread
* [U-Boot] [linux-sunxi] Re: [PATCH] sunxi: fix DRAM gate/reset sequence of H6
2018-10-08 7:38 ` Maxime Ripard
@ 2018-10-10 6:35 ` Jagan Teki
0 siblings, 0 replies; 3+ messages in thread
From: Jagan Teki @ 2018-10-10 6:35 UTC (permalink / raw)
To: u-boot
On Mon, Oct 8, 2018 at 1:08 PM Maxime Ripard <maxime.ripard@bootlin.com> wrote:
>
> On Sat, Oct 06, 2018 at 11:23:32PM +0800, Icenowy Zheng wrote:
> > Currently the DRAM bus gate and reset is changed at the same time in
> > H6 DRAM initialization code, which disobeys the user manual's
> > programming guide.
> >
> > Fix the sequence by follow the sequence suggested by the user manual
> > (ungate the bus clock after release the reset signal).
> >
> > By some experiments it seems to fix the DRAM size detection failure that
> > rarely happens.
> >
> > Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Applied to u-boot-sunxi/master
^ permalink raw reply [flat|nested] 3+ messages in thread
end of thread, other threads:[~2018-10-10 6:35 UTC | newest]
Thread overview: 3+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2018-10-06 15:23 [U-Boot] [PATCH] sunxi: fix DRAM gate/reset sequence of H6 Icenowy Zheng
2018-10-08 7:38 ` Maxime Ripard
2018-10-10 6:35 ` [U-Boot] [linux-sunxi] " Jagan Teki
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.