From: "Clément Péron" <peron.clem@gmail.com> To: Dinh Nguyen <dinguyen@kernel.org>, Russell King <linux@armlinux.org.uk>, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, stable@vger.kernel.org Cc: "Dinh Nguyen" <dinguyen@altera.com>, "Clément Péron" <peron.clem@gmail.com> Subject: [PATCH v2 2/3] ARM: socfpga: Turn on all peripheral clocks for a system reboot Date: Tue, 9 Oct 2018 13:20:20 +0200 [thread overview] Message-ID: <20181009112021.756-2-peron.clem@gmail.com> (raw) In-Reply-To: <20181009112021.756-1-peron.clem@gmail.com> From: Dinh Nguyen <dinguyen@altera.com> When doing a software reboot, all peripheral clocks must get turned on for the L3 interconnect to work. This code is needed when doing a "reboot" from user-space and a peripheral clock as been gated off. Why would a peripheral clock get gated? An example use case would be a .ko that gets insmod and rmmod during runtime. The insmod would turn on the IP's clock, and the rmmod would turn off the IP's clock. Doing a "reboot" would cause the system to hang. Signed-off-by: Dinh Nguyen <dinguyen@altera.com> Signed-off-by: Clément Péron <peron.clem@gmail.com> --- v2: - Remove fixes tag in commit log arch/arm/mach-socfpga/core.h | 3 +++ arch/arm/mach-socfpga/socfpga.c | 8 ++++++++ 2 files changed, 11 insertions(+) diff --git a/arch/arm/mach-socfpga/core.h b/arch/arm/mach-socfpga/core.h index 92cae0a9213f..17c8a97c04d9 100644 --- a/arch/arm/mach-socfpga/core.h +++ b/arch/arm/mach-socfpga/core.h @@ -52,4 +52,7 @@ extern unsigned long socfpga_cpu1start_addr; #define SOCFPGA_SCU_VIRT_BASE 0xfee00000 +/* Clock manager defines */ +#define SOCFPGA_ENABLE_PLL_REG 0xA0 + #endif diff --git a/arch/arm/mach-socfpga/socfpga.c b/arch/arm/mach-socfpga/socfpga.c index 5fb6f79059a8..c9c881f7c67c 100644 --- a/arch/arm/mach-socfpga/socfpga.c +++ b/arch/arm/mach-socfpga/socfpga.c @@ -31,6 +31,7 @@ void __iomem *sys_manager_base_addr; void __iomem *rst_manager_base_addr; void __iomem *sdr_ctl_base_addr; unsigned long socfpga_cpu1start_addr; +void __iomem *clkmgr_base_addr; static void __init socfpga_sysmgr_init(void) { @@ -51,6 +52,10 @@ static void __init socfpga_sysmgr_init(void) np = of_find_compatible_node(NULL, NULL, "altr,rst-mgr"); rst_manager_base_addr = of_iomap(np, 0); + np = of_find_compatible_node(NULL, NULL, "altr,clk-mgr"); + clkmgr_base_addr = of_iomap(np, 0); + WARN_ON(!clkmgr_base_addr); + np = of_find_compatible_node(NULL, NULL, "altr,sdr-ctl"); sdr_ctl_base_addr = of_iomap(np, 0); } @@ -80,6 +85,9 @@ static void socfpga_cyclone5_restart(enum reboot_mode mode, const char *cmd) { u32 temp; + /* Turn on all periph PLL clocks */ + writel(0xffff, clkmgr_base_addr + SOCFPGA_ENABLE_PLL_REG); + temp = readl(rst_manager_base_addr + SOCFPGA_RSTMGR_CTRL); if (mode == REBOOT_HARD) -- 2.17.1
WARNING: multiple messages have this Message-ID (diff)
From: peron.clem@gmail.com (Clément Péron) To: linux-arm-kernel@lists.infradead.org Subject: [PATCH v2 2/3] ARM: socfpga: Turn on all peripheral clocks for a system reboot Date: Tue, 9 Oct 2018 13:20:20 +0200 [thread overview] Message-ID: <20181009112021.756-2-peron.clem@gmail.com> (raw) In-Reply-To: <20181009112021.756-1-peron.clem@gmail.com> From: Dinh Nguyen <dinguyen@altera.com> When doing a software reboot, all peripheral clocks must get turned on for the L3 interconnect to work. This code is needed when doing a "reboot" from user-space and a peripheral clock as been gated off. Why would a peripheral clock get gated? An example use case would be a .ko that gets insmod and rmmod during runtime. The insmod would turn on the IP's clock, and the rmmod would turn off the IP's clock. Doing a "reboot" would cause the system to hang. Signed-off-by: Dinh Nguyen <dinguyen@altera.com> Signed-off-by: Cl?ment P?ron <peron.clem@gmail.com> --- v2: - Remove fixes tag in commit log arch/arm/mach-socfpga/core.h | 3 +++ arch/arm/mach-socfpga/socfpga.c | 8 ++++++++ 2 files changed, 11 insertions(+) diff --git a/arch/arm/mach-socfpga/core.h b/arch/arm/mach-socfpga/core.h index 92cae0a9213f..17c8a97c04d9 100644 --- a/arch/arm/mach-socfpga/core.h +++ b/arch/arm/mach-socfpga/core.h @@ -52,4 +52,7 @@ extern unsigned long socfpga_cpu1start_addr; #define SOCFPGA_SCU_VIRT_BASE 0xfee00000 +/* Clock manager defines */ +#define SOCFPGA_ENABLE_PLL_REG 0xA0 + #endif diff --git a/arch/arm/mach-socfpga/socfpga.c b/arch/arm/mach-socfpga/socfpga.c index 5fb6f79059a8..c9c881f7c67c 100644 --- a/arch/arm/mach-socfpga/socfpga.c +++ b/arch/arm/mach-socfpga/socfpga.c @@ -31,6 +31,7 @@ void __iomem *sys_manager_base_addr; void __iomem *rst_manager_base_addr; void __iomem *sdr_ctl_base_addr; unsigned long socfpga_cpu1start_addr; +void __iomem *clkmgr_base_addr; static void __init socfpga_sysmgr_init(void) { @@ -51,6 +52,10 @@ static void __init socfpga_sysmgr_init(void) np = of_find_compatible_node(NULL, NULL, "altr,rst-mgr"); rst_manager_base_addr = of_iomap(np, 0); + np = of_find_compatible_node(NULL, NULL, "altr,clk-mgr"); + clkmgr_base_addr = of_iomap(np, 0); + WARN_ON(!clkmgr_base_addr); + np = of_find_compatible_node(NULL, NULL, "altr,sdr-ctl"); sdr_ctl_base_addr = of_iomap(np, 0); } @@ -80,6 +85,9 @@ static void socfpga_cyclone5_restart(enum reboot_mode mode, const char *cmd) { u32 temp; + /* Turn on all periph PLL clocks */ + writel(0xffff, clkmgr_base_addr + SOCFPGA_ENABLE_PLL_REG); + temp = readl(rst_manager_base_addr + SOCFPGA_RSTMGR_CTRL); if (mode == REBOOT_HARD) -- 2.17.1
next prev parent reply other threads:[~2018-10-09 11:20 UTC|newest] Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top 2018-10-09 11:20 [PATCH v2 1/3] ARM: socfpga: Clean unused functions Clément Péron 2018-10-09 11:20 ` Clément Péron 2018-10-09 11:20 ` Clément Péron [this message] 2018-10-09 11:20 ` [PATCH v2 2/3] ARM: socfpga: Turn on all peripheral clocks for a system reboot Clément Péron 2018-10-09 11:20 ` [PATCH v2 3/3] ARM: socfpga: Turn on ARM errata for L2 cache Clément Péron 2018-10-09 11:20 ` Clément Péron 2018-10-23 8:47 ` [PATCH v2 1/3] ARM: socfpga: Clean unused functions Clément Péron 2018-10-23 8:47 ` Clément Péron 2018-10-23 8:52 ` Russell King - ARM Linux 2018-10-23 8:52 ` Russell King - ARM Linux 2018-10-23 8:52 ` Russell King - ARM Linux [not found] ` <CAJiuCcdKFKmwB5mqW-bP+4A4HtVr=1z9avxoDPrD3NL9X9i8MQ@mail.gmail.com> 2018-11-08 15:38 ` Dinh Nguyen 2018-11-08 15:38 ` Dinh Nguyen 2018-11-08 16:23 ` Clément Péron 2018-11-08 16:23 ` Clément Péron
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