From: laurentiu.tudor@nxp.com
To: devicetree@vger.kernel.org, netdev@vger.kernel.org,
linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org, arm@kernel.org
Cc: roy.pledge@nxp.com, madalin.bucur@nxp.com, davem@davemloft.net,
shawnguo@kernel.org, leoyang.li@nxp.com, robin.murphy@arm.com,
bharat.bhushan@nxp.com, arnd@arndb.de,
Laurentiu Tudor <laurentiu.tudor@nxp.com>
Subject: [PATCH v3 19/22] arm64: dts: ls104x: add missing dma ranges property
Date: Wed, 10 Oct 2018 15:07:34 +0300 [thread overview]
Message-ID: <20181010120737.30300-17-laurentiu.tudor@nxp.com> (raw)
In-Reply-To: <20181010120737.30300-1-laurentiu.tudor@nxp.com>
From: Laurentiu Tudor <laurentiu.tudor@nxp.com>
These chips have a 48-bit address size so make sure that the dma-ranges
reflects this. Otherwise the linux kernel's dma sub-system will set
the default dma masks to full 64-bit, badly breaking dmas.
Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
---
arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi | 1 +
arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi | 1 +
2 files changed, 2 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
index 1f9b385007a8..0e8fc8f29997 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
@@ -214,6 +214,7 @@
#address-cells = <2>;
#size-cells = <2>;
ranges;
+ dma-ranges = <0x0 0x0 0x0 0x0 0x10000 0x00000000>;
clockgen: clocking@1ee1000 {
compatible = "fsl,ls1043a-clockgen";
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
index 22bf3975492a..29b07bdd4207 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
@@ -187,6 +187,7 @@
#address-cells = <2>;
#size-cells = <2>;
ranges;
+ dma-ranges = <0x0 0x0 0x0 0x0 0x10000 0x00000000>;
ddr: memory-controller@1080000 {
compatible = "fsl,qoriq-memory-controller";
--
2.17.1
WARNING: multiple messages have this Message-ID (diff)
From: laurentiu.tudor@nxp.com (laurentiu.tudor at nxp.com)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v3 19/22] arm64: dts: ls104x: add missing dma ranges property
Date: Wed, 10 Oct 2018 15:07:34 +0300 [thread overview]
Message-ID: <20181010120737.30300-17-laurentiu.tudor@nxp.com> (raw)
In-Reply-To: <20181010120737.30300-1-laurentiu.tudor@nxp.com>
From: Laurentiu Tudor <laurentiu.tudor@nxp.com>
These chips have a 48-bit address size so make sure that the dma-ranges
reflects this. Otherwise the linux kernel's dma sub-system will set
the default dma masks to full 64-bit, badly breaking dmas.
Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
---
arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi | 1 +
arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi | 1 +
2 files changed, 2 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
index 1f9b385007a8..0e8fc8f29997 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
@@ -214,6 +214,7 @@
#address-cells = <2>;
#size-cells = <2>;
ranges;
+ dma-ranges = <0x0 0x0 0x0 0x0 0x10000 0x00000000>;
clockgen: clocking at 1ee1000 {
compatible = "fsl,ls1043a-clockgen";
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
index 22bf3975492a..29b07bdd4207 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
@@ -187,6 +187,7 @@
#address-cells = <2>;
#size-cells = <2>;
ranges;
+ dma-ranges = <0x0 0x0 0x0 0x0 0x10000 0x00000000>;
ddr: memory-controller at 1080000 {
compatible = "fsl,qoriq-memory-controller";
--
2.17.1
next prev parent reply other threads:[~2018-10-10 12:08 UTC|newest]
Thread overview: 40+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-10-10 12:07 [PATCH v3 00/22] SMMU enablement for NXP LS1043A and LS1046A laurentiu.tudor
2018-10-10 12:07 ` laurentiu.tudor at nxp.com
2018-10-10 12:07 ` [PATCH v3 01/22] soc/fsl/qman: fixup liodns only on ppc targets laurentiu.tudor
2018-10-10 12:07 ` laurentiu.tudor at nxp.com
2018-10-10 12:07 ` [PATCH v3 02/22] soc/fsl/bman: map FBPR area in the iommu laurentiu.tudor
2018-10-10 12:07 ` laurentiu.tudor at nxp.com
2018-10-10 12:07 ` [PATCH v3 03/22] soc/fsl/qman: map FQD and PFDR areas " laurentiu.tudor
2018-10-10 12:07 ` laurentiu.tudor at nxp.com
2018-10-10 12:07 ` [PATCH v3 04/22] soc/fsl/qman-portal: map CENA area " laurentiu.tudor
2018-10-10 12:07 ` laurentiu.tudor at nxp.com
2018-10-10 12:07 ` [PATCH v3 08/22] soc/fsl/qbman_portals: add APIs to retrieve the probing status laurentiu.tudor
2018-10-10 12:07 ` laurentiu.tudor at nxp.com
2018-10-10 12:07 ` [PATCH v3 09/22] fsl/fman: backup and restore ICID registers laurentiu.tudor
2018-10-10 12:07 ` laurentiu.tudor at nxp.com
2018-10-10 12:07 ` [PATCH v3 10/22] fsl/fman: add API to get the device behind a fman port laurentiu.tudor
2018-10-10 12:07 ` laurentiu.tudor at nxp.com
2018-10-10 12:07 ` [PATCH v3 11/22] dpaa_eth: defer probing after qbman laurentiu.tudor
2018-10-10 12:07 ` laurentiu.tudor at nxp.com
2018-10-10 12:07 ` [PATCH v3 12/22] dpaa_eth: base dma mappings on the fman rx port laurentiu.tudor
2018-10-10 12:07 ` laurentiu.tudor at nxp.com
2018-10-10 12:07 ` [PATCH v3 13/22] dpaa_eth: fix iova handling for contiguous frames laurentiu.tudor
2018-10-10 12:07 ` laurentiu.tudor at nxp.com
2018-10-10 12:07 ` [PATCH v3 14/22] dpaa_eth: fix iova handling for sg frames laurentiu.tudor
2018-10-10 12:07 ` laurentiu.tudor at nxp.com
2018-10-10 12:07 ` [PATCH v3 15/22] dpaa_eth: fix SG frame cleanup laurentiu.tudor
2018-10-10 12:07 ` laurentiu.tudor at nxp.com
2018-10-10 12:07 ` [PATCH v3 16/22] arm64: dts: ls1046a: add smmu node laurentiu.tudor
2018-10-10 12:07 ` laurentiu.tudor at nxp.com
2018-10-10 12:07 ` [PATCH v3 17/22] arm64: dts: ls1043a: " laurentiu.tudor
2018-10-10 12:07 ` laurentiu.tudor at nxp.com
2018-10-10 12:07 ` [PATCH v3 18/22] arm64: dts: ls104xa: set mask to drop TBU ID from StreamID laurentiu.tudor
2018-10-10 12:07 ` laurentiu.tudor at nxp.com
2018-10-10 12:07 ` laurentiu.tudor [this message]
2018-10-10 12:07 ` [PATCH v3 19/22] arm64: dts: ls104x: add missing dma ranges property laurentiu.tudor at nxp.com
2018-10-10 12:07 ` [PATCH v3 20/22] arm64: dts: ls104x: add iommu-map to pci controllers laurentiu.tudor
2018-10-10 12:07 ` laurentiu.tudor at nxp.com
2018-10-10 12:07 ` [PATCH v3 21/22] arm64: dts: ls104x: make dma-coherent global to the SoC laurentiu.tudor
2018-10-10 12:07 ` laurentiu.tudor at nxp.com
2018-10-10 12:07 ` [PATCH v3 22/22] arm64: dts: ls104x: use a pseudo-bus to constrain usb dma size laurentiu.tudor
2018-10-10 12:07 ` laurentiu.tudor at nxp.com
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20181010120737.30300-17-laurentiu.tudor@nxp.com \
--to=laurentiu.tudor@nxp.com \
--cc=arm@kernel.org \
--cc=arnd@arndb.de \
--cc=bharat.bhushan@nxp.com \
--cc=davem@davemloft.net \
--cc=devicetree@vger.kernel.org \
--cc=leoyang.li@nxp.com \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-kernel@vger.kernel.org \
--cc=madalin.bucur@nxp.com \
--cc=netdev@vger.kernel.org \
--cc=robin.murphy@arm.com \
--cc=roy.pledge@nxp.com \
--cc=shawnguo@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.