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From: Marek Vasut <marek.vasut@gmail.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH 4/9] ARM: rmobile: Remove Watchdog and CPG settings on Gen3
Date: Thu, 18 Oct 2018 20:37:48 +0200	[thread overview]
Message-ID: <20181018183753.15970-4-marek.vasut+renesas@gmail.com> (raw)
In-Reply-To: <20181018183753.15970-1-marek.vasut+renesas@gmail.com>

From: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>

This code is unnecessary, because these registers are set by the
initial program loader (IPL).

Signed-off-by: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
---
 board/renesas/draak/draak.c           | 13 -------------
 board/renesas/salvator-x/salvator-x.c | 13 -------------
 board/renesas/ulcb/ulcb.c             | 13 -------------
 3 files changed, 39 deletions(-)

diff --git a/board/renesas/draak/draak.c b/board/renesas/draak/draak.c
index f9ae74a39d..71fd5001c4 100644
--- a/board/renesas/draak/draak.c
+++ b/board/renesas/draak/draak.c
@@ -26,21 +26,8 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
-#define CPGWPCR	0xE6150904
-#define CPGWPR  0xE6150900
-
-#define CLK2MHZ(clk)	(clk / 1000 / 1000)
 void s_init(void)
 {
-	struct rcar_rwdt *rwdt = (struct rcar_rwdt *)RWDT_BASE;
-	struct rcar_swdt *swdt = (struct rcar_swdt *)SWDT_BASE;
-
-	/* Watchdog init */
-	writel(0xA5A5A500, &rwdt->rwtcsra);
-	writel(0xA5A5A500, &swdt->swtcsra);
-
-	writel(0x5A5AFFFF, CPGWPR);
-	writel(0xA5A50000, CPGWPCR);
 }
 
 #define GSX_MSTP112		BIT(12)	/* 3DG */
diff --git a/board/renesas/salvator-x/salvator-x.c b/board/renesas/salvator-x/salvator-x.c
index cb5228a0bd..296aa90a12 100644
--- a/board/renesas/salvator-x/salvator-x.c
+++ b/board/renesas/salvator-x/salvator-x.c
@@ -27,21 +27,8 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
-#define CPGWPCR	0xE6150904
-#define CPGWPR  0xE6150900
-
-#define CLK2MHZ(clk)	(clk / 1000 / 1000)
 void s_init(void)
 {
-	struct rcar_rwdt *rwdt = (struct rcar_rwdt *)RWDT_BASE;
-	struct rcar_swdt *swdt = (struct rcar_swdt *)SWDT_BASE;
-
-	/* Watchdog init */
-	writel(0xA5A5A500, &rwdt->rwtcsra);
-	writel(0xA5A5A500, &swdt->swtcsra);
-
-	writel(0x5A5AFFFF, CPGWPR);
-	writel(0xA5A50000, CPGWPCR);
 }
 
 #define GSX_MSTP112		BIT(12)	/* 3DG */
diff --git a/board/renesas/ulcb/ulcb.c b/board/renesas/ulcb/ulcb.c
index fca6eae1fb..a7ca274f34 100644
--- a/board/renesas/ulcb/ulcb.c
+++ b/board/renesas/ulcb/ulcb.c
@@ -26,21 +26,8 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
-#define CPGWPCR	0xE6150904
-#define CPGWPR  0xE6150900
-
-#define CLK2MHZ(clk)	(clk / 1000 / 1000)
 void s_init(void)
 {
-	struct rcar_rwdt *rwdt = (struct rcar_rwdt *)RWDT_BASE;
-	struct rcar_swdt *swdt = (struct rcar_swdt *)SWDT_BASE;
-
-	/* Watchdog init */
-	writel(0xA5A5A500, &rwdt->rwtcsra);
-	writel(0xA5A5A500, &swdt->swtcsra);
-
-	writel(0x5A5AFFFF, CPGWPR);
-	writel(0xA5A50000, CPGWPCR);
 }
 
 #define GSX_MSTP112		BIT(12)	/* 3DG */
-- 
2.18.0

  parent reply	other threads:[~2018-10-18 18:37 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-10-18 18:37 [U-Boot] [PATCH 1/9] ARM: rmobile: Fix CPGWPR Address define and Settings on Gen3 Marek Vasut
2018-10-18 18:37 ` [U-Boot] [PATCH 2/9] ARM: rmobile: Remove console parameter from bootargs " Marek Vasut
2018-10-18 18:37 ` [U-Boot] [PATCH 3/9] ARM: rmobile: Remove TMU0/TMU1 settings " Marek Vasut
2018-10-18 18:37 ` Marek Vasut [this message]
2018-10-18 18:37 ` [U-Boot] [PATCH 5/9] ARM: rmobile: salvator-x: Remove GSX clock force supply Marek Vasut
2018-10-18 18:37 ` [U-Boot] [PATCH 6/9] ARM: rmobile: Tidy up SYSC_PWRx define of 3DG on Gen3 Marek Vasut
2018-10-18 18:37 ` [U-Boot] [PATCH 7/9] ARM: rmobile: Enable cache command " Marek Vasut
2018-10-18 18:37 ` [U-Boot] [PATCH 8/9] ARM: rmobile: Fix module clock controls refer status " Marek Vasut
2018-10-18 18:37 ` [U-Boot] [PATCH 9/9] ARM: dts: rmobile: r8a77990: Add USB2.0(EHCI) DT nodes on Ebisu Marek Vasut

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