All of lore.kernel.org
 help / color / mirror / Atom feed
From: Marek Vasut <marek.vasut@gmail.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH 9/9] ARM: dts: rmobile: r8a77990: Add USB2.0(EHCI) DT nodes on Ebisu
Date: Thu, 18 Oct 2018 20:37:53 +0200	[thread overview]
Message-ID: <20181018183753.15970-9-marek.vasut+renesas@gmail.com> (raw)
In-Reply-To: <20181018183753.15970-1-marek.vasut+renesas@gmail.com>

From: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>

Add device tree nodes for USB2.0(EHCI) on R-Car E3 Ebisu board.

Signed-off-by: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
---
 arch/arm/dts/r8a77990-ebisu.dts           | 16 ++++++++++
 arch/arm/dts/r8a77990.dtsi                | 38 +++++++++++++++++++++++
 include/dt-bindings/power/r8a77990-sysc.h | 20 ++++++++++++
 3 files changed, 74 insertions(+)
 create mode 100644 include/dt-bindings/power/r8a77990-sysc.h

diff --git a/arch/arm/dts/r8a77990-ebisu.dts b/arch/arm/dts/r8a77990-ebisu.dts
index 8b0d24bd29..5e3c195d4c 100644
--- a/arch/arm/dts/r8a77990-ebisu.dts
+++ b/arch/arm/dts/r8a77990-ebisu.dts
@@ -65,6 +65,10 @@
 	};
 };
 
+&ehci0 {
+	status = "okay";
+};
+
 &extal_clk {
 	clock-frequency = <48000000>;
 };
@@ -101,6 +105,18 @@
 		function = "sdhi3";
 		power-source = <1800>;
 	};
+
+	usb0_pins: usb0 {
+		groups = "usb0";
+		function = "usb0";
+	};
+};
+
+&usb2_phy0 {
+	pinctrl-0 = <&usb0_pins>;
+	pinctrl-name = "default";
+
+	status = "okay";
 };
 
 &sdhi0 {
diff --git a/arch/arm/dts/r8a77990.dtsi b/arch/arm/dts/r8a77990.dtsi
index 6d2d5e1068..ad20ea14cd 100644
--- a/arch/arm/dts/r8a77990.dtsi
+++ b/arch/arm/dts/r8a77990.dtsi
@@ -7,6 +7,7 @@
 
 #include <dt-bindings/clock/renesas-cpg-mssr.h>
 #include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/power/r8a77990-sysc.h>
 
 / {
 	compatible = "renesas,r8a77990";
@@ -165,6 +166,43 @@
 			resets = <&cpg 906>;
 		};
 
+		ohci0: usb at ee080000 {
+			compatible = "generic-ohci";
+			reg = <0 0xee080000 0 0x100>;
+			interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 703>;
+			phys = <&usb2_phy0>;
+			phy-names = "usb";
+			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
+			resets = <&cpg 703>;
+			status = "disabled";
+		};
+
+		ehci0: usb at ee080100 {
+			compatible = "generic-ehci";
+			reg = <0 0xee080100 0 0x100>;
+			interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 703>;
+			phys = <&usb2_phy0>;
+			phy-names = "usb";
+			companion = <&ohci0>;
+			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
+			resets = <&cpg 703>;
+			status = "disabled";
+		};
+
+		usb2_phy0: usb-phy at ee080200 {
+			compatible = "renesas,usb2-phy-r8a7790",
+				     "renesas,rcar-gen3-usb2-phy";
+			reg = <0 0xee080200 0 0x700>;
+			interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 703>;
+			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
+			resets = <&cpg 703>;
+			#phy-cells = <0>;
+			status = "disabled";
+		};
+
 		pfc: pin-controller at e6060000 {
 			compatible = "renesas,pfc-r8a77990";
 			reg = <0 0xe6060000 0 0x508>;
diff --git a/include/dt-bindings/power/r8a77990-sysc.h b/include/dt-bindings/power/r8a77990-sysc.h
new file mode 100644
index 0000000000..1409c73a57
--- /dev/null
+++ b/include/dt-bindings/power/r8a77990-sysc.h
@@ -0,0 +1,20 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2018 Renesas Electronics Corp.
+ */
+#ifndef __DT_BINDINGS_POWER_R8A77990_SYSC_H__
+#define __DT_BINDINGS_POWER_R8A77990_SYSC_H__
+
+/*
+ * These power domain indices match the numbers of the interrupt bits
+ * representing the power areas in the various Interrupt Registers
+ * (e.g. SYSCISR, Interrupt Status Register)
+ */
+
+#define R8A77990_PD_CA53_CPU0		 5
+#define R8A77990_PD_CA53_SCU		21
+
+/* Always-on power area */
+#define R8A77990_PD_ALWAYS_ON		32
+
+#endif /* __DT_BINDINGS_POWER_R8A77990_SYSC_H__ */
-- 
2.18.0

      parent reply	other threads:[~2018-10-18 18:37 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-10-18 18:37 [U-Boot] [PATCH 1/9] ARM: rmobile: Fix CPGWPR Address define and Settings on Gen3 Marek Vasut
2018-10-18 18:37 ` [U-Boot] [PATCH 2/9] ARM: rmobile: Remove console parameter from bootargs " Marek Vasut
2018-10-18 18:37 ` [U-Boot] [PATCH 3/9] ARM: rmobile: Remove TMU0/TMU1 settings " Marek Vasut
2018-10-18 18:37 ` [U-Boot] [PATCH 4/9] ARM: rmobile: Remove Watchdog and CPG " Marek Vasut
2018-10-18 18:37 ` [U-Boot] [PATCH 5/9] ARM: rmobile: salvator-x: Remove GSX clock force supply Marek Vasut
2018-10-18 18:37 ` [U-Boot] [PATCH 6/9] ARM: rmobile: Tidy up SYSC_PWRx define of 3DG on Gen3 Marek Vasut
2018-10-18 18:37 ` [U-Boot] [PATCH 7/9] ARM: rmobile: Enable cache command " Marek Vasut
2018-10-18 18:37 ` [U-Boot] [PATCH 8/9] ARM: rmobile: Fix module clock controls refer status " Marek Vasut
2018-10-18 18:37 ` Marek Vasut [this message]

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20181018183753.15970-9-marek.vasut+renesas@gmail.com \
    --to=marek.vasut@gmail.com \
    --cc=u-boot@lists.denx.de \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.