* [PATCH 00/11] DPU cleanups
@ 2018-10-18 19:58 Jordan Crouse
[not found] ` <20181018195836.15885-1-jcrouse-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
0 siblings, 1 reply; 29+ messages in thread
From: Jordan Crouse @ 2018-10-18 19:58 UTC (permalink / raw)
To: freedreno-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW
Cc: linux-arm-msm-u79uwXL29TY76Z2rM5mHXA,
seanpaul-F7+t8E8rja9g9hUCZPvPmw, abhinavk-sgV2jX0FEOL9JmXXK+q4OQ,
dri-devel-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW
I've been working on various methods to automate code cleanup strategies
and I'm using dpu as my guinea pig. I started out by trying to identify
unused or lightly static inline functions and then that morphed to
very small functions in general and that then identified a few general
areas of cleanup such as debugfs init/destroy and the dpu_hw_blk_init
users.
Jordan Crouse (11):
drm/msm/dpu: Remove dpu_dbg
drm/msm/dpu: Use DEFINE_SHOW_ATTRIBUTE
drm/msm/dpu: Remove dpu_crtc_get_mixer_height
drm/msm/dpu: Remove dpu_crtc_is_enabled()
drm/msm/dpu: Cleanup some container_of helper functions
drm/msm/dpu: Cleanup callers of dpu_hw_blk_init
drm/msm: Make irq_postinstall optional
drm/msm/dpu: Remove dpu_irq and unused functions
drm/msm/dpu: Debugfs related cleanups
drm/msm/dpu: Further cleanups for static inline functions
drm/msm/dpu: Clean up dpu_media_info.h static inline functions
drivers/gpu/drm/msm/Makefile | 4 +-
drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.c | 59 +-
drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.h | 16 +-
drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c | 47 +-
drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c | 78 +-
drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.h | 54 -
drivers/gpu/drm/msm/disp/dpu1/dpu_dbg.c | 2393 -----------------
drivers/gpu/drm/msm/disp/dpu1/dpu_dbg.h | 103 -
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 55 +-
.../gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h | 2 +-
.../drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c | 12 +-
.../drm/msm/disp/dpu1/dpu_encoder_phys_vid.c | 1 -
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_blk.c | 10 +-
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_blk.h | 2 +-
.../gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h | 9 -
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c | 18 +-
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.h | 10 -
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.c | 18 +-
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.h | 10 -
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.c | 24 +-
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.h | 15 -
.../gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.c | 18 +-
.../gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.h | 10 -
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c | 21 +-
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.h | 10 -
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_top.c | 20 +-
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_top.h | 10 -
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_vbif.c | 1 -
drivers/gpu/drm/msm/disp/dpu1/dpu_irq.c | 66 -
drivers/gpu/drm/msm/disp/dpu1/dpu_irq.h | 59 -
drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 134 +-
drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h | 3 -
drivers/gpu/drm/msm/disp/dpu1/dpu_mdss.c | 8 +-
drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c | 38 +-
drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c | 5 +-
drivers/gpu/drm/msm/disp/dpu1/dpu_vbif.c | 11 +-
drivers/gpu/drm/msm/disp/dpu1/dpu_vbif.h | 15 +-
.../gpu/drm/msm/disp/dpu1/msm_media_info.h | 164 +-
drivers/gpu/drm/msm/msm_drv.c | 6 +-
39 files changed, 181 insertions(+), 3358 deletions(-)
delete mode 100644 drivers/gpu/drm/msm/disp/dpu1/dpu_dbg.c
delete mode 100644 drivers/gpu/drm/msm/disp/dpu1/dpu_dbg.h
delete mode 100644 drivers/gpu/drm/msm/disp/dpu1/dpu_irq.c
delete mode 100644 drivers/gpu/drm/msm/disp/dpu1/dpu_irq.h
--
2.18.0
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^ permalink raw reply [flat|nested] 29+ messages in thread
* [PATCH 01/11] drm/msm/dpu: Remove dpu_dbg
[not found] ` <20181018195836.15885-1-jcrouse-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
@ 2018-10-18 19:58 ` Jordan Crouse
[not found] ` <20181018195836.15885-2-jcrouse-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2018-10-18 19:58 ` [PATCH 02/11] drm/msm/dpu: Use DEFINE_SHOW_ATTRIBUTE Jordan Crouse
` (9 subsequent siblings)
10 siblings, 1 reply; 29+ messages in thread
From: Jordan Crouse @ 2018-10-18 19:58 UTC (permalink / raw)
To: freedreno-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW
Cc: linux-arm-msm-u79uwXL29TY76Z2rM5mHXA,
seanpaul-F7+t8E8rja9g9hUCZPvPmw, abhinavk-sgV2jX0FEOL9JmXXK+q4OQ,
dri-devel-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW
The functions in dpu_dbg.c aren't used. The two main dump functions
fail after a lookup from dpu_dbg_base.reg_base_list which turns out
to never be populated and once those are removed the rest of the
file doesn't make any sense.
Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
---
drivers/gpu/drm/msm/Makefile | 3 +-
drivers/gpu/drm/msm/disp/dpu1/dpu_dbg.c | 2393 -----------------
drivers/gpu/drm/msm/disp/dpu1/dpu_dbg.h | 103 -
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 24 +-
.../drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c | 1 -
.../drm/msm/disp/dpu1/dpu_encoder_phys_vid.c | 1 -
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c | 1 -
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.c | 1 -
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.c | 1 -
.../gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.c | 1 -
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c | 1 -
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_top.c | 3 -
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_vbif.c | 1 -
drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 20 +-
drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h | 1 -
15 files changed, 8 insertions(+), 2547 deletions(-)
delete mode 100644 drivers/gpu/drm/msm/disp/dpu1/dpu_dbg.c
delete mode 100644 drivers/gpu/drm/msm/disp/dpu1/dpu_dbg.h
diff --git a/drivers/gpu/drm/msm/Makefile b/drivers/gpu/drm/msm/Makefile
index 19ab521d4c3a..e067dd1341b1 100644
--- a/drivers/gpu/drm/msm/Makefile
+++ b/drivers/gpu/drm/msm/Makefile
@@ -92,8 +92,7 @@ msm-y := \
msm_ringbuffer.o \
msm_submitqueue.o
-msm-$(CONFIG_DEBUG_FS) += adreno/a5xx_debugfs.o \
- disp/dpu1/dpu_dbg.o
+msm-$(CONFIG_DEBUG_FS) += adreno/a5xx_debugfs.o
msm-$(CONFIG_DRM_FBDEV_EMULATION) += msm_fbdev.o
msm-$(CONFIG_COMMON_CLK) += disp/mdp4/mdp4_lvds_pll.o
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_dbg.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_dbg.c
deleted file mode 100644
index ae2aee7ed9e1..000000000000
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_dbg.c
+++ /dev/null
@@ -1,2393 +0,0 @@
-/* Copyright (c) 2009-2018, The Linux Foundation. All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 and
- * only version 2 as published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#define pr_fmt(fmt) "[drm:%s:%d] " fmt, __func__, __LINE__
-
-#include <linux/delay.h>
-#include <linux/spinlock.h>
-#include <linux/ktime.h>
-#include <linux/debugfs.h>
-#include <linux/uaccess.h>
-#include <linux/dma-buf.h>
-#include <linux/slab.h>
-#include <linux/list_sort.h>
-#include <linux/pm_runtime.h>
-
-#include "dpu_dbg.h"
-#include "disp/dpu1/dpu_hw_catalog.h"
-
-
-#define DEFAULT_DBGBUS_DPU DPU_DBG_DUMP_IN_MEM
-#define DEFAULT_DBGBUS_VBIFRT DPU_DBG_DUMP_IN_MEM
-#define REG_BASE_NAME_LEN 80
-
-#define DBGBUS_FLAGS_DSPP BIT(0)
-#define DBGBUS_DSPP_STATUS 0x34C
-
-#define DBGBUS_NAME_DPU "dpu"
-#define DBGBUS_NAME_VBIF_RT "vbif_rt"
-
-/* offsets from dpu top address for the debug buses */
-#define DBGBUS_SSPP0 0x188
-#define DBGBUS_AXI_INTF 0x194
-#define DBGBUS_SSPP1 0x298
-#define DBGBUS_DSPP 0x348
-#define DBGBUS_PERIPH 0x418
-
-#define TEST_MASK(id, tp) ((id << 4) | (tp << 1) | BIT(0))
-
-/* following offsets are with respect to MDP VBIF base for DBG BUS access */
-#define MMSS_VBIF_CLKON 0x4
-#define MMSS_VBIF_TEST_BUS_OUT_CTRL 0x210
-#define MMSS_VBIF_TEST_BUS_OUT 0x230
-
-/* Vbif error info */
-#define MMSS_VBIF_PND_ERR 0x190
-#define MMSS_VBIF_SRC_ERR 0x194
-#define MMSS_VBIF_XIN_HALT_CTRL1 0x204
-#define MMSS_VBIF_ERR_INFO 0X1a0
-#define MMSS_VBIF_ERR_INFO_1 0x1a4
-#define MMSS_VBIF_CLIENT_NUM 14
-
-/**
- * struct dpu_dbg_reg_base - register region base.
- * may sub-ranges: sub-ranges are used for dumping
- * or may not have sub-ranges: dumping is base -> max_offset
- * @reg_base_head: head of this node
- * @name: register base name
- * @base: base pointer
- * @off: cached offset of region for manual register dumping
- * @cnt: cached range of region for manual register dumping
- * @max_offset: length of region
- * @buf: buffer used for manual register dumping
- * @buf_len: buffer length used for manual register dumping
- * @cb: callback for external dump function, null if not defined
- * @cb_ptr: private pointer to callback function
- */
-struct dpu_dbg_reg_base {
- struct list_head reg_base_head;
- char name[REG_BASE_NAME_LEN];
- void __iomem *base;
- size_t off;
- size_t cnt;
- size_t max_offset;
- char *buf;
- size_t buf_len;
- void (*cb)(void *ptr);
- void *cb_ptr;
-};
-
-struct dpu_debug_bus_entry {
- u32 wr_addr;
- u32 block_id;
- u32 test_id;
- void (*analyzer)(void __iomem *mem_base,
- struct dpu_debug_bus_entry *entry, u32 val);
-};
-
-struct vbif_debug_bus_entry {
- u32 disable_bus_addr;
- u32 block_bus_addr;
- u32 bit_offset;
- u32 block_cnt;
- u32 test_pnt_start;
- u32 test_pnt_cnt;
-};
-
-struct dpu_dbg_debug_bus_common {
- char *name;
- u32 enable_mask;
- bool include_in_deferred_work;
- u32 flags;
- u32 entries_size;
- u32 *dumped_content;
-};
-
-struct dpu_dbg_dpu_debug_bus {
- struct dpu_dbg_debug_bus_common cmn;
- struct dpu_debug_bus_entry *entries;
- u32 top_blk_off;
-};
-
-struct dpu_dbg_vbif_debug_bus {
- struct dpu_dbg_debug_bus_common cmn;
- struct vbif_debug_bus_entry *entries;
-};
-
-/**
- * struct dpu_dbg_base - global dpu debug base structure
- * @reg_base_list: list of register dumping regions
- * @dev: device pointer
- * @dump_work: work struct for deferring register dump work to separate thread
- * @dbgbus_dpu: debug bus structure for the dpu
- * @dbgbus_vbif_rt: debug bus structure for the realtime vbif
- */
-static struct dpu_dbg_base {
- struct list_head reg_base_list;
- struct device *dev;
-
- struct work_struct dump_work;
-
- struct dpu_dbg_dpu_debug_bus dbgbus_dpu;
- struct dpu_dbg_vbif_debug_bus dbgbus_vbif_rt;
-} dpu_dbg_base;
-
-static void _dpu_debug_bus_xbar_dump(void __iomem *mem_base,
- struct dpu_debug_bus_entry *entry, u32 val)
-{
- dev_err(dpu_dbg_base.dev, "xbar 0x%x %d %d 0x%x\n",
- entry->wr_addr, entry->block_id, entry->test_id, val);
-}
-
-static void _dpu_debug_bus_lm_dump(void __iomem *mem_base,
- struct dpu_debug_bus_entry *entry, u32 val)
-{
- if (!(val & 0xFFF000))
- return;
-
- dev_err(dpu_dbg_base.dev, "lm 0x%x %d %d 0x%x\n",
- entry->wr_addr, entry->block_id, entry->test_id, val);
-}
-
-static void _dpu_debug_bus_ppb0_dump(void __iomem *mem_base,
- struct dpu_debug_bus_entry *entry, u32 val)
-{
- if (!(val & BIT(15)))
- return;
-
- dev_err(dpu_dbg_base.dev, "ppb0 0x%x %d %d 0x%x\n",
- entry->wr_addr, entry->block_id, entry->test_id, val);
-}
-
-static void _dpu_debug_bus_ppb1_dump(void __iomem *mem_base,
- struct dpu_debug_bus_entry *entry, u32 val)
-{
- if (!(val & BIT(15)))
- return;
-
- dev_err(dpu_dbg_base.dev, "ppb1 0x%x %d %d 0x%x\n",
- entry->wr_addr, entry->block_id, entry->test_id, val);
-}
-
-static struct dpu_debug_bus_entry dbg_bus_dpu_8998[] = {
-
- /* Unpack 0 sspp 0*/
- { DBGBUS_SSPP0, 50, 2 },
- { DBGBUS_SSPP0, 60, 2 },
- { DBGBUS_SSPP0, 70, 2 },
- { DBGBUS_SSPP0, 85, 2 },
-
- /* Upack 0 sspp 1*/
- { DBGBUS_SSPP1, 50, 2 },
- { DBGBUS_SSPP1, 60, 2 },
- { DBGBUS_SSPP1, 70, 2 },
- { DBGBUS_SSPP1, 85, 2 },
-
- /* scheduler */
- { DBGBUS_DSPP, 130, 0 },
- { DBGBUS_DSPP, 130, 1 },
- { DBGBUS_DSPP, 130, 2 },
- { DBGBUS_DSPP, 130, 3 },
- { DBGBUS_DSPP, 130, 4 },
- { DBGBUS_DSPP, 130, 5 },
-
- /* qseed */
- { DBGBUS_SSPP0, 6, 0},
- { DBGBUS_SSPP0, 6, 1},
- { DBGBUS_SSPP0, 26, 0},
- { DBGBUS_SSPP0, 26, 1},
- { DBGBUS_SSPP1, 6, 0},
- { DBGBUS_SSPP1, 6, 1},
- { DBGBUS_SSPP1, 26, 0},
- { DBGBUS_SSPP1, 26, 1},
-
- /* scale */
- { DBGBUS_SSPP0, 16, 0},
- { DBGBUS_SSPP0, 16, 1},
- { DBGBUS_SSPP0, 36, 0},
- { DBGBUS_SSPP0, 36, 1},
- { DBGBUS_SSPP1, 16, 0},
- { DBGBUS_SSPP1, 16, 1},
- { DBGBUS_SSPP1, 36, 0},
- { DBGBUS_SSPP1, 36, 1},
-
- /* fetch sspp0 */
-
- /* vig 0 */
- { DBGBUS_SSPP0, 0, 0 },
- { DBGBUS_SSPP0, 0, 1 },
- { DBGBUS_SSPP0, 0, 2 },
- { DBGBUS_SSPP0, 0, 3 },
- { DBGBUS_SSPP0, 0, 4 },
- { DBGBUS_SSPP0, 0, 5 },
- { DBGBUS_SSPP0, 0, 6 },
- { DBGBUS_SSPP0, 0, 7 },
-
- { DBGBUS_SSPP0, 1, 0 },
- { DBGBUS_SSPP0, 1, 1 },
- { DBGBUS_SSPP0, 1, 2 },
- { DBGBUS_SSPP0, 1, 3 },
- { DBGBUS_SSPP0, 1, 4 },
- { DBGBUS_SSPP0, 1, 5 },
- { DBGBUS_SSPP0, 1, 6 },
- { DBGBUS_SSPP0, 1, 7 },
-
- { DBGBUS_SSPP0, 2, 0 },
- { DBGBUS_SSPP0, 2, 1 },
- { DBGBUS_SSPP0, 2, 2 },
- { DBGBUS_SSPP0, 2, 3 },
- { DBGBUS_SSPP0, 2, 4 },
- { DBGBUS_SSPP0, 2, 5 },
- { DBGBUS_SSPP0, 2, 6 },
- { DBGBUS_SSPP0, 2, 7 },
-
- { DBGBUS_SSPP0, 4, 0 },
- { DBGBUS_SSPP0, 4, 1 },
- { DBGBUS_SSPP0, 4, 2 },
- { DBGBUS_SSPP0, 4, 3 },
- { DBGBUS_SSPP0, 4, 4 },
- { DBGBUS_SSPP0, 4, 5 },
- { DBGBUS_SSPP0, 4, 6 },
- { DBGBUS_SSPP0, 4, 7 },
-
- { DBGBUS_SSPP0, 5, 0 },
- { DBGBUS_SSPP0, 5, 1 },
- { DBGBUS_SSPP0, 5, 2 },
- { DBGBUS_SSPP0, 5, 3 },
- { DBGBUS_SSPP0, 5, 4 },
- { DBGBUS_SSPP0, 5, 5 },
- { DBGBUS_SSPP0, 5, 6 },
- { DBGBUS_SSPP0, 5, 7 },
-
- /* vig 2 */
- { DBGBUS_SSPP0, 20, 0 },
- { DBGBUS_SSPP0, 20, 1 },
- { DBGBUS_SSPP0, 20, 2 },
- { DBGBUS_SSPP0, 20, 3 },
- { DBGBUS_SSPP0, 20, 4 },
- { DBGBUS_SSPP0, 20, 5 },
- { DBGBUS_SSPP0, 20, 6 },
- { DBGBUS_SSPP0, 20, 7 },
-
- { DBGBUS_SSPP0, 21, 0 },
- { DBGBUS_SSPP0, 21, 1 },
- { DBGBUS_SSPP0, 21, 2 },
- { DBGBUS_SSPP0, 21, 3 },
- { DBGBUS_SSPP0, 21, 4 },
- { DBGBUS_SSPP0, 21, 5 },
- { DBGBUS_SSPP0, 21, 6 },
- { DBGBUS_SSPP0, 21, 7 },
-
- { DBGBUS_SSPP0, 22, 0 },
- { DBGBUS_SSPP0, 22, 1 },
- { DBGBUS_SSPP0, 22, 2 },
- { DBGBUS_SSPP0, 22, 3 },
- { DBGBUS_SSPP0, 22, 4 },
- { DBGBUS_SSPP0, 22, 5 },
- { DBGBUS_SSPP0, 22, 6 },
- { DBGBUS_SSPP0, 22, 7 },
-
- { DBGBUS_SSPP0, 24, 0 },
- { DBGBUS_SSPP0, 24, 1 },
- { DBGBUS_SSPP0, 24, 2 },
- { DBGBUS_SSPP0, 24, 3 },
- { DBGBUS_SSPP0, 24, 4 },
- { DBGBUS_SSPP0, 24, 5 },
- { DBGBUS_SSPP0, 24, 6 },
- { DBGBUS_SSPP0, 24, 7 },
-
- { DBGBUS_SSPP0, 25, 0 },
- { DBGBUS_SSPP0, 25, 1 },
- { DBGBUS_SSPP0, 25, 2 },
- { DBGBUS_SSPP0, 25, 3 },
- { DBGBUS_SSPP0, 25, 4 },
- { DBGBUS_SSPP0, 25, 5 },
- { DBGBUS_SSPP0, 25, 6 },
- { DBGBUS_SSPP0, 25, 7 },
-
- /* dma 2 */
- { DBGBUS_SSPP0, 30, 0 },
- { DBGBUS_SSPP0, 30, 1 },
- { DBGBUS_SSPP0, 30, 2 },
- { DBGBUS_SSPP0, 30, 3 },
- { DBGBUS_SSPP0, 30, 4 },
- { DBGBUS_SSPP0, 30, 5 },
- { DBGBUS_SSPP0, 30, 6 },
- { DBGBUS_SSPP0, 30, 7 },
-
- { DBGBUS_SSPP0, 31, 0 },
- { DBGBUS_SSPP0, 31, 1 },
- { DBGBUS_SSPP0, 31, 2 },
- { DBGBUS_SSPP0, 31, 3 },
- { DBGBUS_SSPP0, 31, 4 },
- { DBGBUS_SSPP0, 31, 5 },
- { DBGBUS_SSPP0, 31, 6 },
- { DBGBUS_SSPP0, 31, 7 },
-
- { DBGBUS_SSPP0, 32, 0 },
- { DBGBUS_SSPP0, 32, 1 },
- { DBGBUS_SSPP0, 32, 2 },
- { DBGBUS_SSPP0, 32, 3 },
- { DBGBUS_SSPP0, 32, 4 },
- { DBGBUS_SSPP0, 32, 5 },
- { DBGBUS_SSPP0, 32, 6 },
- { DBGBUS_SSPP0, 32, 7 },
-
- { DBGBUS_SSPP0, 33, 0 },
- { DBGBUS_SSPP0, 33, 1 },
- { DBGBUS_SSPP0, 33, 2 },
- { DBGBUS_SSPP0, 33, 3 },
- { DBGBUS_SSPP0, 33, 4 },
- { DBGBUS_SSPP0, 33, 5 },
- { DBGBUS_SSPP0, 33, 6 },
- { DBGBUS_SSPP0, 33, 7 },
-
- { DBGBUS_SSPP0, 34, 0 },
- { DBGBUS_SSPP0, 34, 1 },
- { DBGBUS_SSPP0, 34, 2 },
- { DBGBUS_SSPP0, 34, 3 },
- { DBGBUS_SSPP0, 34, 4 },
- { DBGBUS_SSPP0, 34, 5 },
- { DBGBUS_SSPP0, 34, 6 },
- { DBGBUS_SSPP0, 34, 7 },
-
- { DBGBUS_SSPP0, 35, 0 },
- { DBGBUS_SSPP0, 35, 1 },
- { DBGBUS_SSPP0, 35, 2 },
- { DBGBUS_SSPP0, 35, 3 },
-
- /* dma 0 */
- { DBGBUS_SSPP0, 40, 0 },
- { DBGBUS_SSPP0, 40, 1 },
- { DBGBUS_SSPP0, 40, 2 },
- { DBGBUS_SSPP0, 40, 3 },
- { DBGBUS_SSPP0, 40, 4 },
- { DBGBUS_SSPP0, 40, 5 },
- { DBGBUS_SSPP0, 40, 6 },
- { DBGBUS_SSPP0, 40, 7 },
-
- { DBGBUS_SSPP0, 41, 0 },
- { DBGBUS_SSPP0, 41, 1 },
- { DBGBUS_SSPP0, 41, 2 },
- { DBGBUS_SSPP0, 41, 3 },
- { DBGBUS_SSPP0, 41, 4 },
- { DBGBUS_SSPP0, 41, 5 },
- { DBGBUS_SSPP0, 41, 6 },
- { DBGBUS_SSPP0, 41, 7 },
-
- { DBGBUS_SSPP0, 42, 0 },
- { DBGBUS_SSPP0, 42, 1 },
- { DBGBUS_SSPP0, 42, 2 },
- { DBGBUS_SSPP0, 42, 3 },
- { DBGBUS_SSPP0, 42, 4 },
- { DBGBUS_SSPP0, 42, 5 },
- { DBGBUS_SSPP0, 42, 6 },
- { DBGBUS_SSPP0, 42, 7 },
-
- { DBGBUS_SSPP0, 44, 0 },
- { DBGBUS_SSPP0, 44, 1 },
- { DBGBUS_SSPP0, 44, 2 },
- { DBGBUS_SSPP0, 44, 3 },
- { DBGBUS_SSPP0, 44, 4 },
- { DBGBUS_SSPP0, 44, 5 },
- { DBGBUS_SSPP0, 44, 6 },
- { DBGBUS_SSPP0, 44, 7 },
-
- { DBGBUS_SSPP0, 45, 0 },
- { DBGBUS_SSPP0, 45, 1 },
- { DBGBUS_SSPP0, 45, 2 },
- { DBGBUS_SSPP0, 45, 3 },
- { DBGBUS_SSPP0, 45, 4 },
- { DBGBUS_SSPP0, 45, 5 },
- { DBGBUS_SSPP0, 45, 6 },
- { DBGBUS_SSPP0, 45, 7 },
-
- /* fetch sspp1 */
- /* vig 1 */
- { DBGBUS_SSPP1, 0, 0 },
- { DBGBUS_SSPP1, 0, 1 },
- { DBGBUS_SSPP1, 0, 2 },
- { DBGBUS_SSPP1, 0, 3 },
- { DBGBUS_SSPP1, 0, 4 },
- { DBGBUS_SSPP1, 0, 5 },
- { DBGBUS_SSPP1, 0, 6 },
- { DBGBUS_SSPP1, 0, 7 },
-
- { DBGBUS_SSPP1, 1, 0 },
- { DBGBUS_SSPP1, 1, 1 },
- { DBGBUS_SSPP1, 1, 2 },
- { DBGBUS_SSPP1, 1, 3 },
- { DBGBUS_SSPP1, 1, 4 },
- { DBGBUS_SSPP1, 1, 5 },
- { DBGBUS_SSPP1, 1, 6 },
- { DBGBUS_SSPP1, 1, 7 },
-
- { DBGBUS_SSPP1, 2, 0 },
- { DBGBUS_SSPP1, 2, 1 },
- { DBGBUS_SSPP1, 2, 2 },
- { DBGBUS_SSPP1, 2, 3 },
- { DBGBUS_SSPP1, 2, 4 },
- { DBGBUS_SSPP1, 2, 5 },
- { DBGBUS_SSPP1, 2, 6 },
- { DBGBUS_SSPP1, 2, 7 },
-
- { DBGBUS_SSPP1, 4, 0 },
- { DBGBUS_SSPP1, 4, 1 },
- { DBGBUS_SSPP1, 4, 2 },
- { DBGBUS_SSPP1, 4, 3 },
- { DBGBUS_SSPP1, 4, 4 },
- { DBGBUS_SSPP1, 4, 5 },
- { DBGBUS_SSPP1, 4, 6 },
- { DBGBUS_SSPP1, 4, 7 },
-
- { DBGBUS_SSPP1, 5, 0 },
- { DBGBUS_SSPP1, 5, 1 },
- { DBGBUS_SSPP1, 5, 2 },
- { DBGBUS_SSPP1, 5, 3 },
- { DBGBUS_SSPP1, 5, 4 },
- { DBGBUS_SSPP1, 5, 5 },
- { DBGBUS_SSPP1, 5, 6 },
- { DBGBUS_SSPP1, 5, 7 },
-
- /* vig 3 */
- { DBGBUS_SSPP1, 20, 0 },
- { DBGBUS_SSPP1, 20, 1 },
- { DBGBUS_SSPP1, 20, 2 },
- { DBGBUS_SSPP1, 20, 3 },
- { DBGBUS_SSPP1, 20, 4 },
- { DBGBUS_SSPP1, 20, 5 },
- { DBGBUS_SSPP1, 20, 6 },
- { DBGBUS_SSPP1, 20, 7 },
-
- { DBGBUS_SSPP1, 21, 0 },
- { DBGBUS_SSPP1, 21, 1 },
- { DBGBUS_SSPP1, 21, 2 },
- { DBGBUS_SSPP1, 21, 3 },
- { DBGBUS_SSPP1, 21, 4 },
- { DBGBUS_SSPP1, 21, 5 },
- { DBGBUS_SSPP1, 21, 6 },
- { DBGBUS_SSPP1, 21, 7 },
-
- { DBGBUS_SSPP1, 22, 0 },
- { DBGBUS_SSPP1, 22, 1 },
- { DBGBUS_SSPP1, 22, 2 },
- { DBGBUS_SSPP1, 22, 3 },
- { DBGBUS_SSPP1, 22, 4 },
- { DBGBUS_SSPP1, 22, 5 },
- { DBGBUS_SSPP1, 22, 6 },
- { DBGBUS_SSPP1, 22, 7 },
-
- { DBGBUS_SSPP1, 24, 0 },
- { DBGBUS_SSPP1, 24, 1 },
- { DBGBUS_SSPP1, 24, 2 },
- { DBGBUS_SSPP1, 24, 3 },
- { DBGBUS_SSPP1, 24, 4 },
- { DBGBUS_SSPP1, 24, 5 },
- { DBGBUS_SSPP1, 24, 6 },
- { DBGBUS_SSPP1, 24, 7 },
-
- { DBGBUS_SSPP1, 25, 0 },
- { DBGBUS_SSPP1, 25, 1 },
- { DBGBUS_SSPP1, 25, 2 },
- { DBGBUS_SSPP1, 25, 3 },
- { DBGBUS_SSPP1, 25, 4 },
- { DBGBUS_SSPP1, 25, 5 },
- { DBGBUS_SSPP1, 25, 6 },
- { DBGBUS_SSPP1, 25, 7 },
-
- /* dma 3 */
- { DBGBUS_SSPP1, 30, 0 },
- { DBGBUS_SSPP1, 30, 1 },
- { DBGBUS_SSPP1, 30, 2 },
- { DBGBUS_SSPP1, 30, 3 },
- { DBGBUS_SSPP1, 30, 4 },
- { DBGBUS_SSPP1, 30, 5 },
- { DBGBUS_SSPP1, 30, 6 },
- { DBGBUS_SSPP1, 30, 7 },
-
- { DBGBUS_SSPP1, 31, 0 },
- { DBGBUS_SSPP1, 31, 1 },
- { DBGBUS_SSPP1, 31, 2 },
- { DBGBUS_SSPP1, 31, 3 },
- { DBGBUS_SSPP1, 31, 4 },
- { DBGBUS_SSPP1, 31, 5 },
- { DBGBUS_SSPP1, 31, 6 },
- { DBGBUS_SSPP1, 31, 7 },
-
- { DBGBUS_SSPP1, 32, 0 },
- { DBGBUS_SSPP1, 32, 1 },
- { DBGBUS_SSPP1, 32, 2 },
- { DBGBUS_SSPP1, 32, 3 },
- { DBGBUS_SSPP1, 32, 4 },
- { DBGBUS_SSPP1, 32, 5 },
- { DBGBUS_SSPP1, 32, 6 },
- { DBGBUS_SSPP1, 32, 7 },
-
- { DBGBUS_SSPP1, 33, 0 },
- { DBGBUS_SSPP1, 33, 1 },
- { DBGBUS_SSPP1, 33, 2 },
- { DBGBUS_SSPP1, 33, 3 },
- { DBGBUS_SSPP1, 33, 4 },
- { DBGBUS_SSPP1, 33, 5 },
- { DBGBUS_SSPP1, 33, 6 },
- { DBGBUS_SSPP1, 33, 7 },
-
- { DBGBUS_SSPP1, 34, 0 },
- { DBGBUS_SSPP1, 34, 1 },
- { DBGBUS_SSPP1, 34, 2 },
- { DBGBUS_SSPP1, 34, 3 },
- { DBGBUS_SSPP1, 34, 4 },
- { DBGBUS_SSPP1, 34, 5 },
- { DBGBUS_SSPP1, 34, 6 },
- { DBGBUS_SSPP1, 34, 7 },
-
- { DBGBUS_SSPP1, 35, 0 },
- { DBGBUS_SSPP1, 35, 1 },
- { DBGBUS_SSPP1, 35, 2 },
-
- /* dma 1 */
- { DBGBUS_SSPP1, 40, 0 },
- { DBGBUS_SSPP1, 40, 1 },
- { DBGBUS_SSPP1, 40, 2 },
- { DBGBUS_SSPP1, 40, 3 },
- { DBGBUS_SSPP1, 40, 4 },
- { DBGBUS_SSPP1, 40, 5 },
- { DBGBUS_SSPP1, 40, 6 },
- { DBGBUS_SSPP1, 40, 7 },
-
- { DBGBUS_SSPP1, 41, 0 },
- { DBGBUS_SSPP1, 41, 1 },
- { DBGBUS_SSPP1, 41, 2 },
- { DBGBUS_SSPP1, 41, 3 },
- { DBGBUS_SSPP1, 41, 4 },
- { DBGBUS_SSPP1, 41, 5 },
- { DBGBUS_SSPP1, 41, 6 },
- { DBGBUS_SSPP1, 41, 7 },
-
- { DBGBUS_SSPP1, 42, 0 },
- { DBGBUS_SSPP1, 42, 1 },
- { DBGBUS_SSPP1, 42, 2 },
- { DBGBUS_SSPP1, 42, 3 },
- { DBGBUS_SSPP1, 42, 4 },
- { DBGBUS_SSPP1, 42, 5 },
- { DBGBUS_SSPP1, 42, 6 },
- { DBGBUS_SSPP1, 42, 7 },
-
- { DBGBUS_SSPP1, 44, 0 },
- { DBGBUS_SSPP1, 44, 1 },
- { DBGBUS_SSPP1, 44, 2 },
- { DBGBUS_SSPP1, 44, 3 },
- { DBGBUS_SSPP1, 44, 4 },
- { DBGBUS_SSPP1, 44, 5 },
- { DBGBUS_SSPP1, 44, 6 },
- { DBGBUS_SSPP1, 44, 7 },
-
- { DBGBUS_SSPP1, 45, 0 },
- { DBGBUS_SSPP1, 45, 1 },
- { DBGBUS_SSPP1, 45, 2 },
- { DBGBUS_SSPP1, 45, 3 },
- { DBGBUS_SSPP1, 45, 4 },
- { DBGBUS_SSPP1, 45, 5 },
- { DBGBUS_SSPP1, 45, 6 },
- { DBGBUS_SSPP1, 45, 7 },
-
- /* cursor 1 */
- { DBGBUS_SSPP1, 80, 0 },
- { DBGBUS_SSPP1, 80, 1 },
- { DBGBUS_SSPP1, 80, 2 },
- { DBGBUS_SSPP1, 80, 3 },
- { DBGBUS_SSPP1, 80, 4 },
- { DBGBUS_SSPP1, 80, 5 },
- { DBGBUS_SSPP1, 80, 6 },
- { DBGBUS_SSPP1, 80, 7 },
-
- { DBGBUS_SSPP1, 81, 0 },
- { DBGBUS_SSPP1, 81, 1 },
- { DBGBUS_SSPP1, 81, 2 },
- { DBGBUS_SSPP1, 81, 3 },
- { DBGBUS_SSPP1, 81, 4 },
- { DBGBUS_SSPP1, 81, 5 },
- { DBGBUS_SSPP1, 81, 6 },
- { DBGBUS_SSPP1, 81, 7 },
-
- { DBGBUS_SSPP1, 82, 0 },
- { DBGBUS_SSPP1, 82, 1 },
- { DBGBUS_SSPP1, 82, 2 },
- { DBGBUS_SSPP1, 82, 3 },
- { DBGBUS_SSPP1, 82, 4 },
- { DBGBUS_SSPP1, 82, 5 },
- { DBGBUS_SSPP1, 82, 6 },
- { DBGBUS_SSPP1, 82, 7 },
-
- { DBGBUS_SSPP1, 83, 0 },
- { DBGBUS_SSPP1, 83, 1 },
- { DBGBUS_SSPP1, 83, 2 },
- { DBGBUS_SSPP1, 83, 3 },
- { DBGBUS_SSPP1, 83, 4 },
- { DBGBUS_SSPP1, 83, 5 },
- { DBGBUS_SSPP1, 83, 6 },
- { DBGBUS_SSPP1, 83, 7 },
-
- { DBGBUS_SSPP1, 84, 0 },
- { DBGBUS_SSPP1, 84, 1 },
- { DBGBUS_SSPP1, 84, 2 },
- { DBGBUS_SSPP1, 84, 3 },
- { DBGBUS_SSPP1, 84, 4 },
- { DBGBUS_SSPP1, 84, 5 },
- { DBGBUS_SSPP1, 84, 6 },
- { DBGBUS_SSPP1, 84, 7 },
-
- /* dspp */
- { DBGBUS_DSPP, 13, 0 },
- { DBGBUS_DSPP, 19, 0 },
- { DBGBUS_DSPP, 14, 0 },
- { DBGBUS_DSPP, 14, 1 },
- { DBGBUS_DSPP, 14, 3 },
- { DBGBUS_DSPP, 20, 0 },
- { DBGBUS_DSPP, 20, 1 },
- { DBGBUS_DSPP, 20, 3 },
-
- /* ppb_0 */
- { DBGBUS_DSPP, 31, 0, _dpu_debug_bus_ppb0_dump },
- { DBGBUS_DSPP, 33, 0, _dpu_debug_bus_ppb0_dump },
- { DBGBUS_DSPP, 35, 0, _dpu_debug_bus_ppb0_dump },
- { DBGBUS_DSPP, 42, 0, _dpu_debug_bus_ppb0_dump },
-
- /* ppb_1 */
- { DBGBUS_DSPP, 32, 0, _dpu_debug_bus_ppb1_dump },
- { DBGBUS_DSPP, 34, 0, _dpu_debug_bus_ppb1_dump },
- { DBGBUS_DSPP, 36, 0, _dpu_debug_bus_ppb1_dump },
- { DBGBUS_DSPP, 43, 0, _dpu_debug_bus_ppb1_dump },
-
- /* lm_lut */
- { DBGBUS_DSPP, 109, 0 },
- { DBGBUS_DSPP, 105, 0 },
- { DBGBUS_DSPP, 103, 0 },
-
- /* tear-check */
- { DBGBUS_PERIPH, 63, 0 },
- { DBGBUS_PERIPH, 64, 0 },
- { DBGBUS_PERIPH, 65, 0 },
- { DBGBUS_PERIPH, 73, 0 },
- { DBGBUS_PERIPH, 74, 0 },
-
- /* crossbar */
- { DBGBUS_DSPP, 0, 0, _dpu_debug_bus_xbar_dump },
-
- /* rotator */
- { DBGBUS_DSPP, 9, 0},
-
- /* blend */
- /* LM0 */
- { DBGBUS_DSPP, 63, 0},
- { DBGBUS_DSPP, 63, 1},
- { DBGBUS_DSPP, 63, 2},
- { DBGBUS_DSPP, 63, 3},
- { DBGBUS_DSPP, 63, 4},
- { DBGBUS_DSPP, 63, 5},
- { DBGBUS_DSPP, 63, 6},
- { DBGBUS_DSPP, 63, 7, _dpu_debug_bus_lm_dump },
-
- { DBGBUS_DSPP, 64, 0},
- { DBGBUS_DSPP, 64, 1},
- { DBGBUS_DSPP, 64, 2},
- { DBGBUS_DSPP, 64, 3},
- { DBGBUS_DSPP, 64, 4},
- { DBGBUS_DSPP, 64, 5},
- { DBGBUS_DSPP, 64, 6},
- { DBGBUS_DSPP, 64, 7, _dpu_debug_bus_lm_dump },
-
- { DBGBUS_DSPP, 65, 0},
- { DBGBUS_DSPP, 65, 1},
- { DBGBUS_DSPP, 65, 2},
- { DBGBUS_DSPP, 65, 3},
- { DBGBUS_DSPP, 65, 4},
- { DBGBUS_DSPP, 65, 5},
- { DBGBUS_DSPP, 65, 6},
- { DBGBUS_DSPP, 65, 7, _dpu_debug_bus_lm_dump },
-
- { DBGBUS_DSPP, 66, 0},
- { DBGBUS_DSPP, 66, 1},
- { DBGBUS_DSPP, 66, 2},
- { DBGBUS_DSPP, 66, 3},
- { DBGBUS_DSPP, 66, 4},
- { DBGBUS_DSPP, 66, 5},
- { DBGBUS_DSPP, 66, 6},
- { DBGBUS_DSPP, 66, 7, _dpu_debug_bus_lm_dump },
-
- { DBGBUS_DSPP, 67, 0},
- { DBGBUS_DSPP, 67, 1},
- { DBGBUS_DSPP, 67, 2},
- { DBGBUS_DSPP, 67, 3},
- { DBGBUS_DSPP, 67, 4},
- { DBGBUS_DSPP, 67, 5},
- { DBGBUS_DSPP, 67, 6},
- { DBGBUS_DSPP, 67, 7, _dpu_debug_bus_lm_dump },
-
- { DBGBUS_DSPP, 68, 0},
- { DBGBUS_DSPP, 68, 1},
- { DBGBUS_DSPP, 68, 2},
- { DBGBUS_DSPP, 68, 3},
- { DBGBUS_DSPP, 68, 4},
- { DBGBUS_DSPP, 68, 5},
- { DBGBUS_DSPP, 68, 6},
- { DBGBUS_DSPP, 68, 7, _dpu_debug_bus_lm_dump },
-
- { DBGBUS_DSPP, 69, 0},
- { DBGBUS_DSPP, 69, 1},
- { DBGBUS_DSPP, 69, 2},
- { DBGBUS_DSPP, 69, 3},
- { DBGBUS_DSPP, 69, 4},
- { DBGBUS_DSPP, 69, 5},
- { DBGBUS_DSPP, 69, 6},
- { DBGBUS_DSPP, 69, 7, _dpu_debug_bus_lm_dump },
-
- /* LM1 */
- { DBGBUS_DSPP, 70, 0},
- { DBGBUS_DSPP, 70, 1},
- { DBGBUS_DSPP, 70, 2},
- { DBGBUS_DSPP, 70, 3},
- { DBGBUS_DSPP, 70, 4},
- { DBGBUS_DSPP, 70, 5},
- { DBGBUS_DSPP, 70, 6},
- { DBGBUS_DSPP, 70, 7, _dpu_debug_bus_lm_dump },
-
- { DBGBUS_DSPP, 71, 0},
- { DBGBUS_DSPP, 71, 1},
- { DBGBUS_DSPP, 71, 2},
- { DBGBUS_DSPP, 71, 3},
- { DBGBUS_DSPP, 71, 4},
- { DBGBUS_DSPP, 71, 5},
- { DBGBUS_DSPP, 71, 6},
- { DBGBUS_DSPP, 71, 7, _dpu_debug_bus_lm_dump },
-
- { DBGBUS_DSPP, 72, 0},
- { DBGBUS_DSPP, 72, 1},
- { DBGBUS_DSPP, 72, 2},
- { DBGBUS_DSPP, 72, 3},
- { DBGBUS_DSPP, 72, 4},
- { DBGBUS_DSPP, 72, 5},
- { DBGBUS_DSPP, 72, 6},
- { DBGBUS_DSPP, 72, 7, _dpu_debug_bus_lm_dump },
-
- { DBGBUS_DSPP, 73, 0},
- { DBGBUS_DSPP, 73, 1},
- { DBGBUS_DSPP, 73, 2},
- { DBGBUS_DSPP, 73, 3},
- { DBGBUS_DSPP, 73, 4},
- { DBGBUS_DSPP, 73, 5},
- { DBGBUS_DSPP, 73, 6},
- { DBGBUS_DSPP, 73, 7, _dpu_debug_bus_lm_dump },
-
- { DBGBUS_DSPP, 74, 0},
- { DBGBUS_DSPP, 74, 1},
- { DBGBUS_DSPP, 74, 2},
- { DBGBUS_DSPP, 74, 3},
- { DBGBUS_DSPP, 74, 4},
- { DBGBUS_DSPP, 74, 5},
- { DBGBUS_DSPP, 74, 6},
- { DBGBUS_DSPP, 74, 7, _dpu_debug_bus_lm_dump },
-
- { DBGBUS_DSPP, 75, 0},
- { DBGBUS_DSPP, 75, 1},
- { DBGBUS_DSPP, 75, 2},
- { DBGBUS_DSPP, 75, 3},
- { DBGBUS_DSPP, 75, 4},
- { DBGBUS_DSPP, 75, 5},
- { DBGBUS_DSPP, 75, 6},
- { DBGBUS_DSPP, 75, 7, _dpu_debug_bus_lm_dump },
-
- { DBGBUS_DSPP, 76, 0},
- { DBGBUS_DSPP, 76, 1},
- { DBGBUS_DSPP, 76, 2},
- { DBGBUS_DSPP, 76, 3},
- { DBGBUS_DSPP, 76, 4},
- { DBGBUS_DSPP, 76, 5},
- { DBGBUS_DSPP, 76, 6},
- { DBGBUS_DSPP, 76, 7, _dpu_debug_bus_lm_dump },
-
- /* LM2 */
- { DBGBUS_DSPP, 77, 0},
- { DBGBUS_DSPP, 77, 1},
- { DBGBUS_DSPP, 77, 2},
- { DBGBUS_DSPP, 77, 3},
- { DBGBUS_DSPP, 77, 4},
- { DBGBUS_DSPP, 77, 5},
- { DBGBUS_DSPP, 77, 6},
- { DBGBUS_DSPP, 77, 7, _dpu_debug_bus_lm_dump },
-
- { DBGBUS_DSPP, 78, 0},
- { DBGBUS_DSPP, 78, 1},
- { DBGBUS_DSPP, 78, 2},
- { DBGBUS_DSPP, 78, 3},
- { DBGBUS_DSPP, 78, 4},
- { DBGBUS_DSPP, 78, 5},
- { DBGBUS_DSPP, 78, 6},
- { DBGBUS_DSPP, 78, 7, _dpu_debug_bus_lm_dump },
-
- { DBGBUS_DSPP, 79, 0},
- { DBGBUS_DSPP, 79, 1},
- { DBGBUS_DSPP, 79, 2},
- { DBGBUS_DSPP, 79, 3},
- { DBGBUS_DSPP, 79, 4},
- { DBGBUS_DSPP, 79, 5},
- { DBGBUS_DSPP, 79, 6},
- { DBGBUS_DSPP, 79, 7, _dpu_debug_bus_lm_dump },
-
- { DBGBUS_DSPP, 80, 0},
- { DBGBUS_DSPP, 80, 1},
- { DBGBUS_DSPP, 80, 2},
- { DBGBUS_DSPP, 80, 3},
- { DBGBUS_DSPP, 80, 4},
- { DBGBUS_DSPP, 80, 5},
- { DBGBUS_DSPP, 80, 6},
- { DBGBUS_DSPP, 80, 7, _dpu_debug_bus_lm_dump },
-
- { DBGBUS_DSPP, 81, 0},
- { DBGBUS_DSPP, 81, 1},
- { DBGBUS_DSPP, 81, 2},
- { DBGBUS_DSPP, 81, 3},
- { DBGBUS_DSPP, 81, 4},
- { DBGBUS_DSPP, 81, 5},
- { DBGBUS_DSPP, 81, 6},
- { DBGBUS_DSPP, 81, 7, _dpu_debug_bus_lm_dump },
-
- { DBGBUS_DSPP, 82, 0},
- { DBGBUS_DSPP, 82, 1},
- { DBGBUS_DSPP, 82, 2},
- { DBGBUS_DSPP, 82, 3},
- { DBGBUS_DSPP, 82, 4},
- { DBGBUS_DSPP, 82, 5},
- { DBGBUS_DSPP, 82, 6},
- { DBGBUS_DSPP, 82, 7, _dpu_debug_bus_lm_dump },
-
- { DBGBUS_DSPP, 83, 0},
- { DBGBUS_DSPP, 83, 1},
- { DBGBUS_DSPP, 83, 2},
- { DBGBUS_DSPP, 83, 3},
- { DBGBUS_DSPP, 83, 4},
- { DBGBUS_DSPP, 83, 5},
- { DBGBUS_DSPP, 83, 6},
- { DBGBUS_DSPP, 83, 7, _dpu_debug_bus_lm_dump },
-
- /* csc */
- { DBGBUS_SSPP0, 7, 0},
- { DBGBUS_SSPP0, 7, 1},
- { DBGBUS_SSPP0, 27, 0},
- { DBGBUS_SSPP0, 27, 1},
- { DBGBUS_SSPP1, 7, 0},
- { DBGBUS_SSPP1, 7, 1},
- { DBGBUS_SSPP1, 27, 0},
- { DBGBUS_SSPP1, 27, 1},
-
- /* pcc */
- { DBGBUS_SSPP0, 3, 3},
- { DBGBUS_SSPP0, 23, 3},
- { DBGBUS_SSPP0, 33, 3},
- { DBGBUS_SSPP0, 43, 3},
- { DBGBUS_SSPP1, 3, 3},
- { DBGBUS_SSPP1, 23, 3},
- { DBGBUS_SSPP1, 33, 3},
- { DBGBUS_SSPP1, 43, 3},
-
- /* spa */
- { DBGBUS_SSPP0, 8, 0},
- { DBGBUS_SSPP0, 28, 0},
- { DBGBUS_SSPP1, 8, 0},
- { DBGBUS_SSPP1, 28, 0},
- { DBGBUS_DSPP, 13, 0},
- { DBGBUS_DSPP, 19, 0},
-
- /* igc */
- { DBGBUS_SSPP0, 9, 0},
- { DBGBUS_SSPP0, 9, 1},
- { DBGBUS_SSPP0, 9, 3},
- { DBGBUS_SSPP0, 29, 0},
- { DBGBUS_SSPP0, 29, 1},
- { DBGBUS_SSPP0, 29, 3},
- { DBGBUS_SSPP0, 17, 0},
- { DBGBUS_SSPP0, 17, 1},
- { DBGBUS_SSPP0, 17, 3},
- { DBGBUS_SSPP0, 37, 0},
- { DBGBUS_SSPP0, 37, 1},
- { DBGBUS_SSPP0, 37, 3},
- { DBGBUS_SSPP0, 46, 0},
- { DBGBUS_SSPP0, 46, 1},
- { DBGBUS_SSPP0, 46, 3},
-
- { DBGBUS_SSPP1, 9, 0},
- { DBGBUS_SSPP1, 9, 1},
- { DBGBUS_SSPP1, 9, 3},
- { DBGBUS_SSPP1, 29, 0},
- { DBGBUS_SSPP1, 29, 1},
- { DBGBUS_SSPP1, 29, 3},
- { DBGBUS_SSPP1, 17, 0},
- { DBGBUS_SSPP1, 17, 1},
- { DBGBUS_SSPP1, 17, 3},
- { DBGBUS_SSPP1, 37, 0},
- { DBGBUS_SSPP1, 37, 1},
- { DBGBUS_SSPP1, 37, 3},
- { DBGBUS_SSPP1, 46, 0},
- { DBGBUS_SSPP1, 46, 1},
- { DBGBUS_SSPP1, 46, 3},
-
- { DBGBUS_DSPP, 14, 0},
- { DBGBUS_DSPP, 14, 1},
- { DBGBUS_DSPP, 14, 3},
- { DBGBUS_DSPP, 20, 0},
- { DBGBUS_DSPP, 20, 1},
- { DBGBUS_DSPP, 20, 3},
-
- { DBGBUS_PERIPH, 60, 0},
-};
-
-static struct dpu_debug_bus_entry dbg_bus_dpu_sdm845[] = {
-
- /* Unpack 0 sspp 0*/
- { DBGBUS_SSPP0, 50, 2 },
- { DBGBUS_SSPP0, 60, 2 },
- { DBGBUS_SSPP0, 70, 2 },
-
- /* Upack 0 sspp 1*/
- { DBGBUS_SSPP1, 50, 2 },
- { DBGBUS_SSPP1, 60, 2 },
- { DBGBUS_SSPP1, 70, 2 },
-
- /* scheduler */
- { DBGBUS_DSPP, 130, 0 },
- { DBGBUS_DSPP, 130, 1 },
- { DBGBUS_DSPP, 130, 2 },
- { DBGBUS_DSPP, 130, 3 },
- { DBGBUS_DSPP, 130, 4 },
- { DBGBUS_DSPP, 130, 5 },
-
- /* qseed */
- { DBGBUS_SSPP0, 6, 0},
- { DBGBUS_SSPP0, 6, 1},
- { DBGBUS_SSPP0, 26, 0},
- { DBGBUS_SSPP0, 26, 1},
- { DBGBUS_SSPP1, 6, 0},
- { DBGBUS_SSPP1, 6, 1},
- { DBGBUS_SSPP1, 26, 0},
- { DBGBUS_SSPP1, 26, 1},
-
- /* scale */
- { DBGBUS_SSPP0, 16, 0},
- { DBGBUS_SSPP0, 16, 1},
- { DBGBUS_SSPP0, 36, 0},
- { DBGBUS_SSPP0, 36, 1},
- { DBGBUS_SSPP1, 16, 0},
- { DBGBUS_SSPP1, 16, 1},
- { DBGBUS_SSPP1, 36, 0},
- { DBGBUS_SSPP1, 36, 1},
-
- /* fetch sspp0 */
-
- /* vig 0 */
- { DBGBUS_SSPP0, 0, 0 },
- { DBGBUS_SSPP0, 0, 1 },
- { DBGBUS_SSPP0, 0, 2 },
- { DBGBUS_SSPP0, 0, 3 },
- { DBGBUS_SSPP0, 0, 4 },
- { DBGBUS_SSPP0, 0, 5 },
- { DBGBUS_SSPP0, 0, 6 },
- { DBGBUS_SSPP0, 0, 7 },
-
- { DBGBUS_SSPP0, 1, 0 },
- { DBGBUS_SSPP0, 1, 1 },
- { DBGBUS_SSPP0, 1, 2 },
- { DBGBUS_SSPP0, 1, 3 },
- { DBGBUS_SSPP0, 1, 4 },
- { DBGBUS_SSPP0, 1, 5 },
- { DBGBUS_SSPP0, 1, 6 },
- { DBGBUS_SSPP0, 1, 7 },
-
- { DBGBUS_SSPP0, 2, 0 },
- { DBGBUS_SSPP0, 2, 1 },
- { DBGBUS_SSPP0, 2, 2 },
- { DBGBUS_SSPP0, 2, 3 },
- { DBGBUS_SSPP0, 2, 4 },
- { DBGBUS_SSPP0, 2, 5 },
- { DBGBUS_SSPP0, 2, 6 },
- { DBGBUS_SSPP0, 2, 7 },
-
- { DBGBUS_SSPP0, 4, 0 },
- { DBGBUS_SSPP0, 4, 1 },
- { DBGBUS_SSPP0, 4, 2 },
- { DBGBUS_SSPP0, 4, 3 },
- { DBGBUS_SSPP0, 4, 4 },
- { DBGBUS_SSPP0, 4, 5 },
- { DBGBUS_SSPP0, 4, 6 },
- { DBGBUS_SSPP0, 4, 7 },
-
- { DBGBUS_SSPP0, 5, 0 },
- { DBGBUS_SSPP0, 5, 1 },
- { DBGBUS_SSPP0, 5, 2 },
- { DBGBUS_SSPP0, 5, 3 },
- { DBGBUS_SSPP0, 5, 4 },
- { DBGBUS_SSPP0, 5, 5 },
- { DBGBUS_SSPP0, 5, 6 },
- { DBGBUS_SSPP0, 5, 7 },
-
- /* vig 2 */
- { DBGBUS_SSPP0, 20, 0 },
- { DBGBUS_SSPP0, 20, 1 },
- { DBGBUS_SSPP0, 20, 2 },
- { DBGBUS_SSPP0, 20, 3 },
- { DBGBUS_SSPP0, 20, 4 },
- { DBGBUS_SSPP0, 20, 5 },
- { DBGBUS_SSPP0, 20, 6 },
- { DBGBUS_SSPP0, 20, 7 },
-
- { DBGBUS_SSPP0, 21, 0 },
- { DBGBUS_SSPP0, 21, 1 },
- { DBGBUS_SSPP0, 21, 2 },
- { DBGBUS_SSPP0, 21, 3 },
- { DBGBUS_SSPP0, 21, 4 },
- { DBGBUS_SSPP0, 21, 5 },
- { DBGBUS_SSPP0, 21, 6 },
- { DBGBUS_SSPP0, 21, 7 },
-
- { DBGBUS_SSPP0, 22, 0 },
- { DBGBUS_SSPP0, 22, 1 },
- { DBGBUS_SSPP0, 22, 2 },
- { DBGBUS_SSPP0, 22, 3 },
- { DBGBUS_SSPP0, 22, 4 },
- { DBGBUS_SSPP0, 22, 5 },
- { DBGBUS_SSPP0, 22, 6 },
- { DBGBUS_SSPP0, 22, 7 },
-
- { DBGBUS_SSPP0, 24, 0 },
- { DBGBUS_SSPP0, 24, 1 },
- { DBGBUS_SSPP0, 24, 2 },
- { DBGBUS_SSPP0, 24, 3 },
- { DBGBUS_SSPP0, 24, 4 },
- { DBGBUS_SSPP0, 24, 5 },
- { DBGBUS_SSPP0, 24, 6 },
- { DBGBUS_SSPP0, 24, 7 },
-
- { DBGBUS_SSPP0, 25, 0 },
- { DBGBUS_SSPP0, 25, 1 },
- { DBGBUS_SSPP0, 25, 2 },
- { DBGBUS_SSPP0, 25, 3 },
- { DBGBUS_SSPP0, 25, 4 },
- { DBGBUS_SSPP0, 25, 5 },
- { DBGBUS_SSPP0, 25, 6 },
- { DBGBUS_SSPP0, 25, 7 },
-
- /* dma 2 */
- { DBGBUS_SSPP0, 30, 0 },
- { DBGBUS_SSPP0, 30, 1 },
- { DBGBUS_SSPP0, 30, 2 },
- { DBGBUS_SSPP0, 30, 3 },
- { DBGBUS_SSPP0, 30, 4 },
- { DBGBUS_SSPP0, 30, 5 },
- { DBGBUS_SSPP0, 30, 6 },
- { DBGBUS_SSPP0, 30, 7 },
-
- { DBGBUS_SSPP0, 31, 0 },
- { DBGBUS_SSPP0, 31, 1 },
- { DBGBUS_SSPP0, 31, 2 },
- { DBGBUS_SSPP0, 31, 3 },
- { DBGBUS_SSPP0, 31, 4 },
- { DBGBUS_SSPP0, 31, 5 },
- { DBGBUS_SSPP0, 31, 6 },
- { DBGBUS_SSPP0, 31, 7 },
-
- { DBGBUS_SSPP0, 32, 0 },
- { DBGBUS_SSPP0, 32, 1 },
- { DBGBUS_SSPP0, 32, 2 },
- { DBGBUS_SSPP0, 32, 3 },
- { DBGBUS_SSPP0, 32, 4 },
- { DBGBUS_SSPP0, 32, 5 },
- { DBGBUS_SSPP0, 32, 6 },
- { DBGBUS_SSPP0, 32, 7 },
-
- { DBGBUS_SSPP0, 33, 0 },
- { DBGBUS_SSPP0, 33, 1 },
- { DBGBUS_SSPP0, 33, 2 },
- { DBGBUS_SSPP0, 33, 3 },
- { DBGBUS_SSPP0, 33, 4 },
- { DBGBUS_SSPP0, 33, 5 },
- { DBGBUS_SSPP0, 33, 6 },
- { DBGBUS_SSPP0, 33, 7 },
-
- { DBGBUS_SSPP0, 34, 0 },
- { DBGBUS_SSPP0, 34, 1 },
- { DBGBUS_SSPP0, 34, 2 },
- { DBGBUS_SSPP0, 34, 3 },
- { DBGBUS_SSPP0, 34, 4 },
- { DBGBUS_SSPP0, 34, 5 },
- { DBGBUS_SSPP0, 34, 6 },
- { DBGBUS_SSPP0, 34, 7 },
-
- { DBGBUS_SSPP0, 35, 0 },
- { DBGBUS_SSPP0, 35, 1 },
- { DBGBUS_SSPP0, 35, 2 },
- { DBGBUS_SSPP0, 35, 3 },
-
- /* dma 0 */
- { DBGBUS_SSPP0, 40, 0 },
- { DBGBUS_SSPP0, 40, 1 },
- { DBGBUS_SSPP0, 40, 2 },
- { DBGBUS_SSPP0, 40, 3 },
- { DBGBUS_SSPP0, 40, 4 },
- { DBGBUS_SSPP0, 40, 5 },
- { DBGBUS_SSPP0, 40, 6 },
- { DBGBUS_SSPP0, 40, 7 },
-
- { DBGBUS_SSPP0, 41, 0 },
- { DBGBUS_SSPP0, 41, 1 },
- { DBGBUS_SSPP0, 41, 2 },
- { DBGBUS_SSPP0, 41, 3 },
- { DBGBUS_SSPP0, 41, 4 },
- { DBGBUS_SSPP0, 41, 5 },
- { DBGBUS_SSPP0, 41, 6 },
- { DBGBUS_SSPP0, 41, 7 },
-
- { DBGBUS_SSPP0, 42, 0 },
- { DBGBUS_SSPP0, 42, 1 },
- { DBGBUS_SSPP0, 42, 2 },
- { DBGBUS_SSPP0, 42, 3 },
- { DBGBUS_SSPP0, 42, 4 },
- { DBGBUS_SSPP0, 42, 5 },
- { DBGBUS_SSPP0, 42, 6 },
- { DBGBUS_SSPP0, 42, 7 },
-
- { DBGBUS_SSPP0, 44, 0 },
- { DBGBUS_SSPP0, 44, 1 },
- { DBGBUS_SSPP0, 44, 2 },
- { DBGBUS_SSPP0, 44, 3 },
- { DBGBUS_SSPP0, 44, 4 },
- { DBGBUS_SSPP0, 44, 5 },
- { DBGBUS_SSPP0, 44, 6 },
- { DBGBUS_SSPP0, 44, 7 },
-
- { DBGBUS_SSPP0, 45, 0 },
- { DBGBUS_SSPP0, 45, 1 },
- { DBGBUS_SSPP0, 45, 2 },
- { DBGBUS_SSPP0, 45, 3 },
- { DBGBUS_SSPP0, 45, 4 },
- { DBGBUS_SSPP0, 45, 5 },
- { DBGBUS_SSPP0, 45, 6 },
- { DBGBUS_SSPP0, 45, 7 },
-
- /* fetch sspp1 */
- /* vig 1 */
- { DBGBUS_SSPP1, 0, 0 },
- { DBGBUS_SSPP1, 0, 1 },
- { DBGBUS_SSPP1, 0, 2 },
- { DBGBUS_SSPP1, 0, 3 },
- { DBGBUS_SSPP1, 0, 4 },
- { DBGBUS_SSPP1, 0, 5 },
- { DBGBUS_SSPP1, 0, 6 },
- { DBGBUS_SSPP1, 0, 7 },
-
- { DBGBUS_SSPP1, 1, 0 },
- { DBGBUS_SSPP1, 1, 1 },
- { DBGBUS_SSPP1, 1, 2 },
- { DBGBUS_SSPP1, 1, 3 },
- { DBGBUS_SSPP1, 1, 4 },
- { DBGBUS_SSPP1, 1, 5 },
- { DBGBUS_SSPP1, 1, 6 },
- { DBGBUS_SSPP1, 1, 7 },
-
- { DBGBUS_SSPP1, 2, 0 },
- { DBGBUS_SSPP1, 2, 1 },
- { DBGBUS_SSPP1, 2, 2 },
- { DBGBUS_SSPP1, 2, 3 },
- { DBGBUS_SSPP1, 2, 4 },
- { DBGBUS_SSPP1, 2, 5 },
- { DBGBUS_SSPP1, 2, 6 },
- { DBGBUS_SSPP1, 2, 7 },
-
- { DBGBUS_SSPP1, 4, 0 },
- { DBGBUS_SSPP1, 4, 1 },
- { DBGBUS_SSPP1, 4, 2 },
- { DBGBUS_SSPP1, 4, 3 },
- { DBGBUS_SSPP1, 4, 4 },
- { DBGBUS_SSPP1, 4, 5 },
- { DBGBUS_SSPP1, 4, 6 },
- { DBGBUS_SSPP1, 4, 7 },
-
- { DBGBUS_SSPP1, 5, 0 },
- { DBGBUS_SSPP1, 5, 1 },
- { DBGBUS_SSPP1, 5, 2 },
- { DBGBUS_SSPP1, 5, 3 },
- { DBGBUS_SSPP1, 5, 4 },
- { DBGBUS_SSPP1, 5, 5 },
- { DBGBUS_SSPP1, 5, 6 },
- { DBGBUS_SSPP1, 5, 7 },
-
- /* vig 3 */
- { DBGBUS_SSPP1, 20, 0 },
- { DBGBUS_SSPP1, 20, 1 },
- { DBGBUS_SSPP1, 20, 2 },
- { DBGBUS_SSPP1, 20, 3 },
- { DBGBUS_SSPP1, 20, 4 },
- { DBGBUS_SSPP1, 20, 5 },
- { DBGBUS_SSPP1, 20, 6 },
- { DBGBUS_SSPP1, 20, 7 },
-
- { DBGBUS_SSPP1, 21, 0 },
- { DBGBUS_SSPP1, 21, 1 },
- { DBGBUS_SSPP1, 21, 2 },
- { DBGBUS_SSPP1, 21, 3 },
- { DBGBUS_SSPP1, 21, 4 },
- { DBGBUS_SSPP1, 21, 5 },
- { DBGBUS_SSPP1, 21, 6 },
- { DBGBUS_SSPP1, 21, 7 },
-
- { DBGBUS_SSPP1, 22, 0 },
- { DBGBUS_SSPP1, 22, 1 },
- { DBGBUS_SSPP1, 22, 2 },
- { DBGBUS_SSPP1, 22, 3 },
- { DBGBUS_SSPP1, 22, 4 },
- { DBGBUS_SSPP1, 22, 5 },
- { DBGBUS_SSPP1, 22, 6 },
- { DBGBUS_SSPP1, 22, 7 },
-
- { DBGBUS_SSPP1, 24, 0 },
- { DBGBUS_SSPP1, 24, 1 },
- { DBGBUS_SSPP1, 24, 2 },
- { DBGBUS_SSPP1, 24, 3 },
- { DBGBUS_SSPP1, 24, 4 },
- { DBGBUS_SSPP1, 24, 5 },
- { DBGBUS_SSPP1, 24, 6 },
- { DBGBUS_SSPP1, 24, 7 },
-
- { DBGBUS_SSPP1, 25, 0 },
- { DBGBUS_SSPP1, 25, 1 },
- { DBGBUS_SSPP1, 25, 2 },
- { DBGBUS_SSPP1, 25, 3 },
- { DBGBUS_SSPP1, 25, 4 },
- { DBGBUS_SSPP1, 25, 5 },
- { DBGBUS_SSPP1, 25, 6 },
- { DBGBUS_SSPP1, 25, 7 },
-
- /* dma 3 */
- { DBGBUS_SSPP1, 30, 0 },
- { DBGBUS_SSPP1, 30, 1 },
- { DBGBUS_SSPP1, 30, 2 },
- { DBGBUS_SSPP1, 30, 3 },
- { DBGBUS_SSPP1, 30, 4 },
- { DBGBUS_SSPP1, 30, 5 },
- { DBGBUS_SSPP1, 30, 6 },
- { DBGBUS_SSPP1, 30, 7 },
-
- { DBGBUS_SSPP1, 31, 0 },
- { DBGBUS_SSPP1, 31, 1 },
- { DBGBUS_SSPP1, 31, 2 },
- { DBGBUS_SSPP1, 31, 3 },
- { DBGBUS_SSPP1, 31, 4 },
- { DBGBUS_SSPP1, 31, 5 },
- { DBGBUS_SSPP1, 31, 6 },
- { DBGBUS_SSPP1, 31, 7 },
-
- { DBGBUS_SSPP1, 32, 0 },
- { DBGBUS_SSPP1, 32, 1 },
- { DBGBUS_SSPP1, 32, 2 },
- { DBGBUS_SSPP1, 32, 3 },
- { DBGBUS_SSPP1, 32, 4 },
- { DBGBUS_SSPP1, 32, 5 },
- { DBGBUS_SSPP1, 32, 6 },
- { DBGBUS_SSPP1, 32, 7 },
-
- { DBGBUS_SSPP1, 33, 0 },
- { DBGBUS_SSPP1, 33, 1 },
- { DBGBUS_SSPP1, 33, 2 },
- { DBGBUS_SSPP1, 33, 3 },
- { DBGBUS_SSPP1, 33, 4 },
- { DBGBUS_SSPP1, 33, 5 },
- { DBGBUS_SSPP1, 33, 6 },
- { DBGBUS_SSPP1, 33, 7 },
-
- { DBGBUS_SSPP1, 34, 0 },
- { DBGBUS_SSPP1, 34, 1 },
- { DBGBUS_SSPP1, 34, 2 },
- { DBGBUS_SSPP1, 34, 3 },
- { DBGBUS_SSPP1, 34, 4 },
- { DBGBUS_SSPP1, 34, 5 },
- { DBGBUS_SSPP1, 34, 6 },
- { DBGBUS_SSPP1, 34, 7 },
-
- { DBGBUS_SSPP1, 35, 0 },
- { DBGBUS_SSPP1, 35, 1 },
- { DBGBUS_SSPP1, 35, 2 },
-
- /* dma 1 */
- { DBGBUS_SSPP1, 40, 0 },
- { DBGBUS_SSPP1, 40, 1 },
- { DBGBUS_SSPP1, 40, 2 },
- { DBGBUS_SSPP1, 40, 3 },
- { DBGBUS_SSPP1, 40, 4 },
- { DBGBUS_SSPP1, 40, 5 },
- { DBGBUS_SSPP1, 40, 6 },
- { DBGBUS_SSPP1, 40, 7 },
-
- { DBGBUS_SSPP1, 41, 0 },
- { DBGBUS_SSPP1, 41, 1 },
- { DBGBUS_SSPP1, 41, 2 },
- { DBGBUS_SSPP1, 41, 3 },
- { DBGBUS_SSPP1, 41, 4 },
- { DBGBUS_SSPP1, 41, 5 },
- { DBGBUS_SSPP1, 41, 6 },
- { DBGBUS_SSPP1, 41, 7 },
-
- { DBGBUS_SSPP1, 42, 0 },
- { DBGBUS_SSPP1, 42, 1 },
- { DBGBUS_SSPP1, 42, 2 },
- { DBGBUS_SSPP1, 42, 3 },
- { DBGBUS_SSPP1, 42, 4 },
- { DBGBUS_SSPP1, 42, 5 },
- { DBGBUS_SSPP1, 42, 6 },
- { DBGBUS_SSPP1, 42, 7 },
-
- { DBGBUS_SSPP1, 44, 0 },
- { DBGBUS_SSPP1, 44, 1 },
- { DBGBUS_SSPP1, 44, 2 },
- { DBGBUS_SSPP1, 44, 3 },
- { DBGBUS_SSPP1, 44, 4 },
- { DBGBUS_SSPP1, 44, 5 },
- { DBGBUS_SSPP1, 44, 6 },
- { DBGBUS_SSPP1, 44, 7 },
-
- { DBGBUS_SSPP1, 45, 0 },
- { DBGBUS_SSPP1, 45, 1 },
- { DBGBUS_SSPP1, 45, 2 },
- { DBGBUS_SSPP1, 45, 3 },
- { DBGBUS_SSPP1, 45, 4 },
- { DBGBUS_SSPP1, 45, 5 },
- { DBGBUS_SSPP1, 45, 6 },
- { DBGBUS_SSPP1, 45, 7 },
-
- /* dspp */
- { DBGBUS_DSPP, 13, 0 },
- { DBGBUS_DSPP, 19, 0 },
- { DBGBUS_DSPP, 14, 0 },
- { DBGBUS_DSPP, 14, 1 },
- { DBGBUS_DSPP, 14, 3 },
- { DBGBUS_DSPP, 20, 0 },
- { DBGBUS_DSPP, 20, 1 },
- { DBGBUS_DSPP, 20, 3 },
-
- /* ppb_0 */
- { DBGBUS_DSPP, 31, 0, _dpu_debug_bus_ppb0_dump },
- { DBGBUS_DSPP, 33, 0, _dpu_debug_bus_ppb0_dump },
- { DBGBUS_DSPP, 35, 0, _dpu_debug_bus_ppb0_dump },
- { DBGBUS_DSPP, 42, 0, _dpu_debug_bus_ppb0_dump },
-
- /* ppb_1 */
- { DBGBUS_DSPP, 32, 0, _dpu_debug_bus_ppb1_dump },
- { DBGBUS_DSPP, 34, 0, _dpu_debug_bus_ppb1_dump },
- { DBGBUS_DSPP, 36, 0, _dpu_debug_bus_ppb1_dump },
- { DBGBUS_DSPP, 43, 0, _dpu_debug_bus_ppb1_dump },
-
- /* lm_lut */
- { DBGBUS_DSPP, 109, 0 },
- { DBGBUS_DSPP, 105, 0 },
- { DBGBUS_DSPP, 103, 0 },
-
- /* crossbar */
- { DBGBUS_DSPP, 0, 0, _dpu_debug_bus_xbar_dump },
-
- /* rotator */
- { DBGBUS_DSPP, 9, 0},
-
- /* blend */
- /* LM0 */
- { DBGBUS_DSPP, 63, 1},
- { DBGBUS_DSPP, 63, 2},
- { DBGBUS_DSPP, 63, 3},
- { DBGBUS_DSPP, 63, 4},
- { DBGBUS_DSPP, 63, 5},
- { DBGBUS_DSPP, 63, 6},
- { DBGBUS_DSPP, 63, 7, _dpu_debug_bus_lm_dump },
-
- { DBGBUS_DSPP, 64, 1},
- { DBGBUS_DSPP, 64, 2},
- { DBGBUS_DSPP, 64, 3},
- { DBGBUS_DSPP, 64, 4},
- { DBGBUS_DSPP, 64, 5},
- { DBGBUS_DSPP, 64, 6},
- { DBGBUS_DSPP, 64, 7, _dpu_debug_bus_lm_dump },
-
- { DBGBUS_DSPP, 65, 1},
- { DBGBUS_DSPP, 65, 2},
- { DBGBUS_DSPP, 65, 3},
- { DBGBUS_DSPP, 65, 4},
- { DBGBUS_DSPP, 65, 5},
- { DBGBUS_DSPP, 65, 6},
- { DBGBUS_DSPP, 65, 7, _dpu_debug_bus_lm_dump },
-
- { DBGBUS_DSPP, 66, 1},
- { DBGBUS_DSPP, 66, 2},
- { DBGBUS_DSPP, 66, 3},
- { DBGBUS_DSPP, 66, 4},
- { DBGBUS_DSPP, 66, 5},
- { DBGBUS_DSPP, 66, 6},
- { DBGBUS_DSPP, 66, 7, _dpu_debug_bus_lm_dump },
-
- { DBGBUS_DSPP, 67, 1},
- { DBGBUS_DSPP, 67, 2},
- { DBGBUS_DSPP, 67, 3},
- { DBGBUS_DSPP, 67, 4},
- { DBGBUS_DSPP, 67, 5},
- { DBGBUS_DSPP, 67, 6},
- { DBGBUS_DSPP, 67, 7, _dpu_debug_bus_lm_dump },
-
- { DBGBUS_DSPP, 68, 1},
- { DBGBUS_DSPP, 68, 2},
- { DBGBUS_DSPP, 68, 3},
- { DBGBUS_DSPP, 68, 4},
- { DBGBUS_DSPP, 68, 5},
- { DBGBUS_DSPP, 68, 6},
- { DBGBUS_DSPP, 68, 7, _dpu_debug_bus_lm_dump },
-
- { DBGBUS_DSPP, 69, 1},
- { DBGBUS_DSPP, 69, 2},
- { DBGBUS_DSPP, 69, 3},
- { DBGBUS_DSPP, 69, 4},
- { DBGBUS_DSPP, 69, 5},
- { DBGBUS_DSPP, 69, 6},
- { DBGBUS_DSPP, 69, 7, _dpu_debug_bus_lm_dump },
-
- { DBGBUS_DSPP, 84, 1},
- { DBGBUS_DSPP, 84, 2},
- { DBGBUS_DSPP, 84, 3},
- { DBGBUS_DSPP, 84, 4},
- { DBGBUS_DSPP, 84, 5},
- { DBGBUS_DSPP, 84, 6},
- { DBGBUS_DSPP, 84, 7, _dpu_debug_bus_lm_dump },
-
-
- { DBGBUS_DSPP, 85, 1},
- { DBGBUS_DSPP, 85, 2},
- { DBGBUS_DSPP, 85, 3},
- { DBGBUS_DSPP, 85, 4},
- { DBGBUS_DSPP, 85, 5},
- { DBGBUS_DSPP, 85, 6},
- { DBGBUS_DSPP, 85, 7, _dpu_debug_bus_lm_dump },
-
-
- { DBGBUS_DSPP, 86, 1},
- { DBGBUS_DSPP, 86, 2},
- { DBGBUS_DSPP, 86, 3},
- { DBGBUS_DSPP, 86, 4},
- { DBGBUS_DSPP, 86, 5},
- { DBGBUS_DSPP, 86, 6},
- { DBGBUS_DSPP, 86, 7, _dpu_debug_bus_lm_dump },
-
-
- { DBGBUS_DSPP, 87, 1},
- { DBGBUS_DSPP, 87, 2},
- { DBGBUS_DSPP, 87, 3},
- { DBGBUS_DSPP, 87, 4},
- { DBGBUS_DSPP, 87, 5},
- { DBGBUS_DSPP, 87, 6},
- { DBGBUS_DSPP, 87, 7, _dpu_debug_bus_lm_dump },
-
- /* LM1 */
- { DBGBUS_DSPP, 70, 1},
- { DBGBUS_DSPP, 70, 2},
- { DBGBUS_DSPP, 70, 3},
- { DBGBUS_DSPP, 70, 4},
- { DBGBUS_DSPP, 70, 5},
- { DBGBUS_DSPP, 70, 6},
- { DBGBUS_DSPP, 70, 7, _dpu_debug_bus_lm_dump },
-
- { DBGBUS_DSPP, 71, 1},
- { DBGBUS_DSPP, 71, 2},
- { DBGBUS_DSPP, 71, 3},
- { DBGBUS_DSPP, 71, 4},
- { DBGBUS_DSPP, 71, 5},
- { DBGBUS_DSPP, 71, 6},
- { DBGBUS_DSPP, 71, 7, _dpu_debug_bus_lm_dump },
-
- { DBGBUS_DSPP, 72, 1},
- { DBGBUS_DSPP, 72, 2},
- { DBGBUS_DSPP, 72, 3},
- { DBGBUS_DSPP, 72, 4},
- { DBGBUS_DSPP, 72, 5},
- { DBGBUS_DSPP, 72, 6},
- { DBGBUS_DSPP, 72, 7, _dpu_debug_bus_lm_dump },
-
- { DBGBUS_DSPP, 73, 1},
- { DBGBUS_DSPP, 73, 2},
- { DBGBUS_DSPP, 73, 3},
- { DBGBUS_DSPP, 73, 4},
- { DBGBUS_DSPP, 73, 5},
- { DBGBUS_DSPP, 73, 6},
- { DBGBUS_DSPP, 73, 7, _dpu_debug_bus_lm_dump },
-
- { DBGBUS_DSPP, 74, 1},
- { DBGBUS_DSPP, 74, 2},
- { DBGBUS_DSPP, 74, 3},
- { DBGBUS_DSPP, 74, 4},
- { DBGBUS_DSPP, 74, 5},
- { DBGBUS_DSPP, 74, 6},
- { DBGBUS_DSPP, 74, 7, _dpu_debug_bus_lm_dump },
-
- { DBGBUS_DSPP, 75, 1},
- { DBGBUS_DSPP, 75, 2},
- { DBGBUS_DSPP, 75, 3},
- { DBGBUS_DSPP, 75, 4},
- { DBGBUS_DSPP, 75, 5},
- { DBGBUS_DSPP, 75, 6},
- { DBGBUS_DSPP, 75, 7, _dpu_debug_bus_lm_dump },
-
- { DBGBUS_DSPP, 76, 1},
- { DBGBUS_DSPP, 76, 2},
- { DBGBUS_DSPP, 76, 3},
- { DBGBUS_DSPP, 76, 4},
- { DBGBUS_DSPP, 76, 5},
- { DBGBUS_DSPP, 76, 6},
- { DBGBUS_DSPP, 76, 7, _dpu_debug_bus_lm_dump },
-
- { DBGBUS_DSPP, 88, 1},
- { DBGBUS_DSPP, 88, 2},
- { DBGBUS_DSPP, 88, 3},
- { DBGBUS_DSPP, 88, 4},
- { DBGBUS_DSPP, 88, 5},
- { DBGBUS_DSPP, 88, 6},
- { DBGBUS_DSPP, 88, 7, _dpu_debug_bus_lm_dump },
-
- { DBGBUS_DSPP, 89, 1},
- { DBGBUS_DSPP, 89, 2},
- { DBGBUS_DSPP, 89, 3},
- { DBGBUS_DSPP, 89, 4},
- { DBGBUS_DSPP, 89, 5},
- { DBGBUS_DSPP, 89, 6},
- { DBGBUS_DSPP, 89, 7, _dpu_debug_bus_lm_dump },
-
- { DBGBUS_DSPP, 90, 1},
- { DBGBUS_DSPP, 90, 2},
- { DBGBUS_DSPP, 90, 3},
- { DBGBUS_DSPP, 90, 4},
- { DBGBUS_DSPP, 90, 5},
- { DBGBUS_DSPP, 90, 6},
- { DBGBUS_DSPP, 90, 7, _dpu_debug_bus_lm_dump },
-
- { DBGBUS_DSPP, 91, 1},
- { DBGBUS_DSPP, 91, 2},
- { DBGBUS_DSPP, 91, 3},
- { DBGBUS_DSPP, 91, 4},
- { DBGBUS_DSPP, 91, 5},
- { DBGBUS_DSPP, 91, 6},
- { DBGBUS_DSPP, 91, 7, _dpu_debug_bus_lm_dump },
-
- /* LM2 */
- { DBGBUS_DSPP, 77, 0},
- { DBGBUS_DSPP, 77, 1},
- { DBGBUS_DSPP, 77, 2},
- { DBGBUS_DSPP, 77, 3},
- { DBGBUS_DSPP, 77, 4},
- { DBGBUS_DSPP, 77, 5},
- { DBGBUS_DSPP, 77, 6},
- { DBGBUS_DSPP, 77, 7, _dpu_debug_bus_lm_dump },
-
- { DBGBUS_DSPP, 78, 0},
- { DBGBUS_DSPP, 78, 1},
- { DBGBUS_DSPP, 78, 2},
- { DBGBUS_DSPP, 78, 3},
- { DBGBUS_DSPP, 78, 4},
- { DBGBUS_DSPP, 78, 5},
- { DBGBUS_DSPP, 78, 6},
- { DBGBUS_DSPP, 78, 7, _dpu_debug_bus_lm_dump },
-
- { DBGBUS_DSPP, 79, 0},
- { DBGBUS_DSPP, 79, 1},
- { DBGBUS_DSPP, 79, 2},
- { DBGBUS_DSPP, 79, 3},
- { DBGBUS_DSPP, 79, 4},
- { DBGBUS_DSPP, 79, 5},
- { DBGBUS_DSPP, 79, 6},
- { DBGBUS_DSPP, 79, 7, _dpu_debug_bus_lm_dump },
-
- { DBGBUS_DSPP, 80, 0},
- { DBGBUS_DSPP, 80, 1},
- { DBGBUS_DSPP, 80, 2},
- { DBGBUS_DSPP, 80, 3},
- { DBGBUS_DSPP, 80, 4},
- { DBGBUS_DSPP, 80, 5},
- { DBGBUS_DSPP, 80, 6},
- { DBGBUS_DSPP, 80, 7, _dpu_debug_bus_lm_dump },
-
- { DBGBUS_DSPP, 81, 0},
- { DBGBUS_DSPP, 81, 1},
- { DBGBUS_DSPP, 81, 2},
- { DBGBUS_DSPP, 81, 3},
- { DBGBUS_DSPP, 81, 4},
- { DBGBUS_DSPP, 81, 5},
- { DBGBUS_DSPP, 81, 6},
- { DBGBUS_DSPP, 81, 7, _dpu_debug_bus_lm_dump },
-
- { DBGBUS_DSPP, 82, 0},
- { DBGBUS_DSPP, 82, 1},
- { DBGBUS_DSPP, 82, 2},
- { DBGBUS_DSPP, 82, 3},
- { DBGBUS_DSPP, 82, 4},
- { DBGBUS_DSPP, 82, 5},
- { DBGBUS_DSPP, 82, 6},
- { DBGBUS_DSPP, 82, 7, _dpu_debug_bus_lm_dump },
-
- { DBGBUS_DSPP, 83, 0},
- { DBGBUS_DSPP, 83, 1},
- { DBGBUS_DSPP, 83, 2},
- { DBGBUS_DSPP, 83, 3},
- { DBGBUS_DSPP, 83, 4},
- { DBGBUS_DSPP, 83, 5},
- { DBGBUS_DSPP, 83, 6},
- { DBGBUS_DSPP, 83, 7, _dpu_debug_bus_lm_dump },
-
- { DBGBUS_DSPP, 92, 1},
- { DBGBUS_DSPP, 92, 2},
- { DBGBUS_DSPP, 92, 3},
- { DBGBUS_DSPP, 92, 4},
- { DBGBUS_DSPP, 92, 5},
- { DBGBUS_DSPP, 92, 6},
- { DBGBUS_DSPP, 92, 7, _dpu_debug_bus_lm_dump },
-
- { DBGBUS_DSPP, 93, 1},
- { DBGBUS_DSPP, 93, 2},
- { DBGBUS_DSPP, 93, 3},
- { DBGBUS_DSPP, 93, 4},
- { DBGBUS_DSPP, 93, 5},
- { DBGBUS_DSPP, 93, 6},
- { DBGBUS_DSPP, 93, 7, _dpu_debug_bus_lm_dump },
-
- { DBGBUS_DSPP, 94, 1},
- { DBGBUS_DSPP, 94, 2},
- { DBGBUS_DSPP, 94, 3},
- { DBGBUS_DSPP, 94, 4},
- { DBGBUS_DSPP, 94, 5},
- { DBGBUS_DSPP, 94, 6},
- { DBGBUS_DSPP, 94, 7, _dpu_debug_bus_lm_dump },
-
- { DBGBUS_DSPP, 95, 1},
- { DBGBUS_DSPP, 95, 2},
- { DBGBUS_DSPP, 95, 3},
- { DBGBUS_DSPP, 95, 4},
- { DBGBUS_DSPP, 95, 5},
- { DBGBUS_DSPP, 95, 6},
- { DBGBUS_DSPP, 95, 7, _dpu_debug_bus_lm_dump },
-
- /* LM5 */
- { DBGBUS_DSPP, 110, 1},
- { DBGBUS_DSPP, 110, 2},
- { DBGBUS_DSPP, 110, 3},
- { DBGBUS_DSPP, 110, 4},
- { DBGBUS_DSPP, 110, 5},
- { DBGBUS_DSPP, 110, 6},
- { DBGBUS_DSPP, 110, 7, _dpu_debug_bus_lm_dump },
-
- { DBGBUS_DSPP, 111, 1},
- { DBGBUS_DSPP, 111, 2},
- { DBGBUS_DSPP, 111, 3},
- { DBGBUS_DSPP, 111, 4},
- { DBGBUS_DSPP, 111, 5},
- { DBGBUS_DSPP, 111, 6},
- { DBGBUS_DSPP, 111, 7, _dpu_debug_bus_lm_dump },
-
- { DBGBUS_DSPP, 112, 1},
- { DBGBUS_DSPP, 112, 2},
- { DBGBUS_DSPP, 112, 3},
- { DBGBUS_DSPP, 112, 4},
- { DBGBUS_DSPP, 112, 5},
- { DBGBUS_DSPP, 112, 6},
- { DBGBUS_DSPP, 112, 7, _dpu_debug_bus_lm_dump },
-
- { DBGBUS_DSPP, 113, 1},
- { DBGBUS_DSPP, 113, 2},
- { DBGBUS_DSPP, 113, 3},
- { DBGBUS_DSPP, 113, 4},
- { DBGBUS_DSPP, 113, 5},
- { DBGBUS_DSPP, 113, 6},
- { DBGBUS_DSPP, 113, 7, _dpu_debug_bus_lm_dump },
-
- { DBGBUS_DSPP, 114, 1},
- { DBGBUS_DSPP, 114, 2},
- { DBGBUS_DSPP, 114, 3},
- { DBGBUS_DSPP, 114, 4},
- { DBGBUS_DSPP, 114, 5},
- { DBGBUS_DSPP, 114, 6},
- { DBGBUS_DSPP, 114, 7, _dpu_debug_bus_lm_dump },
-
- { DBGBUS_DSPP, 115, 1},
- { DBGBUS_DSPP, 115, 2},
- { DBGBUS_DSPP, 115, 3},
- { DBGBUS_DSPP, 115, 4},
- { DBGBUS_DSPP, 115, 5},
- { DBGBUS_DSPP, 115, 6},
- { DBGBUS_DSPP, 115, 7, _dpu_debug_bus_lm_dump },
-
- { DBGBUS_DSPP, 116, 1},
- { DBGBUS_DSPP, 116, 2},
- { DBGBUS_DSPP, 116, 3},
- { DBGBUS_DSPP, 116, 4},
- { DBGBUS_DSPP, 116, 5},
- { DBGBUS_DSPP, 116, 6},
- { DBGBUS_DSPP, 116, 7, _dpu_debug_bus_lm_dump },
-
- { DBGBUS_DSPP, 117, 1},
- { DBGBUS_DSPP, 117, 2},
- { DBGBUS_DSPP, 117, 3},
- { DBGBUS_DSPP, 117, 4},
- { DBGBUS_DSPP, 117, 5},
- { DBGBUS_DSPP, 117, 6},
- { DBGBUS_DSPP, 117, 7, _dpu_debug_bus_lm_dump },
-
- { DBGBUS_DSPP, 118, 1},
- { DBGBUS_DSPP, 118, 2},
- { DBGBUS_DSPP, 118, 3},
- { DBGBUS_DSPP, 118, 4},
- { DBGBUS_DSPP, 118, 5},
- { DBGBUS_DSPP, 118, 6},
- { DBGBUS_DSPP, 118, 7, _dpu_debug_bus_lm_dump },
-
- { DBGBUS_DSPP, 119, 1},
- { DBGBUS_DSPP, 119, 2},
- { DBGBUS_DSPP, 119, 3},
- { DBGBUS_DSPP, 119, 4},
- { DBGBUS_DSPP, 119, 5},
- { DBGBUS_DSPP, 119, 6},
- { DBGBUS_DSPP, 119, 7, _dpu_debug_bus_lm_dump },
-
- { DBGBUS_DSPP, 120, 1},
- { DBGBUS_DSPP, 120, 2},
- { DBGBUS_DSPP, 120, 3},
- { DBGBUS_DSPP, 120, 4},
- { DBGBUS_DSPP, 120, 5},
- { DBGBUS_DSPP, 120, 6},
- { DBGBUS_DSPP, 120, 7, _dpu_debug_bus_lm_dump },
-
- /* csc */
- { DBGBUS_SSPP0, 7, 0},
- { DBGBUS_SSPP0, 7, 1},
- { DBGBUS_SSPP0, 27, 0},
- { DBGBUS_SSPP0, 27, 1},
- { DBGBUS_SSPP1, 7, 0},
- { DBGBUS_SSPP1, 7, 1},
- { DBGBUS_SSPP1, 27, 0},
- { DBGBUS_SSPP1, 27, 1},
-
- /* pcc */
- { DBGBUS_SSPP0, 3, 3},
- { DBGBUS_SSPP0, 23, 3},
- { DBGBUS_SSPP0, 33, 3},
- { DBGBUS_SSPP0, 43, 3},
- { DBGBUS_SSPP1, 3, 3},
- { DBGBUS_SSPP1, 23, 3},
- { DBGBUS_SSPP1, 33, 3},
- { DBGBUS_SSPP1, 43, 3},
-
- /* spa */
- { DBGBUS_SSPP0, 8, 0},
- { DBGBUS_SSPP0, 28, 0},
- { DBGBUS_SSPP1, 8, 0},
- { DBGBUS_SSPP1, 28, 0},
- { DBGBUS_DSPP, 13, 0},
- { DBGBUS_DSPP, 19, 0},
-
- /* igc */
- { DBGBUS_SSPP0, 17, 0},
- { DBGBUS_SSPP0, 17, 1},
- { DBGBUS_SSPP0, 17, 3},
- { DBGBUS_SSPP0, 37, 0},
- { DBGBUS_SSPP0, 37, 1},
- { DBGBUS_SSPP0, 37, 3},
- { DBGBUS_SSPP0, 46, 0},
- { DBGBUS_SSPP0, 46, 1},
- { DBGBUS_SSPP0, 46, 3},
-
- { DBGBUS_SSPP1, 17, 0},
- { DBGBUS_SSPP1, 17, 1},
- { DBGBUS_SSPP1, 17, 3},
- { DBGBUS_SSPP1, 37, 0},
- { DBGBUS_SSPP1, 37, 1},
- { DBGBUS_SSPP1, 37, 3},
- { DBGBUS_SSPP1, 46, 0},
- { DBGBUS_SSPP1, 46, 1},
- { DBGBUS_SSPP1, 46, 3},
-
- { DBGBUS_DSPP, 14, 0},
- { DBGBUS_DSPP, 14, 1},
- { DBGBUS_DSPP, 14, 3},
- { DBGBUS_DSPP, 20, 0},
- { DBGBUS_DSPP, 20, 1},
- { DBGBUS_DSPP, 20, 3},
-
- /* intf0-3 */
- { DBGBUS_PERIPH, 0, 0},
- { DBGBUS_PERIPH, 1, 0},
- { DBGBUS_PERIPH, 2, 0},
- { DBGBUS_PERIPH, 3, 0},
-
- /* te counter wrapper */
- { DBGBUS_PERIPH, 60, 0},
-
- /* dsc0 */
- { DBGBUS_PERIPH, 47, 0},
- { DBGBUS_PERIPH, 47, 1},
- { DBGBUS_PERIPH, 47, 2},
- { DBGBUS_PERIPH, 47, 3},
- { DBGBUS_PERIPH, 47, 4},
- { DBGBUS_PERIPH, 47, 5},
- { DBGBUS_PERIPH, 47, 6},
- { DBGBUS_PERIPH, 47, 7},
-
- /* dsc1 */
- { DBGBUS_PERIPH, 48, 0},
- { DBGBUS_PERIPH, 48, 1},
- { DBGBUS_PERIPH, 48, 2},
- { DBGBUS_PERIPH, 48, 3},
- { DBGBUS_PERIPH, 48, 4},
- { DBGBUS_PERIPH, 48, 5},
- { DBGBUS_PERIPH, 48, 6},
- { DBGBUS_PERIPH, 48, 7},
-
- /* dsc2 */
- { DBGBUS_PERIPH, 51, 0},
- { DBGBUS_PERIPH, 51, 1},
- { DBGBUS_PERIPH, 51, 2},
- { DBGBUS_PERIPH, 51, 3},
- { DBGBUS_PERIPH, 51, 4},
- { DBGBUS_PERIPH, 51, 5},
- { DBGBUS_PERIPH, 51, 6},
- { DBGBUS_PERIPH, 51, 7},
-
- /* dsc3 */
- { DBGBUS_PERIPH, 52, 0},
- { DBGBUS_PERIPH, 52, 1},
- { DBGBUS_PERIPH, 52, 2},
- { DBGBUS_PERIPH, 52, 3},
- { DBGBUS_PERIPH, 52, 4},
- { DBGBUS_PERIPH, 52, 5},
- { DBGBUS_PERIPH, 52, 6},
- { DBGBUS_PERIPH, 52, 7},
-
- /* tear-check */
- { DBGBUS_PERIPH, 63, 0 },
- { DBGBUS_PERIPH, 64, 0 },
- { DBGBUS_PERIPH, 65, 0 },
- { DBGBUS_PERIPH, 73, 0 },
- { DBGBUS_PERIPH, 74, 0 },
-
- /* cdwn */
- { DBGBUS_PERIPH, 80, 0},
- { DBGBUS_PERIPH, 80, 1},
- { DBGBUS_PERIPH, 80, 2},
-
- { DBGBUS_PERIPH, 81, 0},
- { DBGBUS_PERIPH, 81, 1},
- { DBGBUS_PERIPH, 81, 2},
-
- { DBGBUS_PERIPH, 82, 0},
- { DBGBUS_PERIPH, 82, 1},
- { DBGBUS_PERIPH, 82, 2},
- { DBGBUS_PERIPH, 82, 3},
- { DBGBUS_PERIPH, 82, 4},
- { DBGBUS_PERIPH, 82, 5},
- { DBGBUS_PERIPH, 82, 6},
- { DBGBUS_PERIPH, 82, 7},
-
- /* hdmi */
- { DBGBUS_PERIPH, 68, 0},
- { DBGBUS_PERIPH, 68, 1},
- { DBGBUS_PERIPH, 68, 2},
- { DBGBUS_PERIPH, 68, 3},
- { DBGBUS_PERIPH, 68, 4},
- { DBGBUS_PERIPH, 68, 5},
-
- /* edp */
- { DBGBUS_PERIPH, 69, 0},
- { DBGBUS_PERIPH, 69, 1},
- { DBGBUS_PERIPH, 69, 2},
- { DBGBUS_PERIPH, 69, 3},
- { DBGBUS_PERIPH, 69, 4},
- { DBGBUS_PERIPH, 69, 5},
-
- /* dsi0 */
- { DBGBUS_PERIPH, 70, 0},
- { DBGBUS_PERIPH, 70, 1},
- { DBGBUS_PERIPH, 70, 2},
- { DBGBUS_PERIPH, 70, 3},
- { DBGBUS_PERIPH, 70, 4},
- { DBGBUS_PERIPH, 70, 5},
-
- /* dsi1 */
- { DBGBUS_PERIPH, 71, 0},
- { DBGBUS_PERIPH, 71, 1},
- { DBGBUS_PERIPH, 71, 2},
- { DBGBUS_PERIPH, 71, 3},
- { DBGBUS_PERIPH, 71, 4},
- { DBGBUS_PERIPH, 71, 5},
-};
-
-static struct vbif_debug_bus_entry vbif_dbg_bus_msm8998[] = {
- {0x214, 0x21c, 16, 2, 0x0, 0xd}, /* arb clients */
- {0x214, 0x21c, 16, 2, 0x80, 0xc0}, /* arb clients */
- {0x214, 0x21c, 16, 2, 0x100, 0x140}, /* arb clients */
- {0x214, 0x21c, 0, 16, 0x0, 0xf}, /* xin blocks - axi side */
- {0x214, 0x21c, 0, 16, 0x80, 0xa4}, /* xin blocks - axi side */
- {0x214, 0x21c, 0, 15, 0x100, 0x124}, /* xin blocks - axi side */
- {0x21c, 0x214, 0, 14, 0, 0xc}, /* xin blocks - clock side */
-};
-
-/**
- * _dpu_dbg_enable_power - use callback to turn power on for hw register access
- * @enable: whether to turn power on or off
- */
-static inline void _dpu_dbg_enable_power(int enable)
-{
- if (enable)
- pm_runtime_get_sync(dpu_dbg_base.dev);
- else
- pm_runtime_put_sync(dpu_dbg_base.dev);
-}
-
-static void _dpu_dbg_dump_dpu_dbg_bus(struct dpu_dbg_dpu_debug_bus *bus)
-{
- bool in_log, in_mem;
- u32 **dump_mem = NULL;
- u32 *dump_addr = NULL;
- u32 status = 0;
- struct dpu_debug_bus_entry *head;
- phys_addr_t phys = 0;
- int list_size;
- int i;
- u32 offset;
- void __iomem *mem_base = NULL;
- struct dpu_dbg_reg_base *reg_base;
-
- if (!bus || !bus->cmn.entries_size)
- return;
-
- list_for_each_entry(reg_base, &dpu_dbg_base.reg_base_list,
- reg_base_head)
- if (strlen(reg_base->name) &&
- !strcmp(reg_base->name, bus->cmn.name))
- mem_base = reg_base->base + bus->top_blk_off;
-
- if (!mem_base) {
- pr_err("unable to find mem_base for %s\n", bus->cmn.name);
- return;
- }
-
- dump_mem = &bus->cmn.dumped_content;
-
- /* will keep in memory 4 entries of 4 bytes each */
- list_size = (bus->cmn.entries_size * 4 * 4);
-
- in_log = (bus->cmn.enable_mask & DPU_DBG_DUMP_IN_LOG);
- in_mem = (bus->cmn.enable_mask & DPU_DBG_DUMP_IN_MEM);
-
- if (!in_log && !in_mem)
- return;
-
- dev_info(dpu_dbg_base.dev, "======== start %s dump =========\n",
- bus->cmn.name);
-
- if (in_mem) {
- if (!(*dump_mem))
- *dump_mem = dma_alloc_coherent(dpu_dbg_base.dev,
- list_size, &phys, GFP_KERNEL);
-
- if (*dump_mem) {
- dump_addr = *dump_mem;
- dev_info(dpu_dbg_base.dev,
- "%s: start_addr:0x%pK len:0x%x\n",
- __func__, dump_addr, list_size);
- } else {
- in_mem = false;
- pr_err("dump_mem: allocation fails\n");
- }
- }
-
- _dpu_dbg_enable_power(true);
- for (i = 0; i < bus->cmn.entries_size; i++) {
- head = bus->entries + i;
- writel_relaxed(TEST_MASK(head->block_id, head->test_id),
- mem_base + head->wr_addr);
- wmb(); /* make sure test bits were written */
-
- if (bus->cmn.flags & DBGBUS_FLAGS_DSPP) {
- offset = DBGBUS_DSPP_STATUS;
- /* keep DSPP test point enabled */
- if (head->wr_addr != DBGBUS_DSPP)
- writel_relaxed(0xF, mem_base + DBGBUS_DSPP);
- } else {
- offset = head->wr_addr + 0x4;
- }
-
- status = readl_relaxed(mem_base + offset);
-
- if (in_log)
- dev_info(dpu_dbg_base.dev,
- "waddr=0x%x blk=%d tst=%d val=0x%x\n",
- head->wr_addr, head->block_id,
- head->test_id, status);
-
- if (dump_addr && in_mem) {
- dump_addr[i*4] = head->wr_addr;
- dump_addr[i*4 + 1] = head->block_id;
- dump_addr[i*4 + 2] = head->test_id;
- dump_addr[i*4 + 3] = status;
- }
-
- if (head->analyzer)
- head->analyzer(mem_base, head, status);
-
- /* Disable debug bus once we are done */
- writel_relaxed(0, mem_base + head->wr_addr);
- if (bus->cmn.flags & DBGBUS_FLAGS_DSPP &&
- head->wr_addr != DBGBUS_DSPP)
- writel_relaxed(0x0, mem_base + DBGBUS_DSPP);
- }
- _dpu_dbg_enable_power(false);
-
- dev_info(dpu_dbg_base.dev, "======== end %s dump =========\n",
- bus->cmn.name);
-}
-
-static void _dpu_dbg_dump_vbif_debug_bus_entry(
- struct vbif_debug_bus_entry *head, void __iomem *mem_base,
- u32 *dump_addr, bool in_log)
-{
- int i, j;
- u32 val;
-
- if (!dump_addr && !in_log)
- return;
-
- for (i = 0; i < head->block_cnt; i++) {
- writel_relaxed(1 << (i + head->bit_offset),
- mem_base + head->block_bus_addr);
- /* make sure that current bus blcok enable */
- wmb();
- for (j = head->test_pnt_start; j < head->test_pnt_cnt; j++) {
- writel_relaxed(j, mem_base + head->block_bus_addr + 4);
- /* make sure that test point is enabled */
- wmb();
- val = readl_relaxed(mem_base + MMSS_VBIF_TEST_BUS_OUT);
- if (dump_addr) {
- *dump_addr++ = head->block_bus_addr;
- *dump_addr++ = i;
- *dump_addr++ = j;
- *dump_addr++ = val;
- }
- if (in_log)
- dev_info(dpu_dbg_base.dev,
- "testpoint:%x arb/xin id=%d index=%d val=0x%x\n",
- head->block_bus_addr, i, j, val);
- }
- }
-}
-
-static void _dpu_dbg_dump_vbif_dbg_bus(struct dpu_dbg_vbif_debug_bus *bus)
-{
- bool in_log, in_mem;
- u32 **dump_mem = NULL;
- u32 *dump_addr = NULL;
- u32 value, d0, d1;
- unsigned long reg, reg1, reg2;
- struct vbif_debug_bus_entry *head;
- phys_addr_t phys = 0;
- int i, list_size = 0;
- void __iomem *mem_base = NULL;
- struct vbif_debug_bus_entry *dbg_bus;
- u32 bus_size;
- struct dpu_dbg_reg_base *reg_base;
-
- if (!bus || !bus->cmn.entries_size)
- return;
-
- list_for_each_entry(reg_base, &dpu_dbg_base.reg_base_list,
- reg_base_head)
- if (strlen(reg_base->name) &&
- !strcmp(reg_base->name, bus->cmn.name))
- mem_base = reg_base->base;
-
- if (!mem_base) {
- pr_err("unable to find mem_base for %s\n", bus->cmn.name);
- return;
- }
-
- dbg_bus = bus->entries;
- bus_size = bus->cmn.entries_size;
- list_size = bus->cmn.entries_size;
- dump_mem = &bus->cmn.dumped_content;
-
- dev_info(dpu_dbg_base.dev, "======== start %s dump =========\n",
- bus->cmn.name);
-
- if (!dump_mem || !dbg_bus || !bus_size || !list_size)
- return;
-
- /* allocate memory for each test point */
- for (i = 0; i < bus_size; i++) {
- head = dbg_bus + i;
- list_size += (head->block_cnt * head->test_pnt_cnt);
- }
-
- /* 4 bytes * 4 entries for each test point*/
- list_size *= 16;
-
- in_log = (bus->cmn.enable_mask & DPU_DBG_DUMP_IN_LOG);
- in_mem = (bus->cmn.enable_mask & DPU_DBG_DUMP_IN_MEM);
-
- if (!in_log && !in_mem)
- return;
-
- if (in_mem) {
- if (!(*dump_mem))
- *dump_mem = dma_alloc_coherent(dpu_dbg_base.dev,
- list_size, &phys, GFP_KERNEL);
-
- if (*dump_mem) {
- dump_addr = *dump_mem;
- dev_info(dpu_dbg_base.dev,
- "%s: start_addr:0x%pK len:0x%x\n",
- __func__, dump_addr, list_size);
- } else {
- in_mem = false;
- pr_err("dump_mem: allocation fails\n");
- }
- }
-
- _dpu_dbg_enable_power(true);
-
- value = readl_relaxed(mem_base + MMSS_VBIF_CLKON);
- writel_relaxed(value | BIT(1), mem_base + MMSS_VBIF_CLKON);
-
- /* make sure that vbif core is on */
- wmb();
-
- /**
- * Extract VBIF error info based on XIN halt and error status.
- * If the XIN client is not in HALT state, or an error is detected,
- * then retrieve the VBIF error info for it.
- */
- reg = readl_relaxed(mem_base + MMSS_VBIF_XIN_HALT_CTRL1);
- reg1 = readl_relaxed(mem_base + MMSS_VBIF_PND_ERR);
- reg2 = readl_relaxed(mem_base + MMSS_VBIF_SRC_ERR);
- dev_err(dpu_dbg_base.dev,
- "XIN HALT:0x%lX, PND ERR:0x%lX, SRC ERR:0x%lX\n",
- reg, reg1, reg2);
- reg >>= 16;
- reg &= ~(reg1 | reg2);
- for (i = 0; i < MMSS_VBIF_CLIENT_NUM; i++) {
- if (!test_bit(0, ®)) {
- writel_relaxed(i, mem_base + MMSS_VBIF_ERR_INFO);
- /* make sure reg write goes through */
- wmb();
-
- d0 = readl_relaxed(mem_base + MMSS_VBIF_ERR_INFO);
- d1 = readl_relaxed(mem_base + MMSS_VBIF_ERR_INFO_1);
-
- dev_err(dpu_dbg_base.dev,
- "Client:%d, errinfo=0x%X, errinfo1=0x%X\n",
- i, d0, d1);
- }
- reg >>= 1;
- }
-
- for (i = 0; i < bus_size; i++) {
- head = dbg_bus + i;
-
- writel_relaxed(0, mem_base + head->disable_bus_addr);
- writel_relaxed(BIT(0), mem_base + MMSS_VBIF_TEST_BUS_OUT_CTRL);
- /* make sure that other bus is off */
- wmb();
-
- _dpu_dbg_dump_vbif_debug_bus_entry(head, mem_base, dump_addr,
- in_log);
- if (dump_addr)
- dump_addr += (head->block_cnt * head->test_pnt_cnt * 4);
- }
-
- _dpu_dbg_enable_power(false);
-
- dev_info(dpu_dbg_base.dev, "======== end %s dump =========\n",
- bus->cmn.name);
-}
-
-/**
- * _dpu_dump_array - dump array of register bases
- * @name: string indicating origin of dump
- * @dump_dbgbus_dpu: whether to dump the dpu debug bus
- * @dump_dbgbus_vbif_rt: whether to dump the vbif rt debug bus
- */
-static void _dpu_dump_array(const char *name, bool dump_dbgbus_dpu,
- bool dump_dbgbus_vbif_rt)
-{
- if (dump_dbgbus_dpu)
- _dpu_dbg_dump_dpu_dbg_bus(&dpu_dbg_base.dbgbus_dpu);
-
- if (dump_dbgbus_vbif_rt)
- _dpu_dbg_dump_vbif_dbg_bus(&dpu_dbg_base.dbgbus_vbif_rt);
-}
-
-/**
- * _dpu_dump_work - deferred dump work function
- * @work: work structure
- */
-static void _dpu_dump_work(struct work_struct *work)
-{
- _dpu_dump_array("dpudump_workitem",
- dpu_dbg_base.dbgbus_dpu.cmn.include_in_deferred_work,
- dpu_dbg_base.dbgbus_vbif_rt.cmn.include_in_deferred_work);
-}
-
-void dpu_dbg_dump(bool queue_work, const char *name, bool dump_dbgbus_dpu,
- bool dump_dbgbus_vbif_rt)
-{
- if (queue_work && work_pending(&dpu_dbg_base.dump_work))
- return;
-
- if (!queue_work) {
- _dpu_dump_array(name, dump_dbgbus_dpu, dump_dbgbus_vbif_rt);
- return;
- }
-
- /* schedule work to dump later */
- dpu_dbg_base.dbgbus_dpu.cmn.include_in_deferred_work = dump_dbgbus_dpu;
- dpu_dbg_base.dbgbus_vbif_rt.cmn.include_in_deferred_work =
- dump_dbgbus_vbif_rt;
- schedule_work(&dpu_dbg_base.dump_work);
-}
-
-/*
- * dpu_dbg_debugfs_open - debugfs open handler for debug dump
- * @inode: debugfs inode
- * @file: file handle
- */
-static int dpu_dbg_debugfs_open(struct inode *inode, struct file *file)
-{
- /* non-seekable */
- file->f_mode &= ~(FMODE_LSEEK | FMODE_PREAD | FMODE_PWRITE);
- file->private_data = inode->i_private;
- return 0;
-}
-
-/**
- * dpu_dbg_dump_write - debugfs write handler for debug dump
- * @file: file handler
- * @user_buf: user buffer content from debugfs
- * @count: size of user buffer
- * @ppos: position offset of user buffer
- */
-static ssize_t dpu_dbg_dump_write(struct file *file,
- const char __user *user_buf, size_t count, loff_t *ppos)
-{
- _dpu_dump_array("dump_debugfs", true, true);
- return count;
-}
-
-static const struct file_operations dpu_dbg_dump_fops = {
- .open = dpu_dbg_debugfs_open,
- .write = dpu_dbg_dump_write,
-};
-
-int dpu_dbg_debugfs_register(struct dentry *debugfs_root)
-{
- static struct dpu_dbg_base *dbg = &dpu_dbg_base;
- char debug_name[80] = "";
-
- if (!debugfs_root)
- return -EINVAL;
-
- debugfs_create_file("dump", 0600, debugfs_root, NULL,
- &dpu_dbg_dump_fops);
-
- if (dbg->dbgbus_dpu.entries) {
- dbg->dbgbus_dpu.cmn.name = DBGBUS_NAME_DPU;
- snprintf(debug_name, sizeof(debug_name), "%s_dbgbus",
- dbg->dbgbus_dpu.cmn.name);
- dbg->dbgbus_dpu.cmn.enable_mask = DEFAULT_DBGBUS_DPU;
- debugfs_create_u32(debug_name, 0600, debugfs_root,
- &dbg->dbgbus_dpu.cmn.enable_mask);
- }
-
- if (dbg->dbgbus_vbif_rt.entries) {
- dbg->dbgbus_vbif_rt.cmn.name = DBGBUS_NAME_VBIF_RT;
- snprintf(debug_name, sizeof(debug_name), "%s_dbgbus",
- dbg->dbgbus_vbif_rt.cmn.name);
- dbg->dbgbus_vbif_rt.cmn.enable_mask = DEFAULT_DBGBUS_VBIFRT;
- debugfs_create_u32(debug_name, 0600, debugfs_root,
- &dbg->dbgbus_vbif_rt.cmn.enable_mask);
- }
-
- return 0;
-}
-
-static void _dpu_dbg_debugfs_destroy(void)
-{
-}
-
-void dpu_dbg_init_dbg_buses(u32 hwversion)
-{
- static struct dpu_dbg_base *dbg = &dpu_dbg_base;
-
- memset(&dbg->dbgbus_dpu, 0, sizeof(dbg->dbgbus_dpu));
- memset(&dbg->dbgbus_vbif_rt, 0, sizeof(dbg->dbgbus_vbif_rt));
-
- if (IS_MSM8998_TARGET(hwversion)) {
- dbg->dbgbus_dpu.entries = dbg_bus_dpu_8998;
- dbg->dbgbus_dpu.cmn.entries_size = ARRAY_SIZE(dbg_bus_dpu_8998);
- dbg->dbgbus_dpu.cmn.flags = DBGBUS_FLAGS_DSPP;
-
- dbg->dbgbus_vbif_rt.entries = vbif_dbg_bus_msm8998;
- dbg->dbgbus_vbif_rt.cmn.entries_size =
- ARRAY_SIZE(vbif_dbg_bus_msm8998);
- } else if (IS_SDM845_TARGET(hwversion) || IS_SDM670_TARGET(hwversion)) {
- dbg->dbgbus_dpu.entries = dbg_bus_dpu_sdm845;
- dbg->dbgbus_dpu.cmn.entries_size =
- ARRAY_SIZE(dbg_bus_dpu_sdm845);
- dbg->dbgbus_dpu.cmn.flags = DBGBUS_FLAGS_DSPP;
-
- /* vbif is unchanged vs 8998 */
- dbg->dbgbus_vbif_rt.entries = vbif_dbg_bus_msm8998;
- dbg->dbgbus_vbif_rt.cmn.entries_size =
- ARRAY_SIZE(vbif_dbg_bus_msm8998);
- } else {
- pr_err("unsupported chipset id %X\n", hwversion);
- }
-}
-
-int dpu_dbg_init(struct device *dev)
-{
- if (!dev) {
- pr_err("invalid params\n");
- return -EINVAL;
- }
-
- INIT_LIST_HEAD(&dpu_dbg_base.reg_base_list);
- dpu_dbg_base.dev = dev;
-
- INIT_WORK(&dpu_dbg_base.dump_work, _dpu_dump_work);
-
- return 0;
-}
-
-/**
- * dpu_dbg_destroy - destroy dpu debug facilities
- */
-void dpu_dbg_destroy(void)
-{
- _dpu_dbg_debugfs_destroy();
-}
-
-void dpu_dbg_set_dpu_top_offset(u32 blk_off)
-{
- dpu_dbg_base.dbgbus_dpu.top_blk_off = blk_off;
-}
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_dbg.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_dbg.h
deleted file mode 100644
index 1e6fa945f98b..000000000000
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_dbg.h
+++ /dev/null
@@ -1,103 +0,0 @@
-/* Copyright (c) 2016-2018, The Linux Foundation. All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 and
- * only version 2 as published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#ifndef DPU_DBG_H_
-#define DPU_DBG_H_
-
-#include <stdarg.h>
-#include <linux/debugfs.h>
-#include <linux/list.h>
-
-enum dpu_dbg_dump_flag {
- DPU_DBG_DUMP_IN_LOG = BIT(0),
- DPU_DBG_DUMP_IN_MEM = BIT(1),
-};
-
-#if defined(CONFIG_DEBUG_FS)
-
-/**
- * dpu_dbg_init_dbg_buses - initialize debug bus dumping support for the chipset
- * @hwversion: Chipset revision
- */
-void dpu_dbg_init_dbg_buses(u32 hwversion);
-
-/**
- * dpu_dbg_init - initialize global dpu debug facilities: regdump
- * @dev: device handle
- * Returns: 0 or -ERROR
- */
-int dpu_dbg_init(struct device *dev);
-
-/**
- * dpu_dbg_debugfs_register - register entries at the given debugfs dir
- * @debugfs_root: debugfs root in which to create dpu debug entries
- * Returns: 0 or -ERROR
- */
-int dpu_dbg_debugfs_register(struct dentry *debugfs_root);
-
-/**
- * dpu_dbg_destroy - destroy the global dpu debug facilities
- * Returns: none
- */
-void dpu_dbg_destroy(void);
-
-/**
- * dpu_dbg_dump - trigger dumping of all dpu_dbg facilities
- * @queue_work: whether to queue the dumping work to the work_struct
- * @name: string indicating origin of dump
- * @dump_dbgbus: dump the dpu debug bus
- * @dump_vbif_rt: dump the vbif rt bus
- * Returns: none
- */
-void dpu_dbg_dump(bool queue_work, const char *name, bool dump_dbgbus_dpu,
- bool dump_dbgbus_vbif_rt);
-
-/**
- * dpu_dbg_set_dpu_top_offset - set the target specific offset from mdss base
- * address of the top registers. Used for accessing debug bus controls.
- * @blk_off: offset from mdss base of the top block
- */
-void dpu_dbg_set_dpu_top_offset(u32 blk_off);
-
-#else
-
-static inline void dpu_dbg_init_dbg_buses(u32 hwversion)
-{
-}
-
-static inline int dpu_dbg_init(struct device *dev)
-{
- return 0;
-}
-
-static inline int dpu_dbg_debugfs_register(struct dentry *debugfs_root)
-{
- return 0;
-}
-
-static inline void dpu_dbg_destroy(void)
-{
-}
-
-static inline void dpu_dbg_dump(bool queue_work, const char *name,
- bool dump_dbgbus_dpu, bool dump_dbgbus_vbif_rt)
-{
-}
-
-static inline void dpu_dbg_set_dpu_top_offset(u32 blk_off)
-{
-}
-
-#endif /* defined(CONFIG_DEBUG_FS) */
-
-
-#endif /* DPU_DBG_H_ */
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
index 82c55efb500f..5559e5d40142 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
@@ -1494,10 +1494,8 @@ static void dpu_encoder_helper_hw_reset(struct dpu_encoder_phys *phys_enc)
ctl->idx);
rc = ctl->ops.reset(ctl);
- if (rc) {
+ if (rc)
DPU_ERROR_ENC(dpu_enc, "ctl %d reset failure\n", ctl->idx);
- dpu_dbg_dump(false, __func__, true, true);
- }
phys_enc->enable_state = DPU_ENC_ENABLED;
}
@@ -1838,7 +1836,7 @@ void dpu_encoder_prepare_commit(struct drm_encoder *drm_enc)
}
#ifdef CONFIG_DEBUG_FS
-static int _dpu_encoder_status_show(struct seq_file *s, void *data)
+static int dpu_encoder_status_show(struct seq_file *s, void *data)
{
struct dpu_encoder_virt *dpu_enc;
int i;
@@ -1877,11 +1875,7 @@ static int _dpu_encoder_status_show(struct seq_file *s, void *data)
return 0;
}
-static int _dpu_encoder_debugfs_status_open(struct inode *inode,
- struct file *file)
-{
- return single_open(file, _dpu_encoder_status_show, inode->i_private);
-}
+DEFINE_SHOW_ATTRIBUTE(dpu_encoder_status);
static int _dpu_encoder_init_debugfs(struct drm_encoder *drm_enc)
{
@@ -1889,14 +1883,6 @@ static int _dpu_encoder_init_debugfs(struct drm_encoder *drm_enc)
struct msm_drm_private *priv;
struct dpu_kms *dpu_kms;
int i;
-
- static const struct file_operations debugfs_status_fops = {
- .open = _dpu_encoder_debugfs_status_open,
- .read = seq_read,
- .llseek = seq_lseek,
- .release = single_release,
- };
-
char name[DPU_NAME_SIZE];
if (!drm_enc || !drm_enc->dev || !drm_enc->dev->dev_private) {
@@ -1917,8 +1903,8 @@ static int _dpu_encoder_init_debugfs(struct drm_encoder *drm_enc)
return -ENOMEM;
/* don't error check these */
- debugfs_create_file("status", 0600,
- dpu_enc->debugfs_root, dpu_enc, &debugfs_status_fops);
+ debugfs_create_file("status", 0600, dpu_enc->debugfs_root, dpu_enc,
+ &dpu_encoder_status_fops);
for (i = 0; i < dpu_enc->num_phys_encs; i++)
if (dpu_enc->phys_encs[i] &&
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c
index 24a98f4e1f44..b37a0992e326 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c
@@ -243,7 +243,6 @@ static int _dpu_encoder_phys_cmd_handle_ppdone_timeout(
atomic_read(&phys_enc->pending_kickoff_cnt));
dpu_encoder_helper_unregister_irq(phys_enc, INTR_IDX_RDPTR);
- dpu_dbg_dump(false, __func__, true, true);
}
atomic_add_unless(&phys_enc->pending_kickoff_cnt, -1, 0);
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c
index b3c68c4fcc8e..9fb74a87bdfd 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c
@@ -613,7 +613,6 @@ static void dpu_encoder_phys_vid_prepare_for_kickoff(
DPU_ERROR_VIDENC(vid_enc, "ctl %d reset failure: %d\n",
ctl->idx, rc);
dpu_encoder_helper_unregister_irq(phys_enc, INTR_IDX_VSYNC);
- dpu_dbg_dump(false, __func__, true, true);
}
}
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c
index 8fa601a9abbf..4aab04335c6d 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c
@@ -13,7 +13,6 @@
#include <linux/delay.h>
#include "dpu_hwio.h"
#include "dpu_hw_ctl.h"
-#include "dpu_dbg.h"
#include "dpu_kms.h"
#include "dpu_trace.h"
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.c
index 9c6bba0ac7c3..695d27a730e8 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.c
@@ -13,7 +13,6 @@
#include "dpu_hwio.h"
#include "dpu_hw_catalog.h"
#include "dpu_hw_intf.h"
-#include "dpu_dbg.h"
#include "dpu_kms.h"
#define INTF_TIMING_ENGINE_EN 0x000
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.c
index dbe48e006414..c76b5cc949fb 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.c
@@ -15,7 +15,6 @@
#include "dpu_hwio.h"
#include "dpu_hw_lm.h"
#include "dpu_hw_mdss.h"
-#include "dpu_dbg.h"
#include "dpu_kms.h"
#define LM_OP_MODE 0x00
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.c
index 52fca13da176..cfc93816078f 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.c
@@ -16,7 +16,6 @@
#include "dpu_hwio.h"
#include "dpu_hw_catalog.h"
#include "dpu_hw_pingpong.h"
-#include "dpu_dbg.h"
#include "dpu_kms.h"
#include "dpu_trace.h"
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c
index 8745018ffdd6..8297963d2c4c 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c
@@ -14,7 +14,6 @@
#include "dpu_hw_catalog.h"
#include "dpu_hw_lm.h"
#include "dpu_hw_sspp.h"
-#include "dpu_dbg.h"
#include "dpu_kms.h"
#define DPU_FETCH_CONFIG_RESET_VALUE 0x00000087
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_top.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_top.c
index b8781256e21b..f7e0f661a8bb 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_top.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_top.c
@@ -13,7 +13,6 @@
#include "dpu_hwio.h"
#include "dpu_hw_catalog.h"
#include "dpu_hw_top.h"
-#include "dpu_dbg.h"
#include "dpu_kms.h"
#define SSPP_SPARE 0x28
@@ -361,8 +360,6 @@ struct dpu_hw_mdp *dpu_hw_mdptop_init(enum dpu_mdp idx,
goto blk_init_error;
}
- dpu_dbg_set_dpu_top_offset(mdp->hw.blk_off);
-
return mdp;
blk_init_error:
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_vbif.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_vbif.c
index d43905525f92..38bfd222ed72 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_vbif.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_vbif.c
@@ -13,7 +13,6 @@
#include "dpu_hwio.h"
#include "dpu_hw_catalog.h"
#include "dpu_hw_vbif.h"
-#include "dpu_dbg.h"
#define VBIF_VERSION 0x0000
#define VBIF_CLK_FORCE_CTRL0 0x0008
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
index 985c855796ae..fd5bad16338d 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
@@ -266,12 +266,6 @@ static int _dpu_debugfs_init(struct dpu_kms *dpu_kms)
return PTR_ERR(dpu_kms->debugfs_root);
}
- rc = dpu_dbg_debugfs_register(dpu_kms->debugfs_root);
- if (rc) {
- DRM_ERROR("failed to reg dpu dbg debugfs: %d\n", rc);
- return rc;
- }
-
/* allow root to be NULL */
debugfs_create_x32(DPU_DEBUGFS_HWMASKNAME, 0600, dpu_kms->debugfs_root, p);
@@ -705,7 +699,6 @@ static void dpu_kms_destroy(struct msm_kms *kms)
dpu_kms = to_dpu_kms(kms);
- dpu_dbg_destroy();
_dpu_kms_hw_destroy(dpu_kms);
}
@@ -866,16 +859,10 @@ static int dpu_kms_hw_init(struct msm_kms *kms)
return rc;
}
- rc = dpu_dbg_init(&dpu_kms->pdev->dev);
- if (rc) {
- DRM_ERROR("failed to init dpu dbg: %d\n", rc);
- return rc;
- }
-
priv = dev->dev_private;
if (!priv) {
DPU_ERROR("invalid private data\n");
- goto dbg_destroy;
+ return rc;
}
dpu_kms->mmio = msm_ioremap(dpu_kms->pdev, "mdp", "mdp");
@@ -940,8 +927,6 @@ static int dpu_kms_hw_init(struct msm_kms *kms)
goto power_error;
}
- dpu_dbg_init_dbg_buses(dpu_kms->core_rev);
-
/*
* Now we need to read the HW catalog and initialize resources such as
* clocks, regulators, GDSC/MMAGIC, ioremap the register ranges etc
@@ -1048,8 +1033,7 @@ static int dpu_kms_hw_init(struct msm_kms *kms)
pm_runtime_put_sync(&dpu_kms->pdev->dev);
error:
_dpu_kms_hw_destroy(dpu_kms);
-dbg_destroy:
- dpu_dbg_destroy();
+
return rc;
}
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h
index 2a3625eef6d3..12a2eb90e6b5 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h
@@ -23,7 +23,6 @@
#include "msm_kms.h"
#include "msm_mmu.h"
#include "msm_gem.h"
-#include "dpu_dbg.h"
#include "dpu_hw_catalog.h"
#include "dpu_hw_ctl.h"
#include "dpu_hw_lm.h"
--
2.18.0
_______________________________________________
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Freedreno@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/freedreno
^ permalink raw reply related [flat|nested] 29+ messages in thread
* [PATCH 02/11] drm/msm/dpu: Use DEFINE_SHOW_ATTRIBUTE
[not found] ` <20181018195836.15885-1-jcrouse-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2018-10-18 19:58 ` [PATCH 01/11] drm/msm/dpu: Remove dpu_dbg Jordan Crouse
@ 2018-10-18 19:58 ` Jordan Crouse
[not found] ` <20181018195836.15885-3-jcrouse-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2018-10-18 19:58 ` [PATCH 03/11] drm/msm/dpu: Remove dpu_crtc_get_mixer_height Jordan Crouse
` (8 subsequent siblings)
10 siblings, 1 reply; 29+ messages in thread
From: Jordan Crouse @ 2018-10-18 19:58 UTC (permalink / raw)
To: freedreno-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW
Cc: linux-arm-msm-u79uwXL29TY76Z2rM5mHXA,
seanpaul-F7+t8E8rja9g9hUCZPvPmw, abhinavk-sgV2jX0FEOL9JmXXK+q4OQ,
dri-devel-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW
Use the standard DEFINE_SHOW_ATTRIBUTE macro for seq_file based
debugfs files instead of custom macros and hand-coded functions.
Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
---
drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.c | 14 +-------
drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c | 31 +++---------------
drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 34 +++-----------------
3 files changed, 10 insertions(+), 69 deletions(-)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.c
index 879c13fe74e0..7607aac9449c 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.c
@@ -299,18 +299,6 @@ static void dpu_disable_all_irqs(struct dpu_kms *dpu_kms)
}
#ifdef CONFIG_DEBUG_FS
-#define DEFINE_DPU_DEBUGFS_SEQ_FOPS(__prefix) \
-static int __prefix ## _open(struct inode *inode, struct file *file) \
-{ \
- return single_open(file, __prefix ## _show, inode->i_private); \
-} \
-static const struct file_operations __prefix ## _fops = { \
- .owner = THIS_MODULE, \
- .open = __prefix ## _open, \
- .release = single_release, \
- .read = seq_read, \
- .llseek = seq_lseek, \
-}
static int dpu_debugfs_core_irq_show(struct seq_file *s, void *v)
{
@@ -341,7 +329,7 @@ static int dpu_debugfs_core_irq_show(struct seq_file *s, void *v)
return 0;
}
-DEFINE_DPU_DEBUGFS_SEQ_FOPS(dpu_debugfs_core_irq);
+DEFINE_SHOW_ATTRIBUTE(dpu_debugfs_core_irq);
int dpu_debugfs_core_irq_init(struct dpu_kms *dpu_kms,
struct dentry *parent)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c
index ae63590ad2d3..fb923c0c4171 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c
@@ -1232,7 +1232,7 @@ int dpu_crtc_vblank(struct drm_crtc *crtc, bool en)
}
#ifdef CONFIG_DEBUG_FS
-static int _dpu_debugfs_status_show(struct seq_file *s, void *data)
+static int dpu_crtc_debugfs_status_show(struct seq_file *s, void *data)
{
struct dpu_crtc *dpu_crtc;
struct dpu_plane_state *pstate = NULL;
@@ -1351,23 +1351,7 @@ static int _dpu_debugfs_status_show(struct seq_file *s, void *data)
return 0;
}
-static int _dpu_debugfs_status_open(struct inode *inode, struct file *file)
-{
- return single_open(file, _dpu_debugfs_status_show, inode->i_private);
-}
-
-#define DEFINE_DPU_DEBUGFS_SEQ_FOPS(__prefix) \
-static int __prefix ## _open(struct inode *inode, struct file *file) \
-{ \
- return single_open(file, __prefix ## _show, inode->i_private); \
-} \
-static const struct file_operations __prefix ## _fops = { \
- .owner = THIS_MODULE, \
- .open = __prefix ## _open, \
- .release = single_release, \
- .read = seq_read, \
- .llseek = seq_lseek, \
-}
+DEFINE_SHOW_ATTRIBUTE(dpu_crtc_debugfs_status);
static int dpu_crtc_debugfs_state_show(struct seq_file *s, void *v)
{
@@ -1391,20 +1375,13 @@ static int dpu_crtc_debugfs_state_show(struct seq_file *s, void *v)
return 0;
}
-DEFINE_DPU_DEBUGFS_SEQ_FOPS(dpu_crtc_debugfs_state);
+DEFINE_SHOW_ATTRIBUTE(dpu_crtc_debugfs_state);
static int _dpu_crtc_init_debugfs(struct drm_crtc *crtc)
{
struct dpu_crtc *dpu_crtc;
struct dpu_kms *dpu_kms;
- static const struct file_operations debugfs_status_fops = {
- .open = _dpu_debugfs_status_open,
- .read = seq_read,
- .llseek = seq_lseek,
- .release = single_release,
- };
-
if (!crtc)
return -EINVAL;
dpu_crtc = to_dpu_crtc(crtc);
@@ -1419,7 +1396,7 @@ static int _dpu_crtc_init_debugfs(struct drm_crtc *crtc)
/* don't error check these */
debugfs_create_file("status", 0400,
dpu_crtc->debugfs_root,
- dpu_crtc, &debugfs_status_fops);
+ dpu_crtc, &dpu_crtc_debugfs_status_fops);
debugfs_create_file("state", 0600,
dpu_crtc->debugfs_root,
&dpu_crtc->base,
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
index fd5bad16338d..7e3ba128cbaf 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
@@ -113,30 +113,17 @@ static int _dpu_danger_signal_status(struct seq_file *s,
return 0;
}
-#define DEFINE_DPU_DEBUGFS_SEQ_FOPS(__prefix) \
-static int __prefix ## _open(struct inode *inode, struct file *file) \
-{ \
- return single_open(file, __prefix ## _show, inode->i_private); \
-} \
-static const struct file_operations __prefix ## _fops = { \
- .owner = THIS_MODULE, \
- .open = __prefix ## _open, \
- .release = single_release, \
- .read = seq_read, \
- .llseek = seq_lseek, \
-}
-
static int dpu_debugfs_danger_stats_show(struct seq_file *s, void *v)
{
return _dpu_danger_signal_status(s, true);
}
-DEFINE_DPU_DEBUGFS_SEQ_FOPS(dpu_debugfs_danger_stats);
+DEFINE_SHOW_ATTRIBUTE(dpu_debugfs_danger_stats);
static int dpu_debugfs_safe_stats_show(struct seq_file *s, void *v)
{
return _dpu_danger_signal_status(s, false);
}
-DEFINE_DPU_DEBUGFS_SEQ_FOPS(dpu_debugfs_safe_stats);
+DEFINE_SHOW_ATTRIBUTE(dpu_debugfs_safe_stats);
static void dpu_debugfs_danger_destroy(struct dpu_kms *dpu_kms)
{
@@ -162,7 +149,7 @@ static int dpu_debugfs_danger_init(struct dpu_kms *dpu_kms,
return 0;
}
-static int _dpu_debugfs_show_regset32(struct seq_file *s, void *data)
+static int dpu_debugfs_regset32_show(struct seq_file *s, void *data)
{
struct dpu_debugfs_regset32 *regset;
struct dpu_kms *dpu_kms;
@@ -212,18 +199,7 @@ static int _dpu_debugfs_show_regset32(struct seq_file *s, void *data)
return 0;
}
-static int dpu_debugfs_open_regset32(struct inode *inode,
- struct file *file)
-{
- return single_open(file, _dpu_debugfs_show_regset32, inode->i_private);
-}
-
-static const struct file_operations dpu_fops_regset32 = {
- .open = dpu_debugfs_open_regset32,
- .read = seq_read,
- .llseek = seq_lseek,
- .release = single_release,
-};
+DEFINE_SHOW_ATTRIBUTE(dpu_debugfs_regset32);
void dpu_debugfs_setup_regset32(struct dpu_debugfs_regset32 *regset,
uint32_t offset, uint32_t length, struct dpu_kms *dpu_kms)
@@ -245,7 +221,7 @@ void *dpu_debugfs_create_regset32(const char *name, umode_t mode,
regset->offset = round_down(regset->offset, 4);
return debugfs_create_file(name, mode, parent,
- regset, &dpu_fops_regset32);
+ regset, &dpu_debugfs_regset32_fops);
}
static int _dpu_debugfs_init(struct dpu_kms *dpu_kms)
--
2.18.0
_______________________________________________
Freedreno mailing list
Freedreno@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/freedreno
^ permalink raw reply related [flat|nested] 29+ messages in thread
* [PATCH 03/11] drm/msm/dpu: Remove dpu_crtc_get_mixer_height
[not found] ` <20181018195836.15885-1-jcrouse-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2018-10-18 19:58 ` [PATCH 01/11] drm/msm/dpu: Remove dpu_dbg Jordan Crouse
2018-10-18 19:58 ` [PATCH 02/11] drm/msm/dpu: Use DEFINE_SHOW_ATTRIBUTE Jordan Crouse
@ 2018-10-18 19:58 ` Jordan Crouse
[not found] ` <20181018195836.15885-4-jcrouse-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2018-10-18 19:58 ` [PATCH 04/11] drm/msm/dpu: Remove dpu_crtc_is_enabled() Jordan Crouse
` (7 subsequent siblings)
10 siblings, 1 reply; 29+ messages in thread
From: Jordan Crouse @ 2018-10-18 19:58 UTC (permalink / raw)
To: freedreno-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW
Cc: linux-arm-msm-u79uwXL29TY76Z2rM5mHXA,
seanpaul-F7+t8E8rja9g9hUCZPvPmw, abhinavk-sgV2jX0FEOL9JmXXK+q4OQ,
dri-devel-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW
dpu_crtc_get_mixer_height() is only used once and the value it
returns can be easily derived from the calling function.
Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
---
drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c | 3 +--
drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.h | 13 -------------
2 files changed, 1 insertion(+), 15 deletions(-)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c
index fb923c0c4171..a8aa59b8caeb 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c
@@ -491,7 +491,6 @@ static void _dpu_crtc_setup_mixers(struct drm_crtc *crtc)
static void _dpu_crtc_setup_lm_bounds(struct drm_crtc *crtc,
struct drm_crtc_state *state)
{
- struct dpu_crtc *dpu_crtc = to_dpu_crtc(crtc);
struct dpu_crtc_state *cstate = to_dpu_crtc_state(state);
struct drm_display_mode *adj_mode = &state->adjusted_mode;
u32 crtc_split_width = _dpu_crtc_get_mixer_width(cstate, adj_mode);
@@ -502,7 +501,7 @@ static void _dpu_crtc_setup_lm_bounds(struct drm_crtc *crtc,
r->x1 = crtc_split_width * i;
r->y1 = 0;
r->x2 = r->x1 + crtc_split_width;
- r->y2 = dpu_crtc_get_mixer_height(dpu_crtc, cstate, adj_mode);
+ r->y2 = adj_mode->vdisplay;
trace_dpu_crtc_setup_lm_bounds(DRMID(crtc), i, r);
}
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.h
index 4822602402f9..2be4312038c9 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.h
@@ -245,19 +245,6 @@ static inline bool dpu_crtc_state_is_stereo(struct dpu_crtc_state *cstate)
return cstate->num_mixers == CRTC_DUAL_MIXERS;
}
-/**
- * dpu_crtc_get_mixer_height - get the mixer height
- * Mixer height will be same as panel height
- */
-static inline int dpu_crtc_get_mixer_height(struct dpu_crtc *dpu_crtc,
- struct dpu_crtc_state *cstate, struct drm_display_mode *mode)
-{
- if (!dpu_crtc || !cstate || !mode)
- return 0;
-
- return mode->vdisplay;
-}
-
/**
* dpu_crtc_frame_pending - retun the number of pending frames
* @crtc: Pointer to drm crtc object
--
2.18.0
_______________________________________________
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Freedreno@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/freedreno
^ permalink raw reply related [flat|nested] 29+ messages in thread
* [PATCH 04/11] drm/msm/dpu: Remove dpu_crtc_is_enabled()
[not found] ` <20181018195836.15885-1-jcrouse-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
` (2 preceding siblings ...)
2018-10-18 19:58 ` [PATCH 03/11] drm/msm/dpu: Remove dpu_crtc_get_mixer_height Jordan Crouse
@ 2018-10-18 19:58 ` Jordan Crouse
[not found] ` <20181018195836.15885-5-jcrouse-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2018-10-18 19:58 ` [PATCH 05/11] drm/msm/dpu: Cleanup some container_of helper functions Jordan Crouse
` (6 subsequent siblings)
10 siblings, 1 reply; 29+ messages in thread
From: Jordan Crouse @ 2018-10-18 19:58 UTC (permalink / raw)
To: freedreno-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW
Cc: linux-arm-msm-u79uwXL29TY76Z2rM5mHXA,
seanpaul-F7+t8E8rja9g9hUCZPvPmw, abhinavk-sgV2jX0FEOL9JmXXK+q4OQ,
dri-devel-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW
The static inline function dpu_crtc_enabled() is only called once
and the function that calls it in turn is only called once and
the return value can be easily checked in the calling functions
so collapse everything down.
Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
---
drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c | 17 ++++++-----------
drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.h | 9 ---------
2 files changed, 6 insertions(+), 20 deletions(-)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c
index 22e84b3d7f98..e68ccb7a898a 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c
@@ -57,18 +57,13 @@ static struct dpu_kms *_dpu_crtc_get_kms(struct drm_crtc *crtc)
return to_dpu_kms(priv->kms);
}
-static bool _dpu_core_perf_crtc_is_power_on(struct drm_crtc *crtc)
-{
- return dpu_crtc_is_enabled(crtc);
-}
-
static bool _dpu_core_video_mode_intf_connected(struct drm_crtc *crtc)
{
struct drm_crtc *tmp_crtc;
drm_for_each_crtc(tmp_crtc, crtc->dev) {
if ((dpu_crtc_get_intf_mode(tmp_crtc) == INTF_MODE_VIDEO) &&
- _dpu_core_perf_crtc_is_power_on(tmp_crtc)) {
+ tmp_crtc->enabled) {
DPU_DEBUG("video interface connected crtc:%d\n",
tmp_crtc->base.id);
return true;
@@ -164,7 +159,7 @@ int dpu_core_perf_crtc_check(struct drm_crtc *crtc,
curr_client_type = dpu_crtc_get_client_type(crtc);
drm_for_each_crtc(tmp_crtc, crtc->dev) {
- if (_dpu_core_perf_crtc_is_power_on(tmp_crtc) &&
+ if (tmp_crtc->enabled &&
(dpu_crtc_get_client_type(tmp_crtc) ==
curr_client_type) &&
(tmp_crtc != crtc)) {
@@ -223,7 +218,7 @@ static int _dpu_core_perf_crtc_update_bus(struct dpu_kms *kms,
int ret = 0;
drm_for_each_crtc(tmp_crtc, crtc->dev) {
- if (_dpu_core_perf_crtc_is_power_on(tmp_crtc) &&
+ if (tmp_crtc->enabled &&
curr_client_type ==
dpu_crtc_get_client_type(tmp_crtc)) {
dpu_cstate = to_dpu_crtc_state(tmp_crtc->state);
@@ -280,7 +275,7 @@ void dpu_core_perf_crtc_release_bw(struct drm_crtc *crtc)
*/
if (dpu_crtc_get_intf_mode(crtc) == INTF_MODE_CMD)
drm_for_each_crtc(tmp_crtc, crtc->dev) {
- if (_dpu_core_perf_crtc_is_power_on(tmp_crtc) &&
+ if (tmp_crtc->enabled &&
dpu_crtc_get_intf_mode(tmp_crtc) ==
INTF_MODE_VIDEO)
return;
@@ -315,7 +310,7 @@ static u64 _dpu_core_perf_get_core_clk_rate(struct dpu_kms *kms)
struct dpu_crtc_state *dpu_cstate;
drm_for_each_crtc(crtc, kms->dev) {
- if (_dpu_core_perf_crtc_is_power_on(crtc)) {
+ if (crtc->enabled) {
dpu_cstate = to_dpu_crtc_state(crtc->state);
clk_rate = max(dpu_cstate->new_perf.core_clk_rate,
clk_rate);
@@ -366,7 +361,7 @@ int dpu_core_perf_crtc_update(struct drm_crtc *crtc,
old = &dpu_crtc->cur_perf;
new = &dpu_cstate->new_perf;
- if (_dpu_core_perf_crtc_is_power_on(crtc) && !stop_req) {
+ if (crtc->enabled && !stop_req) {
for (i = 0; i < DPU_POWER_HANDLE_DBUS_ID_MAX; i++) {
/*
* cases for bus bandwidth update.
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.h
index 2be4312038c9..90bb255fad3a 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.h
@@ -311,13 +311,4 @@ static inline enum dpu_crtc_client_type dpu_crtc_get_client_type(
return crtc && crtc->state ? RT_CLIENT : NRT_CLIENT;
}
-/**
- * dpu_crtc_is_enabled - check if dpu crtc is enabled or not
- * @crtc: Pointer to crtc
- */
-static inline bool dpu_crtc_is_enabled(struct drm_crtc *crtc)
-{
- return crtc ? crtc->enabled : false;
-}
-
#endif /* _DPU_CRTC_H_ */
--
2.18.0
_______________________________________________
Freedreno mailing list
Freedreno@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/freedreno
^ permalink raw reply related [flat|nested] 29+ messages in thread
* [PATCH 05/11] drm/msm/dpu: Cleanup some container_of helper functions
[not found] ` <20181018195836.15885-1-jcrouse-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
` (3 preceding siblings ...)
2018-10-18 19:58 ` [PATCH 04/11] drm/msm/dpu: Remove dpu_crtc_is_enabled() Jordan Crouse
@ 2018-10-18 19:58 ` Jordan Crouse
2018-10-18 21:49 ` Sam Ravnborg
2018-10-18 19:58 ` [PATCH 06/11] drm/msm/dpu: Cleanup callers of dpu_hw_blk_init Jordan Crouse
` (5 subsequent siblings)
10 siblings, 1 reply; 29+ messages in thread
From: Jordan Crouse @ 2018-10-18 19:58 UTC (permalink / raw)
To: freedreno-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW
Cc: linux-arm-msm-u79uwXL29TY76Z2rM5mHXA,
seanpaul-F7+t8E8rja9g9hUCZPvPmw, abhinavk-sgV2jX0FEOL9JmXXK+q4OQ,
dri-devel-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW
Cleanup a number of static inline container_of() helper functions
because they are either unused or only used in one file and can
be performed inline or with a simple #define.
Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
---
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.h | 10 ----------
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.h | 10 ----------
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.h | 10 ----------
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.h | 10 ----------
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.h | 10 ----------
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_top.h | 10 ----------
drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c | 5 ++++-
7 files changed, 4 insertions(+), 61 deletions(-)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.h
index 6f313faca43e..f022c636e4bf 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.h
@@ -184,16 +184,6 @@ struct dpu_hw_ctl {
struct dpu_hw_ctl_ops ops;
};
-/**
- * dpu_hw_ctl - convert base object dpu_hw_base to container
- * @hw: Pointer to base hardware block
- * return: Pointer to hardware block container
- */
-static inline struct dpu_hw_ctl *to_dpu_hw_ctl(struct dpu_hw_blk *hw)
-{
- return container_of(hw, struct dpu_hw_ctl, base);
-}
-
/**
* dpu_hw_ctl_init(): Initializes the ctl_path hw driver object.
* should be called before accessing every ctl path registers.
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.h
index 3b77df460dea..a2b0dbc23058 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.h
@@ -91,16 +91,6 @@ struct dpu_hw_intf {
struct dpu_hw_intf_ops ops;
};
-/**
- * to_dpu_hw_intf - convert base object dpu_hw_base to container
- * @hw: Pointer to base hardware block
- * return: Pointer to hardware block container
- */
-static inline struct dpu_hw_intf *to_dpu_hw_intf(struct dpu_hw_blk *hw)
-{
- return container_of(hw, struct dpu_hw_intf, base);
-}
-
/**
* dpu_hw_intf_init(): Initializes the intf driver for the passed
* interface idx.
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.h
index 5b036aca8340..200cd874b683 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.h
@@ -85,16 +85,6 @@ struct dpu_hw_mixer {
struct dpu_hw_mixer_cfg cfg;
};
-/**
- * to_dpu_hw_mixer - convert base object dpu_hw_base to container
- * @hw: Pointer to base hardware block
- * return: Pointer to hardware block container
- */
-static inline struct dpu_hw_mixer *to_dpu_hw_mixer(struct dpu_hw_blk *hw)
-{
- return container_of(hw, struct dpu_hw_mixer, base);
-}
-
/**
* dpu_hw_lm_init(): Initializes the mixer hw driver object.
* should be called once before accessing every mixer.
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.h
index 3caccd7d6a3e..0e02e43cee14 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.h
@@ -104,16 +104,6 @@ struct dpu_hw_pingpong {
struct dpu_hw_pingpong_ops ops;
};
-/**
- * dpu_hw_pingpong - convert base object dpu_hw_base to container
- * @hw: Pointer to base hardware block
- * return: Pointer to hardware block container
- */
-static inline struct dpu_hw_pingpong *to_dpu_hw_pingpong(struct dpu_hw_blk *hw)
-{
- return container_of(hw, struct dpu_hw_pingpong, base);
-}
-
/**
* dpu_hw_pingpong_init - initializes the pingpong driver for the passed
* pingpong idx.
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.h
index 4d81e5f5ce1b..119b4e1c16be 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.h
@@ -391,16 +391,6 @@ struct dpu_hw_pipe {
struct dpu_hw_sspp_ops ops;
};
-/**
- * dpu_hw_pipe - convert base object dpu_hw_base to container
- * @hw: Pointer to base hardware block
- * return: Pointer to hardware block container
- */
-static inline struct dpu_hw_pipe *to_dpu_hw_pipe(struct dpu_hw_blk *hw)
-{
- return container_of(hw, struct dpu_hw_pipe, base);
-}
-
/**
* dpu_hw_sspp_init - initializes the sspp hw driver object.
* Should be called once before accessing every pipe.
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_top.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_top.h
index 192e338f20bb..aa21fd834398 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_top.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_top.h
@@ -160,16 +160,6 @@ struct dpu_hw_mdp {
struct dpu_hw_mdp_ops ops;
};
-/**
- * to_dpu_hw_mdp - convert base object dpu_hw_base to container
- * @hw: Pointer to base hardware block
- * return: Pointer to hardware block container
- */
-static inline struct dpu_hw_mdp *to_dpu_hw_mdp(struct dpu_hw_blk *hw)
-{
- return container_of(hw, struct dpu_hw_mdp, base);
-}
-
/**
* dpu_hw_mdptop_init - initializes the top driver for the passed idx
* @idx: Interface index for which driver object is required
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c
index bdb117709674..3e0e493ae0ce 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c
@@ -405,6 +405,8 @@ static bool _dpu_rm_needs_split_display(const struct msm_display_topology *top)
return top->num_intf > 1;
}
+#define to_dpu_hw_mixer(hw) container_of((hw), struct dpu_hw_mixer, base)
+
/**
* _dpu_rm_check_lm_and_get_connected_blks - check if proposed layer mixer meets
* proposed use case requirements, incl. hardwired dependent blocks like
@@ -566,7 +568,8 @@ static int _dpu_rm_reserve_ctls(
dpu_rm_init_hw_iter(&iter, 0, DPU_HW_BLK_CTL);
while (_dpu_rm_get_hw_locked(rm, &iter)) {
- const struct dpu_hw_ctl *ctl = to_dpu_hw_ctl(iter.blk->hw);
+ const struct dpu_hw_ctl *ctl =
+ container_of(iter.blk->hw, struct dpu_hw_ctl, base);
unsigned long features = ctl->caps->features;
bool has_split_display;
--
2.18.0
_______________________________________________
Freedreno mailing list
Freedreno@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/freedreno
^ permalink raw reply related [flat|nested] 29+ messages in thread
* [PATCH 06/11] drm/msm/dpu: Cleanup callers of dpu_hw_blk_init
[not found] ` <20181018195836.15885-1-jcrouse-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
` (4 preceding siblings ...)
2018-10-18 19:58 ` [PATCH 05/11] drm/msm/dpu: Cleanup some container_of helper functions Jordan Crouse
@ 2018-10-18 19:58 ` Jordan Crouse
2018-10-18 21:53 ` Sam Ravnborg
2018-10-18 19:58 ` [PATCH 07/11] drm/msm: Make irq_postinstall optional Jordan Crouse
` (4 subsequent siblings)
10 siblings, 1 reply; 29+ messages in thread
From: Jordan Crouse @ 2018-10-18 19:58 UTC (permalink / raw)
To: freedreno-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW
Cc: linux-arm-msm-u79uwXL29TY76Z2rM5mHXA,
seanpaul-F7+t8E8rja9g9hUCZPvPmw, abhinavk-sgV2jX0FEOL9JmXXK+q4OQ,
dri-devel-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW
Outside of superfluous parameter checks the dpu_hw_blk_init()
doesn't have any failure paths. Switch it over to be a void
function and we can remove error handling paths in all the functions
that call it. While we're in those functions remove unneeded
initialization for a static variable.
Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
---
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_blk.c | 10 +-------
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_blk.h | 2 +-
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c | 17 ++------------
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.c | 17 ++------------
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.c | 23 ++-----------------
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.h | 5 ----
.../gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.c | 17 ++------------
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c | 17 ++------------
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_top.c | 17 ++------------
9 files changed, 14 insertions(+), 111 deletions(-)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_blk.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_blk.c
index 58d29e43faef..92f1c4241b9a 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_blk.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_blk.c
@@ -30,16 +30,10 @@ static LIST_HEAD(dpu_hw_blk_list);
* @type: hw block type - enum dpu_hw_blk_type
* @id: instance id of the hw block
* @ops: Pointer to block operations
- * return: 0 if success; error code otherwise
*/
-int dpu_hw_blk_init(struct dpu_hw_blk *hw_blk, u32 type, int id,
+void dpu_hw_blk_init(struct dpu_hw_blk *hw_blk, u32 type, int id,
struct dpu_hw_blk_ops *ops)
{
- if (!hw_blk) {
- pr_err("invalid parameters\n");
- return -EINVAL;
- }
-
INIT_LIST_HEAD(&hw_blk->list);
hw_blk->type = type;
hw_blk->id = id;
@@ -51,8 +45,6 @@ int dpu_hw_blk_init(struct dpu_hw_blk *hw_blk, u32 type, int id,
mutex_lock(&dpu_hw_blk_lock);
list_add(&hw_blk->list, &dpu_hw_blk_list);
mutex_unlock(&dpu_hw_blk_lock);
-
- return 0;
}
/**
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_blk.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_blk.h
index 0f4ca8af1ec5..1934c2f7e8fa 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_blk.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_blk.h
@@ -44,7 +44,7 @@ struct dpu_hw_blk {
struct dpu_hw_blk_ops ops;
};
-int dpu_hw_blk_init(struct dpu_hw_blk *hw_blk, u32 type, int id,
+void dpu_hw_blk_init(struct dpu_hw_blk *hw_blk, u32 type, int id,
struct dpu_hw_blk_ops *ops);
void dpu_hw_blk_destroy(struct dpu_hw_blk *hw_blk);
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c
index 4aab04335c6d..1068b4b7940f 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c
@@ -483,10 +483,7 @@ static void _setup_ctl_ops(struct dpu_hw_ctl_ops *ops,
ops->get_bitmask_intf = dpu_hw_ctl_get_bitmask_intf;
};
-static struct dpu_hw_blk_ops dpu_hw_ops = {
- .start = NULL,
- .stop = NULL,
-};
+static struct dpu_hw_blk_ops dpu_hw_ops;
struct dpu_hw_ctl *dpu_hw_ctl_init(enum dpu_ctl idx,
void __iomem *addr,
@@ -494,7 +491,6 @@ struct dpu_hw_ctl *dpu_hw_ctl_init(enum dpu_ctl idx,
{
struct dpu_hw_ctl *c;
struct dpu_ctl_cfg *cfg;
- int rc;
c = kzalloc(sizeof(*c), GFP_KERNEL);
if (!c)
@@ -513,18 +509,9 @@ struct dpu_hw_ctl *dpu_hw_ctl_init(enum dpu_ctl idx,
c->mixer_count = m->mixer_count;
c->mixer_hw_caps = m->mixer;
- rc = dpu_hw_blk_init(&c->base, DPU_HW_BLK_CTL, idx, &dpu_hw_ops);
- if (rc) {
- DPU_ERROR("failed to init hw blk %d\n", rc);
- goto blk_init_error;
- }
+ dpu_hw_blk_init(&c->base, DPU_HW_BLK_CTL, idx, &dpu_hw_ops);
return c;
-
-blk_init_error:
- kzfree(c);
-
- return ERR_PTR(rc);
}
void dpu_hw_ctl_destroy(struct dpu_hw_ctl *ctx)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.c
index 695d27a730e8..f6a83daa385b 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.c
@@ -264,10 +264,7 @@ static void _setup_intf_ops(struct dpu_hw_intf_ops *ops,
ops->get_line_count = dpu_hw_intf_get_line_count;
}
-static struct dpu_hw_blk_ops dpu_hw_ops = {
- .start = NULL,
- .stop = NULL,
-};
+static struct dpu_hw_blk_ops dpu_hw_ops;
struct dpu_hw_intf *dpu_hw_intf_init(enum dpu_intf idx,
void __iomem *addr,
@@ -275,7 +272,6 @@ struct dpu_hw_intf *dpu_hw_intf_init(enum dpu_intf idx,
{
struct dpu_hw_intf *c;
struct dpu_intf_cfg *cfg;
- int rc;
c = kzalloc(sizeof(*c), GFP_KERNEL);
if (!c)
@@ -296,18 +292,9 @@ struct dpu_hw_intf *dpu_hw_intf_init(enum dpu_intf idx,
c->mdss = m;
_setup_intf_ops(&c->ops, c->cap->features);
- rc = dpu_hw_blk_init(&c->base, DPU_HW_BLK_INTF, idx, &dpu_hw_ops);
- if (rc) {
- DPU_ERROR("failed to init hw blk %d\n", rc);
- goto blk_init_error;
- }
+ dpu_hw_blk_init(&c->base, DPU_HW_BLK_INTF, idx, &dpu_hw_ops);
return c;
-
-blk_init_error:
- kzfree(c);
-
- return ERR_PTR(rc);
}
void dpu_hw_intf_destroy(struct dpu_hw_intf *intf)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.c
index c76b5cc949fb..018df2c3b7ed 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.c
@@ -156,11 +156,6 @@ static void dpu_hw_lm_setup_color3(struct dpu_hw_mixer *ctx,
DPU_REG_WRITE(c, LM_OP_MODE, op_mode);
}
-static void dpu_hw_lm_gc(struct dpu_hw_mixer *mixer,
- void *cfg)
-{
-}
-
static void _setup_mixer_ops(struct dpu_mdss_cfg *m,
struct dpu_hw_lm_ops *ops,
unsigned long features)
@@ -172,13 +167,9 @@ static void _setup_mixer_ops(struct dpu_mdss_cfg *m,
ops->setup_blend_config = dpu_hw_lm_setup_blend_config;
ops->setup_alpha_out = dpu_hw_lm_setup_color3;
ops->setup_border_color = dpu_hw_lm_setup_border_color;
- ops->setup_gc = dpu_hw_lm_gc;
};
-static struct dpu_hw_blk_ops dpu_hw_ops = {
- .start = NULL,
- .stop = NULL,
-};
+static struct dpu_hw_blk_ops dpu_hw_ops;
struct dpu_hw_mixer *dpu_hw_lm_init(enum dpu_lm idx,
void __iomem *addr,
@@ -186,7 +177,6 @@ struct dpu_hw_mixer *dpu_hw_lm_init(enum dpu_lm idx,
{
struct dpu_hw_mixer *c;
struct dpu_lm_cfg *cfg;
- int rc;
c = kzalloc(sizeof(*c), GFP_KERNEL);
if (!c)
@@ -203,18 +193,9 @@ struct dpu_hw_mixer *dpu_hw_lm_init(enum dpu_lm idx,
c->cap = cfg;
_setup_mixer_ops(m, &c->ops, c->cap->features);
- rc = dpu_hw_blk_init(&c->base, DPU_HW_BLK_LM, idx, &dpu_hw_ops);
- if (rc) {
- DPU_ERROR("failed to init hw blk %d\n", rc);
- goto blk_init_error;
- }
+ dpu_hw_blk_init(&c->base, DPU_HW_BLK_LM, idx, &dpu_hw_ops);
return c;
-
-blk_init_error:
- kzfree(c);
-
- return ERR_PTR(rc);
}
void dpu_hw_lm_destroy(struct dpu_hw_mixer *lm)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.h
index 200cd874b683..27699000aaca 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.h
@@ -61,11 +61,6 @@ struct dpu_hw_lm_ops {
void (*setup_border_color)(struct dpu_hw_mixer *ctx,
struct dpu_mdss_color *color,
u8 border_en);
- /**
- * setup_gc : enable/disable gamma correction feature
- */
- void (*setup_gc)(struct dpu_hw_mixer *mixer,
- void *cfg);
};
struct dpu_hw_mixer {
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.c
index cfc93816078f..3bdf47ed1845 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.c
@@ -199,10 +199,7 @@ static void _setup_pingpong_ops(struct dpu_hw_pingpong_ops *ops,
ops->get_line_count = dpu_hw_pp_get_line_count;
};
-static struct dpu_hw_blk_ops dpu_hw_ops = {
- .start = NULL,
- .stop = NULL,
-};
+static struct dpu_hw_blk_ops dpu_hw_ops;
struct dpu_hw_pingpong *dpu_hw_pingpong_init(enum dpu_pingpong idx,
void __iomem *addr,
@@ -210,7 +207,6 @@ struct dpu_hw_pingpong *dpu_hw_pingpong_init(enum dpu_pingpong idx,
{
struct dpu_hw_pingpong *c;
struct dpu_pingpong_cfg *cfg;
- int rc;
c = kzalloc(sizeof(*c), GFP_KERNEL);
if (!c)
@@ -226,18 +222,9 @@ struct dpu_hw_pingpong *dpu_hw_pingpong_init(enum dpu_pingpong idx,
c->caps = cfg;
_setup_pingpong_ops(&c->ops, c->caps);
- rc = dpu_hw_blk_init(&c->base, DPU_HW_BLK_PINGPONG, idx, &dpu_hw_ops);
- if (rc) {
- DPU_ERROR("failed to init hw blk %d\n", rc);
- goto blk_init_error;
- }
+ dpu_hw_blk_init(&c->base, DPU_HW_BLK_PINGPONG, idx, &dpu_hw_ops);
return c;
-
-blk_init_error:
- kzfree(c);
-
- return ERR_PTR(rc);
}
void dpu_hw_pingpong_destroy(struct dpu_hw_pingpong *pp)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c
index 8297963d2c4c..3ebdf292d8f2 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c
@@ -696,10 +696,7 @@ static struct dpu_sspp_cfg *_sspp_offset(enum dpu_sspp sspp,
return ERR_PTR(-ENOMEM);
}
-static struct dpu_hw_blk_ops dpu_hw_ops = {
- .start = NULL,
- .stop = NULL,
-};
+static struct dpu_hw_blk_ops dpu_hw_ops;
struct dpu_hw_pipe *dpu_hw_sspp_init(enum dpu_sspp idx,
void __iomem *addr, struct dpu_mdss_cfg *catalog,
@@ -707,7 +704,6 @@ struct dpu_hw_pipe *dpu_hw_sspp_init(enum dpu_sspp idx,
{
struct dpu_hw_pipe *hw_pipe;
struct dpu_sspp_cfg *cfg;
- int rc;
if (!addr || !catalog)
return ERR_PTR(-EINVAL);
@@ -729,18 +725,9 @@ struct dpu_hw_pipe *dpu_hw_sspp_init(enum dpu_sspp idx,
hw_pipe->cap = cfg;
_setup_layer_ops(hw_pipe, hw_pipe->cap->features);
- rc = dpu_hw_blk_init(&hw_pipe->base, DPU_HW_BLK_SSPP, idx, &dpu_hw_ops);
- if (rc) {
- DPU_ERROR("failed to init hw blk %d\n", rc);
- goto blk_init_error;
- }
+ dpu_hw_blk_init(&hw_pipe->base, DPU_HW_BLK_SSPP, idx, &dpu_hw_ops);
return hw_pipe;
-
-blk_init_error:
- kzfree(hw_pipe);
-
- return ERR_PTR(rc);
}
void dpu_hw_sspp_destroy(struct dpu_hw_pipe *ctx)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_top.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_top.c
index f7e0f661a8bb..a041597bb849 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_top.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_top.c
@@ -321,10 +321,7 @@ static const struct dpu_mdp_cfg *_top_offset(enum dpu_mdp mdp,
return ERR_PTR(-EINVAL);
}
-static struct dpu_hw_blk_ops dpu_hw_ops = {
- .start = NULL,
- .stop = NULL,
-};
+static struct dpu_hw_blk_ops dpu_hw_ops;
struct dpu_hw_mdp *dpu_hw_mdptop_init(enum dpu_mdp idx,
void __iomem *addr,
@@ -332,7 +329,6 @@ struct dpu_hw_mdp *dpu_hw_mdptop_init(enum dpu_mdp idx,
{
struct dpu_hw_mdp *mdp;
const struct dpu_mdp_cfg *cfg;
- int rc;
if (!addr || !m)
return ERR_PTR(-EINVAL);
@@ -354,18 +350,9 @@ struct dpu_hw_mdp *dpu_hw_mdptop_init(enum dpu_mdp idx,
mdp->caps = cfg;
_setup_mdp_ops(&mdp->ops, mdp->caps->features);
- rc = dpu_hw_blk_init(&mdp->base, DPU_HW_BLK_TOP, idx, &dpu_hw_ops);
- if (rc) {
- DPU_ERROR("failed to init hw blk %d\n", rc);
- goto blk_init_error;
- }
+ dpu_hw_blk_init(&mdp->base, DPU_HW_BLK_TOP, idx, &dpu_hw_ops);
return mdp;
-
-blk_init_error:
- kzfree(mdp);
-
- return ERR_PTR(rc);
}
void dpu_hw_mdp_destroy(struct dpu_hw_mdp *mdp)
--
2.18.0
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^ permalink raw reply related [flat|nested] 29+ messages in thread
* [PATCH 07/11] drm/msm: Make irq_postinstall optional
[not found] ` <20181018195836.15885-1-jcrouse-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
` (5 preceding siblings ...)
2018-10-18 19:58 ` [PATCH 06/11] drm/msm/dpu: Cleanup callers of dpu_hw_blk_init Jordan Crouse
@ 2018-10-18 19:58 ` Jordan Crouse
[not found] ` <20181018195836.15885-8-jcrouse-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2018-10-18 19:58 ` [PATCH 08/11] drm/msm/dpu: Remove dpu_irq and unused functions Jordan Crouse
` (3 subsequent siblings)
10 siblings, 1 reply; 29+ messages in thread
From: Jordan Crouse @ 2018-10-18 19:58 UTC (permalink / raw)
To: freedreno-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW
Cc: linux-arm-msm-u79uwXL29TY76Z2rM5mHXA,
seanpaul-F7+t8E8rja9g9hUCZPvPmw, abhinavk-sgV2jX0FEOL9JmXXK+q4OQ,
dri-devel-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW
Allow the KMS operation 'irq_postinstall' to be optional
so that the target display drivers don't need to define
a dummy function if they don't need one.
Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
---
drivers/gpu/drm/msm/msm_drv.c | 6 +++++-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/msm/msm_drv.c b/drivers/gpu/drm/msm/msm_drv.c
index 107e976be55e..8ce6992dbdff 100644
--- a/drivers/gpu/drm/msm/msm_drv.c
+++ b/drivers/gpu/drm/msm/msm_drv.c
@@ -724,7 +724,11 @@ static int msm_irq_postinstall(struct drm_device *dev)
struct msm_drm_private *priv = dev->dev_private;
struct msm_kms *kms = priv->kms;
BUG_ON(!kms);
- return kms->funcs->irq_postinstall(kms);
+
+ if (kms->funcs->irq_postinstall)
+ return kms->funcs->irq_postinstall(kms);
+
+ return 0;
}
static void msm_irq_uninstall(struct drm_device *dev)
--
2.18.0
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Freedreno@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/freedreno
^ permalink raw reply related [flat|nested] 29+ messages in thread
* [PATCH 08/11] drm/msm/dpu: Remove dpu_irq and unused functions
[not found] ` <20181018195836.15885-1-jcrouse-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
` (6 preceding siblings ...)
2018-10-18 19:58 ` [PATCH 07/11] drm/msm: Make irq_postinstall optional Jordan Crouse
@ 2018-10-18 19:58 ` Jordan Crouse
[not found] ` <20181018195836.15885-9-jcrouse-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2018-10-18 19:58 ` [PATCH 09/11] drm/msm/dpu: Debugfs related cleanups Jordan Crouse
` (2 subsequent siblings)
10 siblings, 1 reply; 29+ messages in thread
From: Jordan Crouse @ 2018-10-18 19:58 UTC (permalink / raw)
To: freedreno-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW
Cc: linux-arm-msm-u79uwXL29TY76Z2rM5mHXA,
seanpaul-F7+t8E8rja9g9hUCZPvPmw, abhinavk-sgV2jX0FEOL9JmXXK+q4OQ,
dri-devel-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW
dpu_irq.c does some unneeded checks and passes control
to dpu_core_irq.c The simple functions can be defined
in the same file where we use them and the files and
their associated hangers on can be deleted.
Additionally the postinstall hook isn't used even
in dpu_core_irq.c so zap that entire path.
Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
---
drivers/gpu/drm/msm/Makefile | 1 -
drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.c | 15 +----
drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.h | 7 ---
drivers/gpu/drm/msm/disp/dpu1/dpu_irq.c | 66 --------------------
drivers/gpu/drm/msm/disp/dpu1/dpu_irq.h | 59 -----------------
drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 22 ++++++-
drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h | 1 -
drivers/gpu/drm/msm/disp/dpu1/dpu_mdss.c | 5 ++
8 files changed, 28 insertions(+), 148 deletions(-)
delete mode 100644 drivers/gpu/drm/msm/disp/dpu1/dpu_irq.c
delete mode 100644 drivers/gpu/drm/msm/disp/dpu1/dpu_irq.h
diff --git a/drivers/gpu/drm/msm/Makefile b/drivers/gpu/drm/msm/Makefile
index e067dd1341b1..4b181c2a88d6 100644
--- a/drivers/gpu/drm/msm/Makefile
+++ b/drivers/gpu/drm/msm/Makefile
@@ -68,7 +68,6 @@ msm-y := \
disp/dpu1/dpu_hw_util.o \
disp/dpu1/dpu_hw_vbif.o \
disp/dpu1/dpu_io_util.o \
- disp/dpu1/dpu_irq.o \
disp/dpu1/dpu_kms.o \
disp/dpu1/dpu_mdss.o \
disp/dpu1/dpu_plane.o \
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.c
index 7607aac9449c..f66070cb2f42 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.c
@@ -364,10 +364,7 @@ void dpu_core_irq_preinstall(struct dpu_kms *dpu_kms)
struct msm_drm_private *priv;
int i;
- if (!dpu_kms) {
- DPU_ERROR("invalid dpu_kms\n");
- return;
- } else if (!dpu_kms->dev) {
+ if (!dpu_kms->dev) {
DPU_ERROR("invalid drm device\n");
return;
} else if (!dpu_kms->dev->dev_private) {
@@ -398,20 +395,12 @@ void dpu_core_irq_preinstall(struct dpu_kms *dpu_kms)
}
}
-int dpu_core_irq_postinstall(struct dpu_kms *dpu_kms)
-{
- return 0;
-}
-
void dpu_core_irq_uninstall(struct dpu_kms *dpu_kms)
{
struct msm_drm_private *priv;
int i;
- if (!dpu_kms) {
- DPU_ERROR("invalid dpu_kms\n");
- return;
- } else if (!dpu_kms->dev) {
+ if (!dpu_kms->dev) {
DPU_ERROR("invalid drm device\n");
return;
} else if (!dpu_kms->dev->dev_private) {
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.h
index 5e98bba46af5..884f77fa3eb6 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.h
@@ -23,13 +23,6 @@
*/
void dpu_core_irq_preinstall(struct dpu_kms *dpu_kms);
-/**
- * dpu_core_irq_postinstall - perform post-installation of core IRQ handler
- * @dpu_kms: DPU handle
- * @return: 0 if success; error code otherwise
- */
-int dpu_core_irq_postinstall(struct dpu_kms *dpu_kms);
-
/**
* dpu_core_irq_uninstall - uninstall core IRQ handler
* @dpu_kms: DPU handle
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_irq.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_irq.c
deleted file mode 100644
index d5e6ce0140cf..000000000000
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_irq.c
+++ /dev/null
@@ -1,66 +0,0 @@
-/* Copyright (c) 2015-2018, The Linux Foundation. All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 and
- * only version 2 as published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#define pr_fmt(fmt) "[drm:%s:%d] " fmt, __func__, __LINE__
-
-#include <linux/irqdomain.h>
-#include <linux/irq.h>
-#include <linux/kthread.h>
-
-#include "dpu_irq.h"
-#include "dpu_core_irq.h"
-
-irqreturn_t dpu_irq(struct msm_kms *kms)
-{
- struct dpu_kms *dpu_kms = to_dpu_kms(kms);
-
- return dpu_core_irq(dpu_kms);
-}
-
-void dpu_irq_preinstall(struct msm_kms *kms)
-{
- struct dpu_kms *dpu_kms = to_dpu_kms(kms);
-
- if (!dpu_kms->dev || !dpu_kms->dev->dev) {
- pr_err("invalid device handles\n");
- return;
- }
-
- dpu_core_irq_preinstall(dpu_kms);
-}
-
-int dpu_irq_postinstall(struct msm_kms *kms)
-{
- struct dpu_kms *dpu_kms = to_dpu_kms(kms);
- int rc;
-
- if (!kms) {
- DPU_ERROR("invalid parameters\n");
- return -EINVAL;
- }
-
- rc = dpu_core_irq_postinstall(dpu_kms);
-
- return rc;
-}
-
-void dpu_irq_uninstall(struct msm_kms *kms)
-{
- struct dpu_kms *dpu_kms = to_dpu_kms(kms);
-
- if (!kms) {
- DPU_ERROR("invalid parameters\n");
- return;
- }
-
- dpu_core_irq_uninstall(dpu_kms);
-}
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_irq.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_irq.h
deleted file mode 100644
index 3e147f7176e2..000000000000
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_irq.h
+++ /dev/null
@@ -1,59 +0,0 @@
-/* Copyright (c) 2015-2018, The Linux Foundation. All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 and
- * only version 2 as published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#ifndef __DPU_IRQ_H__
-#define __DPU_IRQ_H__
-
-#include <linux/kernel.h>
-#include <linux/irqdomain.h>
-
-#include "msm_kms.h"
-
-/**
- * dpu_irq_controller - define MDSS level interrupt controller context
- * @enabled_mask: enable status of MDSS level interrupt
- * @domain: interrupt domain of this controller
- */
-struct dpu_irq_controller {
- unsigned long enabled_mask;
- struct irq_domain *domain;
-};
-
-/**
- * dpu_irq_preinstall - perform pre-installation of MDSS IRQ handler
- * @kms: pointer to kms context
- * @return: none
- */
-void dpu_irq_preinstall(struct msm_kms *kms);
-
-/**
- * dpu_irq_postinstall - perform post-installation of MDSS IRQ handler
- * @kms: pointer to kms context
- * @return: 0 if success; error code otherwise
- */
-int dpu_irq_postinstall(struct msm_kms *kms);
-
-/**
- * dpu_irq_uninstall - uninstall MDSS IRQ handler
- * @drm_dev: pointer to kms context
- * @return: none
- */
-void dpu_irq_uninstall(struct msm_kms *kms);
-
-/**
- * dpu_irq - MDSS level IRQ handler
- * @kms: pointer to kms context
- * @return: interrupt handling status
- */
-irqreturn_t dpu_irq(struct msm_kms *kms);
-
-#endif /* __DPU_IRQ_H__ */
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
index 7e3ba128cbaf..2a91881048c8 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
@@ -706,10 +706,30 @@ static void _dpu_kms_set_encoder_mode(struct msm_kms *kms,
encoder->base.id, rc);
}
+static irqreturn_t dpu_irq(struct msm_kms *kms)
+{
+ struct dpu_kms *dpu_kms = to_dpu_kms(kms);
+
+ return dpu_core_irq(dpu_kms);
+}
+
+static void dpu_irq_preinstall(struct msm_kms *kms)
+{
+ struct dpu_kms *dpu_kms = to_dpu_kms(kms);
+
+ dpu_core_irq_preinstall(dpu_kms);
+}
+
+static void dpu_irq_uninstall(struct msm_kms *kms)
+{
+ struct dpu_kms *dpu_kms = to_dpu_kms(kms);
+
+ dpu_core_irq_uninstall(dpu_kms);
+}
+
static const struct msm_kms_funcs kms_funcs = {
.hw_init = dpu_kms_hw_init,
.irq_preinstall = dpu_irq_preinstall,
- .irq_postinstall = dpu_irq_postinstall,
.irq_uninstall = dpu_irq_uninstall,
.irq = dpu_irq,
.prepare_commit = dpu_kms_prepare_commit,
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h
index 12a2eb90e6b5..e7539c9870e4 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h
@@ -30,7 +30,6 @@
#include "dpu_hw_top.h"
#include "dpu_rm.h"
#include "dpu_power_handle.h"
-#include "dpu_irq.h"
#include "dpu_core_perf.h"
#define DRMID(x) ((x) ? (x)->base.id : -1)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_mdss.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_mdss.c
index 2235ef8129f4..19abf719811a 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_mdss.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_mdss.c
@@ -9,6 +9,11 @@
#define HW_INTR_STATUS 0x0010
+struct dpu_irq_controller {
+ unsigned long enabled_mask;
+ struct irq_domain *domain;
+};
+
struct dpu_mdss {
struct msm_mdss base;
void __iomem *mmio;
--
2.18.0
_______________________________________________
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Freedreno@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/freedreno
^ permalink raw reply related [flat|nested] 29+ messages in thread
* [PATCH 09/11] drm/msm/dpu: Debugfs related cleanups
[not found] ` <20181018195836.15885-1-jcrouse-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
` (7 preceding siblings ...)
2018-10-18 19:58 ` [PATCH 08/11] drm/msm/dpu: Remove dpu_irq and unused functions Jordan Crouse
@ 2018-10-18 19:58 ` Jordan Crouse
[not found] ` <20181018195836.15885-10-jcrouse-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2018-10-18 19:58 ` [PATCH 10/11] drm/msm/dpu: Further cleanups for static inline functions Jordan Crouse
2018-10-18 19:58 ` [PATCH 11/11] drm/msm/dpu: Clean up dpu_media_info.h " Jordan Crouse
10 siblings, 1 reply; 29+ messages in thread
From: Jordan Crouse @ 2018-10-18 19:58 UTC (permalink / raw)
To: freedreno-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW
Cc: linux-arm-msm-u79uwXL29TY76Z2rM5mHXA,
seanpaul-F7+t8E8rja9g9hUCZPvPmw, abhinavk-sgV2jX0FEOL9JmXXK+q4OQ,
dri-devel-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW
Do some cleanups to the code related to debugfs files from across
the DPU driver including removing destroy functions,
tweeks to the initialization functions, removal of unused
static inline stubs and skipping unneeded null checks.
Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
---
drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.c | 30 ++---------
drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.h | 9 +---
drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c | 17 -------
drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c | 30 ++---------
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 31 +++---------
drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 50 ++++---------------
drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h | 1 -
drivers/gpu/drm/msm/disp/dpu1/dpu_mdss.c | 3 +-
drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c | 18 ++-----
drivers/gpu/drm/msm/disp/dpu1/dpu_vbif.c | 11 +---
drivers/gpu/drm/msm/disp/dpu1/dpu_vbif.h | 15 +-----
11 files changed, 33 insertions(+), 182 deletions(-)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.c
index f66070cb2f42..f188c78dd736 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.c
@@ -307,10 +307,8 @@ static int dpu_debugfs_core_irq_show(struct seq_file *s, void *v)
unsigned long irq_flags;
int i, irq_count, enable_count, cb_count;
- if (!irq_obj || !irq_obj->enable_counts || !irq_obj->irq_cb_tbl) {
- DPU_ERROR("invalid parameters\n");
+ if (WARN_ON(!irq_obj->enable_counts || !irq_obj->irq_cb_tbl))
return 0;
- }
for (i = 0; i < irq_obj->total_irqs; i++) {
spin_lock_irqsave(&irq_obj->cb_lock, irq_flags);
@@ -331,31 +329,11 @@ static int dpu_debugfs_core_irq_show(struct seq_file *s, void *v)
DEFINE_SHOW_ATTRIBUTE(dpu_debugfs_core_irq);
-int dpu_debugfs_core_irq_init(struct dpu_kms *dpu_kms,
- struct dentry *parent)
-{
- dpu_kms->irq_obj.debugfs_file = debugfs_create_file("core_irq", 0600,
- parent, &dpu_kms->irq_obj,
- &dpu_debugfs_core_irq_fops);
-
- return 0;
-}
-
-void dpu_debugfs_core_irq_destroy(struct dpu_kms *dpu_kms)
-{
- debugfs_remove(dpu_kms->irq_obj.debugfs_file);
- dpu_kms->irq_obj.debugfs_file = NULL;
-}
-
-#else
-int dpu_debugfs_core_irq_init(struct dpu_kms *dpu_kms,
+void dpu_debugfs_core_irq_init(struct dpu_kms *dpu_kms,
struct dentry *parent)
{
- return 0;
-}
-
-void dpu_debugfs_core_irq_destroy(struct dpu_kms *dpu_kms)
-{
+ debugfs_create_file("core_irq", 0600, parent, &dpu_kms->irq_obj,
+ &dpu_debugfs_core_irq_fops);
}
#endif
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.h
index 884f77fa3eb6..e9015a2b23fe 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.h
@@ -132,15 +132,8 @@ int dpu_core_irq_unregister_callback(
* dpu_debugfs_core_irq_init - register core irq debugfs
* @dpu_kms: pointer to kms
* @parent: debugfs directory root
- * @Return: 0 on success
*/
-int dpu_debugfs_core_irq_init(struct dpu_kms *dpu_kms,
+void dpu_debugfs_core_irq_init(struct dpu_kms *dpu_kms,
struct dentry *parent);
-/**
- * dpu_debugfs_core_irq_destroy - deregister core irq debugfs
- * @dpu_kms: pointer to kms
- */
-void dpu_debugfs_core_irq_destroy(struct dpu_kms *dpu_kms);
-
#endif /* __DPU_CORE_IRQ_H__ */
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c
index e68ccb7a898a..7bc887ed9d74 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c
@@ -524,12 +524,6 @@ static const struct file_operations dpu_core_perf_mode_fops = {
.write = _dpu_core_perf_mode_write,
};
-static void dpu_core_perf_debugfs_destroy(struct dpu_core_perf *perf)
-{
- debugfs_remove_recursive(perf->debugfs_root);
- perf->debugfs_root = NULL;
-}
-
int dpu_core_perf_debugfs_init(struct dpu_core_perf *perf,
struct dentry *parent)
{
@@ -578,16 +572,6 @@ int dpu_core_perf_debugfs_init(struct dpu_core_perf *perf,
return 0;
}
-#else
-static void dpu_core_perf_debugfs_destroy(struct dpu_core_perf *perf)
-{
-}
-
-int dpu_core_perf_debugfs_init(struct dpu_core_perf *perf,
- struct dentry *parent)
-{
- return 0;
-}
#endif
void dpu_core_perf_destroy(struct dpu_core_perf *perf)
@@ -597,7 +581,6 @@ void dpu_core_perf_destroy(struct dpu_core_perf *perf)
return;
}
- dpu_core_perf_debugfs_destroy(perf);
perf->max_core_clk_rate = 0;
perf->core_clk = NULL;
perf->phandle = NULL;
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c
index a8aa59b8caeb..890994106e39 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c
@@ -1246,9 +1246,6 @@ static int dpu_crtc_debugfs_status_show(struct seq_file *s, void *data)
int i, out_width;
- if (!s || !s->private)
- return -EINVAL;
-
dpu_crtc = s->private;
crtc = &dpu_crtc->base;
@@ -1378,14 +1375,7 @@ DEFINE_SHOW_ATTRIBUTE(dpu_crtc_debugfs_state);
static int _dpu_crtc_init_debugfs(struct drm_crtc *crtc)
{
- struct dpu_crtc *dpu_crtc;
- struct dpu_kms *dpu_kms;
-
- if (!crtc)
- return -EINVAL;
- dpu_crtc = to_dpu_crtc(crtc);
-
- dpu_kms = _dpu_crtc_get_kms(crtc);
+ struct dpu_crtc *dpu_crtc = to_dpu_crtc(crtc);
dpu_crtc->debugfs_root = debugfs_create_dir(dpu_crtc->name,
crtc->dev->primary->debugfs_root);
@@ -1403,25 +1393,11 @@ static int _dpu_crtc_init_debugfs(struct drm_crtc *crtc)
return 0;
}
-
-static void _dpu_crtc_destroy_debugfs(struct drm_crtc *crtc)
-{
- struct dpu_crtc *dpu_crtc;
-
- if (!crtc)
- return;
- dpu_crtc = to_dpu_crtc(crtc);
- debugfs_remove_recursive(dpu_crtc->debugfs_root);
-}
#else
static int _dpu_crtc_init_debugfs(struct drm_crtc *crtc)
{
return 0;
}
-
-static void _dpu_crtc_destroy_debugfs(struct drm_crtc *crtc)
-{
-}
#endif /* CONFIG_DEBUG_FS */
static int dpu_crtc_late_register(struct drm_crtc *crtc)
@@ -1431,7 +1407,9 @@ static int dpu_crtc_late_register(struct drm_crtc *crtc)
static void dpu_crtc_early_unregister(struct drm_crtc *crtc)
{
- _dpu_crtc_destroy_debugfs(crtc);
+ struct dpu_crtc *dpu_crtc = to_dpu_crtc(crtc);
+
+ debugfs_remove_recursive(dpu_crtc->debugfs_root);
}
static const struct drm_crtc_funcs dpu_crtc_funcs = {
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
index 5559e5d40142..2811860f2688 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
@@ -1838,14 +1838,9 @@ void dpu_encoder_prepare_commit(struct drm_encoder *drm_enc)
#ifdef CONFIG_DEBUG_FS
static int dpu_encoder_status_show(struct seq_file *s, void *data)
{
- struct dpu_encoder_virt *dpu_enc;
+ struct dpu_encoder_virt *dpu_enc = s->private;
int i;
- if (!s || !s->private)
- return -EINVAL;
-
- dpu_enc = s->private;
-
mutex_lock(&dpu_enc->enc_lock);
for (i = 0; i < dpu_enc->num_phys_encs; i++) {
struct dpu_encoder_phys *phys = dpu_enc->phys_encs[i];
@@ -1879,18 +1874,17 @@ DEFINE_SHOW_ATTRIBUTE(dpu_encoder_status);
static int _dpu_encoder_init_debugfs(struct drm_encoder *drm_enc)
{
- struct dpu_encoder_virt *dpu_enc;
+ struct dpu_encoder_virt *dpu_enc = to_dpu_encoder_virt(drm_enc);
struct msm_drm_private *priv;
struct dpu_kms *dpu_kms;
int i;
char name[DPU_NAME_SIZE];
- if (!drm_enc || !drm_enc->dev || !drm_enc->dev->dev_private) {
+ if (!drm_enc->dev || !drm_enc->dev->dev_private) {
DPU_ERROR("invalid encoder or kms\n");
return -EINVAL;
}
- dpu_enc = to_dpu_encoder_virt(drm_enc);
priv = drm_enc->dev->dev_private;
dpu_kms = to_dpu_kms(priv->kms);
@@ -1915,26 +1909,11 @@ static int _dpu_encoder_init_debugfs(struct drm_encoder *drm_enc)
return 0;
}
-
-static void _dpu_encoder_destroy_debugfs(struct drm_encoder *drm_enc)
-{
- struct dpu_encoder_virt *dpu_enc;
-
- if (!drm_enc)
- return;
-
- dpu_enc = to_dpu_encoder_virt(drm_enc);
- debugfs_remove_recursive(dpu_enc->debugfs_root);
-}
#else
static int _dpu_encoder_init_debugfs(struct drm_encoder *drm_enc)
{
return 0;
}
-
-static void _dpu_encoder_destroy_debugfs(struct drm_encoder *drm_enc)
-{
-}
#endif
static int dpu_encoder_late_register(struct drm_encoder *encoder)
@@ -1944,7 +1923,9 @@ static int dpu_encoder_late_register(struct drm_encoder *encoder)
static void dpu_encoder_early_unregister(struct drm_encoder *encoder)
{
- _dpu_encoder_destroy_debugfs(encoder);
+ struct dpu_encoder_virt *dpu_enc = to_dpu_encoder_virt(encoder);
+
+ debugfs_remove_recursive(dpu_enc->debugfs_root);
}
static int dpu_encoder_virt_add_phys_encs(
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
index 2a91881048c8..01be305758c5 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
@@ -81,7 +81,7 @@ static int _dpu_danger_signal_status(struct seq_file *s,
struct dpu_danger_safe_status status;
int i;
- if (!kms || !kms->dev || !kms->dev->dev_private || !kms->hw_mdp) {
+ if (!kms->dev || !kms->dev->dev_private || !kms->hw_mdp) {
DPU_ERROR("invalid arg(s)\n");
return 0;
}
@@ -125,46 +125,31 @@ static int dpu_debugfs_safe_stats_show(struct seq_file *s, void *v)
}
DEFINE_SHOW_ATTRIBUTE(dpu_debugfs_safe_stats);
-static void dpu_debugfs_danger_destroy(struct dpu_kms *dpu_kms)
-{
- debugfs_remove_recursive(dpu_kms->debugfs_danger);
- dpu_kms->debugfs_danger = NULL;
-}
-
-static int dpu_debugfs_danger_init(struct dpu_kms *dpu_kms,
+static void dpu_debugfs_danger_init(struct dpu_kms *dpu_kms,
struct dentry *parent)
{
dpu_kms->debugfs_danger = debugfs_create_dir("danger",
parent);
if (!dpu_kms->debugfs_danger) {
DPU_ERROR("failed to create danger debugfs\n");
- return -EINVAL;
}
debugfs_create_file("danger_status", 0600, dpu_kms->debugfs_danger,
dpu_kms, &dpu_debugfs_danger_stats_fops);
debugfs_create_file("safe_status", 0600, dpu_kms->debugfs_danger,
dpu_kms, &dpu_debugfs_safe_stats_fops);
-
- return 0;
}
static int dpu_debugfs_regset32_show(struct seq_file *s, void *data)
{
- struct dpu_debugfs_regset32 *regset;
- struct dpu_kms *dpu_kms;
+ struct dpu_debugfs_regset32 *regset = s->private;
+ struct dpu_kms *dpu_kms = regset->dpu_kms;
struct drm_device *dev;
struct msm_drm_private *priv;
void __iomem *base;
uint32_t i, addr;
- if (!s || !s->private)
- return 0;
-
- regset = s->private;
-
- dpu_kms = regset->dpu_kms;
- if (!dpu_kms || !dpu_kms->mmio)
+ if (!dpu_kms->mmio)
return 0;
dev = dpu_kms->dev;
@@ -231,7 +216,7 @@ static int _dpu_debugfs_init(struct dpu_kms *dpu_kms)
p = dpu_hw_util_get_log_mask_ptr();
- if (!dpu_kms || !p)
+ if (!p)
return -EINVAL;
dpu_kms->debugfs_root = debugfs_create_dir("debug",
@@ -245,9 +230,9 @@ static int _dpu_debugfs_init(struct dpu_kms *dpu_kms)
/* allow root to be NULL */
debugfs_create_x32(DPU_DEBUGFS_HWMASKNAME, 0600, dpu_kms->debugfs_root, p);
- (void) dpu_debugfs_danger_init(dpu_kms, dpu_kms->debugfs_root);
- (void) dpu_debugfs_vbif_init(dpu_kms, dpu_kms->debugfs_root);
- (void) dpu_debugfs_core_irq_init(dpu_kms, dpu_kms->debugfs_root);
+ dpu_debugfs_danger_init(dpu_kms, dpu_kms->debugfs_root);
+ dpu_debugfs_vbif_init(dpu_kms, dpu_kms->debugfs_root);
+ dpu_debugfs_core_irq_init(dpu_kms, dpu_kms->debugfs_root);
rc = dpu_core_perf_debugfs_init(&dpu_kms->perf, dpu_kms->debugfs_root);
if (rc) {
@@ -257,21 +242,6 @@ static int _dpu_debugfs_init(struct dpu_kms *dpu_kms)
return 0;
}
-
-static void _dpu_debugfs_destroy(struct dpu_kms *dpu_kms)
-{
- /* don't need to NULL check debugfs_root */
- if (dpu_kms) {
- dpu_debugfs_vbif_destroy(dpu_kms);
- dpu_debugfs_danger_destroy(dpu_kms);
- dpu_debugfs_core_irq_destroy(dpu_kms);
- debugfs_remove_recursive(dpu_kms->debugfs_root);
- }
-}
-#else
-static void _dpu_debugfs_destroy(struct dpu_kms *dpu_kms)
-{
-}
#endif
static int dpu_kms_enable_vblank(struct msm_kms *kms, struct drm_crtc *crtc)
@@ -626,7 +596,7 @@ static void _dpu_kms_hw_destroy(struct dpu_kms *dpu_kms)
&dpu_kms->phandle, dpu_kms->power_event);
/* safe to call these more than once during shutdown */
- _dpu_debugfs_destroy(dpu_kms);
+ debugfs_remove_recursive(dpu_kms->debugfs_root);
_dpu_kms_mmu_destroy(dpu_kms);
if (dpu_kms->catalog) {
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h
index e7539c9870e4..33ed5779687f 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h
@@ -102,7 +102,6 @@ struct dpu_irq {
atomic_t *enable_counts;
atomic_t *irq_counts;
spinlock_t cb_lock;
- struct dentry *debugfs_file;
};
struct dpu_kms {
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_mdss.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_mdss.c
index 19abf719811a..5ecc26fdc328 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_mdss.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_mdss.c
@@ -120,13 +120,12 @@ static int _dpu_mdss_irq_domain_add(struct dpu_mdss *dpu_mdss)
return 0;
}
-static int _dpu_mdss_irq_domain_fini(struct dpu_mdss *dpu_mdss)
+static void _dpu_mdss_irq_domain_fini(struct dpu_mdss *dpu_mdss)
{
if (dpu_mdss->irq_controller.domain) {
irq_domain_remove(dpu_mdss->irq_controller.domain);
dpu_mdss->irq_controller.domain = NULL;
}
- return 0;
}
static int dpu_mdss_enable(struct msm_mdss *mdss)
{
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c
index 98d8315f625d..3c5580c75581 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c
@@ -1451,25 +1451,11 @@ static int _dpu_plane_init_debugfs(struct drm_plane *plane)
return 0;
}
-
-static void _dpu_plane_destroy_debugfs(struct drm_plane *plane)
-{
- struct dpu_plane *pdpu;
-
- if (!plane)
- return;
- pdpu = to_dpu_plane(plane);
-
- debugfs_remove_recursive(pdpu->debugfs_root);
-}
#else
static int _dpu_plane_init_debugfs(struct drm_plane *plane)
{
return 0;
}
-static void _dpu_plane_destroy_debugfs(struct drm_plane *plane)
-{
-}
#endif
static int dpu_plane_late_register(struct drm_plane *plane)
@@ -1479,7 +1465,9 @@ static int dpu_plane_late_register(struct drm_plane *plane)
static void dpu_plane_early_unregister(struct drm_plane *plane)
{
- _dpu_plane_destroy_debugfs(plane);
+ struct dpu_plane *pdpu = to_dpu_plane(plane);
+
+ debugfs_remove_recursive(pdpu->debugfs_root);
}
static const struct drm_plane_funcs dpu_plane_funcs = {
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_vbif.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_vbif.c
index ff5091d2555d..98d8faf68057 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_vbif.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_vbif.c
@@ -310,13 +310,8 @@ void dpu_vbif_init_memtypes(struct dpu_kms *dpu_kms)
}
#ifdef CONFIG_DEBUG_FS
-void dpu_debugfs_vbif_destroy(struct dpu_kms *dpu_kms)
-{
- debugfs_remove_recursive(dpu_kms->debugfs_vbif);
- dpu_kms->debugfs_vbif = NULL;
-}
-int dpu_debugfs_vbif_init(struct dpu_kms *dpu_kms, struct dentry *debugfs_root)
+void dpu_debugfs_vbif_init(struct dpu_kms *dpu_kms, struct dentry *debugfs_root)
{
char vbif_name[32];
struct dentry *debugfs_vbif;
@@ -325,7 +320,7 @@ int dpu_debugfs_vbif_init(struct dpu_kms *dpu_kms, struct dentry *debugfs_root)
dpu_kms->debugfs_vbif = debugfs_create_dir("vbif", debugfs_root);
if (!dpu_kms->debugfs_vbif) {
DPU_ERROR("failed to create vbif debugfs\n");
- return -EINVAL;
+ return;
}
for (i = 0; i < dpu_kms->catalog->vbif_count; i++) {
@@ -376,7 +371,5 @@ int dpu_debugfs_vbif_init(struct dpu_kms *dpu_kms, struct dentry *debugfs_root)
(u32 *)&cfg->ot_limit);
}
}
-
- return 0;
}
#endif
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_vbif.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_vbif.h
index f17af52dbbd5..6356876d7a66 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_vbif.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_vbif.h
@@ -78,17 +78,6 @@ void dpu_vbif_clear_errors(struct dpu_kms *dpu_kms);
*/
void dpu_vbif_init_memtypes(struct dpu_kms *dpu_kms);
-#ifdef CONFIG_DEBUG_FS
-int dpu_debugfs_vbif_init(struct dpu_kms *dpu_kms, struct dentry *debugfs_root);
-void dpu_debugfs_vbif_destroy(struct dpu_kms *dpu_kms);
-#else
-static inline int dpu_debugfs_vbif_init(struct dpu_kms *dpu_kms,
- struct dentry *debugfs_root)
-{
- return 0;
-}
-static inline void dpu_debugfs_vbif_destroy(struct dpu_kms *dpu_kms)
-{
-}
-#endif
+void dpu_debugfs_vbif_init(struct dpu_kms *dpu_kms, struct dentry *debugfs_root);
+
#endif /* __DPU_VBIF_H__ */
--
2.18.0
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^ permalink raw reply related [flat|nested] 29+ messages in thread
* [PATCH 10/11] drm/msm/dpu: Further cleanups for static inline functions
[not found] ` <20181018195836.15885-1-jcrouse-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
` (8 preceding siblings ...)
2018-10-18 19:58 ` [PATCH 09/11] drm/msm/dpu: Debugfs related cleanups Jordan Crouse
@ 2018-10-18 19:58 ` Jordan Crouse
2018-10-18 22:06 ` Sam Ravnborg
2018-10-18 19:58 ` [PATCH 11/11] drm/msm/dpu: Clean up dpu_media_info.h " Jordan Crouse
10 siblings, 1 reply; 29+ messages in thread
From: Jordan Crouse @ 2018-10-18 19:58 UTC (permalink / raw)
To: freedreno-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW
Cc: linux-arm-msm-u79uwXL29TY76Z2rM5mHXA,
seanpaul-F7+t8E8rja9g9hUCZPvPmw, abhinavk-sgV2jX0FEOL9JmXXK+q4OQ,
dri-devel-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW
Remove more static inline functions that are lightly used and/or
very simple and easy to build into the calling functions.
Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
---
drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c | 17 ++--------
drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c | 14 +++-----
drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.h | 32 -------------------
.../gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h | 2 +-
.../drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c | 11 ++-----
.../gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h | 9 ------
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c | 3 +-
drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 8 +----
drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c | 20 +++---------
9 files changed, 17 insertions(+), 99 deletions(-)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c
index 7bc887ed9d74..de3603c3847d 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c
@@ -126,7 +126,6 @@ int dpu_core_perf_crtc_check(struct drm_crtc *crtc,
{
u32 bw, threshold;
u64 bw_sum_of_intfs = 0;
- enum dpu_crtc_client_type curr_client_type;
bool is_video_mode;
struct dpu_crtc_state *dpu_cstate;
struct drm_crtc *tmp_crtc;
@@ -144,10 +143,6 @@ int dpu_core_perf_crtc_check(struct drm_crtc *crtc,
return 0;
}
- /* we only need bandwidth check on real-time clients (interfaces) */
- if (dpu_crtc_get_client_type(crtc) == NRT_CLIENT)
- return 0;
-
dpu_cstate = to_dpu_crtc_state(state);
/* obtain new values */
@@ -156,13 +151,9 @@ int dpu_core_perf_crtc_check(struct drm_crtc *crtc,
for (i = DPU_POWER_HANDLE_DBUS_ID_MNOC;
i < DPU_POWER_HANDLE_DBUS_ID_MAX; i++) {
bw_sum_of_intfs = dpu_cstate->new_perf.bw_ctl[i];
- curr_client_type = dpu_crtc_get_client_type(crtc);
drm_for_each_crtc(tmp_crtc, crtc->dev) {
- if (tmp_crtc->enabled &&
- (dpu_crtc_get_client_type(tmp_crtc) ==
- curr_client_type) &&
- (tmp_crtc != crtc)) {
+ if (tmp_crtc->enabled && (tmp_crtc != crtc)) {
struct dpu_crtc_state *tmp_cstate =
to_dpu_crtc_state(tmp_crtc->state);
@@ -211,16 +202,12 @@ static int _dpu_core_perf_crtc_update_bus(struct dpu_kms *kms,
struct drm_crtc *crtc, u32 bus_id)
{
struct dpu_core_perf_params perf = { { 0 } };
- enum dpu_crtc_client_type curr_client_type
- = dpu_crtc_get_client_type(crtc);
struct drm_crtc *tmp_crtc;
struct dpu_crtc_state *dpu_cstate;
int ret = 0;
drm_for_each_crtc(tmp_crtc, crtc->dev) {
- if (tmp_crtc->enabled &&
- curr_client_type ==
- dpu_crtc_get_client_type(tmp_crtc)) {
+ if (tmp_crtc->enabled) {
dpu_cstate = to_dpu_crtc_state(tmp_crtc->state);
perf.max_per_pipe_ib[bus_id] =
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c
index 890994106e39..ed8a21c0d4bb 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c
@@ -47,12 +47,6 @@
#define LEFT_MIXER 0
#define RIGHT_MIXER 1
-static inline int _dpu_crtc_get_mixer_width(struct dpu_crtc_state *cstate,
- struct drm_display_mode *mode)
-{
- return mode->hdisplay / cstate->num_mixers;
-}
-
static struct dpu_kms *_dpu_crtc_get_kms(struct drm_crtc *crtc)
{
struct msm_drm_private *priv = crtc->dev->dev_private;
@@ -493,7 +487,7 @@ static void _dpu_crtc_setup_lm_bounds(struct drm_crtc *crtc,
{
struct dpu_crtc_state *cstate = to_dpu_crtc_state(state);
struct drm_display_mode *adj_mode = &state->adjusted_mode;
- u32 crtc_split_width = _dpu_crtc_get_mixer_width(cstate, adj_mode);
+ u32 crtc_split_width = adj_mode->hdisplay / cstate->num_mixers;
int i;
for (i = 0; i < cstate->num_mixers; i++) {
@@ -1029,7 +1023,7 @@ static int dpu_crtc_atomic_check(struct drm_crtc *crtc,
memset(pipe_staged, 0, sizeof(pipe_staged));
- mixer_width = _dpu_crtc_get_mixer_width(cstate, mode);
+ mixer_width = mode->hdisplay / cstate->num_mixers;
_dpu_crtc_setup_lm_bounds(crtc, state);
@@ -1254,7 +1248,7 @@ static int dpu_crtc_debugfs_status_show(struct seq_file *s, void *data)
mutex_lock(&dpu_crtc->crtc_lock);
mode = &crtc->state->adjusted_mode;
- out_width = _dpu_crtc_get_mixer_width(cstate, mode);
+ out_width = mode->hdisplay / cstate->num_mixers;
seq_printf(s, "crtc:%d width:%d height:%d\n", crtc->base.id,
mode->hdisplay, mode->vdisplay);
@@ -1355,7 +1349,7 @@ static int dpu_crtc_debugfs_state_show(struct seq_file *s, void *v)
struct dpu_crtc *dpu_crtc = to_dpu_crtc(crtc);
int i;
- seq_printf(s, "client type: %d\n", dpu_crtc_get_client_type(crtc));
+ seq_puts(s, "client type: 0\n");
seq_printf(s, "intf_mode: %d\n", dpu_crtc_get_intf_mode(crtc));
seq_printf(s, "core_clk_rate: %llu\n",
dpu_crtc->cur_perf.core_clk_rate);
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.h
index 90bb255fad3a..4dd6f65ab5e8 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.h
@@ -30,18 +30,6 @@
/* define the maximum number of in-flight frame events */
#define DPU_CRTC_FRAME_EVENT_SIZE 4
-/**
- * enum dpu_crtc_client_type: crtc client type
- * @RT_CLIENT: RealTime client like video/cmd mode display
- * voting through apps rsc
- * @NRT_CLIENT: Non-RealTime client like WB display
- * voting through apps rsc
- */
-enum dpu_crtc_client_type {
- RT_CLIENT,
- NRT_CLIENT,
-};
-
/**
* enum dpu_crtc_smmu_state: smmu state
* @ATTACHED: all the context banks are attached.
@@ -235,16 +223,6 @@ struct dpu_crtc_state {
#define to_dpu_crtc_state(x) \
container_of(x, struct dpu_crtc_state, base)
-/**
- * dpu_crtc_state_is_stereo - Is crtc virtualized with two mixers?
- * @cstate: Pointer to dpu crtc state
- * @Return: true - has two mixers, false - has one mixer
- */
-static inline bool dpu_crtc_state_is_stereo(struct dpu_crtc_state *cstate)
-{
- return cstate->num_mixers == CRTC_DUAL_MIXERS;
-}
-
/**
* dpu_crtc_frame_pending - retun the number of pending frames
* @crtc: Pointer to drm crtc object
@@ -301,14 +279,4 @@ int dpu_crtc_register_custom_event(struct dpu_kms *kms,
*/
enum dpu_intf_mode dpu_crtc_get_intf_mode(struct drm_crtc *crtc);
-/**
- * dpu_crtc_get_client_type - check the crtc type- rt, nrt etc.
- * @crtc: Pointer to crtc
- */
-static inline enum dpu_crtc_client_type dpu_crtc_get_client_type(
- struct drm_crtc *crtc)
-{
- return crtc && crtc->state ? RT_CLIENT : NRT_CLIENT;
-}
-
#endif /* _DPU_CRTC_H_ */
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h
index 3a67bb9f9d9d..94286b623874 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h
@@ -350,7 +350,7 @@ static inline enum dpu_3d_blend_mode dpu_encoder_helper_get_3d_blend_mode(
dpu_cstate = to_dpu_crtc_state(phys_enc->parent->crtc->state);
if (phys_enc->split_role == ENC_ROLE_SOLO &&
- dpu_crtc_state_is_stereo(dpu_cstate))
+ (dpu_cstate->num_mixers == CRTC_DUAL_MIXERS))
return BLEND_3D_H_ROW_INT;
return BLEND_3D_NONE;
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c
index b37a0992e326..99ab5ca9bed3 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c
@@ -44,14 +44,7 @@
#define DPU_ENC_WR_PTR_START_TIMEOUT_US 20000
-static inline int _dpu_encoder_phys_cmd_get_idle_timeout(
- struct dpu_encoder_phys_cmd *cmd_enc)
-{
- return KICKOFF_TIMEOUT_MS;
-}
-
-static inline bool dpu_encoder_phys_cmd_is_master(
- struct dpu_encoder_phys *phys_enc)
+static bool dpu_encoder_phys_cmd_is_master(struct dpu_encoder_phys *phys_enc)
{
return (phys_enc->split_role != ENC_ROLE_SLAVE) ? true : false;
}
@@ -723,7 +716,7 @@ static int dpu_encoder_phys_cmd_wait_for_vblank(
wait_info.wq = &cmd_enc->pending_vblank_wq;
wait_info.atomic_cnt = &cmd_enc->pending_vblank_cnt;
- wait_info.timeout_ms = _dpu_encoder_phys_cmd_get_idle_timeout(cmd_enc);
+ wait_info.timeout_ms = KICKOFF_TIMEOUT_MS;
atomic_inc(&cmd_enc->pending_vblank_cnt);
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h
index dc060e7358e4..144358a3d0fb 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h
@@ -736,13 +736,4 @@ struct dpu_mdss_cfg *dpu_hw_catalog_init(u32 hw_rev);
*/
void dpu_hw_catalog_deinit(struct dpu_mdss_cfg *dpu_cfg);
-/**
- * dpu_hw_sspp_multirect_enabled - check multirect enabled for the sspp
- * @cfg: pointer to sspp cfg
- */
-static inline bool dpu_hw_sspp_multirect_enabled(const struct dpu_sspp_cfg *cfg)
-{
- return test_bit(DPU_SSPP_SMART_DMA_V1, &cfg->features) ||
- test_bit(DPU_SSPP_SMART_DMA_V2, &cfg->features);
-}
#endif /* _DPU_HW_CATALOG_H */
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c
index 3ebdf292d8f2..e9132bf5166b 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c
@@ -661,7 +661,8 @@ static void _setup_layer_ops(struct dpu_hw_pipe *c,
test_bit(DPU_SSPP_CSC_10BIT, &features))
c->ops.setup_csc = dpu_hw_sspp_setup_csc;
- if (dpu_hw_sspp_multirect_enabled(c->cap))
+ if (test_bit(DPU_SSPP_SMART_DMA_V1, &c->cap->features) ||
+ test_bit(DPU_SSPP_SMART_DMA_V2, &c->cap->features))
c->ops.setup_multirect = dpu_hw_sspp_setup_multirect;
if (test_bit(DPU_SSPP_SCALER_QSEED3, &features)) {
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
index 01be305758c5..ed5e0347e029 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
@@ -718,12 +718,6 @@ static const struct msm_kms_funcs kms_funcs = {
#endif
};
-/* the caller api needs to turn on clock before calling it */
-static inline void _dpu_kms_core_hw_rev_init(struct dpu_kms *dpu_kms)
-{
- dpu_kms->core_rev = readl_relaxed(dpu_kms->mmio + 0x0);
-}
-
static int _dpu_kms_mmu_destroy(struct dpu_kms *dpu_kms)
{
struct msm_mmu *mmu;
@@ -879,7 +873,7 @@ static int dpu_kms_hw_init(struct msm_kms *kms)
pm_runtime_get_sync(&dpu_kms->pdev->dev);
- _dpu_kms_core_hw_rev_init(dpu_kms);
+ dpu_kms->core_rev = readl_relaxed(dpu_kms->mmio + 0x0);
pr_info("dpu hardware revision:0x%x\n", dpu_kms->core_rev);
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c
index 3c5580c75581..bd20e3b6047b 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c
@@ -430,24 +430,14 @@ static void _dpu_plane_set_qos_remap(struct drm_plane *plane)
dpu_vbif_set_qos_remap(dpu_kms, &qos_params);
}
-/**
- * _dpu_plane_get_aspace: gets the address space
- */
-static inline struct msm_gem_address_space *_dpu_plane_get_aspace(
- struct dpu_plane *pdpu)
-{
- struct dpu_kms *kms = _dpu_plane_get_kms(&pdpu->base);
-
- return kms->base.aspace;
-}
-
static void _dpu_plane_set_scanout(struct drm_plane *plane,
struct dpu_plane_state *pstate,
struct dpu_hw_pipe_cfg *pipe_cfg,
struct drm_framebuffer *fb)
{
struct dpu_plane *pdpu = to_dpu_plane(plane);
- struct msm_gem_address_space *aspace = _dpu_plane_get_aspace(pdpu);
+ struct dpu_kms *kms = _dpu_plane_get_kms(&pdpu->base);
+ struct msm_gem_address_space *aspace = kms->base.aspace;
int ret;
ret = dpu_format_populate_layout(aspace, fb, &pipe_cfg->layout);
@@ -801,7 +791,7 @@ static int dpu_plane_prepare_fb(struct drm_plane *plane,
struct drm_gem_object *obj;
struct msm_gem_object *msm_obj;
struct dma_fence *fence;
- struct msm_gem_address_space *aspace = _dpu_plane_get_aspace(pdpu);
+ struct dpu_kms *kms = _dpu_plane_get_kms(&pdpu->base);
int ret;
if (!new_state->fb)
@@ -810,7 +800,7 @@ static int dpu_plane_prepare_fb(struct drm_plane *plane,
DPU_DEBUG_PLANE(pdpu, "FB[%u]\n", fb->base.id);
/* cache aspace */
- pstate->aspace = aspace;
+ pstate->aspace = kms->base.aspace;
/*
* TODO: Need to sort out the msm_framebuffer_prepare() call below so
@@ -1021,7 +1011,7 @@ static void dpu_plane_sspp_atomic_update(struct drm_plane *plane)
pstate->pending = true;
- pdpu->is_rt_pipe = (dpu_crtc_get_client_type(crtc) != NRT_CLIENT);
+ pdpu->is_rt_pipe = crtc ? true : false;
_dpu_plane_set_qos_ctrl(plane, false, DPU_PLANE_QOS_PANIC_CTRL);
DPU_DEBUG_PLANE(pdpu, "FB[%u] " DRM_RECT_FP_FMT "->crtc%u " DRM_RECT_FMT
--
2.18.0
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^ permalink raw reply related [flat|nested] 29+ messages in thread
* [PATCH 11/11] drm/msm/dpu: Clean up dpu_media_info.h static inline functions
[not found] ` <20181018195836.15885-1-jcrouse-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
` (9 preceding siblings ...)
2018-10-18 19:58 ` [PATCH 10/11] drm/msm/dpu: Further cleanups for static inline functions Jordan Crouse
@ 2018-10-18 19:58 ` Jordan Crouse
[not found] ` <20181018195836.15885-12-jcrouse-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
10 siblings, 1 reply; 29+ messages in thread
From: Jordan Crouse @ 2018-10-18 19:58 UTC (permalink / raw)
To: freedreno-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW
Cc: linux-arm-msm-u79uwXL29TY76Z2rM5mHXA,
seanpaul-F7+t8E8rja9g9hUCZPvPmw, abhinavk-sgV2jX0FEOL9JmXXK+q4OQ,
dri-devel-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW
Do some cleanup in the static inline functions defined in
dpu_media_info.h by cleaning up gotos and unneeded local
variables.
Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
---
.../gpu/drm/msm/disp/dpu1/msm_media_info.h | 164 ++++++------------
1 file changed, 57 insertions(+), 107 deletions(-)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/msm_media_info.h b/drivers/gpu/drm/msm/disp/dpu1/msm_media_info.h
index 75470ee5b18f..8b8309f25c1a 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/msm_media_info.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/msm_media_info.h
@@ -822,36 +822,30 @@ enum color_fmts {
*/
static unsigned int VENUS_Y_STRIDE(int color_fmt, int width)
{
- unsigned int alignment, stride = 0;
+ unsigned int stride = 0;
if (!width)
- goto invalid_input;
+ return 0;
switch (color_fmt) {
case COLOR_FMT_NV21:
case COLOR_FMT_NV12:
case COLOR_FMT_NV12_MVTB:
case COLOR_FMT_NV12_UBWC:
- alignment = 128;
- stride = MSM_MEDIA_ALIGN(width, alignment);
+ stride = MSM_MEDIA_ALIGN(width, 128);
break;
case COLOR_FMT_NV12_BPP10_UBWC:
- alignment = 256;
stride = MSM_MEDIA_ALIGN(width, 192);
- stride = MSM_MEDIA_ALIGN(stride * 4/3, alignment);
+ stride = MSM_MEDIA_ALIGN(stride * 4/3, 256);
break;
case COLOR_FMT_P010_UBWC:
- alignment = 256;
- stride = MSM_MEDIA_ALIGN(width * 2, alignment);
+ stride = MSM_MEDIA_ALIGN(width * 2, 256);
break;
case COLOR_FMT_P010:
- alignment = 128;
- stride = MSM_MEDIA_ALIGN(width*2, alignment);
- break;
- default:
+ stride = MSM_MEDIA_ALIGN(width * 2, 128);
break;
}
-invalid_input:
+
return stride;
}
@@ -864,36 +858,30 @@ static unsigned int VENUS_Y_STRIDE(int color_fmt, int width)
*/
static unsigned int VENUS_UV_STRIDE(int color_fmt, int width)
{
- unsigned int alignment, stride = 0;
+ unsigned int stride = 0;
if (!width)
- goto invalid_input;
+ return 0;
switch (color_fmt) {
case COLOR_FMT_NV21:
case COLOR_FMT_NV12:
case COLOR_FMT_NV12_MVTB:
case COLOR_FMT_NV12_UBWC:
- alignment = 128;
- stride = MSM_MEDIA_ALIGN(width, alignment);
+ stride = MSM_MEDIA_ALIGN(width, 128);
break;
case COLOR_FMT_NV12_BPP10_UBWC:
- alignment = 256;
stride = MSM_MEDIA_ALIGN(width, 192);
- stride = MSM_MEDIA_ALIGN(stride * 4/3, alignment);
+ stride = MSM_MEDIA_ALIGN(stride * 4/3, 256);
break;
case COLOR_FMT_P010_UBWC:
- alignment = 256;
- stride = MSM_MEDIA_ALIGN(width * 2, alignment);
+ stride = MSM_MEDIA_ALIGN(width * 2, 256);
break;
case COLOR_FMT_P010:
- alignment = 128;
- stride = MSM_MEDIA_ALIGN(width*2, alignment);
- break;
- default:
+ stride = MSM_MEDIA_ALIGN(width*2, 128);
break;
}
-invalid_input:
+
return stride;
}
@@ -906,10 +894,10 @@ static unsigned int VENUS_UV_STRIDE(int color_fmt, int width)
*/
static unsigned int VENUS_Y_SCANLINES(int color_fmt, int height)
{
- unsigned int alignment, sclines = 0;
+ unsigned int sclines = 0;
if (!height)
- goto invalid_input;
+ return 0;
switch (color_fmt) {
case COLOR_FMT_NV21:
@@ -917,17 +905,14 @@ static unsigned int VENUS_Y_SCANLINES(int color_fmt, int height)
case COLOR_FMT_NV12_MVTB:
case COLOR_FMT_NV12_UBWC:
case COLOR_FMT_P010:
- alignment = 32;
+ sclines = MSM_MEDIA_ALIGN(height, 32);
break;
case COLOR_FMT_NV12_BPP10_UBWC:
case COLOR_FMT_P010_UBWC:
- alignment = 16;
+ sclines = MSM_MEDIA_ALIGN(height, 16);
break;
- default:
- return 0;
}
- sclines = MSM_MEDIA_ALIGN(height, alignment);
-invalid_input:
+
return sclines;
}
@@ -940,10 +925,10 @@ static unsigned int VENUS_Y_SCANLINES(int color_fmt, int height)
*/
static unsigned int VENUS_UV_SCANLINES(int color_fmt, int height)
{
- unsigned int alignment, sclines = 0;
+ unsigned int sclines = 0;
if (!height)
- goto invalid_input;
+ return 0;
switch (color_fmt) {
case COLOR_FMT_NV21:
@@ -952,18 +937,13 @@ static unsigned int VENUS_UV_SCANLINES(int color_fmt, int height)
case COLOR_FMT_NV12_BPP10_UBWC:
case COLOR_FMT_P010_UBWC:
case COLOR_FMT_P010:
- alignment = 16;
+ sclines = MSM_MEDIA_ALIGN((height+1)>>1, 16);
break;
case COLOR_FMT_NV12_UBWC:
- alignment = 32;
+ sclines = MSM_MEDIA_ALIGN((height+1)>>1, 32);
break;
- default:
- goto invalid_input;
}
- sclines = MSM_MEDIA_ALIGN((height+1)>>1, alignment);
-
-invalid_input:
return sclines;
}
@@ -976,10 +956,10 @@ static unsigned int VENUS_UV_SCANLINES(int color_fmt, int height)
*/
static unsigned int VENUS_Y_META_STRIDE(int color_fmt, int width)
{
- int y_tile_width = 0, y_meta_stride = 0;
+ int y_tile_width = 0, y_meta_stride;
if (!width)
- goto invalid_input;
+ return 0;
switch (color_fmt) {
case COLOR_FMT_NV12_UBWC:
@@ -990,14 +970,11 @@ static unsigned int VENUS_Y_META_STRIDE(int color_fmt, int width)
y_tile_width = 48;
break;
default:
- goto invalid_input;
+ return 0;
}
y_meta_stride = MSM_MEDIA_ROUNDUP(width, y_tile_width);
- y_meta_stride = MSM_MEDIA_ALIGN(y_meta_stride, 64);
-
-invalid_input:
- return y_meta_stride;
+ return MSM_MEDIA_ALIGN(y_meta_stride, 64);
}
/*
@@ -1009,10 +986,10 @@ static unsigned int VENUS_Y_META_STRIDE(int color_fmt, int width)
*/
static unsigned int VENUS_Y_META_SCANLINES(int color_fmt, int height)
{
- int y_tile_height = 0, y_meta_scanlines = 0;
+ int y_tile_height = 0, y_meta_scanlines;
if (!height)
- goto invalid_input;
+ return 0;
switch (color_fmt) {
case COLOR_FMT_NV12_UBWC:
@@ -1023,14 +1000,11 @@ static unsigned int VENUS_Y_META_SCANLINES(int color_fmt, int height)
y_tile_height = 4;
break;
default:
- goto invalid_input;
+ return 0;
}
y_meta_scanlines = MSM_MEDIA_ROUNDUP(height, y_tile_height);
- y_meta_scanlines = MSM_MEDIA_ALIGN(y_meta_scanlines, 16);
-
-invalid_input:
- return y_meta_scanlines;
+ return MSM_MEDIA_ALIGN(y_meta_scanlines, 16);
}
/*
@@ -1042,10 +1016,10 @@ static unsigned int VENUS_Y_META_SCANLINES(int color_fmt, int height)
*/
static unsigned int VENUS_UV_META_STRIDE(int color_fmt, int width)
{
- int uv_tile_width = 0, uv_meta_stride = 0;
+ int uv_tile_width = 0, uv_meta_stride;
if (!width)
- goto invalid_input;
+ return 0;
switch (color_fmt) {
case COLOR_FMT_NV12_UBWC:
@@ -1056,14 +1030,11 @@ static unsigned int VENUS_UV_META_STRIDE(int color_fmt, int width)
uv_tile_width = 24;
break;
default:
- goto invalid_input;
+ return 0;
}
uv_meta_stride = MSM_MEDIA_ROUNDUP((width+1)>>1, uv_tile_width);
- uv_meta_stride = MSM_MEDIA_ALIGN(uv_meta_stride, 64);
-
-invalid_input:
- return uv_meta_stride;
+ return MSM_MEDIA_ALIGN(uv_meta_stride, 64);
}
/*
@@ -1075,10 +1046,10 @@ static unsigned int VENUS_UV_META_STRIDE(int color_fmt, int width)
*/
static unsigned int VENUS_UV_META_SCANLINES(int color_fmt, int height)
{
- int uv_tile_height = 0, uv_meta_scanlines = 0;
+ int uv_tile_height = 0, uv_meta_scanlines;
if (!height)
- goto invalid_input;
+ return 0;
switch (color_fmt) {
case COLOR_FMT_NV12_UBWC:
@@ -1089,22 +1060,19 @@ static unsigned int VENUS_UV_META_SCANLINES(int color_fmt, int height)
uv_tile_height = 4;
break;
default:
- goto invalid_input;
+ return 0;
}
uv_meta_scanlines = MSM_MEDIA_ROUNDUP((height+1)>>1, uv_tile_height);
- uv_meta_scanlines = MSM_MEDIA_ALIGN(uv_meta_scanlines, 16);
-
-invalid_input:
- return uv_meta_scanlines;
+ return MSM_MEDIA_ALIGN(uv_meta_scanlines, 16);
}
static unsigned int VENUS_RGB_STRIDE(int color_fmt, int width)
{
- unsigned int alignment = 0, stride = 0, bpp = 4;
+ unsigned int alignment = 0, bpp = 4;
if (!width)
- goto invalid_input;
+ return 0;
switch (color_fmt) {
case COLOR_FMT_RGBA8888:
@@ -1119,21 +1087,18 @@ static unsigned int VENUS_RGB_STRIDE(int color_fmt, int width)
alignment = 256;
break;
default:
- goto invalid_input;
+ return 0;
}
- stride = MSM_MEDIA_ALIGN(width * bpp, alignment);
-
-invalid_input:
- return stride;
+ return MSM_MEDIA_ALIGN(width * bpp, alignment);
}
static unsigned int VENUS_RGB_SCANLINES(int color_fmt, int height)
{
- unsigned int alignment = 0, scanlines = 0;
+ unsigned int alignment = 0;
if (!height)
- goto invalid_input;
+ return 0;
switch (color_fmt) {
case COLOR_FMT_RGBA8888:
@@ -1145,61 +1110,46 @@ static unsigned int VENUS_RGB_SCANLINES(int color_fmt, int height)
alignment = 16;
break;
default:
- goto invalid_input;
+ return 0;
}
- scanlines = MSM_MEDIA_ALIGN(height, alignment);
-
-invalid_input:
- return scanlines;
+ return MSM_MEDIA_ALIGN(height, alignment);
}
static unsigned int VENUS_RGB_META_STRIDE(int color_fmt, int width)
{
- int rgb_tile_width = 0, rgb_meta_stride = 0;
+ int rgb_meta_stride;
if (!width)
- goto invalid_input;
+ return 0;
switch (color_fmt) {
case COLOR_FMT_RGBA8888_UBWC:
case COLOR_FMT_RGBA1010102_UBWC:
case COLOR_FMT_RGB565_UBWC:
- rgb_tile_width = 16;
- break;
- default:
- goto invalid_input;
+ rgb_meta_stride = MSM_MEDIA_ROUNDUP(width, 16);
+ return MSM_MEDIA_ALIGN(rgb_meta_stride, 64);
}
- rgb_meta_stride = MSM_MEDIA_ROUNDUP(width, rgb_tile_width);
- rgb_meta_stride = MSM_MEDIA_ALIGN(rgb_meta_stride, 64);
-
-invalid_input:
- return rgb_meta_stride;
+ return 0;
}
static unsigned int VENUS_RGB_META_SCANLINES(int color_fmt, int height)
{
- int rgb_tile_height = 0, rgb_meta_scanlines = 0;
+ int rgb_meta_scanlines;
if (!height)
- goto invalid_input;
+ return 0;
switch (color_fmt) {
case COLOR_FMT_RGBA8888_UBWC:
case COLOR_FMT_RGBA1010102_UBWC:
case COLOR_FMT_RGB565_UBWC:
- rgb_tile_height = 4;
- break;
- default:
- goto invalid_input;
+ rgb_meta_scanlines = MSM_MEDIA_ROUNDUP(height, 4);
+ return MSM_MEDIA_ALIGN(rgb_meta_scanlines, 16);
}
- rgb_meta_scanlines = MSM_MEDIA_ROUNDUP(height, rgb_tile_height);
- rgb_meta_scanlines = MSM_MEDIA_ALIGN(rgb_meta_scanlines, 16);
-
-invalid_input:
- return rgb_meta_scanlines;
+ return 0;
}
#endif
--
2.18.0
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^ permalink raw reply related [flat|nested] 29+ messages in thread
* Re: [PATCH 02/11] drm/msm/dpu: Use DEFINE_SHOW_ATTRIBUTE
[not found] ` <20181018195836.15885-3-jcrouse-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
@ 2018-10-18 21:43 ` Bruce Wang
0 siblings, 0 replies; 29+ messages in thread
From: Bruce Wang @ 2018-10-18 21:43 UTC (permalink / raw)
To: jcrouse-sgV2jX0FEOL9JmXXK+q4OQ
Cc: Sean Paul, linux-arm-msm-u79uwXL29TY76Z2rM5mHXA,
freedreno-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW,
abhinavk-sgV2jX0FEOL9JmXXK+q4OQ,
dri-devel-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW
On Thu, Oct 18, 2018 at 3:58 PM Jordan Crouse <jcrouse@codeaurora.org> wrote:
>
> Use the standard DEFINE_SHOW_ATTRIBUTE macro for seq_file based
> debugfs files instead of custom macros and hand-coded functions.
>
> Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
Sorry! Suppressed CCs by accident
Reviewed-by: Bruce Wang <bzwang@chromium.org>
> ---
> drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.c | 14 +-------
> drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c | 31 +++---------------
> drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 34 +++-----------------
> 3 files changed, 10 insertions(+), 69 deletions(-)
>
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.c
> index 879c13fe74e0..7607aac9449c 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.c
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.c
> @@ -299,18 +299,6 @@ static void dpu_disable_all_irqs(struct dpu_kms *dpu_kms)
> }
>
> #ifdef CONFIG_DEBUG_FS
> -#define DEFINE_DPU_DEBUGFS_SEQ_FOPS(__prefix) \
> -static int __prefix ## _open(struct inode *inode, struct file *file) \
> -{ \
> - return single_open(file, __prefix ## _show, inode->i_private); \
> -} \
> -static const struct file_operations __prefix ## _fops = { \
> - .owner = THIS_MODULE, \
> - .open = __prefix ## _open, \
> - .release = single_release, \
> - .read = seq_read, \
> - .llseek = seq_lseek, \
> -}
>
> static int dpu_debugfs_core_irq_show(struct seq_file *s, void *v)
> {
> @@ -341,7 +329,7 @@ static int dpu_debugfs_core_irq_show(struct seq_file *s, void *v)
> return 0;
> }
>
> -DEFINE_DPU_DEBUGFS_SEQ_FOPS(dpu_debugfs_core_irq);
> +DEFINE_SHOW_ATTRIBUTE(dpu_debugfs_core_irq);
>
> int dpu_debugfs_core_irq_init(struct dpu_kms *dpu_kms,
> struct dentry *parent)
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c
> index ae63590ad2d3..fb923c0c4171 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c
> @@ -1232,7 +1232,7 @@ int dpu_crtc_vblank(struct drm_crtc *crtc, bool en)
> }
>
> #ifdef CONFIG_DEBUG_FS
> -static int _dpu_debugfs_status_show(struct seq_file *s, void *data)
> +static int dpu_crtc_debugfs_status_show(struct seq_file *s, void *data)
> {
> struct dpu_crtc *dpu_crtc;
> struct dpu_plane_state *pstate = NULL;
> @@ -1351,23 +1351,7 @@ static int _dpu_debugfs_status_show(struct seq_file *s, void *data)
> return 0;
> }
>
> -static int _dpu_debugfs_status_open(struct inode *inode, struct file *file)
> -{
> - return single_open(file, _dpu_debugfs_status_show, inode->i_private);
> -}
> -
> -#define DEFINE_DPU_DEBUGFS_SEQ_FOPS(__prefix) \
> -static int __prefix ## _open(struct inode *inode, struct file *file) \
> -{ \
> - return single_open(file, __prefix ## _show, inode->i_private); \
> -} \
> -static const struct file_operations __prefix ## _fops = { \
> - .owner = THIS_MODULE, \
> - .open = __prefix ## _open, \
> - .release = single_release, \
> - .read = seq_read, \
> - .llseek = seq_lseek, \
> -}
> +DEFINE_SHOW_ATTRIBUTE(dpu_crtc_debugfs_status);
>
> static int dpu_crtc_debugfs_state_show(struct seq_file *s, void *v)
> {
> @@ -1391,20 +1375,13 @@ static int dpu_crtc_debugfs_state_show(struct seq_file *s, void *v)
>
> return 0;
> }
> -DEFINE_DPU_DEBUGFS_SEQ_FOPS(dpu_crtc_debugfs_state);
> +DEFINE_SHOW_ATTRIBUTE(dpu_crtc_debugfs_state);
>
> static int _dpu_crtc_init_debugfs(struct drm_crtc *crtc)
> {
> struct dpu_crtc *dpu_crtc;
> struct dpu_kms *dpu_kms;
>
> - static const struct file_operations debugfs_status_fops = {
> - .open = _dpu_debugfs_status_open,
> - .read = seq_read,
> - .llseek = seq_lseek,
> - .release = single_release,
> - };
> -
> if (!crtc)
> return -EINVAL;
> dpu_crtc = to_dpu_crtc(crtc);
> @@ -1419,7 +1396,7 @@ static int _dpu_crtc_init_debugfs(struct drm_crtc *crtc)
> /* don't error check these */
> debugfs_create_file("status", 0400,
> dpu_crtc->debugfs_root,
> - dpu_crtc, &debugfs_status_fops);
> + dpu_crtc, &dpu_crtc_debugfs_status_fops);
> debugfs_create_file("state", 0600,
> dpu_crtc->debugfs_root,
> &dpu_crtc->base,
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
> index fd5bad16338d..7e3ba128cbaf 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
> @@ -113,30 +113,17 @@ static int _dpu_danger_signal_status(struct seq_file *s,
> return 0;
> }
>
> -#define DEFINE_DPU_DEBUGFS_SEQ_FOPS(__prefix) \
> -static int __prefix ## _open(struct inode *inode, struct file *file) \
> -{ \
> - return single_open(file, __prefix ## _show, inode->i_private); \
> -} \
> -static const struct file_operations __prefix ## _fops = { \
> - .owner = THIS_MODULE, \
> - .open = __prefix ## _open, \
> - .release = single_release, \
> - .read = seq_read, \
> - .llseek = seq_lseek, \
> -}
> -
> static int dpu_debugfs_danger_stats_show(struct seq_file *s, void *v)
> {
> return _dpu_danger_signal_status(s, true);
> }
> -DEFINE_DPU_DEBUGFS_SEQ_FOPS(dpu_debugfs_danger_stats);
> +DEFINE_SHOW_ATTRIBUTE(dpu_debugfs_danger_stats);
>
> static int dpu_debugfs_safe_stats_show(struct seq_file *s, void *v)
> {
> return _dpu_danger_signal_status(s, false);
> }
> -DEFINE_DPU_DEBUGFS_SEQ_FOPS(dpu_debugfs_safe_stats);
> +DEFINE_SHOW_ATTRIBUTE(dpu_debugfs_safe_stats);
>
> static void dpu_debugfs_danger_destroy(struct dpu_kms *dpu_kms)
> {
> @@ -162,7 +149,7 @@ static int dpu_debugfs_danger_init(struct dpu_kms *dpu_kms,
> return 0;
> }
>
> -static int _dpu_debugfs_show_regset32(struct seq_file *s, void *data)
> +static int dpu_debugfs_regset32_show(struct seq_file *s, void *data)
> {
> struct dpu_debugfs_regset32 *regset;
> struct dpu_kms *dpu_kms;
> @@ -212,18 +199,7 @@ static int _dpu_debugfs_show_regset32(struct seq_file *s, void *data)
> return 0;
> }
>
> -static int dpu_debugfs_open_regset32(struct inode *inode,
> - struct file *file)
> -{
> - return single_open(file, _dpu_debugfs_show_regset32, inode->i_private);
> -}
> -
> -static const struct file_operations dpu_fops_regset32 = {
> - .open = dpu_debugfs_open_regset32,
> - .read = seq_read,
> - .llseek = seq_lseek,
> - .release = single_release,
> -};
> +DEFINE_SHOW_ATTRIBUTE(dpu_debugfs_regset32);
>
> void dpu_debugfs_setup_regset32(struct dpu_debugfs_regset32 *regset,
> uint32_t offset, uint32_t length, struct dpu_kms *dpu_kms)
> @@ -245,7 +221,7 @@ void *dpu_debugfs_create_regset32(const char *name, umode_t mode,
> regset->offset = round_down(regset->offset, 4);
>
> return debugfs_create_file(name, mode, parent,
> - regset, &dpu_fops_regset32);
> + regset, &dpu_debugfs_regset32_fops);
> }
>
> static int _dpu_debugfs_init(struct dpu_kms *dpu_kms)
> --
> 2.18.0
>
_______________________________________________
Freedreno mailing list
Freedreno@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/freedreno
^ permalink raw reply [flat|nested] 29+ messages in thread
* Re: [PATCH 03/11] drm/msm/dpu: Remove dpu_crtc_get_mixer_height
[not found] ` <20181018195836.15885-4-jcrouse-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
@ 2018-10-18 21:44 ` Bruce Wang
0 siblings, 0 replies; 29+ messages in thread
From: Bruce Wang @ 2018-10-18 21:44 UTC (permalink / raw)
To: jcrouse-sgV2jX0FEOL9JmXXK+q4OQ
Cc: Sean Paul, linux-arm-msm-u79uwXL29TY76Z2rM5mHXA,
freedreno-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW,
abhinavk-sgV2jX0FEOL9JmXXK+q4OQ,
dri-devel-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW
On Thu, Oct 18, 2018 at 3:59 PM Jordan Crouse <jcrouse@codeaurora.org> wrote:
>
> dpu_crtc_get_mixer_height() is only used once and the value it
> returns can be easily derived from the calling function.
>
> Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
Reviewed-by: Bruce Wang <bzwang@chromium.org>
> ---
> drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c | 3 +--
> drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.h | 13 -------------
> 2 files changed, 1 insertion(+), 15 deletions(-)
>
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c
> index fb923c0c4171..a8aa59b8caeb 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c
> @@ -491,7 +491,6 @@ static void _dpu_crtc_setup_mixers(struct drm_crtc *crtc)
> static void _dpu_crtc_setup_lm_bounds(struct drm_crtc *crtc,
> struct drm_crtc_state *state)
> {
> - struct dpu_crtc *dpu_crtc = to_dpu_crtc(crtc);
> struct dpu_crtc_state *cstate = to_dpu_crtc_state(state);
> struct drm_display_mode *adj_mode = &state->adjusted_mode;
> u32 crtc_split_width = _dpu_crtc_get_mixer_width(cstate, adj_mode);
> @@ -502,7 +501,7 @@ static void _dpu_crtc_setup_lm_bounds(struct drm_crtc *crtc,
> r->x1 = crtc_split_width * i;
> r->y1 = 0;
> r->x2 = r->x1 + crtc_split_width;
> - r->y2 = dpu_crtc_get_mixer_height(dpu_crtc, cstate, adj_mode);
> + r->y2 = adj_mode->vdisplay;
>
> trace_dpu_crtc_setup_lm_bounds(DRMID(crtc), i, r);
> }
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.h
> index 4822602402f9..2be4312038c9 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.h
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.h
> @@ -245,19 +245,6 @@ static inline bool dpu_crtc_state_is_stereo(struct dpu_crtc_state *cstate)
> return cstate->num_mixers == CRTC_DUAL_MIXERS;
> }
>
> -/**
> - * dpu_crtc_get_mixer_height - get the mixer height
> - * Mixer height will be same as panel height
> - */
> -static inline int dpu_crtc_get_mixer_height(struct dpu_crtc *dpu_crtc,
> - struct dpu_crtc_state *cstate, struct drm_display_mode *mode)
> -{
> - if (!dpu_crtc || !cstate || !mode)
> - return 0;
> -
> - return mode->vdisplay;
> -}
> -
> /**
> * dpu_crtc_frame_pending - retun the number of pending frames
> * @crtc: Pointer to drm crtc object
> --
> 2.18.0
>
_______________________________________________
Freedreno mailing list
Freedreno@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/freedreno
^ permalink raw reply [flat|nested] 29+ messages in thread
* Re: [PATCH 04/11] drm/msm/dpu: Remove dpu_crtc_is_enabled()
[not found] ` <20181018195836.15885-5-jcrouse-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
@ 2018-10-18 21:45 ` Bruce Wang
0 siblings, 0 replies; 29+ messages in thread
From: Bruce Wang @ 2018-10-18 21:45 UTC (permalink / raw)
To: jcrouse-sgV2jX0FEOL9JmXXK+q4OQ
Cc: Sean Paul, linux-arm-msm-u79uwXL29TY76Z2rM5mHXA,
freedreno-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW,
dri-devel-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW,
abhinavk-sgV2jX0FEOL9JmXXK+q4OQ
On Thu, Oct 18, 2018 at 3:59 PM Jordan Crouse <jcrouse@codeaurora.org> wrote:
>
> The static inline function dpu_crtc_enabled() is only called once
> and the function that calls it in turn is only called once and
> the return value can be easily checked in the calling functions
> so collapse everything down.
>
> Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
Reviewed-by: Bruce Wang <bzwang@chromium.org>
> ---
> drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c | 17 ++++++-----------
> drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.h | 9 ---------
> 2 files changed, 6 insertions(+), 20 deletions(-)
>
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c
> index 22e84b3d7f98..e68ccb7a898a 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c
> @@ -57,18 +57,13 @@ static struct dpu_kms *_dpu_crtc_get_kms(struct drm_crtc *crtc)
> return to_dpu_kms(priv->kms);
> }
>
> -static bool _dpu_core_perf_crtc_is_power_on(struct drm_crtc *crtc)
> -{
> - return dpu_crtc_is_enabled(crtc);
> -}
> -
> static bool _dpu_core_video_mode_intf_connected(struct drm_crtc *crtc)
> {
> struct drm_crtc *tmp_crtc;
>
> drm_for_each_crtc(tmp_crtc, crtc->dev) {
> if ((dpu_crtc_get_intf_mode(tmp_crtc) == INTF_MODE_VIDEO) &&
> - _dpu_core_perf_crtc_is_power_on(tmp_crtc)) {
> + tmp_crtc->enabled) {
> DPU_DEBUG("video interface connected crtc:%d\n",
> tmp_crtc->base.id);
> return true;
> @@ -164,7 +159,7 @@ int dpu_core_perf_crtc_check(struct drm_crtc *crtc,
> curr_client_type = dpu_crtc_get_client_type(crtc);
>
> drm_for_each_crtc(tmp_crtc, crtc->dev) {
> - if (_dpu_core_perf_crtc_is_power_on(tmp_crtc) &&
> + if (tmp_crtc->enabled &&
> (dpu_crtc_get_client_type(tmp_crtc) ==
> curr_client_type) &&
> (tmp_crtc != crtc)) {
> @@ -223,7 +218,7 @@ static int _dpu_core_perf_crtc_update_bus(struct dpu_kms *kms,
> int ret = 0;
>
> drm_for_each_crtc(tmp_crtc, crtc->dev) {
> - if (_dpu_core_perf_crtc_is_power_on(tmp_crtc) &&
> + if (tmp_crtc->enabled &&
> curr_client_type ==
> dpu_crtc_get_client_type(tmp_crtc)) {
> dpu_cstate = to_dpu_crtc_state(tmp_crtc->state);
> @@ -280,7 +275,7 @@ void dpu_core_perf_crtc_release_bw(struct drm_crtc *crtc)
> */
> if (dpu_crtc_get_intf_mode(crtc) == INTF_MODE_CMD)
> drm_for_each_crtc(tmp_crtc, crtc->dev) {
> - if (_dpu_core_perf_crtc_is_power_on(tmp_crtc) &&
> + if (tmp_crtc->enabled &&
> dpu_crtc_get_intf_mode(tmp_crtc) ==
> INTF_MODE_VIDEO)
> return;
> @@ -315,7 +310,7 @@ static u64 _dpu_core_perf_get_core_clk_rate(struct dpu_kms *kms)
> struct dpu_crtc_state *dpu_cstate;
>
> drm_for_each_crtc(crtc, kms->dev) {
> - if (_dpu_core_perf_crtc_is_power_on(crtc)) {
> + if (crtc->enabled) {
> dpu_cstate = to_dpu_crtc_state(crtc->state);
> clk_rate = max(dpu_cstate->new_perf.core_clk_rate,
> clk_rate);
> @@ -366,7 +361,7 @@ int dpu_core_perf_crtc_update(struct drm_crtc *crtc,
> old = &dpu_crtc->cur_perf;
> new = &dpu_cstate->new_perf;
>
> - if (_dpu_core_perf_crtc_is_power_on(crtc) && !stop_req) {
> + if (crtc->enabled && !stop_req) {
> for (i = 0; i < DPU_POWER_HANDLE_DBUS_ID_MAX; i++) {
> /*
> * cases for bus bandwidth update.
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.h
> index 2be4312038c9..90bb255fad3a 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.h
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.h
> @@ -311,13 +311,4 @@ static inline enum dpu_crtc_client_type dpu_crtc_get_client_type(
> return crtc && crtc->state ? RT_CLIENT : NRT_CLIENT;
> }
>
> -/**
> - * dpu_crtc_is_enabled - check if dpu crtc is enabled or not
> - * @crtc: Pointer to crtc
> - */
> -static inline bool dpu_crtc_is_enabled(struct drm_crtc *crtc)
> -{
> - return crtc ? crtc->enabled : false;
> -}
> -
> #endif /* _DPU_CRTC_H_ */
> --
> 2.18.0
>
> _______________________________________________
> dri-devel mailing list
> dri-devel@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/dri-devel
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^ permalink raw reply [flat|nested] 29+ messages in thread
* Re: [PATCH 05/11] drm/msm/dpu: Cleanup some container_of helper functions
2018-10-18 19:58 ` [PATCH 05/11] drm/msm/dpu: Cleanup some container_of helper functions Jordan Crouse
@ 2018-10-18 21:49 ` Sam Ravnborg
0 siblings, 0 replies; 29+ messages in thread
From: Sam Ravnborg @ 2018-10-18 21:49 UTC (permalink / raw)
To: Jordan Crouse; +Cc: seanpaul, linux-arm-msm, freedreno, dri-devel, abhinavk
Hi Jordan.
> -/**
> - * to_dpu_hw_mixer - convert base object dpu_hw_base to container
> - * @hw: Pointer to base hardware block
> - * return: Pointer to hardware block container
> - */
> -static inline struct dpu_hw_mixer *to_dpu_hw_mixer(struct dpu_hw_blk *hw)
> -{
> - return container_of(hw, struct dpu_hw_mixer, base);
> -}
This is a nicely documented static inline that when used provides type checks.
>
> +#define to_dpu_hw_mixer(hw) container_of((hw), struct dpu_hw_mixer, base)
> +
Replaced by an undocumented define without the same obvious typecheck.
This looks like a step backward.
> /**
> * _dpu_rm_check_lm_and_get_connected_blks - check if proposed layer mixer meets
> * proposed use case requirements, incl. hardwired dependent blocks like
> @@ -566,7 +568,8 @@ static int _dpu_rm_reserve_ctls(
>
> dpu_rm_init_hw_iter(&iter, 0, DPU_HW_BLK_CTL);
> while (_dpu_rm_get_hw_locked(rm, &iter)) {
> - const struct dpu_hw_ctl *ctl = to_dpu_hw_ctl(iter.blk->hw);
> + const struct dpu_hw_ctl *ctl =
> + container_of(iter.blk->hw, struct dpu_hw_ctl, base);
And here you have an open coded container_of where there before
was a nice little properly named helper function.
This does not help readability.
Drop the unused stuff, but sometimes small single line helper functions
makes code more readable even if only used once.
Sam
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^ permalink raw reply [flat|nested] 29+ messages in thread
* Re: [PATCH 06/11] drm/msm/dpu: Cleanup callers of dpu_hw_blk_init
2018-10-18 19:58 ` [PATCH 06/11] drm/msm/dpu: Cleanup callers of dpu_hw_blk_init Jordan Crouse
@ 2018-10-18 21:53 ` Sam Ravnborg
[not found] ` <20181018215359.GA5328-uyr5N9Q2VtJg9hUCZPvPmw@public.gmane.org>
0 siblings, 1 reply; 29+ messages in thread
From: Sam Ravnborg @ 2018-10-18 21:53 UTC (permalink / raw)
To: Jordan Crouse; +Cc: seanpaul, linux-arm-msm, freedreno, dri-devel, abhinavk
Hi Jordan.
On Thu, Oct 18, 2018 at 01:58:31PM -0600, Jordan Crouse wrote:
> Outside of superfluous parameter checks the dpu_hw_blk_init()
> doesn't have any failure paths. Switch it over to be a void
> function and we can remove error handling paths in all the functions
> that call it. While we're in those functions remove unneeded
> initialization for a static variable.
I like the simplification resulting after removing the
error handling.
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.h
> index 200cd874b683..27699000aaca 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.h
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.h
> @@ -61,11 +61,6 @@ struct dpu_hw_lm_ops {
> void (*setup_border_color)(struct dpu_hw_mixer *ctx,
> struct dpu_mdss_color *color,
> u8 border_en);
> - /**
> - * setup_gc : enable/disable gamma correction feature
> - */
> - void (*setup_gc)(struct dpu_hw_mixer *mixer,
> - void *cfg);
> };
>
> struct dpu_hw_mixer {
This part looks like it do not belong in this patch.
Sam
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^ permalink raw reply [flat|nested] 29+ messages in thread
* Re: [PATCH 10/11] drm/msm/dpu: Further cleanups for static inline functions
2018-10-18 19:58 ` [PATCH 10/11] drm/msm/dpu: Further cleanups for static inline functions Jordan Crouse
@ 2018-10-18 22:06 ` Sam Ravnborg
[not found] ` <20181018220620.GB5328-uyr5N9Q2VtJg9hUCZPvPmw@public.gmane.org>
0 siblings, 1 reply; 29+ messages in thread
From: Sam Ravnborg @ 2018-10-18 22:06 UTC (permalink / raw)
To: Jordan Crouse; +Cc: seanpaul, linux-arm-msm, freedreno, dri-devel, abhinavk
Hi Jordan.
On Thu, Oct 18, 2018 at 01:58:35PM -0600, Jordan Crouse wrote:
> Remove more static inline functions that are lightly used and/or
> very simple and easy to build into the calling functions.
Please explain the background/analysis that resulted in
dropping dpu_crtc_get_client_type(), assuming is was always
the same.
Sam
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^ permalink raw reply [flat|nested] 29+ messages in thread
* Re: [PATCH 07/11] drm/msm: Make irq_postinstall optional
[not found] ` <20181018195836.15885-8-jcrouse-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
@ 2018-10-19 13:56 ` Bruce Wang
0 siblings, 0 replies; 29+ messages in thread
From: Bruce Wang @ 2018-10-19 13:56 UTC (permalink / raw)
To: jcrouse-sgV2jX0FEOL9JmXXK+q4OQ
Cc: Sean Paul, linux-arm-msm-u79uwXL29TY76Z2rM5mHXA,
freedreno-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW,
abhinavk-sgV2jX0FEOL9JmXXK+q4OQ,
dri-devel-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW
On Thu, Oct 18, 2018 at 3:58 PM Jordan Crouse <jcrouse@codeaurora.org> wrote:
>
> Allow the KMS operation 'irq_postinstall' to be optional
> so that the target display drivers don't need to define
> a dummy function if they don't need one.
>
> Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
Reviewed-by: Bruce Wang <bzwang@chromium.org>
> ---
> drivers/gpu/drm/msm/msm_drv.c | 6 +++++-
> 1 file changed, 5 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/msm/msm_drv.c b/drivers/gpu/drm/msm/msm_drv.c
> index 107e976be55e..8ce6992dbdff 100644
> --- a/drivers/gpu/drm/msm/msm_drv.c
> +++ b/drivers/gpu/drm/msm/msm_drv.c
> @@ -724,7 +724,11 @@ static int msm_irq_postinstall(struct drm_device *dev)
> struct msm_drm_private *priv = dev->dev_private;
> struct msm_kms *kms = priv->kms;
> BUG_ON(!kms);
> - return kms->funcs->irq_postinstall(kms);
> +
> + if (kms->funcs->irq_postinstall)
> + return kms->funcs->irq_postinstall(kms);
> +
> + return 0;
> }
>
> static void msm_irq_uninstall(struct drm_device *dev)
> --
> 2.18.0
>
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^ permalink raw reply [flat|nested] 29+ messages in thread
* Re: [PATCH 08/11] drm/msm/dpu: Remove dpu_irq and unused functions
[not found] ` <20181018195836.15885-9-jcrouse-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
@ 2018-10-19 14:56 ` Bruce Wang
0 siblings, 0 replies; 29+ messages in thread
From: Bruce Wang @ 2018-10-19 14:56 UTC (permalink / raw)
To: jcrouse-sgV2jX0FEOL9JmXXK+q4OQ
Cc: Sean Paul, linux-arm-msm-u79uwXL29TY76Z2rM5mHXA,
freedreno-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW,
abhinavk-sgV2jX0FEOL9JmXXK+q4OQ,
dri-devel-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW
On Thu, Oct 18, 2018 at 3:59 PM Jordan Crouse <jcrouse@codeaurora.org> wrote:
>
> dpu_irq.c does some unneeded checks and passes control
> to dpu_core_irq.c The simple functions can be defined
> in the same file where we use them and the files and
> their associated hangers on can be deleted.
>
> Additionally the postinstall hook isn't used even
> in dpu_core_irq.c so zap that entire path.
>
> Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
> ---
> drivers/gpu/drm/msm/Makefile | 1 -
> drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.c | 15 +----
> drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.h | 7 ---
> drivers/gpu/drm/msm/disp/dpu1/dpu_irq.c | 66 --------------------
> drivers/gpu/drm/msm/disp/dpu1/dpu_irq.h | 59 -----------------
> drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 22 ++++++-
> drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h | 1 -
> drivers/gpu/drm/msm/disp/dpu1/dpu_mdss.c | 5 ++
> 8 files changed, 28 insertions(+), 148 deletions(-)
> delete mode 100644 drivers/gpu/drm/msm/disp/dpu1/dpu_irq.c
> delete mode 100644 drivers/gpu/drm/msm/disp/dpu1/dpu_irq.h
>
> diff --git a/drivers/gpu/drm/msm/Makefile b/drivers/gpu/drm/msm/Makefile
> index e067dd1341b1..4b181c2a88d6 100644
> --- a/drivers/gpu/drm/msm/Makefile
> +++ b/drivers/gpu/drm/msm/Makefile
> @@ -68,7 +68,6 @@ msm-y := \
> disp/dpu1/dpu_hw_util.o \
> disp/dpu1/dpu_hw_vbif.o \
> disp/dpu1/dpu_io_util.o \
> - disp/dpu1/dpu_irq.o \
> disp/dpu1/dpu_kms.o \
> disp/dpu1/dpu_mdss.o \
> disp/dpu1/dpu_plane.o \
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.c
> index 7607aac9449c..f66070cb2f42 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.c
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.c
> @@ -364,10 +364,7 @@ void dpu_core_irq_preinstall(struct dpu_kms *dpu_kms)
> struct msm_drm_private *priv;
> int i;
>
> - if (!dpu_kms) {
> - DPU_ERROR("invalid dpu_kms\n");
> - return;
> - } else if (!dpu_kms->dev) {
> + if (!dpu_kms->dev) {
> DPU_ERROR("invalid drm device\n");
> return;
> } else if (!dpu_kms->dev->dev_private) {
> @@ -398,20 +395,12 @@ void dpu_core_irq_preinstall(struct dpu_kms *dpu_kms)
> }
> }
>
> -int dpu_core_irq_postinstall(struct dpu_kms *dpu_kms)
> -{
> - return 0;
> -}
> -
> void dpu_core_irq_uninstall(struct dpu_kms *dpu_kms)
> {
> struct msm_drm_private *priv;
> int i;
>
> - if (!dpu_kms) {
> - DPU_ERROR("invalid dpu_kms\n");
> - return;
> - } else if (!dpu_kms->dev) {
> + if (!dpu_kms->dev) {
> DPU_ERROR("invalid drm device\n");
> return;
> } else if (!dpu_kms->dev->dev_private) {
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.h
> index 5e98bba46af5..884f77fa3eb6 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.h
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.h
> @@ -23,13 +23,6 @@
> */
> void dpu_core_irq_preinstall(struct dpu_kms *dpu_kms);
>
> -/**
> - * dpu_core_irq_postinstall - perform post-installation of core IRQ handler
> - * @dpu_kms: DPU handle
> - * @return: 0 if success; error code otherwise
> - */
> -int dpu_core_irq_postinstall(struct dpu_kms *dpu_kms);
> -
> /**
> * dpu_core_irq_uninstall - uninstall core IRQ handler
> * @dpu_kms: DPU handle
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_irq.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_irq.c
> deleted file mode 100644
> index d5e6ce0140cf..000000000000
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_irq.c
> +++ /dev/null
> @@ -1,66 +0,0 @@
> -/* Copyright (c) 2015-2018, The Linux Foundation. All rights reserved.
> - *
> - * This program is free software; you can redistribute it and/or modify
> - * it under the terms of the GNU General Public License version 2 and
> - * only version 2 as published by the Free Software Foundation.
> - *
> - * This program is distributed in the hope that it will be useful,
> - * but WITHOUT ANY WARRANTY; without even the implied warranty of
> - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> - * GNU General Public License for more details.
> - */
> -
> -#define pr_fmt(fmt) "[drm:%s:%d] " fmt, __func__, __LINE__
> -
> -#include <linux/irqdomain.h>
> -#include <linux/irq.h>
> -#include <linux/kthread.h>
> -
> -#include "dpu_irq.h"
> -#include "dpu_core_irq.h"
> -
> -irqreturn_t dpu_irq(struct msm_kms *kms)
> -{
> - struct dpu_kms *dpu_kms = to_dpu_kms(kms);
> -
> - return dpu_core_irq(dpu_kms);
> -}
> -
> -void dpu_irq_preinstall(struct msm_kms *kms)
> -{
> - struct dpu_kms *dpu_kms = to_dpu_kms(kms);
> -
> - if (!dpu_kms->dev || !dpu_kms->dev->dev) {
> - pr_err("invalid device handles\n");
> - return;
> - }
> -
> - dpu_core_irq_preinstall(dpu_kms);
> -}
> -
> -int dpu_irq_postinstall(struct msm_kms *kms)
> -{
> - struct dpu_kms *dpu_kms = to_dpu_kms(kms);
> - int rc;
> -
> - if (!kms) {
> - DPU_ERROR("invalid parameters\n");
> - return -EINVAL;
> - }
> -
> - rc = dpu_core_irq_postinstall(dpu_kms);
> -
> - return rc;
> -}
> -
> -void dpu_irq_uninstall(struct msm_kms *kms)
> -{
> - struct dpu_kms *dpu_kms = to_dpu_kms(kms);
> -
> - if (!kms) {
> - DPU_ERROR("invalid parameters\n");
> - return;
> - }
> -
> - dpu_core_irq_uninstall(dpu_kms);
> -}
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_irq.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_irq.h
> deleted file mode 100644
> index 3e147f7176e2..000000000000
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_irq.h
> +++ /dev/null
> @@ -1,59 +0,0 @@
> -/* Copyright (c) 2015-2018, The Linux Foundation. All rights reserved.
> - *
> - * This program is free software; you can redistribute it and/or modify
> - * it under the terms of the GNU General Public License version 2 and
> - * only version 2 as published by the Free Software Foundation.
> - *
> - * This program is distributed in the hope that it will be useful,
> - * but WITHOUT ANY WARRANTY; without even the implied warranty of
> - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> - * GNU General Public License for more details.
> - */
> -
> -#ifndef __DPU_IRQ_H__
> -#define __DPU_IRQ_H__
> -
> -#include <linux/kernel.h>
> -#include <linux/irqdomain.h>
> -
> -#include "msm_kms.h"
> -
> -/**
> - * dpu_irq_controller - define MDSS level interrupt controller context
> - * @enabled_mask: enable status of MDSS level interrupt
> - * @domain: interrupt domain of this controller
> - */
> -struct dpu_irq_controller {
> - unsigned long enabled_mask;
> - struct irq_domain *domain;
> -};
> -
> -/**
> - * dpu_irq_preinstall - perform pre-installation of MDSS IRQ handler
> - * @kms: pointer to kms context
> - * @return: none
> - */
> -void dpu_irq_preinstall(struct msm_kms *kms);
> -
> -/**
> - * dpu_irq_postinstall - perform post-installation of MDSS IRQ handler
> - * @kms: pointer to kms context
> - * @return: 0 if success; error code otherwise
> - */
> -int dpu_irq_postinstall(struct msm_kms *kms);
> -
> -/**
> - * dpu_irq_uninstall - uninstall MDSS IRQ handler
> - * @drm_dev: pointer to kms context
> - * @return: none
> - */
> -void dpu_irq_uninstall(struct msm_kms *kms);
> -
> -/**
> - * dpu_irq - MDSS level IRQ handler
> - * @kms: pointer to kms context
> - * @return: interrupt handling status
> - */
> -irqreturn_t dpu_irq(struct msm_kms *kms);
> -
> -#endif /* __DPU_IRQ_H__ */
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
> index 7e3ba128cbaf..2a91881048c8 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
> @@ -706,10 +706,30 @@ static void _dpu_kms_set_encoder_mode(struct msm_kms *kms,
> encoder->base.id, rc);
> }
>
> +static irqreturn_t dpu_irq(struct msm_kms *kms)
> +{
> + struct dpu_kms *dpu_kms = to_dpu_kms(kms);
> +
> + return dpu_core_irq(dpu_kms);
> +}
> +
> +static void dpu_irq_preinstall(struct msm_kms *kms)
> +{
> + struct dpu_kms *dpu_kms = to_dpu_kms(kms);
> +
> + dpu_core_irq_preinstall(dpu_kms);
> +}
> +
> +static void dpu_irq_uninstall(struct msm_kms *kms)
> +{
> + struct dpu_kms *dpu_kms = to_dpu_kms(kms);
> +
> + dpu_core_irq_uninstall(dpu_kms);
> +}
> +
Seems like we could pass in a struct msm_kms directly to the core irq
functions and call to_dpu_kms()
from inside those functions instead so we don't need these wrappers
anymore, but if you prefer the logical
separation that this provides then:
Reviewed-by: Bruce Wang <bzwang@chromium.org>
> static const struct msm_kms_funcs kms_funcs = {
> .hw_init = dpu_kms_hw_init,
> .irq_preinstall = dpu_irq_preinstall,
> - .irq_postinstall = dpu_irq_postinstall,
> .irq_uninstall = dpu_irq_uninstall,
> .irq = dpu_irq,
> .prepare_commit = dpu_kms_prepare_commit,
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h
> index 12a2eb90e6b5..e7539c9870e4 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h
> @@ -30,7 +30,6 @@
> #include "dpu_hw_top.h"
> #include "dpu_rm.h"
> #include "dpu_power_handle.h"
> -#include "dpu_irq.h"
> #include "dpu_core_perf.h"
>
> #define DRMID(x) ((x) ? (x)->base.id : -1)
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_mdss.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_mdss.c
> index 2235ef8129f4..19abf719811a 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_mdss.c
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_mdss.c
> @@ -9,6 +9,11 @@
>
> #define HW_INTR_STATUS 0x0010
>
> +struct dpu_irq_controller {
> + unsigned long enabled_mask;
> + struct irq_domain *domain;
> +};
> +
> struct dpu_mdss {
> struct msm_mdss base;
> void __iomem *mmio;
> --
> 2.18.0
>
_______________________________________________
Freedreno mailing list
Freedreno@lists.freedesktop.org
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^ permalink raw reply [flat|nested] 29+ messages in thread
* Re: [PATCH 11/11] drm/msm/dpu: Clean up dpu_media_info.h static inline functions
[not found] ` <20181018195836.15885-12-jcrouse-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
@ 2018-10-19 15:10 ` Bruce Wang
0 siblings, 0 replies; 29+ messages in thread
From: Bruce Wang @ 2018-10-19 15:10 UTC (permalink / raw)
To: jcrouse-sgV2jX0FEOL9JmXXK+q4OQ
Cc: Sean Paul, linux-arm-msm-u79uwXL29TY76Z2rM5mHXA,
freedreno-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW,
abhinavk-sgV2jX0FEOL9JmXXK+q4OQ,
dri-devel-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW
On Thu, Oct 18, 2018 at 3:59 PM Jordan Crouse <jcrouse@codeaurora.org> wrote:
>
> Do some cleanup in the static inline functions defined in
> dpu_media_info.h by cleaning up gotos and unneeded local
> variables.
>
> Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
Reviewed-by: Bruce Wang <bzwang@chromium.org>
> ---
> .../gpu/drm/msm/disp/dpu1/msm_media_info.h | 164 ++++++------------
> 1 file changed, 57 insertions(+), 107 deletions(-)
>
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/msm_media_info.h b/drivers/gpu/drm/msm/disp/dpu1/msm_media_info.h
> index 75470ee5b18f..8b8309f25c1a 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/msm_media_info.h
> +++ b/drivers/gpu/drm/msm/disp/dpu1/msm_media_info.h
> @@ -822,36 +822,30 @@ enum color_fmts {
> */
> static unsigned int VENUS_Y_STRIDE(int color_fmt, int width)
> {
> - unsigned int alignment, stride = 0;
> + unsigned int stride = 0;
>
> if (!width)
> - goto invalid_input;
> + return 0;
>
> switch (color_fmt) {
> case COLOR_FMT_NV21:
> case COLOR_FMT_NV12:
> case COLOR_FMT_NV12_MVTB:
> case COLOR_FMT_NV12_UBWC:
> - alignment = 128;
> - stride = MSM_MEDIA_ALIGN(width, alignment);
> + stride = MSM_MEDIA_ALIGN(width, 128);
> break;
> case COLOR_FMT_NV12_BPP10_UBWC:
> - alignment = 256;
> stride = MSM_MEDIA_ALIGN(width, 192);
> - stride = MSM_MEDIA_ALIGN(stride * 4/3, alignment);
> + stride = MSM_MEDIA_ALIGN(stride * 4/3, 256);
> break;
> case COLOR_FMT_P010_UBWC:
> - alignment = 256;
> - stride = MSM_MEDIA_ALIGN(width * 2, alignment);
> + stride = MSM_MEDIA_ALIGN(width * 2, 256);
> break;
> case COLOR_FMT_P010:
> - alignment = 128;
> - stride = MSM_MEDIA_ALIGN(width*2, alignment);
> - break;
> - default:
> + stride = MSM_MEDIA_ALIGN(width * 2, 128);
> break;
> }
> -invalid_input:
> +
> return stride;
> }
>
> @@ -864,36 +858,30 @@ static unsigned int VENUS_Y_STRIDE(int color_fmt, int width)
> */
> static unsigned int VENUS_UV_STRIDE(int color_fmt, int width)
> {
> - unsigned int alignment, stride = 0;
> + unsigned int stride = 0;
>
> if (!width)
> - goto invalid_input;
> + return 0;
>
> switch (color_fmt) {
> case COLOR_FMT_NV21:
> case COLOR_FMT_NV12:
> case COLOR_FMT_NV12_MVTB:
> case COLOR_FMT_NV12_UBWC:
> - alignment = 128;
> - stride = MSM_MEDIA_ALIGN(width, alignment);
> + stride = MSM_MEDIA_ALIGN(width, 128);
> break;
> case COLOR_FMT_NV12_BPP10_UBWC:
> - alignment = 256;
> stride = MSM_MEDIA_ALIGN(width, 192);
> - stride = MSM_MEDIA_ALIGN(stride * 4/3, alignment);
> + stride = MSM_MEDIA_ALIGN(stride * 4/3, 256);
> break;
> case COLOR_FMT_P010_UBWC:
> - alignment = 256;
> - stride = MSM_MEDIA_ALIGN(width * 2, alignment);
> + stride = MSM_MEDIA_ALIGN(width * 2, 256);
> break;
> case COLOR_FMT_P010:
> - alignment = 128;
> - stride = MSM_MEDIA_ALIGN(width*2, alignment);
> - break;
> - default:
> + stride = MSM_MEDIA_ALIGN(width*2, 128);
> break;
> }
> -invalid_input:
> +
> return stride;
> }
>
> @@ -906,10 +894,10 @@ static unsigned int VENUS_UV_STRIDE(int color_fmt, int width)
> */
> static unsigned int VENUS_Y_SCANLINES(int color_fmt, int height)
> {
> - unsigned int alignment, sclines = 0;
> + unsigned int sclines = 0;
>
> if (!height)
> - goto invalid_input;
> + return 0;
>
> switch (color_fmt) {
> case COLOR_FMT_NV21:
> @@ -917,17 +905,14 @@ static unsigned int VENUS_Y_SCANLINES(int color_fmt, int height)
> case COLOR_FMT_NV12_MVTB:
> case COLOR_FMT_NV12_UBWC:
> case COLOR_FMT_P010:
> - alignment = 32;
> + sclines = MSM_MEDIA_ALIGN(height, 32);
> break;
> case COLOR_FMT_NV12_BPP10_UBWC:
> case COLOR_FMT_P010_UBWC:
> - alignment = 16;
> + sclines = MSM_MEDIA_ALIGN(height, 16);
> break;
> - default:
> - return 0;
> }
> - sclines = MSM_MEDIA_ALIGN(height, alignment);
> -invalid_input:
> +
> return sclines;
> }
>
> @@ -940,10 +925,10 @@ static unsigned int VENUS_Y_SCANLINES(int color_fmt, int height)
> */
> static unsigned int VENUS_UV_SCANLINES(int color_fmt, int height)
> {
> - unsigned int alignment, sclines = 0;
> + unsigned int sclines = 0;
>
> if (!height)
> - goto invalid_input;
> + return 0;
>
> switch (color_fmt) {
> case COLOR_FMT_NV21:
> @@ -952,18 +937,13 @@ static unsigned int VENUS_UV_SCANLINES(int color_fmt, int height)
> case COLOR_FMT_NV12_BPP10_UBWC:
> case COLOR_FMT_P010_UBWC:
> case COLOR_FMT_P010:
> - alignment = 16;
> + sclines = MSM_MEDIA_ALIGN((height+1)>>1, 16);
> break;
> case COLOR_FMT_NV12_UBWC:
> - alignment = 32;
> + sclines = MSM_MEDIA_ALIGN((height+1)>>1, 32);
> break;
> - default:
> - goto invalid_input;
> }
>
> - sclines = MSM_MEDIA_ALIGN((height+1)>>1, alignment);
> -
> -invalid_input:
> return sclines;
> }
>
> @@ -976,10 +956,10 @@ static unsigned int VENUS_UV_SCANLINES(int color_fmt, int height)
> */
> static unsigned int VENUS_Y_META_STRIDE(int color_fmt, int width)
> {
> - int y_tile_width = 0, y_meta_stride = 0;
> + int y_tile_width = 0, y_meta_stride;
>
> if (!width)
> - goto invalid_input;
> + return 0;
>
> switch (color_fmt) {
> case COLOR_FMT_NV12_UBWC:
> @@ -990,14 +970,11 @@ static unsigned int VENUS_Y_META_STRIDE(int color_fmt, int width)
> y_tile_width = 48;
> break;
> default:
> - goto invalid_input;
> + return 0;
> }
>
> y_meta_stride = MSM_MEDIA_ROUNDUP(width, y_tile_width);
> - y_meta_stride = MSM_MEDIA_ALIGN(y_meta_stride, 64);
> -
> -invalid_input:
> - return y_meta_stride;
> + return MSM_MEDIA_ALIGN(y_meta_stride, 64);
> }
>
> /*
> @@ -1009,10 +986,10 @@ static unsigned int VENUS_Y_META_STRIDE(int color_fmt, int width)
> */
> static unsigned int VENUS_Y_META_SCANLINES(int color_fmt, int height)
> {
> - int y_tile_height = 0, y_meta_scanlines = 0;
> + int y_tile_height = 0, y_meta_scanlines;
>
> if (!height)
> - goto invalid_input;
> + return 0;
>
> switch (color_fmt) {
> case COLOR_FMT_NV12_UBWC:
> @@ -1023,14 +1000,11 @@ static unsigned int VENUS_Y_META_SCANLINES(int color_fmt, int height)
> y_tile_height = 4;
> break;
> default:
> - goto invalid_input;
> + return 0;
> }
>
> y_meta_scanlines = MSM_MEDIA_ROUNDUP(height, y_tile_height);
> - y_meta_scanlines = MSM_MEDIA_ALIGN(y_meta_scanlines, 16);
> -
> -invalid_input:
> - return y_meta_scanlines;
> + return MSM_MEDIA_ALIGN(y_meta_scanlines, 16);
> }
>
> /*
> @@ -1042,10 +1016,10 @@ static unsigned int VENUS_Y_META_SCANLINES(int color_fmt, int height)
> */
> static unsigned int VENUS_UV_META_STRIDE(int color_fmt, int width)
> {
> - int uv_tile_width = 0, uv_meta_stride = 0;
> + int uv_tile_width = 0, uv_meta_stride;
>
> if (!width)
> - goto invalid_input;
> + return 0;
>
> switch (color_fmt) {
> case COLOR_FMT_NV12_UBWC:
> @@ -1056,14 +1030,11 @@ static unsigned int VENUS_UV_META_STRIDE(int color_fmt, int width)
> uv_tile_width = 24;
> break;
> default:
> - goto invalid_input;
> + return 0;
> }
>
> uv_meta_stride = MSM_MEDIA_ROUNDUP((width+1)>>1, uv_tile_width);
> - uv_meta_stride = MSM_MEDIA_ALIGN(uv_meta_stride, 64);
> -
> -invalid_input:
> - return uv_meta_stride;
> + return MSM_MEDIA_ALIGN(uv_meta_stride, 64);
> }
>
> /*
> @@ -1075,10 +1046,10 @@ static unsigned int VENUS_UV_META_STRIDE(int color_fmt, int width)
> */
> static unsigned int VENUS_UV_META_SCANLINES(int color_fmt, int height)
> {
> - int uv_tile_height = 0, uv_meta_scanlines = 0;
> + int uv_tile_height = 0, uv_meta_scanlines;
>
> if (!height)
> - goto invalid_input;
> + return 0;
>
> switch (color_fmt) {
> case COLOR_FMT_NV12_UBWC:
> @@ -1089,22 +1060,19 @@ static unsigned int VENUS_UV_META_SCANLINES(int color_fmt, int height)
> uv_tile_height = 4;
> break;
> default:
> - goto invalid_input;
> + return 0;
> }
>
> uv_meta_scanlines = MSM_MEDIA_ROUNDUP((height+1)>>1, uv_tile_height);
> - uv_meta_scanlines = MSM_MEDIA_ALIGN(uv_meta_scanlines, 16);
> -
> -invalid_input:
> - return uv_meta_scanlines;
> + return MSM_MEDIA_ALIGN(uv_meta_scanlines, 16);
> }
>
> static unsigned int VENUS_RGB_STRIDE(int color_fmt, int width)
> {
> - unsigned int alignment = 0, stride = 0, bpp = 4;
> + unsigned int alignment = 0, bpp = 4;
>
> if (!width)
> - goto invalid_input;
> + return 0;
>
> switch (color_fmt) {
> case COLOR_FMT_RGBA8888:
> @@ -1119,21 +1087,18 @@ static unsigned int VENUS_RGB_STRIDE(int color_fmt, int width)
> alignment = 256;
> break;
> default:
> - goto invalid_input;
> + return 0;
> }
>
> - stride = MSM_MEDIA_ALIGN(width * bpp, alignment);
> -
> -invalid_input:
> - return stride;
> + return MSM_MEDIA_ALIGN(width * bpp, alignment);
> }
>
> static unsigned int VENUS_RGB_SCANLINES(int color_fmt, int height)
> {
> - unsigned int alignment = 0, scanlines = 0;
> + unsigned int alignment = 0;
>
> if (!height)
> - goto invalid_input;
> + return 0;
>
> switch (color_fmt) {
> case COLOR_FMT_RGBA8888:
> @@ -1145,61 +1110,46 @@ static unsigned int VENUS_RGB_SCANLINES(int color_fmt, int height)
> alignment = 16;
> break;
> default:
> - goto invalid_input;
> + return 0;
> }
>
> - scanlines = MSM_MEDIA_ALIGN(height, alignment);
> -
> -invalid_input:
> - return scanlines;
> + return MSM_MEDIA_ALIGN(height, alignment);
> }
>
> static unsigned int VENUS_RGB_META_STRIDE(int color_fmt, int width)
> {
> - int rgb_tile_width = 0, rgb_meta_stride = 0;
> + int rgb_meta_stride;
>
> if (!width)
> - goto invalid_input;
> + return 0;
>
> switch (color_fmt) {
> case COLOR_FMT_RGBA8888_UBWC:
> case COLOR_FMT_RGBA1010102_UBWC:
> case COLOR_FMT_RGB565_UBWC:
> - rgb_tile_width = 16;
> - break;
> - default:
> - goto invalid_input;
> + rgb_meta_stride = MSM_MEDIA_ROUNDUP(width, 16);
> + return MSM_MEDIA_ALIGN(rgb_meta_stride, 64);
> }
>
> - rgb_meta_stride = MSM_MEDIA_ROUNDUP(width, rgb_tile_width);
> - rgb_meta_stride = MSM_MEDIA_ALIGN(rgb_meta_stride, 64);
> -
> -invalid_input:
> - return rgb_meta_stride;
> + return 0;
> }
>
> static unsigned int VENUS_RGB_META_SCANLINES(int color_fmt, int height)
> {
> - int rgb_tile_height = 0, rgb_meta_scanlines = 0;
> + int rgb_meta_scanlines;
>
> if (!height)
> - goto invalid_input;
> + return 0;
>
> switch (color_fmt) {
> case COLOR_FMT_RGBA8888_UBWC:
> case COLOR_FMT_RGBA1010102_UBWC:
> case COLOR_FMT_RGB565_UBWC:
> - rgb_tile_height = 4;
> - break;
> - default:
> - goto invalid_input;
> + rgb_meta_scanlines = MSM_MEDIA_ROUNDUP(height, 4);
> + return MSM_MEDIA_ALIGN(rgb_meta_scanlines, 16);
> }
>
> - rgb_meta_scanlines = MSM_MEDIA_ROUNDUP(height, rgb_tile_height);
> - rgb_meta_scanlines = MSM_MEDIA_ALIGN(rgb_meta_scanlines, 16);
> -
> -invalid_input:
> - return rgb_meta_scanlines;
> + return 0;
> }
>
> #endif
> --
> 2.18.0
>
_______________________________________________
Freedreno mailing list
Freedreno@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/freedreno
^ permalink raw reply [flat|nested] 29+ messages in thread
* Re: [PATCH 10/11] drm/msm/dpu: Further cleanups for static inline functions
[not found] ` <20181018220620.GB5328-uyr5N9Q2VtJg9hUCZPvPmw@public.gmane.org>
@ 2018-10-19 17:09 ` Jordan Crouse
0 siblings, 0 replies; 29+ messages in thread
From: Jordan Crouse @ 2018-10-19 17:09 UTC (permalink / raw)
To: Sam Ravnborg
Cc: linux-arm-msm-u79uwXL29TY76Z2rM5mHXA,
dri-devel-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW,
bzwang-F7+t8E8rja9g9hUCZPvPmw, seanpaul-F7+t8E8rja9g9hUCZPvPmw,
abhinavk-sgV2jX0FEOL9JmXXK+q4OQ,
freedreno-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW
On Fri, Oct 19, 2018 at 12:06:20AM +0200, Sam Ravnborg wrote:
> Hi Jordan.
>
> On Thu, Oct 18, 2018 at 01:58:35PM -0600, Jordan Crouse wrote:
> > Remove more static inline functions that are lightly used and/or
> > very simple and easy to build into the calling functions.
>
> Please explain the background/analysis that resulted in
> dropping dpu_crtc_get_client_type(), assuming is was always
> the same.
Sure. This would be a good chance to get my story straight.
The original code was:
struct dpu_crtc_state *cstate =
crtc ? to_dpu_crtc_state(crtc->state) : NULL;
if (!cstate)
return NRT_CLIENT;
return RT_CLIENT;
And then Sean Paul improved it to:
return crtc && crtc->state ? RT_CLIENT : NRT_CLIENT;
So I figured that since crtc is known good for all current callers and the
original code assumed that if crtc was good, then crtc->state was good (because
cstate could never be NULL coming from a container_of()) then essentially this
function always returned RT_CLIENT wherever it was used.
My understanding might be flawed if crtc->state can legitimately be NULL when
this function was called. This might be one of those situations where it
doesn't hurt to check, but removing this function does manage to get rid of
a static inline plus make a few if statements less hairy so I think its a net
win if it can go.
Jordan
--
The Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project
_______________________________________________
Freedreno mailing list
Freedreno@lists.freedesktop.org
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^ permalink raw reply [flat|nested] 29+ messages in thread
* Re: [PATCH 06/11] drm/msm/dpu: Cleanup callers of dpu_hw_blk_init
[not found] ` <20181018215359.GA5328-uyr5N9Q2VtJg9hUCZPvPmw@public.gmane.org>
@ 2018-10-19 17:13 ` Jordan Crouse
0 siblings, 0 replies; 29+ messages in thread
From: Jordan Crouse @ 2018-10-19 17:13 UTC (permalink / raw)
To: Sam Ravnborg
Cc: seanpaul-F7+t8E8rja9g9hUCZPvPmw,
linux-arm-msm-u79uwXL29TY76Z2rM5mHXA,
freedreno-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW,
dri-devel-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW,
abhinavk-sgV2jX0FEOL9JmXXK+q4OQ
On Thu, Oct 18, 2018 at 11:53:59PM +0200, Sam Ravnborg wrote:
> Hi Jordan.
>
> On Thu, Oct 18, 2018 at 01:58:31PM -0600, Jordan Crouse wrote:
> > Outside of superfluous parameter checks the dpu_hw_blk_init()
> > doesn't have any failure paths. Switch it over to be a void
> > function and we can remove error handling paths in all the functions
> > that call it. While we're in those functions remove unneeded
> > initialization for a static variable.
>
> I like the simplification resulting after removing the
> error handling.
>
> > diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.h
> > index 200cd874b683..27699000aaca 100644
> > --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.h
> > +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.h
> > @@ -61,11 +61,6 @@ struct dpu_hw_lm_ops {
> > void (*setup_border_color)(struct dpu_hw_mixer *ctx,
> > struct dpu_mdss_color *color,
> > u8 border_en);
> > - /**
> > - * setup_gc : enable/disable gamma correction feature
> > - */
> > - void (*setup_gc)(struct dpu_hw_mixer *mixer,
> > - void *cfg);
> > };
> >
> > struct dpu_hw_mixer {
>
> This part looks like it do not belong in this patch.
Oops, indeed - that should have gone in the static inline patch. Thanks!
Jordan
--
The Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project
_______________________________________________
Freedreno mailing list
Freedreno@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/freedreno
^ permalink raw reply [flat|nested] 29+ messages in thread
* Re: [PATCH 01/11] drm/msm/dpu: Remove dpu_dbg
[not found] ` <20181018195836.15885-2-jcrouse-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
@ 2018-10-19 17:34 ` Bruce Wang
2018-10-19 18:11 ` Bruce Wang
1 sibling, 0 replies; 29+ messages in thread
From: Bruce Wang @ 2018-10-19 17:34 UTC (permalink / raw)
To: Jordan Crouse, freedreno-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW
Cc: linux-arm-msm-u79uwXL29TY76Z2rM5mHXA,
seanpaul-F7+t8E8rja9g9hUCZPvPmw,
dri-devel-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW,
abhinavk-sgV2jX0FEOL9JmXXK+q4OQ
On 10/18/2018 03:58 PM, Jordan Crouse wrote:
> The functions in dpu_dbg.c aren't used. The two main dump functions
> fail after a lookup from dpu_dbg_base.reg_base_list which turns out
> to never be populated and once those are removed the rest of the
> file doesn't make any sense.
>
> Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
> ---
> drivers/gpu/drm/msm/Makefile | 3 +-
> drivers/gpu/drm/msm/disp/dpu1/dpu_dbg.c | 2393 -----------------
> drivers/gpu/drm/msm/disp/dpu1/dpu_dbg.h | 103 -
> drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 24 +-
> .../drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c | 1 -
> .../drm/msm/disp/dpu1/dpu_encoder_phys_vid.c | 1 -
> drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c | 1 -
> drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.c | 1 -
> drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.c | 1 -
> .../gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.c | 1 -
> drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c | 1 -
> drivers/gpu/drm/msm/disp/dpu1/dpu_hw_top.c | 3 -
> drivers/gpu/drm/msm/disp/dpu1/dpu_hw_vbif.c | 1 -
> drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 20 +-
> drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h | 1 -
> 15 files changed, 8 insertions(+), 2547 deletions(-)
> delete mode 100644 drivers/gpu/drm/msm/disp/dpu1/dpu_dbg.c
> delete mode 100644 drivers/gpu/drm/msm/disp/dpu1/dpu_dbg.h
>
> diff --git a/drivers/gpu/drm/msm/Makefile b/drivers/gpu/drm/msm/Makefile
> index 19ab521d4c3a..e067dd1341b1 100644
> --- a/drivers/gpu/drm/msm/Makefile
> +++ b/drivers/gpu/drm/msm/Makefile
> @@ -92,8 +92,7 @@ msm-y := \
> msm_ringbuffer.o \
> msm_submitqueue.o
>
> -msm-$(CONFIG_DEBUG_FS) += adreno/a5xx_debugfs.o \
> - disp/dpu1/dpu_dbg.o
> +msm-$(CONFIG_DEBUG_FS) += adreno/a5xx_debugfs.o
>
> msm-$(CONFIG_DRM_FBDEV_EMULATION) += msm_fbdev.o
> msm-$(CONFIG_COMMON_CLK) += disp/mdp4/mdp4_lvds_pll.o
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_dbg.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_dbg.c
> deleted file mode 100644
> index ae2aee7ed9e1..000000000000
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_dbg.c
> +++ /dev/null
> @@ -1,2393 +0,0 @@
> -/* Copyright (c) 2009-2018, The Linux Foundation. All rights reserved.
> - *
> - * This program is free software; you can redistribute it and/or modify
> - * it under the terms of the GNU General Public License version 2 and
> - * only version 2 as published by the Free Software Foundation.
> - *
> - * This program is distributed in the hope that it will be useful,
> - * but WITHOUT ANY WARRANTY; without even the implied warranty of
> - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> - * GNU General Public License for more details.
> - */
> -
> -#define pr_fmt(fmt) "[drm:%s:%d] " fmt, __func__, __LINE__
> -
> -#include <linux/delay.h>
> -#include <linux/spinlock.h>
> -#include <linux/ktime.h>
> -#include <linux/debugfs.h>
> -#include <linux/uaccess.h>
> -#include <linux/dma-buf.h>
> -#include <linux/slab.h>
> -#include <linux/list_sort.h>
> -#include <linux/pm_runtime.h>
> -
> -#include "dpu_dbg.h"
> -#include "disp/dpu1/dpu_hw_catalog.h"
> -
> -
> -#define DEFAULT_DBGBUS_DPU DPU_DBG_DUMP_IN_MEM
> -#define DEFAULT_DBGBUS_VBIFRT DPU_DBG_DUMP_IN_MEM
> -#define REG_BASE_NAME_LEN 80
> -
> -#define DBGBUS_FLAGS_DSPP BIT(0)
> -#define DBGBUS_DSPP_STATUS 0x34C
> -
> -#define DBGBUS_NAME_DPU "dpu"
> -#define DBGBUS_NAME_VBIF_RT "vbif_rt"
> -
> -/* offsets from dpu top address for the debug buses */
> -#define DBGBUS_SSPP0 0x188
> -#define DBGBUS_AXI_INTF 0x194
> -#define DBGBUS_SSPP1 0x298
> -#define DBGBUS_DSPP 0x348
> -#define DBGBUS_PERIPH 0x418
> -
> -#define TEST_MASK(id, tp) ((id << 4) | (tp << 1) | BIT(0))
> -
> -/* following offsets are with respect to MDP VBIF base for DBG BUS access */
> -#define MMSS_VBIF_CLKON 0x4
> -#define MMSS_VBIF_TEST_BUS_OUT_CTRL 0x210
> -#define MMSS_VBIF_TEST_BUS_OUT 0x230
> -
> -/* Vbif error info */
> -#define MMSS_VBIF_PND_ERR 0x190
> -#define MMSS_VBIF_SRC_ERR 0x194
> -#define MMSS_VBIF_XIN_HALT_CTRL1 0x204
> -#define MMSS_VBIF_ERR_INFO 0X1a0
> -#define MMSS_VBIF_ERR_INFO_1 0x1a4
> -#define MMSS_VBIF_CLIENT_NUM 14
> -
> -/**
> - * struct dpu_dbg_reg_base - register region base.
> - * may sub-ranges: sub-ranges are used for dumping
> - * or may not have sub-ranges: dumping is base -> max_offset
> - * @reg_base_head: head of this node
> - * @name: register base name
> - * @base: base pointer
> - * @off: cached offset of region for manual register dumping
> - * @cnt: cached range of region for manual register dumping
> - * @max_offset: length of region
> - * @buf: buffer used for manual register dumping
> - * @buf_len: buffer length used for manual register dumping
> - * @cb: callback for external dump function, null if not defined
> - * @cb_ptr: private pointer to callback function
> - */
> -struct dpu_dbg_reg_base {
> - struct list_head reg_base_head;
> - char name[REG_BASE_NAME_LEN];
> - void __iomem *base;
> - size_t off;
> - size_t cnt;
> - size_t max_offset;
> - char *buf;
> - size_t buf_len;
> - void (*cb)(void *ptr);
> - void *cb_ptr;
> -};
> -
> -struct dpu_debug_bus_entry {
> - u32 wr_addr;
> - u32 block_id;
> - u32 test_id;
> - void (*analyzer)(void __iomem *mem_base,
> - struct dpu_debug_bus_entry *entry, u32 val);
> -};
> -
> -struct vbif_debug_bus_entry {
> - u32 disable_bus_addr;
> - u32 block_bus_addr;
> - u32 bit_offset;
> - u32 block_cnt;
> - u32 test_pnt_start;
> - u32 test_pnt_cnt;
> -};
> -
> -struct dpu_dbg_debug_bus_common {
> - char *name;
> - u32 enable_mask;
> - bool include_in_deferred_work;
> - u32 flags;
> - u32 entries_size;
> - u32 *dumped_content;
> -};
> -
> -struct dpu_dbg_dpu_debug_bus {
> - struct dpu_dbg_debug_bus_common cmn;
> - struct dpu_debug_bus_entry *entries;
> - u32 top_blk_off;
> -};
> -
> -struct dpu_dbg_vbif_debug_bus {
> - struct dpu_dbg_debug_bus_common cmn;
> - struct vbif_debug_bus_entry *entries;
> -};
> -
> -/**
> - * struct dpu_dbg_base - global dpu debug base structure
> - * @reg_base_list: list of register dumping regions
> - * @dev: device pointer
> - * @dump_work: work struct for deferring register dump work to separate thread
> - * @dbgbus_dpu: debug bus structure for the dpu
> - * @dbgbus_vbif_rt: debug bus structure for the realtime vbif
> - */
> -static struct dpu_dbg_base {
> - struct list_head reg_base_list;
> - struct device *dev;
> -
> - struct work_struct dump_work;
> -
> - struct dpu_dbg_dpu_debug_bus dbgbus_dpu;
> - struct dpu_dbg_vbif_debug_bus dbgbus_vbif_rt;
> -} dpu_dbg_base;
> -
> -static void _dpu_debug_bus_xbar_dump(void __iomem *mem_base,
> - struct dpu_debug_bus_entry *entry, u32 val)
> -{
> - dev_err(dpu_dbg_base.dev, "xbar 0x%x %d %d 0x%x\n",
> - entry->wr_addr, entry->block_id, entry->test_id, val);
> -}
> -
> -static void _dpu_debug_bus_lm_dump(void __iomem *mem_base,
> - struct dpu_debug_bus_entry *entry, u32 val)
> -{
> - if (!(val & 0xFFF000))
> - return;
> -
> - dev_err(dpu_dbg_base.dev, "lm 0x%x %d %d 0x%x\n",
> - entry->wr_addr, entry->block_id, entry->test_id, val);
> -}
> -
> -static void _dpu_debug_bus_ppb0_dump(void __iomem *mem_base,
> - struct dpu_debug_bus_entry *entry, u32 val)
> -{
> - if (!(val & BIT(15)))
> - return;
> -
> - dev_err(dpu_dbg_base.dev, "ppb0 0x%x %d %d 0x%x\n",
> - entry->wr_addr, entry->block_id, entry->test_id, val);
> -}
> -
> -static void _dpu_debug_bus_ppb1_dump(void __iomem *mem_base,
> - struct dpu_debug_bus_entry *entry, u32 val)
> -{
> - if (!(val & BIT(15)))
> - return;
> -
> - dev_err(dpu_dbg_base.dev, "ppb1 0x%x %d %d 0x%x\n",
> - entry->wr_addr, entry->block_id, entry->test_id, val);
> -}
> -
> -static struct dpu_debug_bus_entry dbg_bus_dpu_8998[] = {
> -
> - /* Unpack 0 sspp 0*/
> - { DBGBUS_SSPP0, 50, 2 },
> - { DBGBUS_SSPP0, 60, 2 },
> - { DBGBUS_SSPP0, 70, 2 },
> - { DBGBUS_SSPP0, 85, 2 },
> -
> - /* Upack 0 sspp 1*/
> - { DBGBUS_SSPP1, 50, 2 },
> - { DBGBUS_SSPP1, 60, 2 },
> - { DBGBUS_SSPP1, 70, 2 },
> - { DBGBUS_SSPP1, 85, 2 },
> -
> - /* scheduler */
> - { DBGBUS_DSPP, 130, 0 },
> - { DBGBUS_DSPP, 130, 1 },
> - { DBGBUS_DSPP, 130, 2 },
> - { DBGBUS_DSPP, 130, 3 },
> - { DBGBUS_DSPP, 130, 4 },
> - { DBGBUS_DSPP, 130, 5 },
> -
> - /* qseed */
> - { DBGBUS_SSPP0, 6, 0},
> - { DBGBUS_SSPP0, 6, 1},
> - { DBGBUS_SSPP0, 26, 0},
> - { DBGBUS_SSPP0, 26, 1},
> - { DBGBUS_SSPP1, 6, 0},
> - { DBGBUS_SSPP1, 6, 1},
> - { DBGBUS_SSPP1, 26, 0},
> - { DBGBUS_SSPP1, 26, 1},
> -
> - /* scale */
> - { DBGBUS_SSPP0, 16, 0},
> - { DBGBUS_SSPP0, 16, 1},
> - { DBGBUS_SSPP0, 36, 0},
> - { DBGBUS_SSPP0, 36, 1},
> - { DBGBUS_SSPP1, 16, 0},
> - { DBGBUS_SSPP1, 16, 1},
> - { DBGBUS_SSPP1, 36, 0},
> - { DBGBUS_SSPP1, 36, 1},
> -
> - /* fetch sspp0 */
> -
> - /* vig 0 */
> - { DBGBUS_SSPP0, 0, 0 },
> - { DBGBUS_SSPP0, 0, 1 },
> - { DBGBUS_SSPP0, 0, 2 },
> - { DBGBUS_SSPP0, 0, 3 },
> - { DBGBUS_SSPP0, 0, 4 },
> - { DBGBUS_SSPP0, 0, 5 },
> - { DBGBUS_SSPP0, 0, 6 },
> - { DBGBUS_SSPP0, 0, 7 },
> -
> - { DBGBUS_SSPP0, 1, 0 },
> - { DBGBUS_SSPP0, 1, 1 },
> - { DBGBUS_SSPP0, 1, 2 },
> - { DBGBUS_SSPP0, 1, 3 },
> - { DBGBUS_SSPP0, 1, 4 },
> - { DBGBUS_SSPP0, 1, 5 },
> - { DBGBUS_SSPP0, 1, 6 },
> - { DBGBUS_SSPP0, 1, 7 },
> -
> - { DBGBUS_SSPP0, 2, 0 },
> - { DBGBUS_SSPP0, 2, 1 },
> - { DBGBUS_SSPP0, 2, 2 },
> - { DBGBUS_SSPP0, 2, 3 },
> - { DBGBUS_SSPP0, 2, 4 },
> - { DBGBUS_SSPP0, 2, 5 },
> - { DBGBUS_SSPP0, 2, 6 },
> - { DBGBUS_SSPP0, 2, 7 },
> -
> - { DBGBUS_SSPP0, 4, 0 },
> - { DBGBUS_SSPP0, 4, 1 },
> - { DBGBUS_SSPP0, 4, 2 },
> - { DBGBUS_SSPP0, 4, 3 },
> - { DBGBUS_SSPP0, 4, 4 },
> - { DBGBUS_SSPP0, 4, 5 },
> - { DBGBUS_SSPP0, 4, 6 },
> - { DBGBUS_SSPP0, 4, 7 },
> -
> - { DBGBUS_SSPP0, 5, 0 },
> - { DBGBUS_SSPP0, 5, 1 },
> - { DBGBUS_SSPP0, 5, 2 },
> - { DBGBUS_SSPP0, 5, 3 },
> - { DBGBUS_SSPP0, 5, 4 },
> - { DBGBUS_SSPP0, 5, 5 },
> - { DBGBUS_SSPP0, 5, 6 },
> - { DBGBUS_SSPP0, 5, 7 },
> -
> - /* vig 2 */
> - { DBGBUS_SSPP0, 20, 0 },
> - { DBGBUS_SSPP0, 20, 1 },
> - { DBGBUS_SSPP0, 20, 2 },
> - { DBGBUS_SSPP0, 20, 3 },
> - { DBGBUS_SSPP0, 20, 4 },
> - { DBGBUS_SSPP0, 20, 5 },
> - { DBGBUS_SSPP0, 20, 6 },
> - { DBGBUS_SSPP0, 20, 7 },
> -
> - { DBGBUS_SSPP0, 21, 0 },
> - { DBGBUS_SSPP0, 21, 1 },
> - { DBGBUS_SSPP0, 21, 2 },
> - { DBGBUS_SSPP0, 21, 3 },
> - { DBGBUS_SSPP0, 21, 4 },
> - { DBGBUS_SSPP0, 21, 5 },
> - { DBGBUS_SSPP0, 21, 6 },
> - { DBGBUS_SSPP0, 21, 7 },
> -
> - { DBGBUS_SSPP0, 22, 0 },
> - { DBGBUS_SSPP0, 22, 1 },
> - { DBGBUS_SSPP0, 22, 2 },
> - { DBGBUS_SSPP0, 22, 3 },
> - { DBGBUS_SSPP0, 22, 4 },
> - { DBGBUS_SSPP0, 22, 5 },
> - { DBGBUS_SSPP0, 22, 6 },
> - { DBGBUS_SSPP0, 22, 7 },
> -
> - { DBGBUS_SSPP0, 24, 0 },
> - { DBGBUS_SSPP0, 24, 1 },
> - { DBGBUS_SSPP0, 24, 2 },
> - { DBGBUS_SSPP0, 24, 3 },
> - { DBGBUS_SSPP0, 24, 4 },
> - { DBGBUS_SSPP0, 24, 5 },
> - { DBGBUS_SSPP0, 24, 6 },
> - { DBGBUS_SSPP0, 24, 7 },
> -
> - { DBGBUS_SSPP0, 25, 0 },
> - { DBGBUS_SSPP0, 25, 1 },
> - { DBGBUS_SSPP0, 25, 2 },
> - { DBGBUS_SSPP0, 25, 3 },
> - { DBGBUS_SSPP0, 25, 4 },
> - { DBGBUS_SSPP0, 25, 5 },
> - { DBGBUS_SSPP0, 25, 6 },
> - { DBGBUS_SSPP0, 25, 7 },
> -
> - /* dma 2 */
> - { DBGBUS_SSPP0, 30, 0 },
> - { DBGBUS_SSPP0, 30, 1 },
> - { DBGBUS_SSPP0, 30, 2 },
> - { DBGBUS_SSPP0, 30, 3 },
> - { DBGBUS_SSPP0, 30, 4 },
> - { DBGBUS_SSPP0, 30, 5 },
> - { DBGBUS_SSPP0, 30, 6 },
> - { DBGBUS_SSPP0, 30, 7 },
> -
> - { DBGBUS_SSPP0, 31, 0 },
> - { DBGBUS_SSPP0, 31, 1 },
> - { DBGBUS_SSPP0, 31, 2 },
> - { DBGBUS_SSPP0, 31, 3 },
> - { DBGBUS_SSPP0, 31, 4 },
> - { DBGBUS_SSPP0, 31, 5 },
> - { DBGBUS_SSPP0, 31, 6 },
> - { DBGBUS_SSPP0, 31, 7 },
> -
> - { DBGBUS_SSPP0, 32, 0 },
> - { DBGBUS_SSPP0, 32, 1 },
> - { DBGBUS_SSPP0, 32, 2 },
> - { DBGBUS_SSPP0, 32, 3 },
> - { DBGBUS_SSPP0, 32, 4 },
> - { DBGBUS_SSPP0, 32, 5 },
> - { DBGBUS_SSPP0, 32, 6 },
> - { DBGBUS_SSPP0, 32, 7 },
> -
> - { DBGBUS_SSPP0, 33, 0 },
> - { DBGBUS_SSPP0, 33, 1 },
> - { DBGBUS_SSPP0, 33, 2 },
> - { DBGBUS_SSPP0, 33, 3 },
> - { DBGBUS_SSPP0, 33, 4 },
> - { DBGBUS_SSPP0, 33, 5 },
> - { DBGBUS_SSPP0, 33, 6 },
> - { DBGBUS_SSPP0, 33, 7 },
> -
> - { DBGBUS_SSPP0, 34, 0 },
> - { DBGBUS_SSPP0, 34, 1 },
> - { DBGBUS_SSPP0, 34, 2 },
> - { DBGBUS_SSPP0, 34, 3 },
> - { DBGBUS_SSPP0, 34, 4 },
> - { DBGBUS_SSPP0, 34, 5 },
> - { DBGBUS_SSPP0, 34, 6 },
> - { DBGBUS_SSPP0, 34, 7 },
> -
> - { DBGBUS_SSPP0, 35, 0 },
> - { DBGBUS_SSPP0, 35, 1 },
> - { DBGBUS_SSPP0, 35, 2 },
> - { DBGBUS_SSPP0, 35, 3 },
> -
> - /* dma 0 */
> - { DBGBUS_SSPP0, 40, 0 },
> - { DBGBUS_SSPP0, 40, 1 },
> - { DBGBUS_SSPP0, 40, 2 },
> - { DBGBUS_SSPP0, 40, 3 },
> - { DBGBUS_SSPP0, 40, 4 },
> - { DBGBUS_SSPP0, 40, 5 },
> - { DBGBUS_SSPP0, 40, 6 },
> - { DBGBUS_SSPP0, 40, 7 },
> -
> - { DBGBUS_SSPP0, 41, 0 },
> - { DBGBUS_SSPP0, 41, 1 },
> - { DBGBUS_SSPP0, 41, 2 },
> - { DBGBUS_SSPP0, 41, 3 },
> - { DBGBUS_SSPP0, 41, 4 },
> - { DBGBUS_SSPP0, 41, 5 },
> - { DBGBUS_SSPP0, 41, 6 },
> - { DBGBUS_SSPP0, 41, 7 },
> -
> - { DBGBUS_SSPP0, 42, 0 },
> - { DBGBUS_SSPP0, 42, 1 },
> - { DBGBUS_SSPP0, 42, 2 },
> - { DBGBUS_SSPP0, 42, 3 },
> - { DBGBUS_SSPP0, 42, 4 },
> - { DBGBUS_SSPP0, 42, 5 },
> - { DBGBUS_SSPP0, 42, 6 },
> - { DBGBUS_SSPP0, 42, 7 },
> -
> - { DBGBUS_SSPP0, 44, 0 },
> - { DBGBUS_SSPP0, 44, 1 },
> - { DBGBUS_SSPP0, 44, 2 },
> - { DBGBUS_SSPP0, 44, 3 },
> - { DBGBUS_SSPP0, 44, 4 },
> - { DBGBUS_SSPP0, 44, 5 },
> - { DBGBUS_SSPP0, 44, 6 },
> - { DBGBUS_SSPP0, 44, 7 },
> -
> - { DBGBUS_SSPP0, 45, 0 },
> - { DBGBUS_SSPP0, 45, 1 },
> - { DBGBUS_SSPP0, 45, 2 },
> - { DBGBUS_SSPP0, 45, 3 },
> - { DBGBUS_SSPP0, 45, 4 },
> - { DBGBUS_SSPP0, 45, 5 },
> - { DBGBUS_SSPP0, 45, 6 },
> - { DBGBUS_SSPP0, 45, 7 },
> -
> - /* fetch sspp1 */
> - /* vig 1 */
> - { DBGBUS_SSPP1, 0, 0 },
> - { DBGBUS_SSPP1, 0, 1 },
> - { DBGBUS_SSPP1, 0, 2 },
> - { DBGBUS_SSPP1, 0, 3 },
> - { DBGBUS_SSPP1, 0, 4 },
> - { DBGBUS_SSPP1, 0, 5 },
> - { DBGBUS_SSPP1, 0, 6 },
> - { DBGBUS_SSPP1, 0, 7 },
> -
> - { DBGBUS_SSPP1, 1, 0 },
> - { DBGBUS_SSPP1, 1, 1 },
> - { DBGBUS_SSPP1, 1, 2 },
> - { DBGBUS_SSPP1, 1, 3 },
> - { DBGBUS_SSPP1, 1, 4 },
> - { DBGBUS_SSPP1, 1, 5 },
> - { DBGBUS_SSPP1, 1, 6 },
> - { DBGBUS_SSPP1, 1, 7 },
> -
> - { DBGBUS_SSPP1, 2, 0 },
> - { DBGBUS_SSPP1, 2, 1 },
> - { DBGBUS_SSPP1, 2, 2 },
> - { DBGBUS_SSPP1, 2, 3 },
> - { DBGBUS_SSPP1, 2, 4 },
> - { DBGBUS_SSPP1, 2, 5 },
> - { DBGBUS_SSPP1, 2, 6 },
> - { DBGBUS_SSPP1, 2, 7 },
> -
> - { DBGBUS_SSPP1, 4, 0 },
> - { DBGBUS_SSPP1, 4, 1 },
> - { DBGBUS_SSPP1, 4, 2 },
> - { DBGBUS_SSPP1, 4, 3 },
> - { DBGBUS_SSPP1, 4, 4 },
> - { DBGBUS_SSPP1, 4, 5 },
> - { DBGBUS_SSPP1, 4, 6 },
> - { DBGBUS_SSPP1, 4, 7 },
> -
> - { DBGBUS_SSPP1, 5, 0 },
> - { DBGBUS_SSPP1, 5, 1 },
> - { DBGBUS_SSPP1, 5, 2 },
> - { DBGBUS_SSPP1, 5, 3 },
> - { DBGBUS_SSPP1, 5, 4 },
> - { DBGBUS_SSPP1, 5, 5 },
> - { DBGBUS_SSPP1, 5, 6 },
> - { DBGBUS_SSPP1, 5, 7 },
> -
> - /* vig 3 */
> - { DBGBUS_SSPP1, 20, 0 },
> - { DBGBUS_SSPP1, 20, 1 },
> - { DBGBUS_SSPP1, 20, 2 },
> - { DBGBUS_SSPP1, 20, 3 },
> - { DBGBUS_SSPP1, 20, 4 },
> - { DBGBUS_SSPP1, 20, 5 },
> - { DBGBUS_SSPP1, 20, 6 },
> - { DBGBUS_SSPP1, 20, 7 },
> -
> - { DBGBUS_SSPP1, 21, 0 },
> - { DBGBUS_SSPP1, 21, 1 },
> - { DBGBUS_SSPP1, 21, 2 },
> - { DBGBUS_SSPP1, 21, 3 },
> - { DBGBUS_SSPP1, 21, 4 },
> - { DBGBUS_SSPP1, 21, 5 },
> - { DBGBUS_SSPP1, 21, 6 },
> - { DBGBUS_SSPP1, 21, 7 },
> -
> - { DBGBUS_SSPP1, 22, 0 },
> - { DBGBUS_SSPP1, 22, 1 },
> - { DBGBUS_SSPP1, 22, 2 },
> - { DBGBUS_SSPP1, 22, 3 },
> - { DBGBUS_SSPP1, 22, 4 },
> - { DBGBUS_SSPP1, 22, 5 },
> - { DBGBUS_SSPP1, 22, 6 },
> - { DBGBUS_SSPP1, 22, 7 },
> -
> - { DBGBUS_SSPP1, 24, 0 },
> - { DBGBUS_SSPP1, 24, 1 },
> - { DBGBUS_SSPP1, 24, 2 },
> - { DBGBUS_SSPP1, 24, 3 },
> - { DBGBUS_SSPP1, 24, 4 },
> - { DBGBUS_SSPP1, 24, 5 },
> - { DBGBUS_SSPP1, 24, 6 },
> - { DBGBUS_SSPP1, 24, 7 },
> -
> - { DBGBUS_SSPP1, 25, 0 },
> - { DBGBUS_SSPP1, 25, 1 },
> - { DBGBUS_SSPP1, 25, 2 },
> - { DBGBUS_SSPP1, 25, 3 },
> - { DBGBUS_SSPP1, 25, 4 },
> - { DBGBUS_SSPP1, 25, 5 },
> - { DBGBUS_SSPP1, 25, 6 },
> - { DBGBUS_SSPP1, 25, 7 },
> -
> - /* dma 3 */
> - { DBGBUS_SSPP1, 30, 0 },
> - { DBGBUS_SSPP1, 30, 1 },
> - { DBGBUS_SSPP1, 30, 2 },
> - { DBGBUS_SSPP1, 30, 3 },
> - { DBGBUS_SSPP1, 30, 4 },
> - { DBGBUS_SSPP1, 30, 5 },
> - { DBGBUS_SSPP1, 30, 6 },
> - { DBGBUS_SSPP1, 30, 7 },
> -
> - { DBGBUS_SSPP1, 31, 0 },
> - { DBGBUS_SSPP1, 31, 1 },
> - { DBGBUS_SSPP1, 31, 2 },
> - { DBGBUS_SSPP1, 31, 3 },
> - { DBGBUS_SSPP1, 31, 4 },
> - { DBGBUS_SSPP1, 31, 5 },
> - { DBGBUS_SSPP1, 31, 6 },
> - { DBGBUS_SSPP1, 31, 7 },
> -
> - { DBGBUS_SSPP1, 32, 0 },
> - { DBGBUS_SSPP1, 32, 1 },
> - { DBGBUS_SSPP1, 32, 2 },
> - { DBGBUS_SSPP1, 32, 3 },
> - { DBGBUS_SSPP1, 32, 4 },
> - { DBGBUS_SSPP1, 32, 5 },
> - { DBGBUS_SSPP1, 32, 6 },
> - { DBGBUS_SSPP1, 32, 7 },
> -
> - { DBGBUS_SSPP1, 33, 0 },
> - { DBGBUS_SSPP1, 33, 1 },
> - { DBGBUS_SSPP1, 33, 2 },
> - { DBGBUS_SSPP1, 33, 3 },
> - { DBGBUS_SSPP1, 33, 4 },
> - { DBGBUS_SSPP1, 33, 5 },
> - { DBGBUS_SSPP1, 33, 6 },
> - { DBGBUS_SSPP1, 33, 7 },
> -
> - { DBGBUS_SSPP1, 34, 0 },
> - { DBGBUS_SSPP1, 34, 1 },
> - { DBGBUS_SSPP1, 34, 2 },
> - { DBGBUS_SSPP1, 34, 3 },
> - { DBGBUS_SSPP1, 34, 4 },
> - { DBGBUS_SSPP1, 34, 5 },
> - { DBGBUS_SSPP1, 34, 6 },
> - { DBGBUS_SSPP1, 34, 7 },
> -
> - { DBGBUS_SSPP1, 35, 0 },
> - { DBGBUS_SSPP1, 35, 1 },
> - { DBGBUS_SSPP1, 35, 2 },
> -
> - /* dma 1 */
> - { DBGBUS_SSPP1, 40, 0 },
> - { DBGBUS_SSPP1, 40, 1 },
> - { DBGBUS_SSPP1, 40, 2 },
> - { DBGBUS_SSPP1, 40, 3 },
> - { DBGBUS_SSPP1, 40, 4 },
> - { DBGBUS_SSPP1, 40, 5 },
> - { DBGBUS_SSPP1, 40, 6 },
> - { DBGBUS_SSPP1, 40, 7 },
> -
> - { DBGBUS_SSPP1, 41, 0 },
> - { DBGBUS_SSPP1, 41, 1 },
> - { DBGBUS_SSPP1, 41, 2 },
> - { DBGBUS_SSPP1, 41, 3 },
> - { DBGBUS_SSPP1, 41, 4 },
> - { DBGBUS_SSPP1, 41, 5 },
> - { DBGBUS_SSPP1, 41, 6 },
> - { DBGBUS_SSPP1, 41, 7 },
> -
> - { DBGBUS_SSPP1, 42, 0 },
> - { DBGBUS_SSPP1, 42, 1 },
> - { DBGBUS_SSPP1, 42, 2 },
> - { DBGBUS_SSPP1, 42, 3 },
> - { DBGBUS_SSPP1, 42, 4 },
> - { DBGBUS_SSPP1, 42, 5 },
> - { DBGBUS_SSPP1, 42, 6 },
> - { DBGBUS_SSPP1, 42, 7 },
> -
> - { DBGBUS_SSPP1, 44, 0 },
> - { DBGBUS_SSPP1, 44, 1 },
> - { DBGBUS_SSPP1, 44, 2 },
> - { DBGBUS_SSPP1, 44, 3 },
> - { DBGBUS_SSPP1, 44, 4 },
> - { DBGBUS_SSPP1, 44, 5 },
> - { DBGBUS_SSPP1, 44, 6 },
> - { DBGBUS_SSPP1, 44, 7 },
> -
> - { DBGBUS_SSPP1, 45, 0 },
> - { DBGBUS_SSPP1, 45, 1 },
> - { DBGBUS_SSPP1, 45, 2 },
> - { DBGBUS_SSPP1, 45, 3 },
> - { DBGBUS_SSPP1, 45, 4 },
> - { DBGBUS_SSPP1, 45, 5 },
> - { DBGBUS_SSPP1, 45, 6 },
> - { DBGBUS_SSPP1, 45, 7 },
> -
> - /* cursor 1 */
> - { DBGBUS_SSPP1, 80, 0 },
> - { DBGBUS_SSPP1, 80, 1 },
> - { DBGBUS_SSPP1, 80, 2 },
> - { DBGBUS_SSPP1, 80, 3 },
> - { DBGBUS_SSPP1, 80, 4 },
> - { DBGBUS_SSPP1, 80, 5 },
> - { DBGBUS_SSPP1, 80, 6 },
> - { DBGBUS_SSPP1, 80, 7 },
> -
> - { DBGBUS_SSPP1, 81, 0 },
> - { DBGBUS_SSPP1, 81, 1 },
> - { DBGBUS_SSPP1, 81, 2 },
> - { DBGBUS_SSPP1, 81, 3 },
> - { DBGBUS_SSPP1, 81, 4 },
> - { DBGBUS_SSPP1, 81, 5 },
> - { DBGBUS_SSPP1, 81, 6 },
> - { DBGBUS_SSPP1, 81, 7 },
> -
> - { DBGBUS_SSPP1, 82, 0 },
> - { DBGBUS_SSPP1, 82, 1 },
> - { DBGBUS_SSPP1, 82, 2 },
> - { DBGBUS_SSPP1, 82, 3 },
> - { DBGBUS_SSPP1, 82, 4 },
> - { DBGBUS_SSPP1, 82, 5 },
> - { DBGBUS_SSPP1, 82, 6 },
> - { DBGBUS_SSPP1, 82, 7 },
> -
> - { DBGBUS_SSPP1, 83, 0 },
> - { DBGBUS_SSPP1, 83, 1 },
> - { DBGBUS_SSPP1, 83, 2 },
> - { DBGBUS_SSPP1, 83, 3 },
> - { DBGBUS_SSPP1, 83, 4 },
> - { DBGBUS_SSPP1, 83, 5 },
> - { DBGBUS_SSPP1, 83, 6 },
> - { DBGBUS_SSPP1, 83, 7 },
> -
> - { DBGBUS_SSPP1, 84, 0 },
> - { DBGBUS_SSPP1, 84, 1 },
> - { DBGBUS_SSPP1, 84, 2 },
> - { DBGBUS_SSPP1, 84, 3 },
> - { DBGBUS_SSPP1, 84, 4 },
> - { DBGBUS_SSPP1, 84, 5 },
> - { DBGBUS_SSPP1, 84, 6 },
> - { DBGBUS_SSPP1, 84, 7 },
> -
> - /* dspp */
> - { DBGBUS_DSPP, 13, 0 },
> - { DBGBUS_DSPP, 19, 0 },
> - { DBGBUS_DSPP, 14, 0 },
> - { DBGBUS_DSPP, 14, 1 },
> - { DBGBUS_DSPP, 14, 3 },
> - { DBGBUS_DSPP, 20, 0 },
> - { DBGBUS_DSPP, 20, 1 },
> - { DBGBUS_DSPP, 20, 3 },
> -
> - /* ppb_0 */
> - { DBGBUS_DSPP, 31, 0, _dpu_debug_bus_ppb0_dump },
> - { DBGBUS_DSPP, 33, 0, _dpu_debug_bus_ppb0_dump },
> - { DBGBUS_DSPP, 35, 0, _dpu_debug_bus_ppb0_dump },
> - { DBGBUS_DSPP, 42, 0, _dpu_debug_bus_ppb0_dump },
> -
> - /* ppb_1 */
> - { DBGBUS_DSPP, 32, 0, _dpu_debug_bus_ppb1_dump },
> - { DBGBUS_DSPP, 34, 0, _dpu_debug_bus_ppb1_dump },
> - { DBGBUS_DSPP, 36, 0, _dpu_debug_bus_ppb1_dump },
> - { DBGBUS_DSPP, 43, 0, _dpu_debug_bus_ppb1_dump },
> -
> - /* lm_lut */
> - { DBGBUS_DSPP, 109, 0 },
> - { DBGBUS_DSPP, 105, 0 },
> - { DBGBUS_DSPP, 103, 0 },
> -
> - /* tear-check */
> - { DBGBUS_PERIPH, 63, 0 },
> - { DBGBUS_PERIPH, 64, 0 },
> - { DBGBUS_PERIPH, 65, 0 },
> - { DBGBUS_PERIPH, 73, 0 },
> - { DBGBUS_PERIPH, 74, 0 },
> -
> - /* crossbar */
> - { DBGBUS_DSPP, 0, 0, _dpu_debug_bus_xbar_dump },
> -
> - /* rotator */
> - { DBGBUS_DSPP, 9, 0},
> -
> - /* blend */
> - /* LM0 */
> - { DBGBUS_DSPP, 63, 0},
> - { DBGBUS_DSPP, 63, 1},
> - { DBGBUS_DSPP, 63, 2},
> - { DBGBUS_DSPP, 63, 3},
> - { DBGBUS_DSPP, 63, 4},
> - { DBGBUS_DSPP, 63, 5},
> - { DBGBUS_DSPP, 63, 6},
> - { DBGBUS_DSPP, 63, 7, _dpu_debug_bus_lm_dump },
> -
> - { DBGBUS_DSPP, 64, 0},
> - { DBGBUS_DSPP, 64, 1},
> - { DBGBUS_DSPP, 64, 2},
> - { DBGBUS_DSPP, 64, 3},
> - { DBGBUS_DSPP, 64, 4},
> - { DBGBUS_DSPP, 64, 5},
> - { DBGBUS_DSPP, 64, 6},
> - { DBGBUS_DSPP, 64, 7, _dpu_debug_bus_lm_dump },
> -
> - { DBGBUS_DSPP, 65, 0},
> - { DBGBUS_DSPP, 65, 1},
> - { DBGBUS_DSPP, 65, 2},
> - { DBGBUS_DSPP, 65, 3},
> - { DBGBUS_DSPP, 65, 4},
> - { DBGBUS_DSPP, 65, 5},
> - { DBGBUS_DSPP, 65, 6},
> - { DBGBUS_DSPP, 65, 7, _dpu_debug_bus_lm_dump },
> -
> - { DBGBUS_DSPP, 66, 0},
> - { DBGBUS_DSPP, 66, 1},
> - { DBGBUS_DSPP, 66, 2},
> - { DBGBUS_DSPP, 66, 3},
> - { DBGBUS_DSPP, 66, 4},
> - { DBGBUS_DSPP, 66, 5},
> - { DBGBUS_DSPP, 66, 6},
> - { DBGBUS_DSPP, 66, 7, _dpu_debug_bus_lm_dump },
> -
> - { DBGBUS_DSPP, 67, 0},
> - { DBGBUS_DSPP, 67, 1},
> - { DBGBUS_DSPP, 67, 2},
> - { DBGBUS_DSPP, 67, 3},
> - { DBGBUS_DSPP, 67, 4},
> - { DBGBUS_DSPP, 67, 5},
> - { DBGBUS_DSPP, 67, 6},
> - { DBGBUS_DSPP, 67, 7, _dpu_debug_bus_lm_dump },
> -
> - { DBGBUS_DSPP, 68, 0},
> - { DBGBUS_DSPP, 68, 1},
> - { DBGBUS_DSPP, 68, 2},
> - { DBGBUS_DSPP, 68, 3},
> - { DBGBUS_DSPP, 68, 4},
> - { DBGBUS_DSPP, 68, 5},
> - { DBGBUS_DSPP, 68, 6},
> - { DBGBUS_DSPP, 68, 7, _dpu_debug_bus_lm_dump },
> -
> - { DBGBUS_DSPP, 69, 0},
> - { DBGBUS_DSPP, 69, 1},
> - { DBGBUS_DSPP, 69, 2},
> - { DBGBUS_DSPP, 69, 3},
> - { DBGBUS_DSPP, 69, 4},
> - { DBGBUS_DSPP, 69, 5},
> - { DBGBUS_DSPP, 69, 6},
> - { DBGBUS_DSPP, 69, 7, _dpu_debug_bus_lm_dump },
> -
> - /* LM1 */
> - { DBGBUS_DSPP, 70, 0},
> - { DBGBUS_DSPP, 70, 1},
> - { DBGBUS_DSPP, 70, 2},
> - { DBGBUS_DSPP, 70, 3},
> - { DBGBUS_DSPP, 70, 4},
> - { DBGBUS_DSPP, 70, 5},
> - { DBGBUS_DSPP, 70, 6},
> - { DBGBUS_DSPP, 70, 7, _dpu_debug_bus_lm_dump },
> -
> - { DBGBUS_DSPP, 71, 0},
> - { DBGBUS_DSPP, 71, 1},
> - { DBGBUS_DSPP, 71, 2},
> - { DBGBUS_DSPP, 71, 3},
> - { DBGBUS_DSPP, 71, 4},
> - { DBGBUS_DSPP, 71, 5},
> - { DBGBUS_DSPP, 71, 6},
> - { DBGBUS_DSPP, 71, 7, _dpu_debug_bus_lm_dump },
> -
> - { DBGBUS_DSPP, 72, 0},
> - { DBGBUS_DSPP, 72, 1},
> - { DBGBUS_DSPP, 72, 2},
> - { DBGBUS_DSPP, 72, 3},
> - { DBGBUS_DSPP, 72, 4},
> - { DBGBUS_DSPP, 72, 5},
> - { DBGBUS_DSPP, 72, 6},
> - { DBGBUS_DSPP, 72, 7, _dpu_debug_bus_lm_dump },
> -
> - { DBGBUS_DSPP, 73, 0},
> - { DBGBUS_DSPP, 73, 1},
> - { DBGBUS_DSPP, 73, 2},
> - { DBGBUS_DSPP, 73, 3},
> - { DBGBUS_DSPP, 73, 4},
> - { DBGBUS_DSPP, 73, 5},
> - { DBGBUS_DSPP, 73, 6},
> - { DBGBUS_DSPP, 73, 7, _dpu_debug_bus_lm_dump },
> -
> - { DBGBUS_DSPP, 74, 0},
> - { DBGBUS_DSPP, 74, 1},
> - { DBGBUS_DSPP, 74, 2},
> - { DBGBUS_DSPP, 74, 3},
> - { DBGBUS_DSPP, 74, 4},
> - { DBGBUS_DSPP, 74, 5},
> - { DBGBUS_DSPP, 74, 6},
> - { DBGBUS_DSPP, 74, 7, _dpu_debug_bus_lm_dump },
> -
> - { DBGBUS_DSPP, 75, 0},
> - { DBGBUS_DSPP, 75, 1},
> - { DBGBUS_DSPP, 75, 2},
> - { DBGBUS_DSPP, 75, 3},
> - { DBGBUS_DSPP, 75, 4},
> - { DBGBUS_DSPP, 75, 5},
> - { DBGBUS_DSPP, 75, 6},
> - { DBGBUS_DSPP, 75, 7, _dpu_debug_bus_lm_dump },
> -
> - { DBGBUS_DSPP, 76, 0},
> - { DBGBUS_DSPP, 76, 1},
> - { DBGBUS_DSPP, 76, 2},
> - { DBGBUS_DSPP, 76, 3},
> - { DBGBUS_DSPP, 76, 4},
> - { DBGBUS_DSPP, 76, 5},
> - { DBGBUS_DSPP, 76, 6},
> - { DBGBUS_DSPP, 76, 7, _dpu_debug_bus_lm_dump },
> -
> - /* LM2 */
> - { DBGBUS_DSPP, 77, 0},
> - { DBGBUS_DSPP, 77, 1},
> - { DBGBUS_DSPP, 77, 2},
> - { DBGBUS_DSPP, 77, 3},
> - { DBGBUS_DSPP, 77, 4},
> - { DBGBUS_DSPP, 77, 5},
> - { DBGBUS_DSPP, 77, 6},
> - { DBGBUS_DSPP, 77, 7, _dpu_debug_bus_lm_dump },
> -
> - { DBGBUS_DSPP, 78, 0},
> - { DBGBUS_DSPP, 78, 1},
> - { DBGBUS_DSPP, 78, 2},
> - { DBGBUS_DSPP, 78, 3},
> - { DBGBUS_DSPP, 78, 4},
> - { DBGBUS_DSPP, 78, 5},
> - { DBGBUS_DSPP, 78, 6},
> - { DBGBUS_DSPP, 78, 7, _dpu_debug_bus_lm_dump },
> -
> - { DBGBUS_DSPP, 79, 0},
> - { DBGBUS_DSPP, 79, 1},
> - { DBGBUS_DSPP, 79, 2},
> - { DBGBUS_DSPP, 79, 3},
> - { DBGBUS_DSPP, 79, 4},
> - { DBGBUS_DSPP, 79, 5},
> - { DBGBUS_DSPP, 79, 6},
> - { DBGBUS_DSPP, 79, 7, _dpu_debug_bus_lm_dump },
> -
> - { DBGBUS_DSPP, 80, 0},
> - { DBGBUS_DSPP, 80, 1},
> - { DBGBUS_DSPP, 80, 2},
> - { DBGBUS_DSPP, 80, 3},
> - { DBGBUS_DSPP, 80, 4},
> - { DBGBUS_DSPP, 80, 5},
> - { DBGBUS_DSPP, 80, 6},
> - { DBGBUS_DSPP, 80, 7, _dpu_debug_bus_lm_dump },
> -
> - { DBGBUS_DSPP, 81, 0},
> - { DBGBUS_DSPP, 81, 1},
> - { DBGBUS_DSPP, 81, 2},
> - { DBGBUS_DSPP, 81, 3},
> - { DBGBUS_DSPP, 81, 4},
> - { DBGBUS_DSPP, 81, 5},
> - { DBGBUS_DSPP, 81, 6},
> - { DBGBUS_DSPP, 81, 7, _dpu_debug_bus_lm_dump },
> -
> - { DBGBUS_DSPP, 82, 0},
> - { DBGBUS_DSPP, 82, 1},
> - { DBGBUS_DSPP, 82, 2},
> - { DBGBUS_DSPP, 82, 3},
> - { DBGBUS_DSPP, 82, 4},
> - { DBGBUS_DSPP, 82, 5},
> - { DBGBUS_DSPP, 82, 6},
> - { DBGBUS_DSPP, 82, 7, _dpu_debug_bus_lm_dump },
> -
> - { DBGBUS_DSPP, 83, 0},
> - { DBGBUS_DSPP, 83, 1},
> - { DBGBUS_DSPP, 83, 2},
> - { DBGBUS_DSPP, 83, 3},
> - { DBGBUS_DSPP, 83, 4},
> - { DBGBUS_DSPP, 83, 5},
> - { DBGBUS_DSPP, 83, 6},
> - { DBGBUS_DSPP, 83, 7, _dpu_debug_bus_lm_dump },
> -
> - /* csc */
> - { DBGBUS_SSPP0, 7, 0},
> - { DBGBUS_SSPP0, 7, 1},
> - { DBGBUS_SSPP0, 27, 0},
> - { DBGBUS_SSPP0, 27, 1},
> - { DBGBUS_SSPP1, 7, 0},
> - { DBGBUS_SSPP1, 7, 1},
> - { DBGBUS_SSPP1, 27, 0},
> - { DBGBUS_SSPP1, 27, 1},
> -
> - /* pcc */
> - { DBGBUS_SSPP0, 3, 3},
> - { DBGBUS_SSPP0, 23, 3},
> - { DBGBUS_SSPP0, 33, 3},
> - { DBGBUS_SSPP0, 43, 3},
> - { DBGBUS_SSPP1, 3, 3},
> - { DBGBUS_SSPP1, 23, 3},
> - { DBGBUS_SSPP1, 33, 3},
> - { DBGBUS_SSPP1, 43, 3},
> -
> - /* spa */
> - { DBGBUS_SSPP0, 8, 0},
> - { DBGBUS_SSPP0, 28, 0},
> - { DBGBUS_SSPP1, 8, 0},
> - { DBGBUS_SSPP1, 28, 0},
> - { DBGBUS_DSPP, 13, 0},
> - { DBGBUS_DSPP, 19, 0},
> -
> - /* igc */
> - { DBGBUS_SSPP0, 9, 0},
> - { DBGBUS_SSPP0, 9, 1},
> - { DBGBUS_SSPP0, 9, 3},
> - { DBGBUS_SSPP0, 29, 0},
> - { DBGBUS_SSPP0, 29, 1},
> - { DBGBUS_SSPP0, 29, 3},
> - { DBGBUS_SSPP0, 17, 0},
> - { DBGBUS_SSPP0, 17, 1},
> - { DBGBUS_SSPP0, 17, 3},
> - { DBGBUS_SSPP0, 37, 0},
> - { DBGBUS_SSPP0, 37, 1},
> - { DBGBUS_SSPP0, 37, 3},
> - { DBGBUS_SSPP0, 46, 0},
> - { DBGBUS_SSPP0, 46, 1},
> - { DBGBUS_SSPP0, 46, 3},
> -
> - { DBGBUS_SSPP1, 9, 0},
> - { DBGBUS_SSPP1, 9, 1},
> - { DBGBUS_SSPP1, 9, 3},
> - { DBGBUS_SSPP1, 29, 0},
> - { DBGBUS_SSPP1, 29, 1},
> - { DBGBUS_SSPP1, 29, 3},
> - { DBGBUS_SSPP1, 17, 0},
> - { DBGBUS_SSPP1, 17, 1},
> - { DBGBUS_SSPP1, 17, 3},
> - { DBGBUS_SSPP1, 37, 0},
> - { DBGBUS_SSPP1, 37, 1},
> - { DBGBUS_SSPP1, 37, 3},
> - { DBGBUS_SSPP1, 46, 0},
> - { DBGBUS_SSPP1, 46, 1},
> - { DBGBUS_SSPP1, 46, 3},
> -
> - { DBGBUS_DSPP, 14, 0},
> - { DBGBUS_DSPP, 14, 1},
> - { DBGBUS_DSPP, 14, 3},
> - { DBGBUS_DSPP, 20, 0},
> - { DBGBUS_DSPP, 20, 1},
> - { DBGBUS_DSPP, 20, 3},
> -
> - { DBGBUS_PERIPH, 60, 0},
> -};
> -
> -static struct dpu_debug_bus_entry dbg_bus_dpu_sdm845[] = {
> -
> - /* Unpack 0 sspp 0*/
> - { DBGBUS_SSPP0, 50, 2 },
> - { DBGBUS_SSPP0, 60, 2 },
> - { DBGBUS_SSPP0, 70, 2 },
> -
> - /* Upack 0 sspp 1*/
> - { DBGBUS_SSPP1, 50, 2 },
> - { DBGBUS_SSPP1, 60, 2 },
> - { DBGBUS_SSPP1, 70, 2 },
> -
> - /* scheduler */
> - { DBGBUS_DSPP, 130, 0 },
> - { DBGBUS_DSPP, 130, 1 },
> - { DBGBUS_DSPP, 130, 2 },
> - { DBGBUS_DSPP, 130, 3 },
> - { DBGBUS_DSPP, 130, 4 },
> - { DBGBUS_DSPP, 130, 5 },
> -
> - /* qseed */
> - { DBGBUS_SSPP0, 6, 0},
> - { DBGBUS_SSPP0, 6, 1},
> - { DBGBUS_SSPP0, 26, 0},
> - { DBGBUS_SSPP0, 26, 1},
> - { DBGBUS_SSPP1, 6, 0},
> - { DBGBUS_SSPP1, 6, 1},
> - { DBGBUS_SSPP1, 26, 0},
> - { DBGBUS_SSPP1, 26, 1},
> -
> - /* scale */
> - { DBGBUS_SSPP0, 16, 0},
> - { DBGBUS_SSPP0, 16, 1},
> - { DBGBUS_SSPP0, 36, 0},
> - { DBGBUS_SSPP0, 36, 1},
> - { DBGBUS_SSPP1, 16, 0},
> - { DBGBUS_SSPP1, 16, 1},
> - { DBGBUS_SSPP1, 36, 0},
> - { DBGBUS_SSPP1, 36, 1},
> -
> - /* fetch sspp0 */
> -
> - /* vig 0 */
> - { DBGBUS_SSPP0, 0, 0 },
> - { DBGBUS_SSPP0, 0, 1 },
> - { DBGBUS_SSPP0, 0, 2 },
> - { DBGBUS_SSPP0, 0, 3 },
> - { DBGBUS_SSPP0, 0, 4 },
> - { DBGBUS_SSPP0, 0, 5 },
> - { DBGBUS_SSPP0, 0, 6 },
> - { DBGBUS_SSPP0, 0, 7 },
> -
> - { DBGBUS_SSPP0, 1, 0 },
> - { DBGBUS_SSPP0, 1, 1 },
> - { DBGBUS_SSPP0, 1, 2 },
> - { DBGBUS_SSPP0, 1, 3 },
> - { DBGBUS_SSPP0, 1, 4 },
> - { DBGBUS_SSPP0, 1, 5 },
> - { DBGBUS_SSPP0, 1, 6 },
> - { DBGBUS_SSPP0, 1, 7 },
> -
> - { DBGBUS_SSPP0, 2, 0 },
> - { DBGBUS_SSPP0, 2, 1 },
> - { DBGBUS_SSPP0, 2, 2 },
> - { DBGBUS_SSPP0, 2, 3 },
> - { DBGBUS_SSPP0, 2, 4 },
> - { DBGBUS_SSPP0, 2, 5 },
> - { DBGBUS_SSPP0, 2, 6 },
> - { DBGBUS_SSPP0, 2, 7 },
> -
> - { DBGBUS_SSPP0, 4, 0 },
> - { DBGBUS_SSPP0, 4, 1 },
> - { DBGBUS_SSPP0, 4, 2 },
> - { DBGBUS_SSPP0, 4, 3 },
> - { DBGBUS_SSPP0, 4, 4 },
> - { DBGBUS_SSPP0, 4, 5 },
> - { DBGBUS_SSPP0, 4, 6 },
> - { DBGBUS_SSPP0, 4, 7 },
> -
> - { DBGBUS_SSPP0, 5, 0 },
> - { DBGBUS_SSPP0, 5, 1 },
> - { DBGBUS_SSPP0, 5, 2 },
> - { DBGBUS_SSPP0, 5, 3 },
> - { DBGBUS_SSPP0, 5, 4 },
> - { DBGBUS_SSPP0, 5, 5 },
> - { DBGBUS_SSPP0, 5, 6 },
> - { DBGBUS_SSPP0, 5, 7 },
> -
> - /* vig 2 */
> - { DBGBUS_SSPP0, 20, 0 },
> - { DBGBUS_SSPP0, 20, 1 },
> - { DBGBUS_SSPP0, 20, 2 },
> - { DBGBUS_SSPP0, 20, 3 },
> - { DBGBUS_SSPP0, 20, 4 },
> - { DBGBUS_SSPP0, 20, 5 },
> - { DBGBUS_SSPP0, 20, 6 },
> - { DBGBUS_SSPP0, 20, 7 },
> -
> - { DBGBUS_SSPP0, 21, 0 },
> - { DBGBUS_SSPP0, 21, 1 },
> - { DBGBUS_SSPP0, 21, 2 },
> - { DBGBUS_SSPP0, 21, 3 },
> - { DBGBUS_SSPP0, 21, 4 },
> - { DBGBUS_SSPP0, 21, 5 },
> - { DBGBUS_SSPP0, 21, 6 },
> - { DBGBUS_SSPP0, 21, 7 },
> -
> - { DBGBUS_SSPP0, 22, 0 },
> - { DBGBUS_SSPP0, 22, 1 },
> - { DBGBUS_SSPP0, 22, 2 },
> - { DBGBUS_SSPP0, 22, 3 },
> - { DBGBUS_SSPP0, 22, 4 },
> - { DBGBUS_SSPP0, 22, 5 },
> - { DBGBUS_SSPP0, 22, 6 },
> - { DBGBUS_SSPP0, 22, 7 },
> -
> - { DBGBUS_SSPP0, 24, 0 },
> - { DBGBUS_SSPP0, 24, 1 },
> - { DBGBUS_SSPP0, 24, 2 },
> - { DBGBUS_SSPP0, 24, 3 },
> - { DBGBUS_SSPP0, 24, 4 },
> - { DBGBUS_SSPP0, 24, 5 },
> - { DBGBUS_SSPP0, 24, 6 },
> - { DBGBUS_SSPP0, 24, 7 },
> -
> - { DBGBUS_SSPP0, 25, 0 },
> - { DBGBUS_SSPP0, 25, 1 },
> - { DBGBUS_SSPP0, 25, 2 },
> - { DBGBUS_SSPP0, 25, 3 },
> - { DBGBUS_SSPP0, 25, 4 },
> - { DBGBUS_SSPP0, 25, 5 },
> - { DBGBUS_SSPP0, 25, 6 },
> - { DBGBUS_SSPP0, 25, 7 },
> -
> - /* dma 2 */
> - { DBGBUS_SSPP0, 30, 0 },
> - { DBGBUS_SSPP0, 30, 1 },
> - { DBGBUS_SSPP0, 30, 2 },
> - { DBGBUS_SSPP0, 30, 3 },
> - { DBGBUS_SSPP0, 30, 4 },
> - { DBGBUS_SSPP0, 30, 5 },
> - { DBGBUS_SSPP0, 30, 6 },
> - { DBGBUS_SSPP0, 30, 7 },
> -
> - { DBGBUS_SSPP0, 31, 0 },
> - { DBGBUS_SSPP0, 31, 1 },
> - { DBGBUS_SSPP0, 31, 2 },
> - { DBGBUS_SSPP0, 31, 3 },
> - { DBGBUS_SSPP0, 31, 4 },
> - { DBGBUS_SSPP0, 31, 5 },
> - { DBGBUS_SSPP0, 31, 6 },
> - { DBGBUS_SSPP0, 31, 7 },
> -
> - { DBGBUS_SSPP0, 32, 0 },
> - { DBGBUS_SSPP0, 32, 1 },
> - { DBGBUS_SSPP0, 32, 2 },
> - { DBGBUS_SSPP0, 32, 3 },
> - { DBGBUS_SSPP0, 32, 4 },
> - { DBGBUS_SSPP0, 32, 5 },
> - { DBGBUS_SSPP0, 32, 6 },
> - { DBGBUS_SSPP0, 32, 7 },
> -
> - { DBGBUS_SSPP0, 33, 0 },
> - { DBGBUS_SSPP0, 33, 1 },
> - { DBGBUS_SSPP0, 33, 2 },
> - { DBGBUS_SSPP0, 33, 3 },
> - { DBGBUS_SSPP0, 33, 4 },
> - { DBGBUS_SSPP0, 33, 5 },
> - { DBGBUS_SSPP0, 33, 6 },
> - { DBGBUS_SSPP0, 33, 7 },
> -
> - { DBGBUS_SSPP0, 34, 0 },
> - { DBGBUS_SSPP0, 34, 1 },
> - { DBGBUS_SSPP0, 34, 2 },
> - { DBGBUS_SSPP0, 34, 3 },
> - { DBGBUS_SSPP0, 34, 4 },
> - { DBGBUS_SSPP0, 34, 5 },
> - { DBGBUS_SSPP0, 34, 6 },
> - { DBGBUS_SSPP0, 34, 7 },
> -
> - { DBGBUS_SSPP0, 35, 0 },
> - { DBGBUS_SSPP0, 35, 1 },
> - { DBGBUS_SSPP0, 35, 2 },
> - { DBGBUS_SSPP0, 35, 3 },
> -
> - /* dma 0 */
> - { DBGBUS_SSPP0, 40, 0 },
> - { DBGBUS_SSPP0, 40, 1 },
> - { DBGBUS_SSPP0, 40, 2 },
> - { DBGBUS_SSPP0, 40, 3 },
> - { DBGBUS_SSPP0, 40, 4 },
> - { DBGBUS_SSPP0, 40, 5 },
> - { DBGBUS_SSPP0, 40, 6 },
> - { DBGBUS_SSPP0, 40, 7 },
> -
> - { DBGBUS_SSPP0, 41, 0 },
> - { DBGBUS_SSPP0, 41, 1 },
> - { DBGBUS_SSPP0, 41, 2 },
> - { DBGBUS_SSPP0, 41, 3 },
> - { DBGBUS_SSPP0, 41, 4 },
> - { DBGBUS_SSPP0, 41, 5 },
> - { DBGBUS_SSPP0, 41, 6 },
> - { DBGBUS_SSPP0, 41, 7 },
> -
> - { DBGBUS_SSPP0, 42, 0 },
> - { DBGBUS_SSPP0, 42, 1 },
> - { DBGBUS_SSPP0, 42, 2 },
> - { DBGBUS_SSPP0, 42, 3 },
> - { DBGBUS_SSPP0, 42, 4 },
> - { DBGBUS_SSPP0, 42, 5 },
> - { DBGBUS_SSPP0, 42, 6 },
> - { DBGBUS_SSPP0, 42, 7 },
> -
> - { DBGBUS_SSPP0, 44, 0 },
> - { DBGBUS_SSPP0, 44, 1 },
> - { DBGBUS_SSPP0, 44, 2 },
> - { DBGBUS_SSPP0, 44, 3 },
> - { DBGBUS_SSPP0, 44, 4 },
> - { DBGBUS_SSPP0, 44, 5 },
> - { DBGBUS_SSPP0, 44, 6 },
> - { DBGBUS_SSPP0, 44, 7 },
> -
> - { DBGBUS_SSPP0, 45, 0 },
> - { DBGBUS_SSPP0, 45, 1 },
> - { DBGBUS_SSPP0, 45, 2 },
> - { DBGBUS_SSPP0, 45, 3 },
> - { DBGBUS_SSPP0, 45, 4 },
> - { DBGBUS_SSPP0, 45, 5 },
> - { DBGBUS_SSPP0, 45, 6 },
> - { DBGBUS_SSPP0, 45, 7 },
> -
> - /* fetch sspp1 */
> - /* vig 1 */
> - { DBGBUS_SSPP1, 0, 0 },
> - { DBGBUS_SSPP1, 0, 1 },
> - { DBGBUS_SSPP1, 0, 2 },
> - { DBGBUS_SSPP1, 0, 3 },
> - { DBGBUS_SSPP1, 0, 4 },
> - { DBGBUS_SSPP1, 0, 5 },
> - { DBGBUS_SSPP1, 0, 6 },
> - { DBGBUS_SSPP1, 0, 7 },
> -
> - { DBGBUS_SSPP1, 1, 0 },
> - { DBGBUS_SSPP1, 1, 1 },
> - { DBGBUS_SSPP1, 1, 2 },
> - { DBGBUS_SSPP1, 1, 3 },
> - { DBGBUS_SSPP1, 1, 4 },
> - { DBGBUS_SSPP1, 1, 5 },
> - { DBGBUS_SSPP1, 1, 6 },
> - { DBGBUS_SSPP1, 1, 7 },
> -
> - { DBGBUS_SSPP1, 2, 0 },
> - { DBGBUS_SSPP1, 2, 1 },
> - { DBGBUS_SSPP1, 2, 2 },
> - { DBGBUS_SSPP1, 2, 3 },
> - { DBGBUS_SSPP1, 2, 4 },
> - { DBGBUS_SSPP1, 2, 5 },
> - { DBGBUS_SSPP1, 2, 6 },
> - { DBGBUS_SSPP1, 2, 7 },
> -
> - { DBGBUS_SSPP1, 4, 0 },
> - { DBGBUS_SSPP1, 4, 1 },
> - { DBGBUS_SSPP1, 4, 2 },
> - { DBGBUS_SSPP1, 4, 3 },
> - { DBGBUS_SSPP1, 4, 4 },
> - { DBGBUS_SSPP1, 4, 5 },
> - { DBGBUS_SSPP1, 4, 6 },
> - { DBGBUS_SSPP1, 4, 7 },
> -
> - { DBGBUS_SSPP1, 5, 0 },
> - { DBGBUS_SSPP1, 5, 1 },
> - { DBGBUS_SSPP1, 5, 2 },
> - { DBGBUS_SSPP1, 5, 3 },
> - { DBGBUS_SSPP1, 5, 4 },
> - { DBGBUS_SSPP1, 5, 5 },
> - { DBGBUS_SSPP1, 5, 6 },
> - { DBGBUS_SSPP1, 5, 7 },
> -
> - /* vig 3 */
> - { DBGBUS_SSPP1, 20, 0 },
> - { DBGBUS_SSPP1, 20, 1 },
> - { DBGBUS_SSPP1, 20, 2 },
> - { DBGBUS_SSPP1, 20, 3 },
> - { DBGBUS_SSPP1, 20, 4 },
> - { DBGBUS_SSPP1, 20, 5 },
> - { DBGBUS_SSPP1, 20, 6 },
> - { DBGBUS_SSPP1, 20, 7 },
> -
> - { DBGBUS_SSPP1, 21, 0 },
> - { DBGBUS_SSPP1, 21, 1 },
> - { DBGBUS_SSPP1, 21, 2 },
> - { DBGBUS_SSPP1, 21, 3 },
> - { DBGBUS_SSPP1, 21, 4 },
> - { DBGBUS_SSPP1, 21, 5 },
> - { DBGBUS_SSPP1, 21, 6 },
> - { DBGBUS_SSPP1, 21, 7 },
> -
> - { DBGBUS_SSPP1, 22, 0 },
> - { DBGBUS_SSPP1, 22, 1 },
> - { DBGBUS_SSPP1, 22, 2 },
> - { DBGBUS_SSPP1, 22, 3 },
> - { DBGBUS_SSPP1, 22, 4 },
> - { DBGBUS_SSPP1, 22, 5 },
> - { DBGBUS_SSPP1, 22, 6 },
> - { DBGBUS_SSPP1, 22, 7 },
> -
> - { DBGBUS_SSPP1, 24, 0 },
> - { DBGBUS_SSPP1, 24, 1 },
> - { DBGBUS_SSPP1, 24, 2 },
> - { DBGBUS_SSPP1, 24, 3 },
> - { DBGBUS_SSPP1, 24, 4 },
> - { DBGBUS_SSPP1, 24, 5 },
> - { DBGBUS_SSPP1, 24, 6 },
> - { DBGBUS_SSPP1, 24, 7 },
> -
> - { DBGBUS_SSPP1, 25, 0 },
> - { DBGBUS_SSPP1, 25, 1 },
> - { DBGBUS_SSPP1, 25, 2 },
> - { DBGBUS_SSPP1, 25, 3 },
> - { DBGBUS_SSPP1, 25, 4 },
> - { DBGBUS_SSPP1, 25, 5 },
> - { DBGBUS_SSPP1, 25, 6 },
> - { DBGBUS_SSPP1, 25, 7 },
> -
> - /* dma 3 */
> - { DBGBUS_SSPP1, 30, 0 },
> - { DBGBUS_SSPP1, 30, 1 },
> - { DBGBUS_SSPP1, 30, 2 },
> - { DBGBUS_SSPP1, 30, 3 },
> - { DBGBUS_SSPP1, 30, 4 },
> - { DBGBUS_SSPP1, 30, 5 },
> - { DBGBUS_SSPP1, 30, 6 },
> - { DBGBUS_SSPP1, 30, 7 },
> -
> - { DBGBUS_SSPP1, 31, 0 },
> - { DBGBUS_SSPP1, 31, 1 },
> - { DBGBUS_SSPP1, 31, 2 },
> - { DBGBUS_SSPP1, 31, 3 },
> - { DBGBUS_SSPP1, 31, 4 },
> - { DBGBUS_SSPP1, 31, 5 },
> - { DBGBUS_SSPP1, 31, 6 },
> - { DBGBUS_SSPP1, 31, 7 },
> -
> - { DBGBUS_SSPP1, 32, 0 },
> - { DBGBUS_SSPP1, 32, 1 },
> - { DBGBUS_SSPP1, 32, 2 },
> - { DBGBUS_SSPP1, 32, 3 },
> - { DBGBUS_SSPP1, 32, 4 },
> - { DBGBUS_SSPP1, 32, 5 },
> - { DBGBUS_SSPP1, 32, 6 },
> - { DBGBUS_SSPP1, 32, 7 },
> -
> - { DBGBUS_SSPP1, 33, 0 },
> - { DBGBUS_SSPP1, 33, 1 },
> - { DBGBUS_SSPP1, 33, 2 },
> - { DBGBUS_SSPP1, 33, 3 },
> - { DBGBUS_SSPP1, 33, 4 },
> - { DBGBUS_SSPP1, 33, 5 },
> - { DBGBUS_SSPP1, 33, 6 },
> - { DBGBUS_SSPP1, 33, 7 },
> -
> - { DBGBUS_SSPP1, 34, 0 },
> - { DBGBUS_SSPP1, 34, 1 },
> - { DBGBUS_SSPP1, 34, 2 },
> - { DBGBUS_SSPP1, 34, 3 },
> - { DBGBUS_SSPP1, 34, 4 },
> - { DBGBUS_SSPP1, 34, 5 },
> - { DBGBUS_SSPP1, 34, 6 },
> - { DBGBUS_SSPP1, 34, 7 },
> -
> - { DBGBUS_SSPP1, 35, 0 },
> - { DBGBUS_SSPP1, 35, 1 },
> - { DBGBUS_SSPP1, 35, 2 },
> -
> - /* dma 1 */
> - { DBGBUS_SSPP1, 40, 0 },
> - { DBGBUS_SSPP1, 40, 1 },
> - { DBGBUS_SSPP1, 40, 2 },
> - { DBGBUS_SSPP1, 40, 3 },
> - { DBGBUS_SSPP1, 40, 4 },
> - { DBGBUS_SSPP1, 40, 5 },
> - { DBGBUS_SSPP1, 40, 6 },
> - { DBGBUS_SSPP1, 40, 7 },
> -
> - { DBGBUS_SSPP1, 41, 0 },
> - { DBGBUS_SSPP1, 41, 1 },
> - { DBGBUS_SSPP1, 41, 2 },
> - { DBGBUS_SSPP1, 41, 3 },
> - { DBGBUS_SSPP1, 41, 4 },
> - { DBGBUS_SSPP1, 41, 5 },
> - { DBGBUS_SSPP1, 41, 6 },
> - { DBGBUS_SSPP1, 41, 7 },
> -
> - { DBGBUS_SSPP1, 42, 0 },
> - { DBGBUS_SSPP1, 42, 1 },
> - { DBGBUS_SSPP1, 42, 2 },
> - { DBGBUS_SSPP1, 42, 3 },
> - { DBGBUS_SSPP1, 42, 4 },
> - { DBGBUS_SSPP1, 42, 5 },
> - { DBGBUS_SSPP1, 42, 6 },
> - { DBGBUS_SSPP1, 42, 7 },
> -
> - { DBGBUS_SSPP1, 44, 0 },
> - { DBGBUS_SSPP1, 44, 1 },
> - { DBGBUS_SSPP1, 44, 2 },
> - { DBGBUS_SSPP1, 44, 3 },
> - { DBGBUS_SSPP1, 44, 4 },
> - { DBGBUS_SSPP1, 44, 5 },
> - { DBGBUS_SSPP1, 44, 6 },
> - { DBGBUS_SSPP1, 44, 7 },
> -
> - { DBGBUS_SSPP1, 45, 0 },
> - { DBGBUS_SSPP1, 45, 1 },
> - { DBGBUS_SSPP1, 45, 2 },
> - { DBGBUS_SSPP1, 45, 3 },
> - { DBGBUS_SSPP1, 45, 4 },
> - { DBGBUS_SSPP1, 45, 5 },
> - { DBGBUS_SSPP1, 45, 6 },
> - { DBGBUS_SSPP1, 45, 7 },
> -
> - /* dspp */
> - { DBGBUS_DSPP, 13, 0 },
> - { DBGBUS_DSPP, 19, 0 },
> - { DBGBUS_DSPP, 14, 0 },
> - { DBGBUS_DSPP, 14, 1 },
> - { DBGBUS_DSPP, 14, 3 },
> - { DBGBUS_DSPP, 20, 0 },
> - { DBGBUS_DSPP, 20, 1 },
> - { DBGBUS_DSPP, 20, 3 },
> -
> - /* ppb_0 */
> - { DBGBUS_DSPP, 31, 0, _dpu_debug_bus_ppb0_dump },
> - { DBGBUS_DSPP, 33, 0, _dpu_debug_bus_ppb0_dump },
> - { DBGBUS_DSPP, 35, 0, _dpu_debug_bus_ppb0_dump },
> - { DBGBUS_DSPP, 42, 0, _dpu_debug_bus_ppb0_dump },
> -
> - /* ppb_1 */
> - { DBGBUS_DSPP, 32, 0, _dpu_debug_bus_ppb1_dump },
> - { DBGBUS_DSPP, 34, 0, _dpu_debug_bus_ppb1_dump },
> - { DBGBUS_DSPP, 36, 0, _dpu_debug_bus_ppb1_dump },
> - { DBGBUS_DSPP, 43, 0, _dpu_debug_bus_ppb1_dump },
> -
> - /* lm_lut */
> - { DBGBUS_DSPP, 109, 0 },
> - { DBGBUS_DSPP, 105, 0 },
> - { DBGBUS_DSPP, 103, 0 },
> -
> - /* crossbar */
> - { DBGBUS_DSPP, 0, 0, _dpu_debug_bus_xbar_dump },
> -
> - /* rotator */
> - { DBGBUS_DSPP, 9, 0},
> -
> - /* blend */
> - /* LM0 */
> - { DBGBUS_DSPP, 63, 1},
> - { DBGBUS_DSPP, 63, 2},
> - { DBGBUS_DSPP, 63, 3},
> - { DBGBUS_DSPP, 63, 4},
> - { DBGBUS_DSPP, 63, 5},
> - { DBGBUS_DSPP, 63, 6},
> - { DBGBUS_DSPP, 63, 7, _dpu_debug_bus_lm_dump },
> -
> - { DBGBUS_DSPP, 64, 1},
> - { DBGBUS_DSPP, 64, 2},
> - { DBGBUS_DSPP, 64, 3},
> - { DBGBUS_DSPP, 64, 4},
> - { DBGBUS_DSPP, 64, 5},
> - { DBGBUS_DSPP, 64, 6},
> - { DBGBUS_DSPP, 64, 7, _dpu_debug_bus_lm_dump },
> -
> - { DBGBUS_DSPP, 65, 1},
> - { DBGBUS_DSPP, 65, 2},
> - { DBGBUS_DSPP, 65, 3},
> - { DBGBUS_DSPP, 65, 4},
> - { DBGBUS_DSPP, 65, 5},
> - { DBGBUS_DSPP, 65, 6},
> - { DBGBUS_DSPP, 65, 7, _dpu_debug_bus_lm_dump },
> -
> - { DBGBUS_DSPP, 66, 1},
> - { DBGBUS_DSPP, 66, 2},
> - { DBGBUS_DSPP, 66, 3},
> - { DBGBUS_DSPP, 66, 4},
> - { DBGBUS_DSPP, 66, 5},
> - { DBGBUS_DSPP, 66, 6},
> - { DBGBUS_DSPP, 66, 7, _dpu_debug_bus_lm_dump },
> -
> - { DBGBUS_DSPP, 67, 1},
> - { DBGBUS_DSPP, 67, 2},
> - { DBGBUS_DSPP, 67, 3},
> - { DBGBUS_DSPP, 67, 4},
> - { DBGBUS_DSPP, 67, 5},
> - { DBGBUS_DSPP, 67, 6},
> - { DBGBUS_DSPP, 67, 7, _dpu_debug_bus_lm_dump },
> -
> - { DBGBUS_DSPP, 68, 1},
> - { DBGBUS_DSPP, 68, 2},
> - { DBGBUS_DSPP, 68, 3},
> - { DBGBUS_DSPP, 68, 4},
> - { DBGBUS_DSPP, 68, 5},
> - { DBGBUS_DSPP, 68, 6},
> - { DBGBUS_DSPP, 68, 7, _dpu_debug_bus_lm_dump },
> -
> - { DBGBUS_DSPP, 69, 1},
> - { DBGBUS_DSPP, 69, 2},
> - { DBGBUS_DSPP, 69, 3},
> - { DBGBUS_DSPP, 69, 4},
> - { DBGBUS_DSPP, 69, 5},
> - { DBGBUS_DSPP, 69, 6},
> - { DBGBUS_DSPP, 69, 7, _dpu_debug_bus_lm_dump },
> -
> - { DBGBUS_DSPP, 84, 1},
> - { DBGBUS_DSPP, 84, 2},
> - { DBGBUS_DSPP, 84, 3},
> - { DBGBUS_DSPP, 84, 4},
> - { DBGBUS_DSPP, 84, 5},
> - { DBGBUS_DSPP, 84, 6},
> - { DBGBUS_DSPP, 84, 7, _dpu_debug_bus_lm_dump },
> -
> -
> - { DBGBUS_DSPP, 85, 1},
> - { DBGBUS_DSPP, 85, 2},
> - { DBGBUS_DSPP, 85, 3},
> - { DBGBUS_DSPP, 85, 4},
> - { DBGBUS_DSPP, 85, 5},
> - { DBGBUS_DSPP, 85, 6},
> - { DBGBUS_DSPP, 85, 7, _dpu_debug_bus_lm_dump },
> -
> -
> - { DBGBUS_DSPP, 86, 1},
> - { DBGBUS_DSPP, 86, 2},
> - { DBGBUS_DSPP, 86, 3},
> - { DBGBUS_DSPP, 86, 4},
> - { DBGBUS_DSPP, 86, 5},
> - { DBGBUS_DSPP, 86, 6},
> - { DBGBUS_DSPP, 86, 7, _dpu_debug_bus_lm_dump },
> -
> -
> - { DBGBUS_DSPP, 87, 1},
> - { DBGBUS_DSPP, 87, 2},
> - { DBGBUS_DSPP, 87, 3},
> - { DBGBUS_DSPP, 87, 4},
> - { DBGBUS_DSPP, 87, 5},
> - { DBGBUS_DSPP, 87, 6},
> - { DBGBUS_DSPP, 87, 7, _dpu_debug_bus_lm_dump },
> -
> - /* LM1 */
> - { DBGBUS_DSPP, 70, 1},
> - { DBGBUS_DSPP, 70, 2},
> - { DBGBUS_DSPP, 70, 3},
> - { DBGBUS_DSPP, 70, 4},
> - { DBGBUS_DSPP, 70, 5},
> - { DBGBUS_DSPP, 70, 6},
> - { DBGBUS_DSPP, 70, 7, _dpu_debug_bus_lm_dump },
> -
> - { DBGBUS_DSPP, 71, 1},
> - { DBGBUS_DSPP, 71, 2},
> - { DBGBUS_DSPP, 71, 3},
> - { DBGBUS_DSPP, 71, 4},
> - { DBGBUS_DSPP, 71, 5},
> - { DBGBUS_DSPP, 71, 6},
> - { DBGBUS_DSPP, 71, 7, _dpu_debug_bus_lm_dump },
> -
> - { DBGBUS_DSPP, 72, 1},
> - { DBGBUS_DSPP, 72, 2},
> - { DBGBUS_DSPP, 72, 3},
> - { DBGBUS_DSPP, 72, 4},
> - { DBGBUS_DSPP, 72, 5},
> - { DBGBUS_DSPP, 72, 6},
> - { DBGBUS_DSPP, 72, 7, _dpu_debug_bus_lm_dump },
> -
> - { DBGBUS_DSPP, 73, 1},
> - { DBGBUS_DSPP, 73, 2},
> - { DBGBUS_DSPP, 73, 3},
> - { DBGBUS_DSPP, 73, 4},
> - { DBGBUS_DSPP, 73, 5},
> - { DBGBUS_DSPP, 73, 6},
> - { DBGBUS_DSPP, 73, 7, _dpu_debug_bus_lm_dump },
> -
> - { DBGBUS_DSPP, 74, 1},
> - { DBGBUS_DSPP, 74, 2},
> - { DBGBUS_DSPP, 74, 3},
> - { DBGBUS_DSPP, 74, 4},
> - { DBGBUS_DSPP, 74, 5},
> - { DBGBUS_DSPP, 74, 6},
> - { DBGBUS_DSPP, 74, 7, _dpu_debug_bus_lm_dump },
> -
> - { DBGBUS_DSPP, 75, 1},
> - { DBGBUS_DSPP, 75, 2},
> - { DBGBUS_DSPP, 75, 3},
> - { DBGBUS_DSPP, 75, 4},
> - { DBGBUS_DSPP, 75, 5},
> - { DBGBUS_DSPP, 75, 6},
> - { DBGBUS_DSPP, 75, 7, _dpu_debug_bus_lm_dump },
> -
> - { DBGBUS_DSPP, 76, 1},
> - { DBGBUS_DSPP, 76, 2},
> - { DBGBUS_DSPP, 76, 3},
> - { DBGBUS_DSPP, 76, 4},
> - { DBGBUS_DSPP, 76, 5},
> - { DBGBUS_DSPP, 76, 6},
> - { DBGBUS_DSPP, 76, 7, _dpu_debug_bus_lm_dump },
> -
> - { DBGBUS_DSPP, 88, 1},
> - { DBGBUS_DSPP, 88, 2},
> - { DBGBUS_DSPP, 88, 3},
> - { DBGBUS_DSPP, 88, 4},
> - { DBGBUS_DSPP, 88, 5},
> - { DBGBUS_DSPP, 88, 6},
> - { DBGBUS_DSPP, 88, 7, _dpu_debug_bus_lm_dump },
> -
> - { DBGBUS_DSPP, 89, 1},
> - { DBGBUS_DSPP, 89, 2},
> - { DBGBUS_DSPP, 89, 3},
> - { DBGBUS_DSPP, 89, 4},
> - { DBGBUS_DSPP, 89, 5},
> - { DBGBUS_DSPP, 89, 6},
> - { DBGBUS_DSPP, 89, 7, _dpu_debug_bus_lm_dump },
> -
> - { DBGBUS_DSPP, 90, 1},
> - { DBGBUS_DSPP, 90, 2},
> - { DBGBUS_DSPP, 90, 3},
> - { DBGBUS_DSPP, 90, 4},
> - { DBGBUS_DSPP, 90, 5},
> - { DBGBUS_DSPP, 90, 6},
> - { DBGBUS_DSPP, 90, 7, _dpu_debug_bus_lm_dump },
> -
> - { DBGBUS_DSPP, 91, 1},
> - { DBGBUS_DSPP, 91, 2},
> - { DBGBUS_DSPP, 91, 3},
> - { DBGBUS_DSPP, 91, 4},
> - { DBGBUS_DSPP, 91, 5},
> - { DBGBUS_DSPP, 91, 6},
> - { DBGBUS_DSPP, 91, 7, _dpu_debug_bus_lm_dump },
> -
> - /* LM2 */
> - { DBGBUS_DSPP, 77, 0},
> - { DBGBUS_DSPP, 77, 1},
> - { DBGBUS_DSPP, 77, 2},
> - { DBGBUS_DSPP, 77, 3},
> - { DBGBUS_DSPP, 77, 4},
> - { DBGBUS_DSPP, 77, 5},
> - { DBGBUS_DSPP, 77, 6},
> - { DBGBUS_DSPP, 77, 7, _dpu_debug_bus_lm_dump },
> -
> - { DBGBUS_DSPP, 78, 0},
> - { DBGBUS_DSPP, 78, 1},
> - { DBGBUS_DSPP, 78, 2},
> - { DBGBUS_DSPP, 78, 3},
> - { DBGBUS_DSPP, 78, 4},
> - { DBGBUS_DSPP, 78, 5},
> - { DBGBUS_DSPP, 78, 6},
> - { DBGBUS_DSPP, 78, 7, _dpu_debug_bus_lm_dump },
> -
> - { DBGBUS_DSPP, 79, 0},
> - { DBGBUS_DSPP, 79, 1},
> - { DBGBUS_DSPP, 79, 2},
> - { DBGBUS_DSPP, 79, 3},
> - { DBGBUS_DSPP, 79, 4},
> - { DBGBUS_DSPP, 79, 5},
> - { DBGBUS_DSPP, 79, 6},
> - { DBGBUS_DSPP, 79, 7, _dpu_debug_bus_lm_dump },
> -
> - { DBGBUS_DSPP, 80, 0},
> - { DBGBUS_DSPP, 80, 1},
> - { DBGBUS_DSPP, 80, 2},
> - { DBGBUS_DSPP, 80, 3},
> - { DBGBUS_DSPP, 80, 4},
> - { DBGBUS_DSPP, 80, 5},
> - { DBGBUS_DSPP, 80, 6},
> - { DBGBUS_DSPP, 80, 7, _dpu_debug_bus_lm_dump },
> -
> - { DBGBUS_DSPP, 81, 0},
> - { DBGBUS_DSPP, 81, 1},
> - { DBGBUS_DSPP, 81, 2},
> - { DBGBUS_DSPP, 81, 3},
> - { DBGBUS_DSPP, 81, 4},
> - { DBGBUS_DSPP, 81, 5},
> - { DBGBUS_DSPP, 81, 6},
> - { DBGBUS_DSPP, 81, 7, _dpu_debug_bus_lm_dump },
> -
> - { DBGBUS_DSPP, 82, 0},
> - { DBGBUS_DSPP, 82, 1},
> - { DBGBUS_DSPP, 82, 2},
> - { DBGBUS_DSPP, 82, 3},
> - { DBGBUS_DSPP, 82, 4},
> - { DBGBUS_DSPP, 82, 5},
> - { DBGBUS_DSPP, 82, 6},
> - { DBGBUS_DSPP, 82, 7, _dpu_debug_bus_lm_dump },
> -
> - { DBGBUS_DSPP, 83, 0},
> - { DBGBUS_DSPP, 83, 1},
> - { DBGBUS_DSPP, 83, 2},
> - { DBGBUS_DSPP, 83, 3},
> - { DBGBUS_DSPP, 83, 4},
> - { DBGBUS_DSPP, 83, 5},
> - { DBGBUS_DSPP, 83, 6},
> - { DBGBUS_DSPP, 83, 7, _dpu_debug_bus_lm_dump },
> -
> - { DBGBUS_DSPP, 92, 1},
> - { DBGBUS_DSPP, 92, 2},
> - { DBGBUS_DSPP, 92, 3},
> - { DBGBUS_DSPP, 92, 4},
> - { DBGBUS_DSPP, 92, 5},
> - { DBGBUS_DSPP, 92, 6},
> - { DBGBUS_DSPP, 92, 7, _dpu_debug_bus_lm_dump },
> -
> - { DBGBUS_DSPP, 93, 1},
> - { DBGBUS_DSPP, 93, 2},
> - { DBGBUS_DSPP, 93, 3},
> - { DBGBUS_DSPP, 93, 4},
> - { DBGBUS_DSPP, 93, 5},
> - { DBGBUS_DSPP, 93, 6},
> - { DBGBUS_DSPP, 93, 7, _dpu_debug_bus_lm_dump },
> -
> - { DBGBUS_DSPP, 94, 1},
> - { DBGBUS_DSPP, 94, 2},
> - { DBGBUS_DSPP, 94, 3},
> - { DBGBUS_DSPP, 94, 4},
> - { DBGBUS_DSPP, 94, 5},
> - { DBGBUS_DSPP, 94, 6},
> - { DBGBUS_DSPP, 94, 7, _dpu_debug_bus_lm_dump },
> -
> - { DBGBUS_DSPP, 95, 1},
> - { DBGBUS_DSPP, 95, 2},
> - { DBGBUS_DSPP, 95, 3},
> - { DBGBUS_DSPP, 95, 4},
> - { DBGBUS_DSPP, 95, 5},
> - { DBGBUS_DSPP, 95, 6},
> - { DBGBUS_DSPP, 95, 7, _dpu_debug_bus_lm_dump },
> -
> - /* LM5 */
> - { DBGBUS_DSPP, 110, 1},
> - { DBGBUS_DSPP, 110, 2},
> - { DBGBUS_DSPP, 110, 3},
> - { DBGBUS_DSPP, 110, 4},
> - { DBGBUS_DSPP, 110, 5},
> - { DBGBUS_DSPP, 110, 6},
> - { DBGBUS_DSPP, 110, 7, _dpu_debug_bus_lm_dump },
> -
> - { DBGBUS_DSPP, 111, 1},
> - { DBGBUS_DSPP, 111, 2},
> - { DBGBUS_DSPP, 111, 3},
> - { DBGBUS_DSPP, 111, 4},
> - { DBGBUS_DSPP, 111, 5},
> - { DBGBUS_DSPP, 111, 6},
> - { DBGBUS_DSPP, 111, 7, _dpu_debug_bus_lm_dump },
> -
> - { DBGBUS_DSPP, 112, 1},
> - { DBGBUS_DSPP, 112, 2},
> - { DBGBUS_DSPP, 112, 3},
> - { DBGBUS_DSPP, 112, 4},
> - { DBGBUS_DSPP, 112, 5},
> - { DBGBUS_DSPP, 112, 6},
> - { DBGBUS_DSPP, 112, 7, _dpu_debug_bus_lm_dump },
> -
> - { DBGBUS_DSPP, 113, 1},
> - { DBGBUS_DSPP, 113, 2},
> - { DBGBUS_DSPP, 113, 3},
> - { DBGBUS_DSPP, 113, 4},
> - { DBGBUS_DSPP, 113, 5},
> - { DBGBUS_DSPP, 113, 6},
> - { DBGBUS_DSPP, 113, 7, _dpu_debug_bus_lm_dump },
> -
> - { DBGBUS_DSPP, 114, 1},
> - { DBGBUS_DSPP, 114, 2},
> - { DBGBUS_DSPP, 114, 3},
> - { DBGBUS_DSPP, 114, 4},
> - { DBGBUS_DSPP, 114, 5},
> - { DBGBUS_DSPP, 114, 6},
> - { DBGBUS_DSPP, 114, 7, _dpu_debug_bus_lm_dump },
> -
> - { DBGBUS_DSPP, 115, 1},
> - { DBGBUS_DSPP, 115, 2},
> - { DBGBUS_DSPP, 115, 3},
> - { DBGBUS_DSPP, 115, 4},
> - { DBGBUS_DSPP, 115, 5},
> - { DBGBUS_DSPP, 115, 6},
> - { DBGBUS_DSPP, 115, 7, _dpu_debug_bus_lm_dump },
> -
> - { DBGBUS_DSPP, 116, 1},
> - { DBGBUS_DSPP, 116, 2},
> - { DBGBUS_DSPP, 116, 3},
> - { DBGBUS_DSPP, 116, 4},
> - { DBGBUS_DSPP, 116, 5},
> - { DBGBUS_DSPP, 116, 6},
> - { DBGBUS_DSPP, 116, 7, _dpu_debug_bus_lm_dump },
> -
> - { DBGBUS_DSPP, 117, 1},
> - { DBGBUS_DSPP, 117, 2},
> - { DBGBUS_DSPP, 117, 3},
> - { DBGBUS_DSPP, 117, 4},
> - { DBGBUS_DSPP, 117, 5},
> - { DBGBUS_DSPP, 117, 6},
> - { DBGBUS_DSPP, 117, 7, _dpu_debug_bus_lm_dump },
> -
> - { DBGBUS_DSPP, 118, 1},
> - { DBGBUS_DSPP, 118, 2},
> - { DBGBUS_DSPP, 118, 3},
> - { DBGBUS_DSPP, 118, 4},
> - { DBGBUS_DSPP, 118, 5},
> - { DBGBUS_DSPP, 118, 6},
> - { DBGBUS_DSPP, 118, 7, _dpu_debug_bus_lm_dump },
> -
> - { DBGBUS_DSPP, 119, 1},
> - { DBGBUS_DSPP, 119, 2},
> - { DBGBUS_DSPP, 119, 3},
> - { DBGBUS_DSPP, 119, 4},
> - { DBGBUS_DSPP, 119, 5},
> - { DBGBUS_DSPP, 119, 6},
> - { DBGBUS_DSPP, 119, 7, _dpu_debug_bus_lm_dump },
> -
> - { DBGBUS_DSPP, 120, 1},
> - { DBGBUS_DSPP, 120, 2},
> - { DBGBUS_DSPP, 120, 3},
> - { DBGBUS_DSPP, 120, 4},
> - { DBGBUS_DSPP, 120, 5},
> - { DBGBUS_DSPP, 120, 6},
> - { DBGBUS_DSPP, 120, 7, _dpu_debug_bus_lm_dump },
> -
> - /* csc */
> - { DBGBUS_SSPP0, 7, 0},
> - { DBGBUS_SSPP0, 7, 1},
> - { DBGBUS_SSPP0, 27, 0},
> - { DBGBUS_SSPP0, 27, 1},
> - { DBGBUS_SSPP1, 7, 0},
> - { DBGBUS_SSPP1, 7, 1},
> - { DBGBUS_SSPP1, 27, 0},
> - { DBGBUS_SSPP1, 27, 1},
> -
> - /* pcc */
> - { DBGBUS_SSPP0, 3, 3},
> - { DBGBUS_SSPP0, 23, 3},
> - { DBGBUS_SSPP0, 33, 3},
> - { DBGBUS_SSPP0, 43, 3},
> - { DBGBUS_SSPP1, 3, 3},
> - { DBGBUS_SSPP1, 23, 3},
> - { DBGBUS_SSPP1, 33, 3},
> - { DBGBUS_SSPP1, 43, 3},
> -
> - /* spa */
> - { DBGBUS_SSPP0, 8, 0},
> - { DBGBUS_SSPP0, 28, 0},
> - { DBGBUS_SSPP1, 8, 0},
> - { DBGBUS_SSPP1, 28, 0},
> - { DBGBUS_DSPP, 13, 0},
> - { DBGBUS_DSPP, 19, 0},
> -
> - /* igc */
> - { DBGBUS_SSPP0, 17, 0},
> - { DBGBUS_SSPP0, 17, 1},
> - { DBGBUS_SSPP0, 17, 3},
> - { DBGBUS_SSPP0, 37, 0},
> - { DBGBUS_SSPP0, 37, 1},
> - { DBGBUS_SSPP0, 37, 3},
> - { DBGBUS_SSPP0, 46, 0},
> - { DBGBUS_SSPP0, 46, 1},
> - { DBGBUS_SSPP0, 46, 3},
> -
> - { DBGBUS_SSPP1, 17, 0},
> - { DBGBUS_SSPP1, 17, 1},
> - { DBGBUS_SSPP1, 17, 3},
> - { DBGBUS_SSPP1, 37, 0},
> - { DBGBUS_SSPP1, 37, 1},
> - { DBGBUS_SSPP1, 37, 3},
> - { DBGBUS_SSPP1, 46, 0},
> - { DBGBUS_SSPP1, 46, 1},
> - { DBGBUS_SSPP1, 46, 3},
> -
> - { DBGBUS_DSPP, 14, 0},
> - { DBGBUS_DSPP, 14, 1},
> - { DBGBUS_DSPP, 14, 3},
> - { DBGBUS_DSPP, 20, 0},
> - { DBGBUS_DSPP, 20, 1},
> - { DBGBUS_DSPP, 20, 3},
> -
> - /* intf0-3 */
> - { DBGBUS_PERIPH, 0, 0},
> - { DBGBUS_PERIPH, 1, 0},
> - { DBGBUS_PERIPH, 2, 0},
> - { DBGBUS_PERIPH, 3, 0},
> -
> - /* te counter wrapper */
> - { DBGBUS_PERIPH, 60, 0},
> -
> - /* dsc0 */
> - { DBGBUS_PERIPH, 47, 0},
> - { DBGBUS_PERIPH, 47, 1},
> - { DBGBUS_PERIPH, 47, 2},
> - { DBGBUS_PERIPH, 47, 3},
> - { DBGBUS_PERIPH, 47, 4},
> - { DBGBUS_PERIPH, 47, 5},
> - { DBGBUS_PERIPH, 47, 6},
> - { DBGBUS_PERIPH, 47, 7},
> -
> - /* dsc1 */
> - { DBGBUS_PERIPH, 48, 0},
> - { DBGBUS_PERIPH, 48, 1},
> - { DBGBUS_PERIPH, 48, 2},
> - { DBGBUS_PERIPH, 48, 3},
> - { DBGBUS_PERIPH, 48, 4},
> - { DBGBUS_PERIPH, 48, 5},
> - { DBGBUS_PERIPH, 48, 6},
> - { DBGBUS_PERIPH, 48, 7},
> -
> - /* dsc2 */
> - { DBGBUS_PERIPH, 51, 0},
> - { DBGBUS_PERIPH, 51, 1},
> - { DBGBUS_PERIPH, 51, 2},
> - { DBGBUS_PERIPH, 51, 3},
> - { DBGBUS_PERIPH, 51, 4},
> - { DBGBUS_PERIPH, 51, 5},
> - { DBGBUS_PERIPH, 51, 6},
> - { DBGBUS_PERIPH, 51, 7},
> -
> - /* dsc3 */
> - { DBGBUS_PERIPH, 52, 0},
> - { DBGBUS_PERIPH, 52, 1},
> - { DBGBUS_PERIPH, 52, 2},
> - { DBGBUS_PERIPH, 52, 3},
> - { DBGBUS_PERIPH, 52, 4},
> - { DBGBUS_PERIPH, 52, 5},
> - { DBGBUS_PERIPH, 52, 6},
> - { DBGBUS_PERIPH, 52, 7},
> -
> - /* tear-check */
> - { DBGBUS_PERIPH, 63, 0 },
> - { DBGBUS_PERIPH, 64, 0 },
> - { DBGBUS_PERIPH, 65, 0 },
> - { DBGBUS_PERIPH, 73, 0 },
> - { DBGBUS_PERIPH, 74, 0 },
> -
> - /* cdwn */
> - { DBGBUS_PERIPH, 80, 0},
> - { DBGBUS_PERIPH, 80, 1},
> - { DBGBUS_PERIPH, 80, 2},
> -
> - { DBGBUS_PERIPH, 81, 0},
> - { DBGBUS_PERIPH, 81, 1},
> - { DBGBUS_PERIPH, 81, 2},
> -
> - { DBGBUS_PERIPH, 82, 0},
> - { DBGBUS_PERIPH, 82, 1},
> - { DBGBUS_PERIPH, 82, 2},
> - { DBGBUS_PERIPH, 82, 3},
> - { DBGBUS_PERIPH, 82, 4},
> - { DBGBUS_PERIPH, 82, 5},
> - { DBGBUS_PERIPH, 82, 6},
> - { DBGBUS_PERIPH, 82, 7},
> -
> - /* hdmi */
> - { DBGBUS_PERIPH, 68, 0},
> - { DBGBUS_PERIPH, 68, 1},
> - { DBGBUS_PERIPH, 68, 2},
> - { DBGBUS_PERIPH, 68, 3},
> - { DBGBUS_PERIPH, 68, 4},
> - { DBGBUS_PERIPH, 68, 5},
> -
> - /* edp */
> - { DBGBUS_PERIPH, 69, 0},
> - { DBGBUS_PERIPH, 69, 1},
> - { DBGBUS_PERIPH, 69, 2},
> - { DBGBUS_PERIPH, 69, 3},
> - { DBGBUS_PERIPH, 69, 4},
> - { DBGBUS_PERIPH, 69, 5},
> -
> - /* dsi0 */
> - { DBGBUS_PERIPH, 70, 0},
> - { DBGBUS_PERIPH, 70, 1},
> - { DBGBUS_PERIPH, 70, 2},
> - { DBGBUS_PERIPH, 70, 3},
> - { DBGBUS_PERIPH, 70, 4},
> - { DBGBUS_PERIPH, 70, 5},
> -
> - /* dsi1 */
> - { DBGBUS_PERIPH, 71, 0},
> - { DBGBUS_PERIPH, 71, 1},
> - { DBGBUS_PERIPH, 71, 2},
> - { DBGBUS_PERIPH, 71, 3},
> - { DBGBUS_PERIPH, 71, 4},
> - { DBGBUS_PERIPH, 71, 5},
> -};
> -
> -static struct vbif_debug_bus_entry vbif_dbg_bus_msm8998[] = {
> - {0x214, 0x21c, 16, 2, 0x0, 0xd}, /* arb clients */
> - {0x214, 0x21c, 16, 2, 0x80, 0xc0}, /* arb clients */
> - {0x214, 0x21c, 16, 2, 0x100, 0x140}, /* arb clients */
> - {0x214, 0x21c, 0, 16, 0x0, 0xf}, /* xin blocks - axi side */
> - {0x214, 0x21c, 0, 16, 0x80, 0xa4}, /* xin blocks - axi side */
> - {0x214, 0x21c, 0, 15, 0x100, 0x124}, /* xin blocks - axi side */
> - {0x21c, 0x214, 0, 14, 0, 0xc}, /* xin blocks - clock side */
> -};
> -
> -/**
> - * _dpu_dbg_enable_power - use callback to turn power on for hw register access
> - * @enable: whether to turn power on or off
> - */
> -static inline void _dpu_dbg_enable_power(int enable)
> -{
> - if (enable)
> - pm_runtime_get_sync(dpu_dbg_base.dev);
> - else
> - pm_runtime_put_sync(dpu_dbg_base.dev);
> -}
> -
> -static void _dpu_dbg_dump_dpu_dbg_bus(struct dpu_dbg_dpu_debug_bus *bus)
> -{
> - bool in_log, in_mem;
> - u32 **dump_mem = NULL;
> - u32 *dump_addr = NULL;
> - u32 status = 0;
> - struct dpu_debug_bus_entry *head;
> - phys_addr_t phys = 0;
> - int list_size;
> - int i;
> - u32 offset;
> - void __iomem *mem_base = NULL;
> - struct dpu_dbg_reg_base *reg_base;
> -
> - if (!bus || !bus->cmn.entries_size)
> - return;
> -
> - list_for_each_entry(reg_base, &dpu_dbg_base.reg_base_list,
> - reg_base_head)
> - if (strlen(reg_base->name) &&
> - !strcmp(reg_base->name, bus->cmn.name))
> - mem_base = reg_base->base + bus->top_blk_off;
> -
> - if (!mem_base) {
> - pr_err("unable to find mem_base for %s\n", bus->cmn.name);
> - return;
> - }
> -
> - dump_mem = &bus->cmn.dumped_content;
> -
> - /* will keep in memory 4 entries of 4 bytes each */
> - list_size = (bus->cmn.entries_size * 4 * 4);
> -
> - in_log = (bus->cmn.enable_mask & DPU_DBG_DUMP_IN_LOG);
> - in_mem = (bus->cmn.enable_mask & DPU_DBG_DUMP_IN_MEM);
> -
> - if (!in_log && !in_mem)
> - return;
> -
> - dev_info(dpu_dbg_base.dev, "======== start %s dump =========\n",
> - bus->cmn.name);
> -
> - if (in_mem) {
> - if (!(*dump_mem))
> - *dump_mem = dma_alloc_coherent(dpu_dbg_base.dev,
> - list_size, &phys, GFP_KERNEL);
> -
> - if (*dump_mem) {
> - dump_addr = *dump_mem;
> - dev_info(dpu_dbg_base.dev,
> - "%s: start_addr:0x%pK len:0x%x\n",
> - __func__, dump_addr, list_size);
> - } else {
> - in_mem = false;
> - pr_err("dump_mem: allocation fails\n");
> - }
> - }
> -
> - _dpu_dbg_enable_power(true);
> - for (i = 0; i < bus->cmn.entries_size; i++) {
> - head = bus->entries + i;
> - writel_relaxed(TEST_MASK(head->block_id, head->test_id),
> - mem_base + head->wr_addr);
> - wmb(); /* make sure test bits were written */
> -
> - if (bus->cmn.flags & DBGBUS_FLAGS_DSPP) {
> - offset = DBGBUS_DSPP_STATUS;
> - /* keep DSPP test point enabled */
> - if (head->wr_addr != DBGBUS_DSPP)
> - writel_relaxed(0xF, mem_base + DBGBUS_DSPP);
> - } else {
> - offset = head->wr_addr + 0x4;
> - }
> -
> - status = readl_relaxed(mem_base + offset);
> -
> - if (in_log)
> - dev_info(dpu_dbg_base.dev,
> - "waddr=0x%x blk=%d tst=%d val=0x%x\n",
> - head->wr_addr, head->block_id,
> - head->test_id, status);
> -
> - if (dump_addr && in_mem) {
> - dump_addr[i*4] = head->wr_addr;
> - dump_addr[i*4 + 1] = head->block_id;
> - dump_addr[i*4 + 2] = head->test_id;
> - dump_addr[i*4 + 3] = status;
> - }
> -
> - if (head->analyzer)
> - head->analyzer(mem_base, head, status);
> -
> - /* Disable debug bus once we are done */
> - writel_relaxed(0, mem_base + head->wr_addr);
> - if (bus->cmn.flags & DBGBUS_FLAGS_DSPP &&
> - head->wr_addr != DBGBUS_DSPP)
> - writel_relaxed(0x0, mem_base + DBGBUS_DSPP);
> - }
> - _dpu_dbg_enable_power(false);
> -
> - dev_info(dpu_dbg_base.dev, "======== end %s dump =========\n",
> - bus->cmn.name);
> -}
> -
> -static void _dpu_dbg_dump_vbif_debug_bus_entry(
> - struct vbif_debug_bus_entry *head, void __iomem *mem_base,
> - u32 *dump_addr, bool in_log)
> -{
> - int i, j;
> - u32 val;
> -
> - if (!dump_addr && !in_log)
> - return;
> -
> - for (i = 0; i < head->block_cnt; i++) {
> - writel_relaxed(1 << (i + head->bit_offset),
> - mem_base + head->block_bus_addr);
> - /* make sure that current bus blcok enable */
> - wmb();
> - for (j = head->test_pnt_start; j < head->test_pnt_cnt; j++) {
> - writel_relaxed(j, mem_base + head->block_bus_addr + 4);
> - /* make sure that test point is enabled */
> - wmb();
> - val = readl_relaxed(mem_base + MMSS_VBIF_TEST_BUS_OUT);
> - if (dump_addr) {
> - *dump_addr++ = head->block_bus_addr;
> - *dump_addr++ = i;
> - *dump_addr++ = j;
> - *dump_addr++ = val;
> - }
> - if (in_log)
> - dev_info(dpu_dbg_base.dev,
> - "testpoint:%x arb/xin id=%d index=%d val=0x%x\n",
> - head->block_bus_addr, i, j, val);
> - }
> - }
> -}
> -
> -static void _dpu_dbg_dump_vbif_dbg_bus(struct dpu_dbg_vbif_debug_bus *bus)
> -{
> - bool in_log, in_mem;
> - u32 **dump_mem = NULL;
> - u32 *dump_addr = NULL;
> - u32 value, d0, d1;
> - unsigned long reg, reg1, reg2;
> - struct vbif_debug_bus_entry *head;
> - phys_addr_t phys = 0;
> - int i, list_size = 0;
> - void __iomem *mem_base = NULL;
> - struct vbif_debug_bus_entry *dbg_bus;
> - u32 bus_size;
> - struct dpu_dbg_reg_base *reg_base;
> -
> - if (!bus || !bus->cmn.entries_size)
> - return;
> -
> - list_for_each_entry(reg_base, &dpu_dbg_base.reg_base_list,
> - reg_base_head)
> - if (strlen(reg_base->name) &&
> - !strcmp(reg_base->name, bus->cmn.name))
> - mem_base = reg_base->base;
> -
> - if (!mem_base) {
> - pr_err("unable to find mem_base for %s\n", bus->cmn.name);
> - return;
> - }
> -
> - dbg_bus = bus->entries;
> - bus_size = bus->cmn.entries_size;
> - list_size = bus->cmn.entries_size;
> - dump_mem = &bus->cmn.dumped_content;
> -
> - dev_info(dpu_dbg_base.dev, "======== start %s dump =========\n",
> - bus->cmn.name);
> -
> - if (!dump_mem || !dbg_bus || !bus_size || !list_size)
> - return;
> -
> - /* allocate memory for each test point */
> - for (i = 0; i < bus_size; i++) {
> - head = dbg_bus + i;
> - list_size += (head->block_cnt * head->test_pnt_cnt);
> - }
> -
> - /* 4 bytes * 4 entries for each test point*/
> - list_size *= 16;
> -
> - in_log = (bus->cmn.enable_mask & DPU_DBG_DUMP_IN_LOG);
> - in_mem = (bus->cmn.enable_mask & DPU_DBG_DUMP_IN_MEM);
> -
> - if (!in_log && !in_mem)
> - return;
> -
> - if (in_mem) {
> - if (!(*dump_mem))
> - *dump_mem = dma_alloc_coherent(dpu_dbg_base.dev,
> - list_size, &phys, GFP_KERNEL);
> -
> - if (*dump_mem) {
> - dump_addr = *dump_mem;
> - dev_info(dpu_dbg_base.dev,
> - "%s: start_addr:0x%pK len:0x%x\n",
> - __func__, dump_addr, list_size);
> - } else {
> - in_mem = false;
> - pr_err("dump_mem: allocation fails\n");
> - }
> - }
> -
> - _dpu_dbg_enable_power(true);
> -
> - value = readl_relaxed(mem_base + MMSS_VBIF_CLKON);
> - writel_relaxed(value | BIT(1), mem_base + MMSS_VBIF_CLKON);
> -
> - /* make sure that vbif core is on */
> - wmb();
> -
> - /**
> - * Extract VBIF error info based on XIN halt and error status.
> - * If the XIN client is not in HALT state, or an error is detected,
> - * then retrieve the VBIF error info for it.
> - */
> - reg = readl_relaxed(mem_base + MMSS_VBIF_XIN_HALT_CTRL1);
> - reg1 = readl_relaxed(mem_base + MMSS_VBIF_PND_ERR);
> - reg2 = readl_relaxed(mem_base + MMSS_VBIF_SRC_ERR);
> - dev_err(dpu_dbg_base.dev,
> - "XIN HALT:0x%lX, PND ERR:0x%lX, SRC ERR:0x%lX\n",
> - reg, reg1, reg2);
> - reg >>= 16;
> - reg &= ~(reg1 | reg2);
> - for (i = 0; i < MMSS_VBIF_CLIENT_NUM; i++) {
> - if (!test_bit(0, ®)) {
> - writel_relaxed(i, mem_base + MMSS_VBIF_ERR_INFO);
> - /* make sure reg write goes through */
> - wmb();
> -
> - d0 = readl_relaxed(mem_base + MMSS_VBIF_ERR_INFO);
> - d1 = readl_relaxed(mem_base + MMSS_VBIF_ERR_INFO_1);
> -
> - dev_err(dpu_dbg_base.dev,
> - "Client:%d, errinfo=0x%X, errinfo1=0x%X\n",
> - i, d0, d1);
> - }
> - reg >>= 1;
> - }
> -
> - for (i = 0; i < bus_size; i++) {
> - head = dbg_bus + i;
> -
> - writel_relaxed(0, mem_base + head->disable_bus_addr);
> - writel_relaxed(BIT(0), mem_base + MMSS_VBIF_TEST_BUS_OUT_CTRL);
> - /* make sure that other bus is off */
> - wmb();
> -
> - _dpu_dbg_dump_vbif_debug_bus_entry(head, mem_base, dump_addr,
> - in_log);
> - if (dump_addr)
> - dump_addr += (head->block_cnt * head->test_pnt_cnt * 4);
> - }
> -
> - _dpu_dbg_enable_power(false);
> -
> - dev_info(dpu_dbg_base.dev, "======== end %s dump =========\n",
> - bus->cmn.name);
> -}
> -
> -/**
> - * _dpu_dump_array - dump array of register bases
> - * @name: string indicating origin of dump
> - * @dump_dbgbus_dpu: whether to dump the dpu debug bus
> - * @dump_dbgbus_vbif_rt: whether to dump the vbif rt debug bus
> - */
> -static void _dpu_dump_array(const char *name, bool dump_dbgbus_dpu,
> - bool dump_dbgbus_vbif_rt)
> -{
> - if (dump_dbgbus_dpu)
> - _dpu_dbg_dump_dpu_dbg_bus(&dpu_dbg_base.dbgbus_dpu);
> -
> - if (dump_dbgbus_vbif_rt)
> - _dpu_dbg_dump_vbif_dbg_bus(&dpu_dbg_base.dbgbus_vbif_rt);
> -}
> -
> -/**
> - * _dpu_dump_work - deferred dump work function
> - * @work: work structure
> - */
> -static void _dpu_dump_work(struct work_struct *work)
> -{
> - _dpu_dump_array("dpudump_workitem",
> - dpu_dbg_base.dbgbus_dpu.cmn.include_in_deferred_work,
> - dpu_dbg_base.dbgbus_vbif_rt.cmn.include_in_deferred_work);
> -}
> -
> -void dpu_dbg_dump(bool queue_work, const char *name, bool dump_dbgbus_dpu,
> - bool dump_dbgbus_vbif_rt)
> -{
> - if (queue_work && work_pending(&dpu_dbg_base.dump_work))
> - return;
> -
> - if (!queue_work) {
> - _dpu_dump_array(name, dump_dbgbus_dpu, dump_dbgbus_vbif_rt);
> - return;
> - }
> -
> - /* schedule work to dump later */
> - dpu_dbg_base.dbgbus_dpu.cmn.include_in_deferred_work = dump_dbgbus_dpu;
> - dpu_dbg_base.dbgbus_vbif_rt.cmn.include_in_deferred_work =
> - dump_dbgbus_vbif_rt;
> - schedule_work(&dpu_dbg_base.dump_work);
> -}
> -
> -/*
> - * dpu_dbg_debugfs_open - debugfs open handler for debug dump
> - * @inode: debugfs inode
> - * @file: file handle
> - */
> -static int dpu_dbg_debugfs_open(struct inode *inode, struct file *file)
> -{
> - /* non-seekable */
> - file->f_mode &= ~(FMODE_LSEEK | FMODE_PREAD | FMODE_PWRITE);
> - file->private_data = inode->i_private;
> - return 0;
> -}
> -
> -/**
> - * dpu_dbg_dump_write - debugfs write handler for debug dump
> - * @file: file handler
> - * @user_buf: user buffer content from debugfs
> - * @count: size of user buffer
> - * @ppos: position offset of user buffer
> - */
> -static ssize_t dpu_dbg_dump_write(struct file *file,
> - const char __user *user_buf, size_t count, loff_t *ppos)
> -{
> - _dpu_dump_array("dump_debugfs", true, true);
> - return count;
> -}
> -
> -static const struct file_operations dpu_dbg_dump_fops = {
> - .open = dpu_dbg_debugfs_open,
> - .write = dpu_dbg_dump_write,
> -};
> -
> -int dpu_dbg_debugfs_register(struct dentry *debugfs_root)
> -{
> - static struct dpu_dbg_base *dbg = &dpu_dbg_base;
> - char debug_name[80] = "";
> -
> - if (!debugfs_root)
> - return -EINVAL;
> -
> - debugfs_create_file("dump", 0600, debugfs_root, NULL,
> - &dpu_dbg_dump_fops);
> -
> - if (dbg->dbgbus_dpu.entries) {
> - dbg->dbgbus_dpu.cmn.name = DBGBUS_NAME_DPU;
> - snprintf(debug_name, sizeof(debug_name), "%s_dbgbus",
> - dbg->dbgbus_dpu.cmn.name);
> - dbg->dbgbus_dpu.cmn.enable_mask = DEFAULT_DBGBUS_DPU;
> - debugfs_create_u32(debug_name, 0600, debugfs_root,
> - &dbg->dbgbus_dpu.cmn.enable_mask);
> - }
> -
> - if (dbg->dbgbus_vbif_rt.entries) {
> - dbg->dbgbus_vbif_rt.cmn.name = DBGBUS_NAME_VBIF_RT;
> - snprintf(debug_name, sizeof(debug_name), "%s_dbgbus",
> - dbg->dbgbus_vbif_rt.cmn.name);
> - dbg->dbgbus_vbif_rt.cmn.enable_mask = DEFAULT_DBGBUS_VBIFRT;
> - debugfs_create_u32(debug_name, 0600, debugfs_root,
> - &dbg->dbgbus_vbif_rt.cmn.enable_mask);
> - }
> -
> - return 0;
> -}
> -
> -static void _dpu_dbg_debugfs_destroy(void)
> -{
> -}
> -
> -void dpu_dbg_init_dbg_buses(u32 hwversion)
> -{
> - static struct dpu_dbg_base *dbg = &dpu_dbg_base;
> -
> - memset(&dbg->dbgbus_dpu, 0, sizeof(dbg->dbgbus_dpu));
> - memset(&dbg->dbgbus_vbif_rt, 0, sizeof(dbg->dbgbus_vbif_rt));
> -
> - if (IS_MSM8998_TARGET(hwversion)) {
> - dbg->dbgbus_dpu.entries = dbg_bus_dpu_8998;
> - dbg->dbgbus_dpu.cmn.entries_size = ARRAY_SIZE(dbg_bus_dpu_8998);
> - dbg->dbgbus_dpu.cmn.flags = DBGBUS_FLAGS_DSPP;
> -
> - dbg->dbgbus_vbif_rt.entries = vbif_dbg_bus_msm8998;
> - dbg->dbgbus_vbif_rt.cmn.entries_size =
> - ARRAY_SIZE(vbif_dbg_bus_msm8998);
> - } else if (IS_SDM845_TARGET(hwversion) || IS_SDM670_TARGET(hwversion)) {
> - dbg->dbgbus_dpu.entries = dbg_bus_dpu_sdm845;
> - dbg->dbgbus_dpu.cmn.entries_size =
> - ARRAY_SIZE(dbg_bus_dpu_sdm845);
> - dbg->dbgbus_dpu.cmn.flags = DBGBUS_FLAGS_DSPP;
> -
> - /* vbif is unchanged vs 8998 */
> - dbg->dbgbus_vbif_rt.entries = vbif_dbg_bus_msm8998;
> - dbg->dbgbus_vbif_rt.cmn.entries_size =
> - ARRAY_SIZE(vbif_dbg_bus_msm8998);
> - } else {
> - pr_err("unsupported chipset id %X\n", hwversion);
> - }
> -}
> -
> -int dpu_dbg_init(struct device *dev)
> -{
> - if (!dev) {
> - pr_err("invalid params\n");
> - return -EINVAL;
> - }
> -
> - INIT_LIST_HEAD(&dpu_dbg_base.reg_base_list);
> - dpu_dbg_base.dev = dev;
> -
> - INIT_WORK(&dpu_dbg_base.dump_work, _dpu_dump_work);
> -
> - return 0;
> -}
> -
> -/**
> - * dpu_dbg_destroy - destroy dpu debug facilities
> - */
> -void dpu_dbg_destroy(void)
> -{
> - _dpu_dbg_debugfs_destroy();
> -}
> -
> -void dpu_dbg_set_dpu_top_offset(u32 blk_off)
> -{
> - dpu_dbg_base.dbgbus_dpu.top_blk_off = blk_off;
> -}
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_dbg.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_dbg.h
> deleted file mode 100644
> index 1e6fa945f98b..000000000000
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_dbg.h
> +++ /dev/null
> @@ -1,103 +0,0 @@
> -/* Copyright (c) 2016-2018, The Linux Foundation. All rights reserved.
> - *
> - * This program is free software; you can redistribute it and/or modify
> - * it under the terms of the GNU General Public License version 2 and
> - * only version 2 as published by the Free Software Foundation.
> - *
> - * This program is distributed in the hope that it will be useful,
> - * but WITHOUT ANY WARRANTY; without even the implied warranty of
> - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> - * GNU General Public License for more details.
> - */
> -
> -#ifndef DPU_DBG_H_
> -#define DPU_DBG_H_
> -
> -#include <stdarg.h>
> -#include <linux/debugfs.h>
> -#include <linux/list.h>
> -
> -enum dpu_dbg_dump_flag {
> - DPU_DBG_DUMP_IN_LOG = BIT(0),
> - DPU_DBG_DUMP_IN_MEM = BIT(1),
> -};
> -
> -#if defined(CONFIG_DEBUG_FS)
> -
> -/**
> - * dpu_dbg_init_dbg_buses - initialize debug bus dumping support for the chipset
> - * @hwversion: Chipset revision
> - */
> -void dpu_dbg_init_dbg_buses(u32 hwversion);
> -
> -/**
> - * dpu_dbg_init - initialize global dpu debug facilities: regdump
> - * @dev: device handle
> - * Returns: 0 or -ERROR
> - */
> -int dpu_dbg_init(struct device *dev);
> -
> -/**
> - * dpu_dbg_debugfs_register - register entries at the given debugfs dir
> - * @debugfs_root: debugfs root in which to create dpu debug entries
> - * Returns: 0 or -ERROR
> - */
> -int dpu_dbg_debugfs_register(struct dentry *debugfs_root);
> -
> -/**
> - * dpu_dbg_destroy - destroy the global dpu debug facilities
> - * Returns: none
> - */
> -void dpu_dbg_destroy(void);
> -
> -/**
> - * dpu_dbg_dump - trigger dumping of all dpu_dbg facilities
> - * @queue_work: whether to queue the dumping work to the work_struct
> - * @name: string indicating origin of dump
> - * @dump_dbgbus: dump the dpu debug bus
> - * @dump_vbif_rt: dump the vbif rt bus
> - * Returns: none
> - */
> -void dpu_dbg_dump(bool queue_work, const char *name, bool dump_dbgbus_dpu,
> - bool dump_dbgbus_vbif_rt);
> -
> -/**
> - * dpu_dbg_set_dpu_top_offset - set the target specific offset from mdss base
> - * address of the top registers. Used for accessing debug bus controls.
> - * @blk_off: offset from mdss base of the top block
> - */
> -void dpu_dbg_set_dpu_top_offset(u32 blk_off);
> -
> -#else
> -
> -static inline void dpu_dbg_init_dbg_buses(u32 hwversion)
> -{
> -}
> -
> -static inline int dpu_dbg_init(struct device *dev)
> -{
> - return 0;
> -}
> -
> -static inline int dpu_dbg_debugfs_register(struct dentry *debugfs_root)
> -{
> - return 0;
> -}
> -
> -static inline void dpu_dbg_destroy(void)
> -{
> -}
> -
> -static inline void dpu_dbg_dump(bool queue_work, const char *name,
> - bool dump_dbgbus_dpu, bool dump_dbgbus_vbif_rt)
> -{
> -}
> -
> -static inline void dpu_dbg_set_dpu_top_offset(u32 blk_off)
> -{
> -}
> -
> -#endif /* defined(CONFIG_DEBUG_FS) */
> -
> -
> -#endif /* DPU_DBG_H_ */
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
> index 82c55efb500f..5559e5d40142 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
> @@ -1494,10 +1494,8 @@ static void dpu_encoder_helper_hw_reset(struct dpu_encoder_phys *phys_enc)
> ctl->idx);
>
> rc = ctl->ops.reset(ctl);
> - if (rc) {
> + if (rc)
> DPU_ERROR_ENC(dpu_enc, "ctl %d reset failure\n", ctl->idx);
> - dpu_dbg_dump(false, __func__, true, true);
> - }
>
> phys_enc->enable_state = DPU_ENC_ENABLED;
> }
> @@ -1838,7 +1836,7 @@ void dpu_encoder_prepare_commit(struct drm_encoder *drm_enc)
> }
>
> #ifdef CONFIG_DEBUG_FS
> -static int _dpu_encoder_status_show(struct seq_file *s, void *data)
> +static int dpu_encoder_status_show(struct seq_file *s, void *data)
> {
> struct dpu_encoder_virt *dpu_enc;
> int i;
> @@ -1877,11 +1875,7 @@ static int _dpu_encoder_status_show(struct seq_file *s, void *data)
> return 0;
> }
>
> -static int _dpu_encoder_debugfs_status_open(struct inode *inode,
> - struct file *file)
> -{
> - return single_open(file, _dpu_encoder_status_show, inode->i_private);
> -}
> +DEFINE_SHOW_ATTRIBUTE(dpu_encoder_status);
This and the below section look like they should be a part of patch 2.
With that change:
Reviewed-by: Bruce Wang <bzwang@chromium.org>
>
> static int _dpu_encoder_init_debugfs(struct drm_encoder *drm_enc)
> {
> @@ -1889,14 +1883,6 @@ static int _dpu_encoder_init_debugfs(struct drm_encoder *drm_enc)
> struct msm_drm_private *priv;
> struct dpu_kms *dpu_kms;
> int i;
> -
> - static const struct file_operations debugfs_status_fops = {
> - .open = _dpu_encoder_debugfs_status_open,
> - .read = seq_read,
> - .llseek = seq_lseek,
> - .release = single_release,
> - };
> -
> char name[DPU_NAME_SIZE];
>
> if (!drm_enc || !drm_enc->dev || !drm_enc->dev->dev_private) {
> @@ -1917,8 +1903,8 @@ static int _dpu_encoder_init_debugfs(struct drm_encoder *drm_enc)
> return -ENOMEM;
>
> /* don't error check these */
> - debugfs_create_file("status", 0600,
> - dpu_enc->debugfs_root, dpu_enc, &debugfs_status_fops);
> + debugfs_create_file("status", 0600, dpu_enc->debugfs_root, dpu_enc,
> + &dpu_encoder_status_fops);
>
> for (i = 0; i < dpu_enc->num_phys_encs; i++)
> if (dpu_enc->phys_encs[i] &&
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c
> index 24a98f4e1f44..b37a0992e326 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c
> @@ -243,7 +243,6 @@ static int _dpu_encoder_phys_cmd_handle_ppdone_timeout(
> atomic_read(&phys_enc->pending_kickoff_cnt));
>
> dpu_encoder_helper_unregister_irq(phys_enc, INTR_IDX_RDPTR);
> - dpu_dbg_dump(false, __func__, true, true);
> }
>
> atomic_add_unless(&phys_enc->pending_kickoff_cnt, -1, 0);
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c
> index b3c68c4fcc8e..9fb74a87bdfd 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c
> @@ -613,7 +613,6 @@ static void dpu_encoder_phys_vid_prepare_for_kickoff(
> DPU_ERROR_VIDENC(vid_enc, "ctl %d reset failure: %d\n",
> ctl->idx, rc);
> dpu_encoder_helper_unregister_irq(phys_enc, INTR_IDX_VSYNC);
> - dpu_dbg_dump(false, __func__, true, true);
> }
> }
>
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c
> index 8fa601a9abbf..4aab04335c6d 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c
> @@ -13,7 +13,6 @@
> #include <linux/delay.h>
> #include "dpu_hwio.h"
> #include "dpu_hw_ctl.h"
> -#include "dpu_dbg.h"
> #include "dpu_kms.h"
> #include "dpu_trace.h"
>
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.c
> index 9c6bba0ac7c3..695d27a730e8 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.c
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.c
> @@ -13,7 +13,6 @@
> #include "dpu_hwio.h"
> #include "dpu_hw_catalog.h"
> #include "dpu_hw_intf.h"
> -#include "dpu_dbg.h"
> #include "dpu_kms.h"
>
> #define INTF_TIMING_ENGINE_EN 0x000
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.c
> index dbe48e006414..c76b5cc949fb 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.c
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.c
> @@ -15,7 +15,6 @@
> #include "dpu_hwio.h"
> #include "dpu_hw_lm.h"
> #include "dpu_hw_mdss.h"
> -#include "dpu_dbg.h"
> #include "dpu_kms.h"
>
> #define LM_OP_MODE 0x00
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.c
> index 52fca13da176..cfc93816078f 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.c
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.c
> @@ -16,7 +16,6 @@
> #include "dpu_hwio.h"
> #include "dpu_hw_catalog.h"
> #include "dpu_hw_pingpong.h"
> -#include "dpu_dbg.h"
> #include "dpu_kms.h"
> #include "dpu_trace.h"
>
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c
> index 8745018ffdd6..8297963d2c4c 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c
> @@ -14,7 +14,6 @@
> #include "dpu_hw_catalog.h"
> #include "dpu_hw_lm.h"
> #include "dpu_hw_sspp.h"
> -#include "dpu_dbg.h"
> #include "dpu_kms.h"
>
> #define DPU_FETCH_CONFIG_RESET_VALUE 0x00000087
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_top.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_top.c
> index b8781256e21b..f7e0f661a8bb 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_top.c
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_top.c
> @@ -13,7 +13,6 @@
> #include "dpu_hwio.h"
> #include "dpu_hw_catalog.h"
> #include "dpu_hw_top.h"
> -#include "dpu_dbg.h"
> #include "dpu_kms.h"
>
> #define SSPP_SPARE 0x28
> @@ -361,8 +360,6 @@ struct dpu_hw_mdp *dpu_hw_mdptop_init(enum dpu_mdp idx,
> goto blk_init_error;
> }
>
> - dpu_dbg_set_dpu_top_offset(mdp->hw.blk_off);
> -
> return mdp;
>
> blk_init_error:
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_vbif.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_vbif.c
> index d43905525f92..38bfd222ed72 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_vbif.c
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_vbif.c
> @@ -13,7 +13,6 @@
> #include "dpu_hwio.h"
> #include "dpu_hw_catalog.h"
> #include "dpu_hw_vbif.h"
> -#include "dpu_dbg.h"
>
> #define VBIF_VERSION 0x0000
> #define VBIF_CLK_FORCE_CTRL0 0x0008
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
> index 985c855796ae..fd5bad16338d 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
> @@ -266,12 +266,6 @@ static int _dpu_debugfs_init(struct dpu_kms *dpu_kms)
> return PTR_ERR(dpu_kms->debugfs_root);
> }
>
> - rc = dpu_dbg_debugfs_register(dpu_kms->debugfs_root);
> - if (rc) {
> - DRM_ERROR("failed to reg dpu dbg debugfs: %d\n", rc);
> - return rc;
> - }
> -
> /* allow root to be NULL */
> debugfs_create_x32(DPU_DEBUGFS_HWMASKNAME, 0600, dpu_kms->debugfs_root, p);
>
> @@ -705,7 +699,6 @@ static void dpu_kms_destroy(struct msm_kms *kms)
>
> dpu_kms = to_dpu_kms(kms);
>
> - dpu_dbg_destroy();
> _dpu_kms_hw_destroy(dpu_kms);
> }
>
> @@ -866,16 +859,10 @@ static int dpu_kms_hw_init(struct msm_kms *kms)
> return rc;
> }
>
> - rc = dpu_dbg_init(&dpu_kms->pdev->dev);
> - if (rc) {
> - DRM_ERROR("failed to init dpu dbg: %d\n", rc);
> - return rc;
> - }
> -
> priv = dev->dev_private;
> if (!priv) {
> DPU_ERROR("invalid private data\n");
> - goto dbg_destroy;
> + return rc;
> }
>
> dpu_kms->mmio = msm_ioremap(dpu_kms->pdev, "mdp", "mdp");
> @@ -940,8 +927,6 @@ static int dpu_kms_hw_init(struct msm_kms *kms)
> goto power_error;
> }
>
> - dpu_dbg_init_dbg_buses(dpu_kms->core_rev);
> -
> /*
> * Now we need to read the HW catalog and initialize resources such as
> * clocks, regulators, GDSC/MMAGIC, ioremap the register ranges etc
> @@ -1048,8 +1033,7 @@ static int dpu_kms_hw_init(struct msm_kms *kms)
> pm_runtime_put_sync(&dpu_kms->pdev->dev);
> error:
> _dpu_kms_hw_destroy(dpu_kms);
> -dbg_destroy:
> - dpu_dbg_destroy();
> +
> return rc;
> }
>
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h
> index 2a3625eef6d3..12a2eb90e6b5 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h
> @@ -23,7 +23,6 @@
> #include "msm_kms.h"
> #include "msm_mmu.h"
> #include "msm_gem.h"
> -#include "dpu_dbg.h"
> #include "dpu_hw_catalog.h"
> #include "dpu_hw_ctl.h"
> #include "dpu_hw_lm.h"
>
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^ permalink raw reply [flat|nested] 29+ messages in thread
* Re: [PATCH 01/11] drm/msm/dpu: Remove dpu_dbg
[not found] ` <20181018195836.15885-2-jcrouse-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2018-10-19 17:34 ` Bruce Wang
@ 2018-10-19 18:11 ` Bruce Wang
[not found] ` <CAA3FfWU-KB=VCmrkriO8M1zdPg9FGO_bii7qjbzGXupapJFF9A-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
1 sibling, 1 reply; 29+ messages in thread
From: Bruce Wang @ 2018-10-19 18:11 UTC (permalink / raw)
To: jcrouse-sgV2jX0FEOL9JmXXK+q4OQ
Cc: Sean Paul, linux-arm-msm-u79uwXL29TY76Z2rM5mHXA,
freedreno-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW,
abhinavk-sgV2jX0FEOL9JmXXK+q4OQ,
dri-devel-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW
On Thu, Oct 18, 2018 at 3:59 PM Jordan Crouse <jcrouse@codeaurora.org> wrote:
>
> The functions in dpu_dbg.c aren't used. The two main dump functions
> fail after a lookup from dpu_dbg_base.reg_base_list which turns out
> to never be populated and once those are removed the rest of the
> file doesn't make any sense.
>
> Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
> ---
> drivers/gpu/drm/msm/Makefile | 3 +-
> drivers/gpu/drm/msm/disp/dpu1/dpu_dbg.c | 2393 -----------------
> drivers/gpu/drm/msm/disp/dpu1/dpu_dbg.h | 103 -
> drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 24 +-
> .../drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c | 1 -
> .../drm/msm/disp/dpu1/dpu_encoder_phys_vid.c | 1 -
> drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c | 1 -
> drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.c | 1 -
> drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.c | 1 -
> .../gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.c | 1 -
> drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c | 1 -
> drivers/gpu/drm/msm/disp/dpu1/dpu_hw_top.c | 3 -
> drivers/gpu/drm/msm/disp/dpu1/dpu_hw_vbif.c | 1 -
> drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 20 +-
> drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h | 1 -
> 15 files changed, 8 insertions(+), 2547 deletions(-)
> delete mode 100644 drivers/gpu/drm/msm/disp/dpu1/dpu_dbg.c
> delete mode 100644 drivers/gpu/drm/msm/disp/dpu1/dpu_dbg.h
>
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
> b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
> index 82c55efb500f..5559e5d40142 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
> @@ -1494,10 +1494,8 @@ static void dpu_encoder_helper_hw_reset(struct
> dpu_encoder_phys *phys_enc)
> ctl->idx);
>
> rc = ctl->ops.reset(ctl);
> - if (rc) {
> + if (rc)
> DPU_ERROR_ENC(dpu_enc, "ctl %d reset failure\n", ctl->idx);
> - dpu_dbg_dump(false, __func__, true, true);
> - }
>
> phys_enc->enable_state = DPU_ENC_ENABLED;
> }
> @@ -1838,7 +1836,7 @@ void dpu_encoder_prepare_commit(struct
> drm_encoder *drm_enc)
> }
>
> #ifdef CONFIG_DEBUG_FS
> -static int _dpu_encoder_status_show(struct seq_file *s, void *data)
> +static int dpu_encoder_status_show(struct seq_file *s, void *data)
> {
> struct dpu_encoder_virt *dpu_enc;
> int i;
> @@ -1877,11 +1875,7 @@ static int _dpu_encoder_status_show(struct
> seq_file *s, void *data)
> return 0;
> }
>
> -static int _dpu_encoder_debugfs_status_open(struct inode *inode,
> - struct file *file)
> -{
> - return single_open(file, _dpu_encoder_status_show, inode->i_private);
> -}
> +DEFINE_SHOW_ATTRIBUTE(dpu_encoder_status);
>
> static int _dpu_encoder_init_debugfs(struct drm_encoder *drm_enc)
> {
> @@ -1889,14 +1883,6 @@ static int _dpu_encoder_init_debugfs(struct
> drm_encoder *drm_enc)
> struct msm_drm_private *priv;
> struct dpu_kms *dpu_kms;
> int i;
> -
> - static const struct file_operations debugfs_status_fops = {
> - .open = _dpu_encoder_debugfs_status_open,
> - .read = seq_read,
> - .llseek = seq_lseek,
> - .release = single_release,
> - };
> -
> char name[DPU_NAME_SIZE];
>
> if (!drm_enc || !drm_enc->dev || !drm_enc->dev->dev_private) {
> @@ -1917,8 +1903,8 @@ static int _dpu_encoder_init_debugfs(struct
> drm_encoder *drm_enc)
> return -ENOMEM;
>
> /* don't error check these */
> - debugfs_create_file("status", 0600,
> - dpu_enc->debugfs_root, dpu_enc, &debugfs_status_fops);
> + debugfs_create_file("status", 0600, dpu_enc->debugfs_root, dpu_enc,
> + &dpu_encoder_status_fops);
>
Sorry about that, apparently my client does not like responding to long emails.
My only comment was that this section looks like it should be in patch 2.
With that change:
Reviewed-by: Bruce Wang <bzwang@chromium.org>
> for (i = 0; i < dpu_enc->num_phys_encs; i++)
> if (dpu_enc->phys_encs[i] &&
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Freedreno@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/freedreno
^ permalink raw reply [flat|nested] 29+ messages in thread
* Re: [PATCH 01/11] drm/msm/dpu: Remove dpu_dbg
[not found] ` <CAA3FfWU-KB=VCmrkriO8M1zdPg9FGO_bii7qjbzGXupapJFF9A-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
@ 2018-10-19 19:59 ` Jordan Crouse
0 siblings, 0 replies; 29+ messages in thread
From: Jordan Crouse @ 2018-10-19 19:59 UTC (permalink / raw)
To: Bruce Wang
Cc: Sean Paul, linux-arm-msm-u79uwXL29TY76Z2rM5mHXA,
freedreno-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW,
abhinavk-sgV2jX0FEOL9JmXXK+q4OQ,
dri-devel-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW
On Fri, Oct 19, 2018 at 02:11:27PM -0400, Bruce Wang wrote:
> On Thu, Oct 18, 2018 at 3:59 PM Jordan Crouse <jcrouse@codeaurora.org> wrote:
> >
> > The functions in dpu_dbg.c aren't used. The two main dump functions
> > fail after a lookup from dpu_dbg_base.reg_base_list which turns out
> > to never be populated and once those are removed the rest of the
> > file doesn't make any sense.
> >
> > Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
> > ---
> > drivers/gpu/drm/msm/Makefile | 3 +-
> > drivers/gpu/drm/msm/disp/dpu1/dpu_dbg.c | 2393 -----------------
> > drivers/gpu/drm/msm/disp/dpu1/dpu_dbg.h | 103 -
> > drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 24 +-
> > .../drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c | 1 -
> > .../drm/msm/disp/dpu1/dpu_encoder_phys_vid.c | 1 -
> > drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c | 1 -
> > drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.c | 1 -
> > drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.c | 1 -
> > .../gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.c | 1 -
> > drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c | 1 -
> > drivers/gpu/drm/msm/disp/dpu1/dpu_hw_top.c | 3 -
> > drivers/gpu/drm/msm/disp/dpu1/dpu_hw_vbif.c | 1 -
> > drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 20 +-
> > drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h | 1 -
> > 15 files changed, 8 insertions(+), 2547 deletions(-)
> > delete mode 100644 drivers/gpu/drm/msm/disp/dpu1/dpu_dbg.c
> > delete mode 100644 drivers/gpu/drm/msm/disp/dpu1/dpu_dbg.h
> >
> > diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
> > b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
> > index 82c55efb500f..5559e5d40142 100644
> > --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
> > +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
> > @@ -1494,10 +1494,8 @@ static void dpu_encoder_helper_hw_reset(struct
> > dpu_encoder_phys *phys_enc)
> > ctl->idx);
> >
> > rc = ctl->ops.reset(ctl);
> > - if (rc) {
> > + if (rc)
> > DPU_ERROR_ENC(dpu_enc, "ctl %d reset failure\n", ctl->idx);
> > - dpu_dbg_dump(false, __func__, true, true);
> > - }
> >
> > phys_enc->enable_state = DPU_ENC_ENABLED;
> > }
> > @@ -1838,7 +1836,7 @@ void dpu_encoder_prepare_commit(struct
> > drm_encoder *drm_enc)
> > }
> >
> > #ifdef CONFIG_DEBUG_FS
> > -static int _dpu_encoder_status_show(struct seq_file *s, void *data)
> > +static int dpu_encoder_status_show(struct seq_file *s, void *data)
> > {
> > struct dpu_encoder_virt *dpu_enc;
> > int i;
> > @@ -1877,11 +1875,7 @@ static int _dpu_encoder_status_show(struct
> > seq_file *s, void *data)
> > return 0;
> > }
> >
> > -static int _dpu_encoder_debugfs_status_open(struct inode *inode,
> > - struct file *file)
> > -{
> > - return single_open(file, _dpu_encoder_status_show, inode->i_private);
> > -}
> > +DEFINE_SHOW_ATTRIBUTE(dpu_encoder_status);
> >
> > static int _dpu_encoder_init_debugfs(struct drm_encoder *drm_enc)
> > {
> > @@ -1889,14 +1883,6 @@ static int _dpu_encoder_init_debugfs(struct
> > drm_encoder *drm_enc)
> > struct msm_drm_private *priv;
> > struct dpu_kms *dpu_kms;
> > int i;
> > -
> > - static const struct file_operations debugfs_status_fops = {
> > - .open = _dpu_encoder_debugfs_status_open,
> > - .read = seq_read,
> > - .llseek = seq_lseek,
> > - .release = single_release,
> > - };
> > -
> > char name[DPU_NAME_SIZE];
> >
> > if (!drm_enc || !drm_enc->dev || !drm_enc->dev->dev_private) {
> > @@ -1917,8 +1903,8 @@ static int _dpu_encoder_init_debugfs(struct
> > drm_encoder *drm_enc)
> > return -ENOMEM;
> >
> > /* don't error check these */
> > - debugfs_create_file("status", 0600,
> > - dpu_enc->debugfs_root, dpu_enc, &debugfs_status_fops);
> > + debugfs_create_file("status", 0600, dpu_enc->debugfs_root, dpu_enc,
> > + &dpu_encoder_status_fops);
> >
>
> Sorry about that, apparently my client does not like responding to long emails.
> My only comment was that this section looks like it should be in patch 2.
>
> With that change:
> Reviewed-by: Bruce Wang <bzwang@chromium.org>
I saw your previous email and thanks. I'll make this change.
Jordan
--
The Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project
_______________________________________________
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Freedreno@lists.freedesktop.org
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^ permalink raw reply [flat|nested] 29+ messages in thread
* Re: [PATCH 09/11] drm/msm/dpu: Debugfs related cleanups
[not found] ` <20181018195836.15885-10-jcrouse-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
@ 2018-10-22 15:45 ` Bruce Wang
0 siblings, 0 replies; 29+ messages in thread
From: Bruce Wang @ 2018-10-22 15:45 UTC (permalink / raw)
To: jcrouse-sgV2jX0FEOL9JmXXK+q4OQ
Cc: Sean Paul, linux-arm-msm-u79uwXL29TY76Z2rM5mHXA,
freedreno-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW,
abhinavk-sgV2jX0FEOL9JmXXK+q4OQ,
dri-devel-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW
On Thu, Oct 18, 2018 at 3:59 PM Jordan Crouse <jcrouse@codeaurora.org> wrote:
>
> Do some cleanups to the code related to debugfs files from across
> the DPU driver including removing destroy functions,
> tweeks to the initialization functions, removal of unused
> static inline stubs and skipping unneeded null checks.
>
> Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
Reviewed-by: Bruce Wang <bzwang@chromium.org>
> ---
> drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.c | 30 ++---------
> drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.h | 9 +---
> drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c | 17 -------
> drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c | 30 ++---------
> drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 31 +++---------
> drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 50 ++++---------------
> drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h | 1 -
> drivers/gpu/drm/msm/disp/dpu1/dpu_mdss.c | 3 +-
> drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c | 18 ++-----
> drivers/gpu/drm/msm/disp/dpu1/dpu_vbif.c | 11 +---
> drivers/gpu/drm/msm/disp/dpu1/dpu_vbif.h | 15 +-----
> 11 files changed, 33 insertions(+), 182 deletions(-)
>
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.c
> index f66070cb2f42..f188c78dd736 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.c
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.c
> @@ -307,10 +307,8 @@ static int dpu_debugfs_core_irq_show(struct seq_file *s, void *v)
> unsigned long irq_flags;
> int i, irq_count, enable_count, cb_count;
>
> - if (!irq_obj || !irq_obj->enable_counts || !irq_obj->irq_cb_tbl) {
> - DPU_ERROR("invalid parameters\n");
> + if (WARN_ON(!irq_obj->enable_counts || !irq_obj->irq_cb_tbl))
> return 0;
> - }
>
> for (i = 0; i < irq_obj->total_irqs; i++) {
> spin_lock_irqsave(&irq_obj->cb_lock, irq_flags);
> @@ -331,31 +329,11 @@ static int dpu_debugfs_core_irq_show(struct seq_file *s, void *v)
>
> DEFINE_SHOW_ATTRIBUTE(dpu_debugfs_core_irq);
>
> -int dpu_debugfs_core_irq_init(struct dpu_kms *dpu_kms,
> - struct dentry *parent)
> -{
> - dpu_kms->irq_obj.debugfs_file = debugfs_create_file("core_irq", 0600,
> - parent, &dpu_kms->irq_obj,
> - &dpu_debugfs_core_irq_fops);
> -
> - return 0;
> -}
> -
> -void dpu_debugfs_core_irq_destroy(struct dpu_kms *dpu_kms)
> -{
> - debugfs_remove(dpu_kms->irq_obj.debugfs_file);
> - dpu_kms->irq_obj.debugfs_file = NULL;
> -}
> -
> -#else
> -int dpu_debugfs_core_irq_init(struct dpu_kms *dpu_kms,
> +void dpu_debugfs_core_irq_init(struct dpu_kms *dpu_kms,
> struct dentry *parent)
> {
> - return 0;
> -}
> -
> -void dpu_debugfs_core_irq_destroy(struct dpu_kms *dpu_kms)
> -{
> + debugfs_create_file("core_irq", 0600, parent, &dpu_kms->irq_obj,
> + &dpu_debugfs_core_irq_fops);
> }
> #endif
>
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.h
> index 884f77fa3eb6..e9015a2b23fe 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.h
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.h
> @@ -132,15 +132,8 @@ int dpu_core_irq_unregister_callback(
> * dpu_debugfs_core_irq_init - register core irq debugfs
> * @dpu_kms: pointer to kms
> * @parent: debugfs directory root
> - * @Return: 0 on success
> */
> -int dpu_debugfs_core_irq_init(struct dpu_kms *dpu_kms,
> +void dpu_debugfs_core_irq_init(struct dpu_kms *dpu_kms,
> struct dentry *parent);
>
> -/**
> - * dpu_debugfs_core_irq_destroy - deregister core irq debugfs
> - * @dpu_kms: pointer to kms
> - */
> -void dpu_debugfs_core_irq_destroy(struct dpu_kms *dpu_kms);
> -
> #endif /* __DPU_CORE_IRQ_H__ */
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c
> index e68ccb7a898a..7bc887ed9d74 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c
> @@ -524,12 +524,6 @@ static const struct file_operations dpu_core_perf_mode_fops = {
> .write = _dpu_core_perf_mode_write,
> };
>
> -static void dpu_core_perf_debugfs_destroy(struct dpu_core_perf *perf)
> -{
> - debugfs_remove_recursive(perf->debugfs_root);
> - perf->debugfs_root = NULL;
> -}
> -
> int dpu_core_perf_debugfs_init(struct dpu_core_perf *perf,
> struct dentry *parent)
> {
> @@ -578,16 +572,6 @@ int dpu_core_perf_debugfs_init(struct dpu_core_perf *perf,
>
> return 0;
> }
> -#else
> -static void dpu_core_perf_debugfs_destroy(struct dpu_core_perf *perf)
> -{
> -}
> -
> -int dpu_core_perf_debugfs_init(struct dpu_core_perf *perf,
> - struct dentry *parent)
> -{
> - return 0;
> -}
> #endif
>
> void dpu_core_perf_destroy(struct dpu_core_perf *perf)
> @@ -597,7 +581,6 @@ void dpu_core_perf_destroy(struct dpu_core_perf *perf)
> return;
> }
>
> - dpu_core_perf_debugfs_destroy(perf);
> perf->max_core_clk_rate = 0;
> perf->core_clk = NULL;
> perf->phandle = NULL;
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c
> index a8aa59b8caeb..890994106e39 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c
> @@ -1246,9 +1246,6 @@ static int dpu_crtc_debugfs_status_show(struct seq_file *s, void *data)
>
> int i, out_width;
>
> - if (!s || !s->private)
> - return -EINVAL;
> -
> dpu_crtc = s->private;
> crtc = &dpu_crtc->base;
>
> @@ -1378,14 +1375,7 @@ DEFINE_SHOW_ATTRIBUTE(dpu_crtc_debugfs_state);
>
> static int _dpu_crtc_init_debugfs(struct drm_crtc *crtc)
> {
> - struct dpu_crtc *dpu_crtc;
> - struct dpu_kms *dpu_kms;
> -
> - if (!crtc)
> - return -EINVAL;
> - dpu_crtc = to_dpu_crtc(crtc);
> -
> - dpu_kms = _dpu_crtc_get_kms(crtc);
> + struct dpu_crtc *dpu_crtc = to_dpu_crtc(crtc);
>
> dpu_crtc->debugfs_root = debugfs_create_dir(dpu_crtc->name,
> crtc->dev->primary->debugfs_root);
> @@ -1403,25 +1393,11 @@ static int _dpu_crtc_init_debugfs(struct drm_crtc *crtc)
>
> return 0;
> }
> -
> -static void _dpu_crtc_destroy_debugfs(struct drm_crtc *crtc)
> -{
> - struct dpu_crtc *dpu_crtc;
> -
> - if (!crtc)
> - return;
> - dpu_crtc = to_dpu_crtc(crtc);
> - debugfs_remove_recursive(dpu_crtc->debugfs_root);
> -}
> #else
> static int _dpu_crtc_init_debugfs(struct drm_crtc *crtc)
> {
> return 0;
> }
> -
> -static void _dpu_crtc_destroy_debugfs(struct drm_crtc *crtc)
> -{
> -}
> #endif /* CONFIG_DEBUG_FS */
>
> static int dpu_crtc_late_register(struct drm_crtc *crtc)
> @@ -1431,7 +1407,9 @@ static int dpu_crtc_late_register(struct drm_crtc *crtc)
>
> static void dpu_crtc_early_unregister(struct drm_crtc *crtc)
> {
> - _dpu_crtc_destroy_debugfs(crtc);
> + struct dpu_crtc *dpu_crtc = to_dpu_crtc(crtc);
> +
> + debugfs_remove_recursive(dpu_crtc->debugfs_root);
> }
>
> static const struct drm_crtc_funcs dpu_crtc_funcs = {
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
> index 5559e5d40142..2811860f2688 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
> @@ -1838,14 +1838,9 @@ void dpu_encoder_prepare_commit(struct drm_encoder *drm_enc)
> #ifdef CONFIG_DEBUG_FS
> static int dpu_encoder_status_show(struct seq_file *s, void *data)
> {
> - struct dpu_encoder_virt *dpu_enc;
> + struct dpu_encoder_virt *dpu_enc = s->private;
> int i;
>
> - if (!s || !s->private)
> - return -EINVAL;
> -
> - dpu_enc = s->private;
> -
> mutex_lock(&dpu_enc->enc_lock);
> for (i = 0; i < dpu_enc->num_phys_encs; i++) {
> struct dpu_encoder_phys *phys = dpu_enc->phys_encs[i];
> @@ -1879,18 +1874,17 @@ DEFINE_SHOW_ATTRIBUTE(dpu_encoder_status);
>
> static int _dpu_encoder_init_debugfs(struct drm_encoder *drm_enc)
> {
> - struct dpu_encoder_virt *dpu_enc;
> + struct dpu_encoder_virt *dpu_enc = to_dpu_encoder_virt(drm_enc);
> struct msm_drm_private *priv;
> struct dpu_kms *dpu_kms;
> int i;
> char name[DPU_NAME_SIZE];
>
> - if (!drm_enc || !drm_enc->dev || !drm_enc->dev->dev_private) {
> + if (!drm_enc->dev || !drm_enc->dev->dev_private) {
> DPU_ERROR("invalid encoder or kms\n");
> return -EINVAL;
> }
>
> - dpu_enc = to_dpu_encoder_virt(drm_enc);
> priv = drm_enc->dev->dev_private;
> dpu_kms = to_dpu_kms(priv->kms);
>
> @@ -1915,26 +1909,11 @@ static int _dpu_encoder_init_debugfs(struct drm_encoder *drm_enc)
>
> return 0;
> }
> -
> -static void _dpu_encoder_destroy_debugfs(struct drm_encoder *drm_enc)
> -{
> - struct dpu_encoder_virt *dpu_enc;
> -
> - if (!drm_enc)
> - return;
> -
> - dpu_enc = to_dpu_encoder_virt(drm_enc);
> - debugfs_remove_recursive(dpu_enc->debugfs_root);
> -}
> #else
> static int _dpu_encoder_init_debugfs(struct drm_encoder *drm_enc)
> {
> return 0;
> }
> -
> -static void _dpu_encoder_destroy_debugfs(struct drm_encoder *drm_enc)
> -{
> -}
> #endif
>
> static int dpu_encoder_late_register(struct drm_encoder *encoder)
> @@ -1944,7 +1923,9 @@ static int dpu_encoder_late_register(struct drm_encoder *encoder)
>
> static void dpu_encoder_early_unregister(struct drm_encoder *encoder)
> {
> - _dpu_encoder_destroy_debugfs(encoder);
> + struct dpu_encoder_virt *dpu_enc = to_dpu_encoder_virt(encoder);
> +
> + debugfs_remove_recursive(dpu_enc->debugfs_root);
> }
>
> static int dpu_encoder_virt_add_phys_encs(
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
> index 2a91881048c8..01be305758c5 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
> @@ -81,7 +81,7 @@ static int _dpu_danger_signal_status(struct seq_file *s,
> struct dpu_danger_safe_status status;
> int i;
>
> - if (!kms || !kms->dev || !kms->dev->dev_private || !kms->hw_mdp) {
> + if (!kms->dev || !kms->dev->dev_private || !kms->hw_mdp) {
> DPU_ERROR("invalid arg(s)\n");
> return 0;
> }
> @@ -125,46 +125,31 @@ static int dpu_debugfs_safe_stats_show(struct seq_file *s, void *v)
> }
> DEFINE_SHOW_ATTRIBUTE(dpu_debugfs_safe_stats);
>
> -static void dpu_debugfs_danger_destroy(struct dpu_kms *dpu_kms)
> -{
> - debugfs_remove_recursive(dpu_kms->debugfs_danger);
> - dpu_kms->debugfs_danger = NULL;
> -}
> -
> -static int dpu_debugfs_danger_init(struct dpu_kms *dpu_kms,
> +static void dpu_debugfs_danger_init(struct dpu_kms *dpu_kms,
> struct dentry *parent)
> {
> dpu_kms->debugfs_danger = debugfs_create_dir("danger",
> parent);
> if (!dpu_kms->debugfs_danger) {
> DPU_ERROR("failed to create danger debugfs\n");
> - return -EINVAL;
> }
>
> debugfs_create_file("danger_status", 0600, dpu_kms->debugfs_danger,
> dpu_kms, &dpu_debugfs_danger_stats_fops);
> debugfs_create_file("safe_status", 0600, dpu_kms->debugfs_danger,
> dpu_kms, &dpu_debugfs_safe_stats_fops);
> -
> - return 0;
> }
>
> static int dpu_debugfs_regset32_show(struct seq_file *s, void *data)
> {
> - struct dpu_debugfs_regset32 *regset;
> - struct dpu_kms *dpu_kms;
> + struct dpu_debugfs_regset32 *regset = s->private;
> + struct dpu_kms *dpu_kms = regset->dpu_kms;
> struct drm_device *dev;
> struct msm_drm_private *priv;
> void __iomem *base;
> uint32_t i, addr;
>
> - if (!s || !s->private)
> - return 0;
> -
> - regset = s->private;
> -
> - dpu_kms = regset->dpu_kms;
> - if (!dpu_kms || !dpu_kms->mmio)
> + if (!dpu_kms->mmio)
> return 0;
>
> dev = dpu_kms->dev;
> @@ -231,7 +216,7 @@ static int _dpu_debugfs_init(struct dpu_kms *dpu_kms)
>
> p = dpu_hw_util_get_log_mask_ptr();
>
> - if (!dpu_kms || !p)
> + if (!p)
> return -EINVAL;
>
> dpu_kms->debugfs_root = debugfs_create_dir("debug",
> @@ -245,9 +230,9 @@ static int _dpu_debugfs_init(struct dpu_kms *dpu_kms)
> /* allow root to be NULL */
> debugfs_create_x32(DPU_DEBUGFS_HWMASKNAME, 0600, dpu_kms->debugfs_root, p);
>
> - (void) dpu_debugfs_danger_init(dpu_kms, dpu_kms->debugfs_root);
> - (void) dpu_debugfs_vbif_init(dpu_kms, dpu_kms->debugfs_root);
> - (void) dpu_debugfs_core_irq_init(dpu_kms, dpu_kms->debugfs_root);
> + dpu_debugfs_danger_init(dpu_kms, dpu_kms->debugfs_root);
> + dpu_debugfs_vbif_init(dpu_kms, dpu_kms->debugfs_root);
> + dpu_debugfs_core_irq_init(dpu_kms, dpu_kms->debugfs_root);
>
> rc = dpu_core_perf_debugfs_init(&dpu_kms->perf, dpu_kms->debugfs_root);
> if (rc) {
> @@ -257,21 +242,6 @@ static int _dpu_debugfs_init(struct dpu_kms *dpu_kms)
>
> return 0;
> }
> -
> -static void _dpu_debugfs_destroy(struct dpu_kms *dpu_kms)
> -{
> - /* don't need to NULL check debugfs_root */
> - if (dpu_kms) {
> - dpu_debugfs_vbif_destroy(dpu_kms);
> - dpu_debugfs_danger_destroy(dpu_kms);
> - dpu_debugfs_core_irq_destroy(dpu_kms);
> - debugfs_remove_recursive(dpu_kms->debugfs_root);
> - }
> -}
> -#else
> -static void _dpu_debugfs_destroy(struct dpu_kms *dpu_kms)
> -{
> -}
> #endif
>
> static int dpu_kms_enable_vblank(struct msm_kms *kms, struct drm_crtc *crtc)
> @@ -626,7 +596,7 @@ static void _dpu_kms_hw_destroy(struct dpu_kms *dpu_kms)
> &dpu_kms->phandle, dpu_kms->power_event);
>
> /* safe to call these more than once during shutdown */
> - _dpu_debugfs_destroy(dpu_kms);
> + debugfs_remove_recursive(dpu_kms->debugfs_root);
> _dpu_kms_mmu_destroy(dpu_kms);
>
> if (dpu_kms->catalog) {
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h
> index e7539c9870e4..33ed5779687f 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h
> @@ -102,7 +102,6 @@ struct dpu_irq {
> atomic_t *enable_counts;
> atomic_t *irq_counts;
> spinlock_t cb_lock;
> - struct dentry *debugfs_file;
> };
>
> struct dpu_kms {
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_mdss.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_mdss.c
> index 19abf719811a..5ecc26fdc328 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_mdss.c
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_mdss.c
> @@ -120,13 +120,12 @@ static int _dpu_mdss_irq_domain_add(struct dpu_mdss *dpu_mdss)
> return 0;
> }
>
> -static int _dpu_mdss_irq_domain_fini(struct dpu_mdss *dpu_mdss)
> +static void _dpu_mdss_irq_domain_fini(struct dpu_mdss *dpu_mdss)
> {
> if (dpu_mdss->irq_controller.domain) {
> irq_domain_remove(dpu_mdss->irq_controller.domain);
> dpu_mdss->irq_controller.domain = NULL;
> }
> - return 0;
> }
> static int dpu_mdss_enable(struct msm_mdss *mdss)
> {
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c
> index 98d8315f625d..3c5580c75581 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c
> @@ -1451,25 +1451,11 @@ static int _dpu_plane_init_debugfs(struct drm_plane *plane)
>
> return 0;
> }
> -
> -static void _dpu_plane_destroy_debugfs(struct drm_plane *plane)
> -{
> - struct dpu_plane *pdpu;
> -
> - if (!plane)
> - return;
> - pdpu = to_dpu_plane(plane);
> -
> - debugfs_remove_recursive(pdpu->debugfs_root);
> -}
> #else
> static int _dpu_plane_init_debugfs(struct drm_plane *plane)
> {
> return 0;
> }
> -static void _dpu_plane_destroy_debugfs(struct drm_plane *plane)
> -{
> -}
> #endif
>
> static int dpu_plane_late_register(struct drm_plane *plane)
> @@ -1479,7 +1465,9 @@ static int dpu_plane_late_register(struct drm_plane *plane)
>
> static void dpu_plane_early_unregister(struct drm_plane *plane)
> {
> - _dpu_plane_destroy_debugfs(plane);
> + struct dpu_plane *pdpu = to_dpu_plane(plane);
> +
> + debugfs_remove_recursive(pdpu->debugfs_root);
> }
>
> static const struct drm_plane_funcs dpu_plane_funcs = {
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_vbif.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_vbif.c
> index ff5091d2555d..98d8faf68057 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_vbif.c
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_vbif.c
> @@ -310,13 +310,8 @@ void dpu_vbif_init_memtypes(struct dpu_kms *dpu_kms)
> }
>
> #ifdef CONFIG_DEBUG_FS
> -void dpu_debugfs_vbif_destroy(struct dpu_kms *dpu_kms)
> -{
> - debugfs_remove_recursive(dpu_kms->debugfs_vbif);
> - dpu_kms->debugfs_vbif = NULL;
> -}
>
> -int dpu_debugfs_vbif_init(struct dpu_kms *dpu_kms, struct dentry *debugfs_root)
> +void dpu_debugfs_vbif_init(struct dpu_kms *dpu_kms, struct dentry *debugfs_root)
> {
> char vbif_name[32];
> struct dentry *debugfs_vbif;
> @@ -325,7 +320,7 @@ int dpu_debugfs_vbif_init(struct dpu_kms *dpu_kms, struct dentry *debugfs_root)
> dpu_kms->debugfs_vbif = debugfs_create_dir("vbif", debugfs_root);
> if (!dpu_kms->debugfs_vbif) {
> DPU_ERROR("failed to create vbif debugfs\n");
> - return -EINVAL;
> + return;
> }
>
> for (i = 0; i < dpu_kms->catalog->vbif_count; i++) {
> @@ -376,7 +371,5 @@ int dpu_debugfs_vbif_init(struct dpu_kms *dpu_kms, struct dentry *debugfs_root)
> (u32 *)&cfg->ot_limit);
> }
> }
> -
> - return 0;
> }
> #endif
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_vbif.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_vbif.h
> index f17af52dbbd5..6356876d7a66 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_vbif.h
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_vbif.h
> @@ -78,17 +78,6 @@ void dpu_vbif_clear_errors(struct dpu_kms *dpu_kms);
> */
> void dpu_vbif_init_memtypes(struct dpu_kms *dpu_kms);
>
> -#ifdef CONFIG_DEBUG_FS
> -int dpu_debugfs_vbif_init(struct dpu_kms *dpu_kms, struct dentry *debugfs_root);
> -void dpu_debugfs_vbif_destroy(struct dpu_kms *dpu_kms);
> -#else
> -static inline int dpu_debugfs_vbif_init(struct dpu_kms *dpu_kms,
> - struct dentry *debugfs_root)
> -{
> - return 0;
> -}
> -static inline void dpu_debugfs_vbif_destroy(struct dpu_kms *dpu_kms)
> -{
> -}
> -#endif
> +void dpu_debugfs_vbif_init(struct dpu_kms *dpu_kms, struct dentry *debugfs_root);
> +
> #endif /* __DPU_VBIF_H__ */
> --
> 2.18.0
>
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^ permalink raw reply [flat|nested] 29+ messages in thread
* Re: [PATCH 06/11] drm/msm/dpu: Cleanup callers of dpu_hw_blk_init
[not found] ` <20181105233103.7657-7-jcrouse-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
@ 2018-11-06 14:45 ` Sean Paul
0 siblings, 0 replies; 29+ messages in thread
From: Sean Paul @ 2018-11-06 14:45 UTC (permalink / raw)
To: Jordan Crouse
Cc: sam-uyr5N9Q2VtJg9hUCZPvPmw, linux-arm-msm-u79uwXL29TY76Z2rM5mHXA,
dri-devel-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW,
bzwang-F7+t8E8rja9g9hUCZPvPmw, seanpaul-F7+t8E8rja9g9hUCZPvPmw,
abhinavk-sgV2jX0FEOL9JmXXK+q4OQ,
freedreno-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW
On Mon, Nov 05, 2018 at 04:30:58PM -0700, Jordan Crouse wrote:
> Outside of superfluous parameter checks the dpu_hw_blk_init()
> doesn't have any failure paths. Switch it over to be a void
> function and we can remove error handling paths in all the functions
> that call it. While we're in those functions remove unneeded
> initialization for a static variable.
>
> v2: Removed a cleanup intended for a different patch
>
> Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
Reviewed-by: Sean Paul <sean@poorly.run>
> ---
> drivers/gpu/drm/msm/disp/dpu1/dpu_hw_blk.c | 10 +---------
> drivers/gpu/drm/msm/disp/dpu1/dpu_hw_blk.h | 2 +-
> drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c | 17 ++---------------
> drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.c | 17 ++---------------
> drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.c | 17 ++---------------
> drivers/gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.c | 17 ++---------------
> drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c | 17 ++---------------
> drivers/gpu/drm/msm/disp/dpu1/dpu_hw_top.c | 17 ++---------------
> 8 files changed, 14 insertions(+), 100 deletions(-)
>
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_blk.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_blk.c
> index 58d29e43faef..92f1c4241b9a 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_blk.c
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_blk.c
> @@ -30,16 +30,10 @@ static LIST_HEAD(dpu_hw_blk_list);
> * @type: hw block type - enum dpu_hw_blk_type
> * @id: instance id of the hw block
> * @ops: Pointer to block operations
> - * return: 0 if success; error code otherwise
> */
> -int dpu_hw_blk_init(struct dpu_hw_blk *hw_blk, u32 type, int id,
> +void dpu_hw_blk_init(struct dpu_hw_blk *hw_blk, u32 type, int id,
> struct dpu_hw_blk_ops *ops)
> {
> - if (!hw_blk) {
> - pr_err("invalid parameters\n");
> - return -EINVAL;
> - }
> -
> INIT_LIST_HEAD(&hw_blk->list);
> hw_blk->type = type;
> hw_blk->id = id;
> @@ -51,8 +45,6 @@ int dpu_hw_blk_init(struct dpu_hw_blk *hw_blk, u32 type, int id,
> mutex_lock(&dpu_hw_blk_lock);
> list_add(&hw_blk->list, &dpu_hw_blk_list);
> mutex_unlock(&dpu_hw_blk_lock);
> -
> - return 0;
> }
>
> /**
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_blk.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_blk.h
> index 0f4ca8af1ec5..1934c2f7e8fa 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_blk.h
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_blk.h
> @@ -44,7 +44,7 @@ struct dpu_hw_blk {
> struct dpu_hw_blk_ops ops;
> };
>
> -int dpu_hw_blk_init(struct dpu_hw_blk *hw_blk, u32 type, int id,
> +void dpu_hw_blk_init(struct dpu_hw_blk *hw_blk, u32 type, int id,
> struct dpu_hw_blk_ops *ops);
> void dpu_hw_blk_destroy(struct dpu_hw_blk *hw_blk);
>
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c
> index 4aab04335c6d..1068b4b7940f 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c
> @@ -483,10 +483,7 @@ static void _setup_ctl_ops(struct dpu_hw_ctl_ops *ops,
> ops->get_bitmask_intf = dpu_hw_ctl_get_bitmask_intf;
> };
>
> -static struct dpu_hw_blk_ops dpu_hw_ops = {
> - .start = NULL,
> - .stop = NULL,
> -};
> +static struct dpu_hw_blk_ops dpu_hw_ops;
>
> struct dpu_hw_ctl *dpu_hw_ctl_init(enum dpu_ctl idx,
> void __iomem *addr,
> @@ -494,7 +491,6 @@ struct dpu_hw_ctl *dpu_hw_ctl_init(enum dpu_ctl idx,
> {
> struct dpu_hw_ctl *c;
> struct dpu_ctl_cfg *cfg;
> - int rc;
>
> c = kzalloc(sizeof(*c), GFP_KERNEL);
> if (!c)
> @@ -513,18 +509,9 @@ struct dpu_hw_ctl *dpu_hw_ctl_init(enum dpu_ctl idx,
> c->mixer_count = m->mixer_count;
> c->mixer_hw_caps = m->mixer;
>
> - rc = dpu_hw_blk_init(&c->base, DPU_HW_BLK_CTL, idx, &dpu_hw_ops);
> - if (rc) {
> - DPU_ERROR("failed to init hw blk %d\n", rc);
> - goto blk_init_error;
> - }
> + dpu_hw_blk_init(&c->base, DPU_HW_BLK_CTL, idx, &dpu_hw_ops);
>
> return c;
> -
> -blk_init_error:
> - kzfree(c);
> -
> - return ERR_PTR(rc);
> }
>
> void dpu_hw_ctl_destroy(struct dpu_hw_ctl *ctx)
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.c
> index 695d27a730e8..f6a83daa385b 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.c
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.c
> @@ -264,10 +264,7 @@ static void _setup_intf_ops(struct dpu_hw_intf_ops *ops,
> ops->get_line_count = dpu_hw_intf_get_line_count;
> }
>
> -static struct dpu_hw_blk_ops dpu_hw_ops = {
> - .start = NULL,
> - .stop = NULL,
> -};
> +static struct dpu_hw_blk_ops dpu_hw_ops;
>
> struct dpu_hw_intf *dpu_hw_intf_init(enum dpu_intf idx,
> void __iomem *addr,
> @@ -275,7 +272,6 @@ struct dpu_hw_intf *dpu_hw_intf_init(enum dpu_intf idx,
> {
> struct dpu_hw_intf *c;
> struct dpu_intf_cfg *cfg;
> - int rc;
>
> c = kzalloc(sizeof(*c), GFP_KERNEL);
> if (!c)
> @@ -296,18 +292,9 @@ struct dpu_hw_intf *dpu_hw_intf_init(enum dpu_intf idx,
> c->mdss = m;
> _setup_intf_ops(&c->ops, c->cap->features);
>
> - rc = dpu_hw_blk_init(&c->base, DPU_HW_BLK_INTF, idx, &dpu_hw_ops);
> - if (rc) {
> - DPU_ERROR("failed to init hw blk %d\n", rc);
> - goto blk_init_error;
> - }
> + dpu_hw_blk_init(&c->base, DPU_HW_BLK_INTF, idx, &dpu_hw_ops);
>
> return c;
> -
> -blk_init_error:
> - kzfree(c);
> -
> - return ERR_PTR(rc);
> }
>
> void dpu_hw_intf_destroy(struct dpu_hw_intf *intf)
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.c
> index c76b5cc949fb..9f342af2aba7 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.c
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.c
> @@ -175,10 +175,7 @@ static void _setup_mixer_ops(struct dpu_mdss_cfg *m,
> ops->setup_gc = dpu_hw_lm_gc;
> };
>
> -static struct dpu_hw_blk_ops dpu_hw_ops = {
> - .start = NULL,
> - .stop = NULL,
> -};
> +static struct dpu_hw_blk_ops dpu_hw_ops;
>
> struct dpu_hw_mixer *dpu_hw_lm_init(enum dpu_lm idx,
> void __iomem *addr,
> @@ -186,7 +183,6 @@ struct dpu_hw_mixer *dpu_hw_lm_init(enum dpu_lm idx,
> {
> struct dpu_hw_mixer *c;
> struct dpu_lm_cfg *cfg;
> - int rc;
>
> c = kzalloc(sizeof(*c), GFP_KERNEL);
> if (!c)
> @@ -203,18 +199,9 @@ struct dpu_hw_mixer *dpu_hw_lm_init(enum dpu_lm idx,
> c->cap = cfg;
> _setup_mixer_ops(m, &c->ops, c->cap->features);
>
> - rc = dpu_hw_blk_init(&c->base, DPU_HW_BLK_LM, idx, &dpu_hw_ops);
> - if (rc) {
> - DPU_ERROR("failed to init hw blk %d\n", rc);
> - goto blk_init_error;
> - }
> + dpu_hw_blk_init(&c->base, DPU_HW_BLK_LM, idx, &dpu_hw_ops);
>
> return c;
> -
> -blk_init_error:
> - kzfree(c);
> -
> - return ERR_PTR(rc);
> }
>
> void dpu_hw_lm_destroy(struct dpu_hw_mixer *lm)
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.c
> index cfc93816078f..3bdf47ed1845 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.c
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.c
> @@ -199,10 +199,7 @@ static void _setup_pingpong_ops(struct dpu_hw_pingpong_ops *ops,
> ops->get_line_count = dpu_hw_pp_get_line_count;
> };
>
> -static struct dpu_hw_blk_ops dpu_hw_ops = {
> - .start = NULL,
> - .stop = NULL,
> -};
> +static struct dpu_hw_blk_ops dpu_hw_ops;
>
> struct dpu_hw_pingpong *dpu_hw_pingpong_init(enum dpu_pingpong idx,
> void __iomem *addr,
> @@ -210,7 +207,6 @@ struct dpu_hw_pingpong *dpu_hw_pingpong_init(enum dpu_pingpong idx,
> {
> struct dpu_hw_pingpong *c;
> struct dpu_pingpong_cfg *cfg;
> - int rc;
>
> c = kzalloc(sizeof(*c), GFP_KERNEL);
> if (!c)
> @@ -226,18 +222,9 @@ struct dpu_hw_pingpong *dpu_hw_pingpong_init(enum dpu_pingpong idx,
> c->caps = cfg;
> _setup_pingpong_ops(&c->ops, c->caps);
>
> - rc = dpu_hw_blk_init(&c->base, DPU_HW_BLK_PINGPONG, idx, &dpu_hw_ops);
> - if (rc) {
> - DPU_ERROR("failed to init hw blk %d\n", rc);
> - goto blk_init_error;
> - }
> + dpu_hw_blk_init(&c->base, DPU_HW_BLK_PINGPONG, idx, &dpu_hw_ops);
>
> return c;
> -
> -blk_init_error:
> - kzfree(c);
> -
> - return ERR_PTR(rc);
> }
>
> void dpu_hw_pingpong_destroy(struct dpu_hw_pingpong *pp)
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c
> index 8297963d2c4c..3ebdf292d8f2 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c
> @@ -696,10 +696,7 @@ static struct dpu_sspp_cfg *_sspp_offset(enum dpu_sspp sspp,
> return ERR_PTR(-ENOMEM);
> }
>
> -static struct dpu_hw_blk_ops dpu_hw_ops = {
> - .start = NULL,
> - .stop = NULL,
> -};
> +static struct dpu_hw_blk_ops dpu_hw_ops;
>
> struct dpu_hw_pipe *dpu_hw_sspp_init(enum dpu_sspp idx,
> void __iomem *addr, struct dpu_mdss_cfg *catalog,
> @@ -707,7 +704,6 @@ struct dpu_hw_pipe *dpu_hw_sspp_init(enum dpu_sspp idx,
> {
> struct dpu_hw_pipe *hw_pipe;
> struct dpu_sspp_cfg *cfg;
> - int rc;
>
> if (!addr || !catalog)
> return ERR_PTR(-EINVAL);
> @@ -729,18 +725,9 @@ struct dpu_hw_pipe *dpu_hw_sspp_init(enum dpu_sspp idx,
> hw_pipe->cap = cfg;
> _setup_layer_ops(hw_pipe, hw_pipe->cap->features);
>
> - rc = dpu_hw_blk_init(&hw_pipe->base, DPU_HW_BLK_SSPP, idx, &dpu_hw_ops);
> - if (rc) {
> - DPU_ERROR("failed to init hw blk %d\n", rc);
> - goto blk_init_error;
> - }
> + dpu_hw_blk_init(&hw_pipe->base, DPU_HW_BLK_SSPP, idx, &dpu_hw_ops);
>
> return hw_pipe;
> -
> -blk_init_error:
> - kzfree(hw_pipe);
> -
> - return ERR_PTR(rc);
> }
>
> void dpu_hw_sspp_destroy(struct dpu_hw_pipe *ctx)
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_top.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_top.c
> index f7e0f661a8bb..a041597bb849 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_top.c
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_top.c
> @@ -321,10 +321,7 @@ static const struct dpu_mdp_cfg *_top_offset(enum dpu_mdp mdp,
> return ERR_PTR(-EINVAL);
> }
>
> -static struct dpu_hw_blk_ops dpu_hw_ops = {
> - .start = NULL,
> - .stop = NULL,
> -};
> +static struct dpu_hw_blk_ops dpu_hw_ops;
>
> struct dpu_hw_mdp *dpu_hw_mdptop_init(enum dpu_mdp idx,
> void __iomem *addr,
> @@ -332,7 +329,6 @@ struct dpu_hw_mdp *dpu_hw_mdptop_init(enum dpu_mdp idx,
> {
> struct dpu_hw_mdp *mdp;
> const struct dpu_mdp_cfg *cfg;
> - int rc;
>
> if (!addr || !m)
> return ERR_PTR(-EINVAL);
> @@ -354,18 +350,9 @@ struct dpu_hw_mdp *dpu_hw_mdptop_init(enum dpu_mdp idx,
> mdp->caps = cfg;
> _setup_mdp_ops(&mdp->ops, mdp->caps->features);
>
> - rc = dpu_hw_blk_init(&mdp->base, DPU_HW_BLK_TOP, idx, &dpu_hw_ops);
> - if (rc) {
> - DPU_ERROR("failed to init hw blk %d\n", rc);
> - goto blk_init_error;
> - }
> + dpu_hw_blk_init(&mdp->base, DPU_HW_BLK_TOP, idx, &dpu_hw_ops);
>
> return mdp;
> -
> -blk_init_error:
> - kzfree(mdp);
> -
> - return ERR_PTR(rc);
> }
>
> void dpu_hw_mdp_destroy(struct dpu_hw_mdp *mdp)
> --
> 2.18.0
>
> _______________________________________________
> Freedreno mailing list
> Freedreno@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/freedreno
--
Sean Paul, Software Engineer, Google / Chromium OS
_______________________________________________
Freedreno mailing list
Freedreno@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/freedreno
^ permalink raw reply [flat|nested] 29+ messages in thread
* [PATCH 06/11] drm/msm/dpu: Cleanup callers of dpu_hw_blk_init
[not found] ` <20181105233103.7657-1-jcrouse-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
@ 2018-11-05 23:30 ` Jordan Crouse
[not found] ` <20181105233103.7657-7-jcrouse-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
0 siblings, 1 reply; 29+ messages in thread
From: Jordan Crouse @ 2018-11-05 23:30 UTC (permalink / raw)
To: freedreno-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW
Cc: linux-arm-msm-u79uwXL29TY76Z2rM5mHXA,
dri-devel-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW,
bzwang-F7+t8E8rja9g9hUCZPvPmw, seanpaul-F7+t8E8rja9g9hUCZPvPmw,
abhinavk-sgV2jX0FEOL9JmXXK+q4OQ, sam-uyr5N9Q2VtJg9hUCZPvPmw
Outside of superfluous parameter checks the dpu_hw_blk_init()
doesn't have any failure paths. Switch it over to be a void
function and we can remove error handling paths in all the functions
that call it. While we're in those functions remove unneeded
initialization for a static variable.
v2: Removed a cleanup intended for a different patch
Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
---
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_blk.c | 10 +---------
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_blk.h | 2 +-
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c | 17 ++---------------
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.c | 17 ++---------------
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.c | 17 ++---------------
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.c | 17 ++---------------
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c | 17 ++---------------
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_top.c | 17 ++---------------
8 files changed, 14 insertions(+), 100 deletions(-)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_blk.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_blk.c
index 58d29e43faef..92f1c4241b9a 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_blk.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_blk.c
@@ -30,16 +30,10 @@ static LIST_HEAD(dpu_hw_blk_list);
* @type: hw block type - enum dpu_hw_blk_type
* @id: instance id of the hw block
* @ops: Pointer to block operations
- * return: 0 if success; error code otherwise
*/
-int dpu_hw_blk_init(struct dpu_hw_blk *hw_blk, u32 type, int id,
+void dpu_hw_blk_init(struct dpu_hw_blk *hw_blk, u32 type, int id,
struct dpu_hw_blk_ops *ops)
{
- if (!hw_blk) {
- pr_err("invalid parameters\n");
- return -EINVAL;
- }
-
INIT_LIST_HEAD(&hw_blk->list);
hw_blk->type = type;
hw_blk->id = id;
@@ -51,8 +45,6 @@ int dpu_hw_blk_init(struct dpu_hw_blk *hw_blk, u32 type, int id,
mutex_lock(&dpu_hw_blk_lock);
list_add(&hw_blk->list, &dpu_hw_blk_list);
mutex_unlock(&dpu_hw_blk_lock);
-
- return 0;
}
/**
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_blk.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_blk.h
index 0f4ca8af1ec5..1934c2f7e8fa 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_blk.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_blk.h
@@ -44,7 +44,7 @@ struct dpu_hw_blk {
struct dpu_hw_blk_ops ops;
};
-int dpu_hw_blk_init(struct dpu_hw_blk *hw_blk, u32 type, int id,
+void dpu_hw_blk_init(struct dpu_hw_blk *hw_blk, u32 type, int id,
struct dpu_hw_blk_ops *ops);
void dpu_hw_blk_destroy(struct dpu_hw_blk *hw_blk);
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c
index 4aab04335c6d..1068b4b7940f 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c
@@ -483,10 +483,7 @@ static void _setup_ctl_ops(struct dpu_hw_ctl_ops *ops,
ops->get_bitmask_intf = dpu_hw_ctl_get_bitmask_intf;
};
-static struct dpu_hw_blk_ops dpu_hw_ops = {
- .start = NULL,
- .stop = NULL,
-};
+static struct dpu_hw_blk_ops dpu_hw_ops;
struct dpu_hw_ctl *dpu_hw_ctl_init(enum dpu_ctl idx,
void __iomem *addr,
@@ -494,7 +491,6 @@ struct dpu_hw_ctl *dpu_hw_ctl_init(enum dpu_ctl idx,
{
struct dpu_hw_ctl *c;
struct dpu_ctl_cfg *cfg;
- int rc;
c = kzalloc(sizeof(*c), GFP_KERNEL);
if (!c)
@@ -513,18 +509,9 @@ struct dpu_hw_ctl *dpu_hw_ctl_init(enum dpu_ctl idx,
c->mixer_count = m->mixer_count;
c->mixer_hw_caps = m->mixer;
- rc = dpu_hw_blk_init(&c->base, DPU_HW_BLK_CTL, idx, &dpu_hw_ops);
- if (rc) {
- DPU_ERROR("failed to init hw blk %d\n", rc);
- goto blk_init_error;
- }
+ dpu_hw_blk_init(&c->base, DPU_HW_BLK_CTL, idx, &dpu_hw_ops);
return c;
-
-blk_init_error:
- kzfree(c);
-
- return ERR_PTR(rc);
}
void dpu_hw_ctl_destroy(struct dpu_hw_ctl *ctx)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.c
index 695d27a730e8..f6a83daa385b 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.c
@@ -264,10 +264,7 @@ static void _setup_intf_ops(struct dpu_hw_intf_ops *ops,
ops->get_line_count = dpu_hw_intf_get_line_count;
}
-static struct dpu_hw_blk_ops dpu_hw_ops = {
- .start = NULL,
- .stop = NULL,
-};
+static struct dpu_hw_blk_ops dpu_hw_ops;
struct dpu_hw_intf *dpu_hw_intf_init(enum dpu_intf idx,
void __iomem *addr,
@@ -275,7 +272,6 @@ struct dpu_hw_intf *dpu_hw_intf_init(enum dpu_intf idx,
{
struct dpu_hw_intf *c;
struct dpu_intf_cfg *cfg;
- int rc;
c = kzalloc(sizeof(*c), GFP_KERNEL);
if (!c)
@@ -296,18 +292,9 @@ struct dpu_hw_intf *dpu_hw_intf_init(enum dpu_intf idx,
c->mdss = m;
_setup_intf_ops(&c->ops, c->cap->features);
- rc = dpu_hw_blk_init(&c->base, DPU_HW_BLK_INTF, idx, &dpu_hw_ops);
- if (rc) {
- DPU_ERROR("failed to init hw blk %d\n", rc);
- goto blk_init_error;
- }
+ dpu_hw_blk_init(&c->base, DPU_HW_BLK_INTF, idx, &dpu_hw_ops);
return c;
-
-blk_init_error:
- kzfree(c);
-
- return ERR_PTR(rc);
}
void dpu_hw_intf_destroy(struct dpu_hw_intf *intf)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.c
index c76b5cc949fb..9f342af2aba7 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.c
@@ -175,10 +175,7 @@ static void _setup_mixer_ops(struct dpu_mdss_cfg *m,
ops->setup_gc = dpu_hw_lm_gc;
};
-static struct dpu_hw_blk_ops dpu_hw_ops = {
- .start = NULL,
- .stop = NULL,
-};
+static struct dpu_hw_blk_ops dpu_hw_ops;
struct dpu_hw_mixer *dpu_hw_lm_init(enum dpu_lm idx,
void __iomem *addr,
@@ -186,7 +183,6 @@ struct dpu_hw_mixer *dpu_hw_lm_init(enum dpu_lm idx,
{
struct dpu_hw_mixer *c;
struct dpu_lm_cfg *cfg;
- int rc;
c = kzalloc(sizeof(*c), GFP_KERNEL);
if (!c)
@@ -203,18 +199,9 @@ struct dpu_hw_mixer *dpu_hw_lm_init(enum dpu_lm idx,
c->cap = cfg;
_setup_mixer_ops(m, &c->ops, c->cap->features);
- rc = dpu_hw_blk_init(&c->base, DPU_HW_BLK_LM, idx, &dpu_hw_ops);
- if (rc) {
- DPU_ERROR("failed to init hw blk %d\n", rc);
- goto blk_init_error;
- }
+ dpu_hw_blk_init(&c->base, DPU_HW_BLK_LM, idx, &dpu_hw_ops);
return c;
-
-blk_init_error:
- kzfree(c);
-
- return ERR_PTR(rc);
}
void dpu_hw_lm_destroy(struct dpu_hw_mixer *lm)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.c
index cfc93816078f..3bdf47ed1845 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.c
@@ -199,10 +199,7 @@ static void _setup_pingpong_ops(struct dpu_hw_pingpong_ops *ops,
ops->get_line_count = dpu_hw_pp_get_line_count;
};
-static struct dpu_hw_blk_ops dpu_hw_ops = {
- .start = NULL,
- .stop = NULL,
-};
+static struct dpu_hw_blk_ops dpu_hw_ops;
struct dpu_hw_pingpong *dpu_hw_pingpong_init(enum dpu_pingpong idx,
void __iomem *addr,
@@ -210,7 +207,6 @@ struct dpu_hw_pingpong *dpu_hw_pingpong_init(enum dpu_pingpong idx,
{
struct dpu_hw_pingpong *c;
struct dpu_pingpong_cfg *cfg;
- int rc;
c = kzalloc(sizeof(*c), GFP_KERNEL);
if (!c)
@@ -226,18 +222,9 @@ struct dpu_hw_pingpong *dpu_hw_pingpong_init(enum dpu_pingpong idx,
c->caps = cfg;
_setup_pingpong_ops(&c->ops, c->caps);
- rc = dpu_hw_blk_init(&c->base, DPU_HW_BLK_PINGPONG, idx, &dpu_hw_ops);
- if (rc) {
- DPU_ERROR("failed to init hw blk %d\n", rc);
- goto blk_init_error;
- }
+ dpu_hw_blk_init(&c->base, DPU_HW_BLK_PINGPONG, idx, &dpu_hw_ops);
return c;
-
-blk_init_error:
- kzfree(c);
-
- return ERR_PTR(rc);
}
void dpu_hw_pingpong_destroy(struct dpu_hw_pingpong *pp)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c
index 8297963d2c4c..3ebdf292d8f2 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c
@@ -696,10 +696,7 @@ static struct dpu_sspp_cfg *_sspp_offset(enum dpu_sspp sspp,
return ERR_PTR(-ENOMEM);
}
-static struct dpu_hw_blk_ops dpu_hw_ops = {
- .start = NULL,
- .stop = NULL,
-};
+static struct dpu_hw_blk_ops dpu_hw_ops;
struct dpu_hw_pipe *dpu_hw_sspp_init(enum dpu_sspp idx,
void __iomem *addr, struct dpu_mdss_cfg *catalog,
@@ -707,7 +704,6 @@ struct dpu_hw_pipe *dpu_hw_sspp_init(enum dpu_sspp idx,
{
struct dpu_hw_pipe *hw_pipe;
struct dpu_sspp_cfg *cfg;
- int rc;
if (!addr || !catalog)
return ERR_PTR(-EINVAL);
@@ -729,18 +725,9 @@ struct dpu_hw_pipe *dpu_hw_sspp_init(enum dpu_sspp idx,
hw_pipe->cap = cfg;
_setup_layer_ops(hw_pipe, hw_pipe->cap->features);
- rc = dpu_hw_blk_init(&hw_pipe->base, DPU_HW_BLK_SSPP, idx, &dpu_hw_ops);
- if (rc) {
- DPU_ERROR("failed to init hw blk %d\n", rc);
- goto blk_init_error;
- }
+ dpu_hw_blk_init(&hw_pipe->base, DPU_HW_BLK_SSPP, idx, &dpu_hw_ops);
return hw_pipe;
-
-blk_init_error:
- kzfree(hw_pipe);
-
- return ERR_PTR(rc);
}
void dpu_hw_sspp_destroy(struct dpu_hw_pipe *ctx)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_top.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_top.c
index f7e0f661a8bb..a041597bb849 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_top.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_top.c
@@ -321,10 +321,7 @@ static const struct dpu_mdp_cfg *_top_offset(enum dpu_mdp mdp,
return ERR_PTR(-EINVAL);
}
-static struct dpu_hw_blk_ops dpu_hw_ops = {
- .start = NULL,
- .stop = NULL,
-};
+static struct dpu_hw_blk_ops dpu_hw_ops;
struct dpu_hw_mdp *dpu_hw_mdptop_init(enum dpu_mdp idx,
void __iomem *addr,
@@ -332,7 +329,6 @@ struct dpu_hw_mdp *dpu_hw_mdptop_init(enum dpu_mdp idx,
{
struct dpu_hw_mdp *mdp;
const struct dpu_mdp_cfg *cfg;
- int rc;
if (!addr || !m)
return ERR_PTR(-EINVAL);
@@ -354,18 +350,9 @@ struct dpu_hw_mdp *dpu_hw_mdptop_init(enum dpu_mdp idx,
mdp->caps = cfg;
_setup_mdp_ops(&mdp->ops, mdp->caps->features);
- rc = dpu_hw_blk_init(&mdp->base, DPU_HW_BLK_TOP, idx, &dpu_hw_ops);
- if (rc) {
- DPU_ERROR("failed to init hw blk %d\n", rc);
- goto blk_init_error;
- }
+ dpu_hw_blk_init(&mdp->base, DPU_HW_BLK_TOP, idx, &dpu_hw_ops);
return mdp;
-
-blk_init_error:
- kzfree(mdp);
-
- return ERR_PTR(rc);
}
void dpu_hw_mdp_destroy(struct dpu_hw_mdp *mdp)
--
2.18.0
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^ permalink raw reply related [flat|nested] 29+ messages in thread
end of thread, other threads:[~2018-11-06 14:45 UTC | newest]
Thread overview: 29+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2018-10-18 19:58 [PATCH 00/11] DPU cleanups Jordan Crouse
[not found] ` <20181018195836.15885-1-jcrouse-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2018-10-18 19:58 ` [PATCH 01/11] drm/msm/dpu: Remove dpu_dbg Jordan Crouse
[not found] ` <20181018195836.15885-2-jcrouse-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2018-10-19 17:34 ` Bruce Wang
2018-10-19 18:11 ` Bruce Wang
[not found] ` <CAA3FfWU-KB=VCmrkriO8M1zdPg9FGO_bii7qjbzGXupapJFF9A-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2018-10-19 19:59 ` Jordan Crouse
2018-10-18 19:58 ` [PATCH 02/11] drm/msm/dpu: Use DEFINE_SHOW_ATTRIBUTE Jordan Crouse
[not found] ` <20181018195836.15885-3-jcrouse-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2018-10-18 21:43 ` Bruce Wang
2018-10-18 19:58 ` [PATCH 03/11] drm/msm/dpu: Remove dpu_crtc_get_mixer_height Jordan Crouse
[not found] ` <20181018195836.15885-4-jcrouse-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2018-10-18 21:44 ` Bruce Wang
2018-10-18 19:58 ` [PATCH 04/11] drm/msm/dpu: Remove dpu_crtc_is_enabled() Jordan Crouse
[not found] ` <20181018195836.15885-5-jcrouse-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2018-10-18 21:45 ` Bruce Wang
2018-10-18 19:58 ` [PATCH 05/11] drm/msm/dpu: Cleanup some container_of helper functions Jordan Crouse
2018-10-18 21:49 ` Sam Ravnborg
2018-10-18 19:58 ` [PATCH 06/11] drm/msm/dpu: Cleanup callers of dpu_hw_blk_init Jordan Crouse
2018-10-18 21:53 ` Sam Ravnborg
[not found] ` <20181018215359.GA5328-uyr5N9Q2VtJg9hUCZPvPmw@public.gmane.org>
2018-10-19 17:13 ` Jordan Crouse
2018-10-18 19:58 ` [PATCH 07/11] drm/msm: Make irq_postinstall optional Jordan Crouse
[not found] ` <20181018195836.15885-8-jcrouse-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2018-10-19 13:56 ` Bruce Wang
2018-10-18 19:58 ` [PATCH 08/11] drm/msm/dpu: Remove dpu_irq and unused functions Jordan Crouse
[not found] ` <20181018195836.15885-9-jcrouse-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2018-10-19 14:56 ` Bruce Wang
2018-10-18 19:58 ` [PATCH 09/11] drm/msm/dpu: Debugfs related cleanups Jordan Crouse
[not found] ` <20181018195836.15885-10-jcrouse-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2018-10-22 15:45 ` Bruce Wang
2018-10-18 19:58 ` [PATCH 10/11] drm/msm/dpu: Further cleanups for static inline functions Jordan Crouse
2018-10-18 22:06 ` Sam Ravnborg
[not found] ` <20181018220620.GB5328-uyr5N9Q2VtJg9hUCZPvPmw@public.gmane.org>
2018-10-19 17:09 ` Jordan Crouse
2018-10-18 19:58 ` [PATCH 11/11] drm/msm/dpu: Clean up dpu_media_info.h " Jordan Crouse
[not found] ` <20181018195836.15885-12-jcrouse-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2018-10-19 15:10 ` Bruce Wang
2018-11-05 23:30 [PATCH v2 00/11] DPU cleanups Jordan Crouse
[not found] ` <20181105233103.7657-1-jcrouse-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2018-11-05 23:30 ` [PATCH 06/11] drm/msm/dpu: Cleanup callers of dpu_hw_blk_init Jordan Crouse
[not found] ` <20181105233103.7657-7-jcrouse-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2018-11-06 14:45 ` Sean Paul
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