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From: Thierry Reding <thierry.reding@gmail.com>
To: Thierry Reding <thierry.reding@gmail.com>,
	Jassi Brar <jassisinghbrar@gmail.com>,
	Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Cc: Jiri Slaby <jslaby@suse.com>,
	Mikko Perttunen <mperttunen@nvidia.com>,
	Jon Hunter <jonathanh@nvidia.com>, Timo Alho <talho@nvidia.com>,
	Pekka Pessi <ppessi@nvidia.com>,
	Mika Liljeberg <mliljeberg@nvidia.com>,
	linux-tegra@vger.kernel.org, linux-serial@vger.kernel.org,
	devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org
Subject: [PATCH 8/9] arm64: tegra: Add nodes for TCU on Tegra194
Date: Fri, 26 Oct 2018 13:16:37 +0200	[thread overview]
Message-ID: <20181026111638.10759-9-thierry.reding@gmail.com> (raw)
In-Reply-To: <20181026111638.10759-1-thierry.reding@gmail.com>

From: Mikko Perttunen <mperttunen@nvidia.com>

Add nodes required for communication through the Tegra Combined UART.
This includes the AON HSP instance, addition of shared interrupts
for the TOP0 HSP instance, and finally the TCU node itself. Also
mark the HSP instances as compatible to tegra194-hsp, as the hardware
is not identical but is compatible to tegra186-hsp.

Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
Acked-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
---
 arch/arm64/boot/dts/nvidia/tegra194.dtsi | 38 ++++++++++++++++++++++--
 1 file changed, 35 insertions(+), 3 deletions(-)

diff --git a/arch/arm64/boot/dts/nvidia/tegra194.dtsi b/arch/arm64/boot/dts/nvidia/tegra194.dtsi
index c2091bb16546..521d13be0457 100644
--- a/arch/arm64/boot/dts/nvidia/tegra194.dtsi
+++ b/arch/arm64/boot/dts/nvidia/tegra194.dtsi
@@ -340,10 +340,35 @@
 		};
 
 		hsp_top0: hsp@3c00000 {
-			compatible = "nvidia,tegra186-hsp";
+			compatible = "nvidia,tegra194-hsp", "nvidia,tegra186-hsp";
 			reg = <0x03c00000 0xa0000>;
-			interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>;
-			interrupt-names = "doorbell";
+			interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>,
+			             <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
+			             <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
+			             <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
+			             <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
+			             <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
+			             <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
+			             <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
+			             <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
+			interrupt-names = "doorbell", "shared0", "shared1", "shared2",
+			                  "shared3", "shared4", "shared5", "shared6",
+			                  "shared7";
+			#mbox-cells = <2>;
+		};
+
+		hsp_aon: hsp@c150000 {
+			compatible = "nvidia,tegra194-hsp", "nvidia,tegra186-hsp";
+			reg = <0x0c150000 0xa0000>;
+			interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>,
+			             <GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>,
+			             <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>,
+			             <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>;
+			/*
+			 * Shared interrupt 0 is routed only to AON/SPE, so
+			 * we only have 4 shared interrupts for the CCPLEX.
+			 */
+			interrupt-names = "shared1", "shared2", "shared3", "shared4";
 			#mbox-cells = <2>;
 		};
 
@@ -531,6 +556,13 @@
 		method = "smc";
 	};
 
+	tcu: tcu {
+		compatible = "nvidia,tegra194-tcu";
+		mboxes = <&hsp_top0 TEGRA_HSP_MBOX_TYPE_SM 0>,
+		         <&hsp_aon TEGRA_HSP_MBOX_TYPE_SM 1>;
+		mbox-names = "rx", "tx";
+	};
+
 	timer {
 		compatible = "arm,armv8-timer";
 		interrupts = <GIC_PPI 13
-- 
2.19.1

WARNING: multiple messages have this Message-ID (diff)
From: thierry.reding@gmail.com (Thierry Reding)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 8/9] arm64: tegra: Add nodes for TCU on Tegra194
Date: Fri, 26 Oct 2018 13:16:37 +0200	[thread overview]
Message-ID: <20181026111638.10759-9-thierry.reding@gmail.com> (raw)
In-Reply-To: <20181026111638.10759-1-thierry.reding@gmail.com>

From: Mikko Perttunen <mperttunen@nvidia.com>

Add nodes required for communication through the Tegra Combined UART.
This includes the AON HSP instance, addition of shared interrupts
for the TOP0 HSP instance, and finally the TCU node itself. Also
mark the HSP instances as compatible to tegra194-hsp, as the hardware
is not identical but is compatible to tegra186-hsp.

Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
Acked-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
---
 arch/arm64/boot/dts/nvidia/tegra194.dtsi | 38 ++++++++++++++++++++++--
 1 file changed, 35 insertions(+), 3 deletions(-)

diff --git a/arch/arm64/boot/dts/nvidia/tegra194.dtsi b/arch/arm64/boot/dts/nvidia/tegra194.dtsi
index c2091bb16546..521d13be0457 100644
--- a/arch/arm64/boot/dts/nvidia/tegra194.dtsi
+++ b/arch/arm64/boot/dts/nvidia/tegra194.dtsi
@@ -340,10 +340,35 @@
 		};
 
 		hsp_top0: hsp at 3c00000 {
-			compatible = "nvidia,tegra186-hsp";
+			compatible = "nvidia,tegra194-hsp", "nvidia,tegra186-hsp";
 			reg = <0x03c00000 0xa0000>;
-			interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>;
-			interrupt-names = "doorbell";
+			interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>,
+			             <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
+			             <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
+			             <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
+			             <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
+			             <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
+			             <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
+			             <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
+			             <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
+			interrupt-names = "doorbell", "shared0", "shared1", "shared2",
+			                  "shared3", "shared4", "shared5", "shared6",
+			                  "shared7";
+			#mbox-cells = <2>;
+		};
+
+		hsp_aon: hsp at c150000 {
+			compatible = "nvidia,tegra194-hsp", "nvidia,tegra186-hsp";
+			reg = <0x0c150000 0xa0000>;
+			interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>,
+			             <GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>,
+			             <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>,
+			             <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>;
+			/*
+			 * Shared interrupt 0 is routed only to AON/SPE, so
+			 * we only have 4 shared interrupts for the CCPLEX.
+			 */
+			interrupt-names = "shared1", "shared2", "shared3", "shared4";
 			#mbox-cells = <2>;
 		};
 
@@ -531,6 +556,13 @@
 		method = "smc";
 	};
 
+	tcu: tcu {
+		compatible = "nvidia,tegra194-tcu";
+		mboxes = <&hsp_top0 TEGRA_HSP_MBOX_TYPE_SM 0>,
+		         <&hsp_aon TEGRA_HSP_MBOX_TYPE_SM 1>;
+		mbox-names = "rx", "tx";
+	};
+
 	timer {
 		compatible = "arm,armv8-timer";
 		interrupts = <GIC_PPI 13
-- 
2.19.1

  parent reply	other threads:[~2018-10-26 11:16 UTC|newest]

Thread overview: 44+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-10-26 11:16 [PATCH 0/9] serial: Add Tegra Combined UART driver Thierry Reding
2018-10-26 11:16 ` Thierry Reding
2018-10-26 11:16 ` [PATCH 1/9] mailbox: Support blocking transfers in atomic context Thierry Reding
2018-10-26 11:16   ` Thierry Reding
2018-10-26 11:16 ` [PATCH 2/9] mailbox: Allow multiple controllers per device Thierry Reding
2018-10-26 11:16   ` Thierry Reding
2018-10-26 11:16 ` [PATCH 3/9] dt-bindings: tegra186-hsp: Add shared interrupts Thierry Reding
2018-10-26 11:16   ` Thierry Reding
2018-10-26 11:16 ` [PATCH 4/9] mailbox: tegra-hsp: Add support for shared mailboxes Thierry Reding
2018-10-26 11:16   ` Thierry Reding
2018-10-29 10:04   ` Pekka Pessi
2018-10-29 10:04     ` Pekka Pessi
2018-10-29 10:04     ` Pekka Pessi
2018-10-29 10:39     ` Thierry Reding
2018-10-29 10:39       ` Thierry Reding
2018-10-29 12:25       ` Pekka Pessi
2018-10-29 12:25         ` Pekka Pessi
2018-10-29 12:25         ` Pekka Pessi
2018-10-29 13:16         ` Thierry Reding
2018-10-29 13:16           ` Thierry Reding
2018-10-30 16:15           ` Pekka Pessi
2018-10-30 16:15             ` Pekka Pessi
2018-10-30 16:15             ` Pekka Pessi
2018-10-26 11:16 ` [PATCH 5/9] mailbox: tegra-hsp: Add suspend/resume support Thierry Reding
2018-10-26 11:16   ` Thierry Reding
2018-10-26 11:16 ` [PATCH 6/9] dt-bindings: serial: Add bindings for nvidia,tegra194-tcu Thierry Reding
2018-10-26 11:16   ` [PATCH 6/9] dt-bindings: serial: Add bindings for nvidia, tegra194-tcu Thierry Reding
2018-10-26 11:16 ` [PATCH 7/9] serial: Add Tegra Combined UART driver Thierry Reding
2018-10-26 11:16   ` Thierry Reding
2018-11-09 17:05   ` Greg Kroah-Hartman
2018-11-09 17:05     ` Greg Kroah-Hartman
2018-11-12 15:30     ` Thierry Reding
2018-11-12 15:30       ` Thierry Reding
2018-11-12 18:03       ` Greg Kroah-Hartman
2018-11-12 18:03         ` Greg Kroah-Hartman
2018-10-26 11:16 ` Thierry Reding [this message]
2018-10-26 11:16   ` [PATCH 8/9] arm64: tegra: Add nodes for TCU on Tegra194 Thierry Reding
2018-10-26 11:16 ` [PATCH 9/9] arm64: tegra: Mark TCU as primary serial port on Tegra194 P2888 Thierry Reding
2018-10-26 11:16   ` Thierry Reding
2018-10-29  9:04 ` [PATCH 0/9] serial: Add Tegra Combined UART driver Pekka Pessi
2018-10-29  9:04   ` Pekka Pessi
2018-10-29  9:04   ` Pekka Pessi
2018-10-29 10:11   ` Thierry Reding
2018-10-29 10:11     ` Thierry Reding

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