All of lore.kernel.org
 help / color / mirror / Atom feed
From: Rajesh Bhagat <rajesh.bhagat@nxp.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH v5 14/27] armv8: fsl-layerscape: Update parsing boot source
Date: Sat, 27 Oct 2018 13:15:49 +0000	[thread overview]
Message-ID: <20181027131428.5246-15-rajesh.bhagat@nxp.com> (raw)
In-Reply-To: <20181027131428.5246-1-rajesh.bhagat@nxp.com>

From: York Sun <york.sun@nxp.com>

Workaround of erratum A010539 clears the RCW source field in PORSR1
register, causing failure of detecting boot source using this method.
Use SMC call if U-Boot runs at EL2. If SMC is not implemented or
running at EL3, continue to read PORSR1 and presume QSPI as boot
source if erratum workaround A010539 is enabled and RCW source is
cleared.

Signed-off-by: York Sun <york.sun@nxp.com>
---
Change in v5: None
Change in v4: None
Change in v3: None
Change in v2: None

 arch/arm/cpu/armv8/fsl-layerscape/cpu.c       | 26 ++++++++++++++++---
 .../arm/include/asm/arch-fsl-layerscape/soc.h |  1 +
 2 files changed, 23 insertions(+), 4 deletions(-)

diff --git a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
index 084208fa9e..af1284a28b 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
@@ -693,23 +693,41 @@ enum boot_src __get_boot_src(u32 porsr1)
 		}
 	}
 #endif
+
+	if (CONFIG_IS_ENABLED(SYS_FSL_ERRATUM_A010539) && !rcw_src)
+		src = BOOT_SOURCE_QSPI_NOR;
+
 	debug("%s: src 0x%x\n", __func__, src);
 	return src;
 }
 
 enum boot_src get_boot_src(void)
 {
-	u32 porsr1;
+	struct pt_regs regs;
+	u32 porsr1 = 0;
 
 #if defined(CONFIG_FSL_LSCH3)
 	u32 __iomem *dcfg_ccsr = (u32 __iomem *)DCFG_BASE;
-
-	porsr1 = in_le32(dcfg_ccsr + DCFG_PORSR1 / 4);
 #elif defined(CONFIG_FSL_LSCH2)
 	struct ccsr_gur __iomem *gur = (void *)(CONFIG_SYS_FSL_GUTS_ADDR);
+#endif
+
+	if (current_el() == 2) {
+		regs.regs[0] = SIP_SVC_RCW;
 
-	porsr1 = in_be32(&gur->porsr1);
+		smc_call(&regs);
+		if (!regs.regs[0])
+			porsr1 = regs.regs[1];
+	}
+
+	if (current_el() == 3 || !porsr1) {
+#ifdef CONFIG_FSL_LSCH3
+		porsr1 = in_le32(dcfg_ccsr + DCFG_PORSR1 / 4);
+#elif defined(CONFIG_FSL_LSCH2)
+		porsr1 = in_be32(&gur->porsr1);
 #endif
+	}
+
 	debug("%s: porsr1 0x%x\n", __func__, porsr1);
 
 	return __get_boot_src(porsr1);
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/soc.h b/arch/arm/include/asm/arch-fsl-layerscape/soc.h
index ef228b6443..daa1c70b3a 100644
--- a/arch/arm/include/asm/arch-fsl-layerscape/soc.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/soc.h
@@ -56,6 +56,7 @@ struct cpu_type {
 
 #ifdef CONFIG_TFABOOT
 #define SMC_DRAM_BANK_INFO (0xC200FF12)
+#define SIP_SVC_RCW	0xC200FF18
 
 phys_size_t tfa_get_dram_size(void);
 
-- 
2.17.1

  parent reply	other threads:[~2018-10-27 13:15 UTC|newest]

Thread overview: 28+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-10-27 13:15 [U-Boot] [PATCH v5 00/27] TF-A Boot support for NXP Chassis 2 platforms Rajesh Bhagat
2018-10-27 13:15 ` [U-Boot] [PATCH v5 01/27] move data structure out of cpu.h Rajesh Bhagat
2018-10-27 13:15 ` [U-Boot] [PATCH v5 02/27] env: allow flash and nand env driver to compile together Rajesh Bhagat
2018-10-27 13:15 ` [U-Boot] [PATCH v5 03/27] env: sf: define API to override sf environment address Rajesh Bhagat
2018-10-27 13:15 ` [U-Boot] [PATCH v5 04/27] driver/ifc: replace __ilog2 with LOG2 macro Rajesh Bhagat
2018-10-27 13:15 ` [U-Boot] [PATCH v5 05/27] armv8: layerscape: Enable routing SError exception Rajesh Bhagat
2018-10-27 13:15 ` [U-Boot] [PATCH v5 06/27] armv8: fsl-layerscape: change tlb base from OCRAM to DDR in EL < 3 Rajesh Bhagat
2018-10-27 13:15 ` [U-Boot] [PATCH v5 07/27] drivers: ifc: dynamic chipselect mapping support Rajesh Bhagat
2018-10-27 13:15 ` [U-Boot] [PATCH v5 08/27] armv8: layerscape: Add TFABOOT support Rajesh Bhagat
2018-10-27 13:15 ` [U-Boot] [PATCH v5 09/27] armv8: fsl-layerscape: identify boot source from PORSR register Rajesh Bhagat
2018-10-27 13:15 ` [U-Boot] [PATCH v5 10/27] armv8: layerscape: remove EL3 specific erratas for TFABOOT Rajesh Bhagat
2018-10-27 13:15 ` [U-Boot] [PATCH v5 11/27] armv8: fsl-layerscape: bootcmd identification " Rajesh Bhagat
2018-10-27 13:15 ` [U-Boot] [PATCH v5 12/27] armv8: layerscape: add SMC calls for DDR size and bank info Rajesh Bhagat
2018-10-27 13:15 ` [U-Boot] [PATCH v5 13/27] armv8: layerscape: skip OCRAM init for TFABOOT Rajesh Bhagat
2018-10-27 13:15 ` Rajesh Bhagat [this message]
2018-10-27 13:15 ` [U-Boot] [PATCH v5 15/27] armv8: sec_firmware: change el2_to_aarch32 SMC ID Rajesh Bhagat
2018-10-27 13:15 ` [U-Boot] [PATCH v5 16/27] armv8: sec_firmware: return job ring status as true in TFABOOT Rajesh Bhagat
2018-10-27 13:15 ` [U-Boot] [PATCH v5 17/27] net: fm: add TFABOOT support Rajesh Bhagat
2018-10-27 13:16 ` [U-Boot] [PATCH v5 18/27] drivers: qe: " Rajesh Bhagat
2018-10-27 13:16 ` [U-Boot] [PATCH v5 19/27] armv8: fsl-layerscape: add support of MC framework for TFA Rajesh Bhagat
2018-10-27 13:16 ` [U-Boot] [PATCH v5 20/27] armv8: ls1046ardb: Add TFABOOT support Rajesh Bhagat
2018-10-27 13:16 ` [U-Boot] [PATCH v5 21/27] armv8: ls1046aqds: " Rajesh Bhagat
2018-10-27 13:16 ` [U-Boot] [PATCH v5 22/27] armv8: ls1043ardb: " Rajesh Bhagat
2018-10-27 13:16 ` [U-Boot] [PATCH v5 23/27] armv8: ls1043aqds: " Rajesh Bhagat
2018-10-27 13:16 ` [U-Boot] [PATCH v5 24/27] armv8: ls1012ardb: " Rajesh Bhagat
2018-10-27 13:16 ` [U-Boot] [PATCH v5 25/27] armv8: ls1012aqds: fix secure boot compilation Rajesh Bhagat
2018-10-27 13:16 ` [U-Boot] [PATCH v5 26/27] armv8: ls1012aqds: Add TFABOOT support Rajesh Bhagat
2018-10-27 13:16 ` [U-Boot] [PATCH v5 27/27] armv8: ls1012afrx: " Rajesh Bhagat

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20181027131428.5246-15-rajesh.bhagat@nxp.com \
    --to=rajesh.bhagat@nxp.com \
    --cc=u-boot@lists.denx.de \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body. 
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.