From: Rajesh Bhagat <rajesh.bhagat@nxp.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH v5 07/27] drivers: ifc: dynamic chipselect mapping support
Date: Sat, 27 Oct 2018 13:15:26 +0000 [thread overview]
Message-ID: <20181027131428.5246-8-rajesh.bhagat@nxp.com> (raw)
In-Reply-To: <20181027131428.5246-1-rajesh.bhagat@nxp.com>
From: Pankit Garg <pankit.garg@nxp.com>
IFC driver changes to implement the chipselect mappings at run time.
Defines init_early_memctl_regs and init_final_memctl_regs with
chipselect dynamic mapping for nor and nand boot.
Signed-off-by: Pankit Garg <pankit.garg@nxp.com>
Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
---
Change in v5: None
Change in v4: None
Change in v3: None
Change in v2: None
drivers/misc/fsl_ifc.c | 488 +++++++++++++++++++++++++++++------------
include/fsl_ifc.h | 17 ++
2 files changed, 369 insertions(+), 136 deletions(-)
diff --git a/drivers/misc/fsl_ifc.c b/drivers/misc/fsl_ifc.c
index 7d66c3cf76..444cbaef6e 100644
--- a/drivers/misc/fsl_ifc.c
+++ b/drivers/misc/fsl_ifc.c
@@ -7,185 +7,401 @@
#include <common.h>
#include <fsl_ifc.h>
-void print_ifc_regs(void)
-{
- int i, j;
-
- printf("IFC Controller Registers\n");
- for (i = 0; i < CONFIG_SYS_FSL_IFC_BANK_COUNT; i++) {
- printf("CSPR%d:0x%08X\tAMASK%d:0x%08X\tCSOR%d:0x%08X\n",
- i, get_ifc_cspr(i), i, get_ifc_amask(i),
- i, get_ifc_csor(i));
- for (j = 0; j < 4; j++)
- printf("IFC_FTIM%d:0x%08X\n", j, get_ifc_ftim(i, j));
- }
-}
-
-void init_early_memctl_regs(void)
-{
+struct ifc_regs ifc_cfg_default_boot[CONFIG_SYS_FSL_IFC_BANK_COUNT] = {
+ {
+ "cs0",
#if defined(CONFIG_SYS_CSPR0) && defined(CONFIG_SYS_CSOR0)
- set_ifc_ftim(IFC_CS0, IFC_FTIM0, CONFIG_SYS_CS0_FTIM0);
- set_ifc_ftim(IFC_CS0, IFC_FTIM1, CONFIG_SYS_CS0_FTIM1);
- set_ifc_ftim(IFC_CS0, IFC_FTIM2, CONFIG_SYS_CS0_FTIM2);
- set_ifc_ftim(IFC_CS0, IFC_FTIM3, CONFIG_SYS_CS0_FTIM3);
-
-#ifndef CONFIG_A003399_NOR_WORKAROUND
+ CONFIG_SYS_CSPR0,
#ifdef CONFIG_SYS_CSPR0_EXT
- set_ifc_cspr_ext(IFC_CS0, CONFIG_SYS_CSPR0_EXT);
-#endif
+ CONFIG_SYS_CSPR0_EXT,
+#else
+ 0,
+#endif
+#ifdef CONFIG_SYS_AMASK0
+ CONFIG_SYS_AMASK0,
+#else
+ 0,
+#endif
+ CONFIG_SYS_CSOR0,
+ {
+ CONFIG_SYS_CS0_FTIM0,
+ CONFIG_SYS_CS0_FTIM1,
+ CONFIG_SYS_CS0_FTIM2,
+ CONFIG_SYS_CS0_FTIM3,
+ },
#ifdef CONFIG_SYS_CSOR0_EXT
- set_ifc_csor_ext(IFC_CS0, CONFIG_SYS_CSOR0_EXT);
+ CONFIG_SYS_CSOR0_EXT,
+#else
+ 0,
+#endif
+#ifdef CONFIG_SYS_CSPR0_FINAL
+ CONFIG_SYS_CSPR0_FINAL,
+#else
+ 0,
#endif
- set_ifc_cspr(IFC_CS0, CONFIG_SYS_CSPR0);
- set_ifc_amask(IFC_CS0, CONFIG_SYS_AMASK0);
- set_ifc_csor(IFC_CS0, CONFIG_SYS_CSOR0);
+#ifdef CONFIG_SYS_AMASK0_FINAL
+ CONFIG_SYS_AMASK0_FINAL,
+#else
+ 0,
#endif
#endif
+ },
+#if CONFIG_SYS_FSL_IFC_BANK_COUNT >= 2
+ {
+ "cs1",
+#if defined(CONFIG_SYS_CSPR1) && defined(CONFIG_SYS_CSOR1)
+ CONFIG_SYS_CSPR1,
#ifdef CONFIG_SYS_CSPR1_EXT
- set_ifc_cspr_ext(IFC_CS1, CONFIG_SYS_CSPR1_EXT);
-#endif
+ CONFIG_SYS_CSPR1_EXT,
+#else
+ 0,
+#endif
+#ifdef CONFIG_SYS_AMASK1
+ CONFIG_SYS_AMASK1,
+#else
+ 0,
+#endif
+ CONFIG_SYS_CSOR1,
+ {
+ CONFIG_SYS_CS1_FTIM0,
+ CONFIG_SYS_CS1_FTIM1,
+ CONFIG_SYS_CS1_FTIM2,
+ CONFIG_SYS_CS1_FTIM3,
+ },
#ifdef CONFIG_SYS_CSOR1_EXT
- set_ifc_csor_ext(IFC_CS1, CONFIG_SYS_CSOR1_EXT);
+ CONFIG_SYS_CSOR1_EXT,
+#else
+ 0,
#endif
-#if defined(CONFIG_SYS_CSPR1) && defined(CONFIG_SYS_CSOR1)
- set_ifc_ftim(IFC_CS1, IFC_FTIM0, CONFIG_SYS_CS1_FTIM0);
- set_ifc_ftim(IFC_CS1, IFC_FTIM1, CONFIG_SYS_CS1_FTIM1);
- set_ifc_ftim(IFC_CS1, IFC_FTIM2, CONFIG_SYS_CS1_FTIM2);
- set_ifc_ftim(IFC_CS1, IFC_FTIM3, CONFIG_SYS_CS1_FTIM3);
-
- set_ifc_csor(IFC_CS1, CONFIG_SYS_CSOR1);
- set_ifc_amask(IFC_CS1, CONFIG_SYS_AMASK1);
- set_ifc_cspr(IFC_CS1, CONFIG_SYS_CSPR1);
+#ifdef CONFIG_SYS_CSPR1_FINAL
+ CONFIG_SYS_CSPR1_FINAL,
+#else
+ 0,
+#endif
+#ifdef CONFIG_SYS_AMASK1_FINAL
+ CONFIG_SYS_AMASK1_FINAL,
+#else
+ 0,
+#endif
+#endif
+ },
#endif
+#if CONFIG_SYS_FSL_IFC_BANK_COUNT >= 3
+ {
+ "cs2",
+#if defined(CONFIG_SYS_CSPR2) && defined(CONFIG_SYS_CSOR2)
+ CONFIG_SYS_CSPR2,
#ifdef CONFIG_SYS_CSPR2_EXT
- set_ifc_cspr_ext(IFC_CS2, CONFIG_SYS_CSPR2_EXT);
-#endif
+ CONFIG_SYS_CSPR2_EXT,
+#else
+ 0,
+#endif
+#ifdef CONFIG_SYS_AMASK2
+ CONFIG_SYS_AMASK2,
+#else
+ 0,
+#endif
+ CONFIG_SYS_CSOR2,
+ {
+ CONFIG_SYS_CS2_FTIM0,
+ CONFIG_SYS_CS2_FTIM1,
+ CONFIG_SYS_CS2_FTIM2,
+ CONFIG_SYS_CS2_FTIM3,
+ },
#ifdef CONFIG_SYS_CSOR2_EXT
- set_ifc_csor_ext(IFC_CS2, CONFIG_SYS_CSOR2_EXT);
+ CONFIG_SYS_CSOR2_EXT,
+#else
+ 0,
+#endif
+#ifdef CONFIG_SYS_CSPR2_FINAL
+ CONFIG_SYS_CSPR2_FINAL,
+#else
+ 0,
+#endif
+#ifdef CONFIG_SYS_AMASK2_FINAL
+ CONFIG_SYS_AMASK2_FINAL,
+#else
+ 0,
#endif
-#if defined(CONFIG_SYS_CSPR2) && defined(CONFIG_SYS_CSOR2)
- set_ifc_ftim(IFC_CS2, IFC_FTIM0, CONFIG_SYS_CS2_FTIM0);
- set_ifc_ftim(IFC_CS2, IFC_FTIM1, CONFIG_SYS_CS2_FTIM1);
- set_ifc_ftim(IFC_CS2, IFC_FTIM2, CONFIG_SYS_CS2_FTIM2);
- set_ifc_ftim(IFC_CS2, IFC_FTIM3, CONFIG_SYS_CS2_FTIM3);
-
- set_ifc_csor(IFC_CS2, CONFIG_SYS_CSOR2);
- set_ifc_amask(IFC_CS2, CONFIG_SYS_AMASK2);
- set_ifc_cspr(IFC_CS2, CONFIG_SYS_CSPR2);
+#endif
+ },
#endif
+#if CONFIG_SYS_FSL_IFC_BANK_COUNT >= 4
+ {
+ "cs3",
+#if defined(CONFIG_SYS_CSPR3) && defined(CONFIG_SYS_CSOR3)
+ CONFIG_SYS_CSPR3,
#ifdef CONFIG_SYS_CSPR3_EXT
- set_ifc_cspr_ext(IFC_CS3, CONFIG_SYS_CSPR3_EXT);
-#endif
+ CONFIG_SYS_CSPR3_EXT,
+#else
+ 0,
+#endif
+#ifdef CONFIG_SYS_AMASK3
+ CONFIG_SYS_AMASK3,
+#else
+ 0,
+#endif
+ CONFIG_SYS_CSOR3,
+ {
+ CONFIG_SYS_CS3_FTIM0,
+ CONFIG_SYS_CS3_FTIM1,
+ CONFIG_SYS_CS3_FTIM2,
+ CONFIG_SYS_CS3_FTIM3,
+ },
#ifdef CONFIG_SYS_CSOR3_EXT
- set_ifc_csor_ext(IFC_CS3, CONFIG_SYS_CSOR3_EXT);
+ CONFIG_SYS_CSOR3_EXT,
+#else
+ 0,
+#endif
+#ifdef CONFIG_SYS_CSPR3_FINAL
+ CONFIG_SYS_CSPR3_FINAL,
+#else
+ 0,
+#endif
+#ifdef CONFIG_SYS_AMASK3_FINAL
+ CONFIG_SYS_AMASK3_FINAL,
+#else
+ 0,
#endif
-#if defined(CONFIG_SYS_CSPR3) && defined(CONFIG_SYS_CSOR3)
- set_ifc_ftim(IFC_CS3, IFC_FTIM0, CONFIG_SYS_CS3_FTIM0);
- set_ifc_ftim(IFC_CS3, IFC_FTIM1, CONFIG_SYS_CS3_FTIM1);
- set_ifc_ftim(IFC_CS3, IFC_FTIM2, CONFIG_SYS_CS3_FTIM2);
- set_ifc_ftim(IFC_CS3, IFC_FTIM3, CONFIG_SYS_CS3_FTIM3);
-
- set_ifc_cspr(IFC_CS3, CONFIG_SYS_CSPR3);
- set_ifc_amask(IFC_CS3, CONFIG_SYS_AMASK3);
- set_ifc_csor(IFC_CS3, CONFIG_SYS_CSOR3);
+#endif
+ },
#endif
+#if CONFIG_SYS_FSL_IFC_BANK_COUNT >= 5
+ {
+ "cs4",
+#if defined(CONFIG_SYS_CSPR4) && defined(CONFIG_SYS_CSOR4)
+ CONFIG_SYS_CSPR4,
#ifdef CONFIG_SYS_CSPR4_EXT
- set_ifc_cspr_ext(IFC_CS4, CONFIG_SYS_CSPR4_EXT);
-#endif
+ CONFIG_SYS_CSPR4_EXT,
+#else
+ 0,
+#endif
+#ifdef CONFIG_SYS_AMASK4
+ CONFIG_SYS_AMASK4,
+#else
+ 0,
+#endif
+ CONFIG_SYS_CSOR4,
+ {
+ CONFIG_SYS_CS4_FTIM0,
+ CONFIG_SYS_CS4_FTIM1,
+ CONFIG_SYS_CS4_FTIM2,
+ CONFIG_SYS_CS4_FTIM3,
+ },
#ifdef CONFIG_SYS_CSOR4_EXT
- set_ifc_csor_ext(IFC_CS4, CONFIG_SYS_CSOR4_EXT);
+ CONFIG_SYS_CSOR4_EXT,
+#else
+ 0,
#endif
-#if defined(CONFIG_SYS_CSPR4) && defined(CONFIG_SYS_CSOR4)
- set_ifc_ftim(IFC_CS4, IFC_FTIM0, CONFIG_SYS_CS4_FTIM0);
- set_ifc_ftim(IFC_CS4, IFC_FTIM1, CONFIG_SYS_CS4_FTIM1);
- set_ifc_ftim(IFC_CS4, IFC_FTIM2, CONFIG_SYS_CS4_FTIM2);
- set_ifc_ftim(IFC_CS4, IFC_FTIM3, CONFIG_SYS_CS4_FTIM3);
-
- set_ifc_cspr(IFC_CS4, CONFIG_SYS_CSPR4);
- set_ifc_amask(IFC_CS4, CONFIG_SYS_AMASK4);
- set_ifc_csor(IFC_CS4, CONFIG_SYS_CSOR4);
+#ifdef CONFIG_SYS_CSPR4_FINAL
+ CONFIG_SYS_CSPR4_FINAL,
+#else
+ 0,
+#endif
+#ifdef CONFIG_SYS_AMASK4_FINAL
+ CONFIG_SYS_AMASK4_FINAL,
+#else
+ 0,
+#endif
+#endif
+ },
#endif
+#if CONFIG_SYS_FSL_IFC_BANK_COUNT >= 6
+ {
+ "cs5",
+#if defined(CONFIG_SYS_CSPR5) && defined(CONFIG_SYS_CSOR5)
+ CONFIG_SYS_CSPR5,
#ifdef CONFIG_SYS_CSPR5_EXT
- set_ifc_cspr_ext(IFC_CS5, CONFIG_SYS_CSPR5_EXT);
-#endif
+ CONFIG_SYS_CSPR5_EXT,
+#else
+ 0,
+#endif
+#ifdef CONFIG_SYS_AMASK5
+ CONFIG_SYS_AMASK5,
+#else
+ 0,
+#endif
+ CONFIG_SYS_CSOR5,
+ {
+ CONFIG_SYS_CS5_FTIM0,
+ CONFIG_SYS_CS5_FTIM1,
+ CONFIG_SYS_CS5_FTIM2,
+ CONFIG_SYS_CS5_FTIM3,
+ },
#ifdef CONFIG_SYS_CSOR5_EXT
- set_ifc_csor_ext(IFC_CS5, CONFIG_SYS_CSOR5_EXT);
+ CONFIG_SYS_CSOR5_EXT,
+#else
+ 0,
#endif
-#if defined(CONFIG_SYS_CSPR5) && defined(CONFIG_SYS_CSOR5)
- set_ifc_ftim(IFC_CS5, IFC_FTIM0, CONFIG_SYS_CS5_FTIM0);
- set_ifc_ftim(IFC_CS5, IFC_FTIM1, CONFIG_SYS_CS5_FTIM1);
- set_ifc_ftim(IFC_CS5, IFC_FTIM2, CONFIG_SYS_CS5_FTIM2);
- set_ifc_ftim(IFC_CS5, IFC_FTIM3, CONFIG_SYS_CS5_FTIM3);
-
- set_ifc_cspr(IFC_CS5, CONFIG_SYS_CSPR5);
- set_ifc_amask(IFC_CS5, CONFIG_SYS_AMASK5);
- set_ifc_csor(IFC_CS5, CONFIG_SYS_CSOR5);
+#ifdef CONFIG_SYS_CSPR5_FINAL
+ CONFIG_SYS_CSPR5_FINAL,
+#else
+ 0,
+#endif
+#ifdef CONFIG_SYS_AMASK5_FINAL
+ CONFIG_SYS_AMASK5_FINAL,
+#else
+ 0,
+#endif
+#endif
+ },
#endif
+#if CONFIG_SYS_FSL_IFC_BANK_COUNT >= 7
+ {
+ "cs6",
+#if defined(CONFIG_SYS_CSPR6) && defined(CONFIG_SYS_CSOR6)
+ CONFIG_SYS_CSPR6,
#ifdef CONFIG_SYS_CSPR6_EXT
- set_ifc_cspr_ext(IFC_CS6, CONFIG_SYS_CSPR6_EXT);
-#endif
+ CONFIG_SYS_CSPR6_EXT,
+#else
+ 0,
+#endif
+#ifdef CONFIG_SYS_AMASK6
+ CONFIG_SYS_AMASK6,
+#else
+ 0,
+#endif
+ CONFIG_SYS_CSOR6,
+ {
+ CONFIG_SYS_CS6_FTIM0,
+ CONFIG_SYS_CS6_FTIM1,
+ CONFIG_SYS_CS6_FTIM2,
+ CONFIG_SYS_CS6_FTIM3,
+ },
#ifdef CONFIG_SYS_CSOR6_EXT
- set_ifc_csor_ext(IFC_CS6, CONFIG_SYS_CSOR6_EXT);
+ CONFIG_SYS_CSOR6_EXT,
+#else
+ 0,
#endif
-#if defined(CONFIG_SYS_CSPR6) && defined(CONFIG_SYS_CSOR6)
- set_ifc_ftim(IFC_CS6, IFC_FTIM0, CONFIG_SYS_CS6_FTIM0);
- set_ifc_ftim(IFC_CS6, IFC_FTIM1, CONFIG_SYS_CS6_FTIM1);
- set_ifc_ftim(IFC_CS6, IFC_FTIM2, CONFIG_SYS_CS6_FTIM2);
- set_ifc_ftim(IFC_CS6, IFC_FTIM3, CONFIG_SYS_CS6_FTIM3);
-
- set_ifc_cspr(IFC_CS6, CONFIG_SYS_CSPR6);
- set_ifc_amask(IFC_CS6, CONFIG_SYS_AMASK6);
- set_ifc_csor(IFC_CS6, CONFIG_SYS_CSOR6);
+#ifdef CONFIG_SYS_CSPR6_FINAL
+ CONFIG_SYS_CSPR6_FINAL,
+#else
+ 0,
+#endif
+#ifdef CONFIG_SYS_AMASK6_FINAL
+ CONFIG_SYS_AMASK6_FINAL,
+#else
+ 0,
+#endif
+#endif
+ },
#endif
+#if CONFIG_SYS_FSL_IFC_BANK_COUNT >= 8
+ {
+ "cs7",
+#if defined(CONFIG_SYS_CSPR7) && defined(CONFIG_SYS_CSOR7)
+ CONFIG_SYS_CSPR7,
#ifdef CONFIG_SYS_CSPR7_EXT
- set_ifc_cspr_ext(IFC_CS7, CONFIG_SYS_CSPR7_EXT);
+ CONFIG_SYS_CSPR7_EXT,
+#else
+ 0,
#endif
-#ifdef CONFIG_SYS_CSOR7_EXT
- set_ifc_csor_ext(IFC_CS7, CONFIG_SYS_CSOR7_EXT);
+#ifdef CONFIG_SYS_AMASK7
+ CONFIG_SYS_AMASK7,
+#else
+ 0,
#endif
-#if defined(CONFIG_SYS_CSPR7) && defined(CONFIG_SYS_CSOR7)
- set_ifc_ftim(IFC_CS7, IFC_FTIM0, CONFIG_SYS_CS7_FTIM0);
- set_ifc_ftim(IFC_CS7, IFC_FTIM1, CONFIG_SYS_CS7_FTIM1);
- set_ifc_ftim(IFC_CS7, IFC_FTIM2, CONFIG_SYS_CS7_FTIM2);
- set_ifc_ftim(IFC_CS7, IFC_FTIM3, CONFIG_SYS_CS7_FTIM3);
+ CONFIG_SYS_CSOR7,
+#ifdef CONFIG_SYS_CSOR7_EXT
+ CONFIG_SYS_CSOR7_EXT,
+#else
+ 0,
+#endif
+ {
+ CONFIG_SYS_CS7_FTIM0,
+ CONFIG_SYS_CS7_FTIM1,
+ CONFIG_SYS_CS7_FTIM2,
+ CONFIG_SYS_CS7_FTIM3,
+ },
+#ifdef CONFIG_SYS_CSPR7_FINAL
+ CONFIG_SYS_CSPR7_FINAL,
+#else
+ 0,
+#endif
+#ifdef CONFIG_SYS_AMASK7_FINAL
+ CONFIG_SYS_AMASK7_FINAL,
+#else
+ 0,
+#endif
+#endif
+ },
+#endif
+};
- set_ifc_cspr(IFC_CS7, CONFIG_SYS_CSPR7);
- set_ifc_amask(IFC_CS7, CONFIG_SYS_AMASK7);
- set_ifc_csor(IFC_CS7, CONFIG_SYS_CSOR7);
-#endif
+__weak void ifc_cfg_boot_info(struct ifc_regs_info *regs_info)
+{
+ regs_info->regs = ifc_cfg_default_boot;
+ regs_info->cs_size = CONFIG_SYS_FSL_IFC_BANK_COUNT;
+}
+
+void print_ifc_regs(void)
+{
+ int i, j;
+
+ printf("IFC Controller Registers\n");
+ for (i = 0; i < CONFIG_SYS_FSL_IFC_BANK_COUNT; i++) {
+ printf("CSPR%d:0x%08X\tAMASK%d:0x%08X\tCSOR%d:0x%08X\n",
+ i, get_ifc_cspr(i), i, get_ifc_amask(i),
+ i, get_ifc_csor(i));
+ for (j = 0; j < 4; j++)
+ printf("IFC_FTIM%d:0x%08X\n", j, get_ifc_ftim(i, j));
+ }
+}
+
+void init_early_memctl_regs(void)
+{
+ int i, j;
+ struct ifc_regs *regs;
+ struct ifc_regs_info regs_info = {0};
+
+ ifc_cfg_boot_info(®s_info);
+ regs = regs_info.regs;
+
+ for (i = 0 ; i < regs_info.cs_size; i++) {
+ if (regs[i].pr && (regs[i].pr & CSPR_V)) {
+ /* skip setting cspr/csor_ext in below condition */
+ if (!(CONFIG_IS_ENABLED(A003399_NOR_WORKAROUND) && \
+ i == 0 && \
+ ((regs[0].pr & CSPR_MSEL) == CSPR_MSEL_NOR))) {
+ if (regs[i].pr_ext)
+ set_ifc_cspr_ext(i, regs[i].pr_ext);
+ if (regs[i].or_ext)
+ set_ifc_csor_ext(i, regs[i].or_ext);
+ }
+
+ for (j = 0; j < ARRAY_SIZE(regs->ftim); j++)
+ set_ifc_ftim(i, j, regs[i].ftim[j]);
+
+ set_ifc_csor(i, regs[i].or);
+ set_ifc_amask(i, regs[i].amask);
+ set_ifc_cspr(i, regs[i].pr);
+ }
+ }
}
void init_final_memctl_regs(void)
{
-#ifdef CONFIG_SYS_CSPR0_FINAL
- set_ifc_cspr(IFC_CS0, CONFIG_SYS_CSPR0_FINAL);
-#endif
-#ifdef CONFIG_SYS_AMASK0_FINAL
- set_ifc_amask(IFC_CS0, CONFIG_SYS_AMASK0);
-#endif
-#ifdef CONFIG_SYS_CSPR1_FINAL
- set_ifc_cspr(IFC_CS1, CONFIG_SYS_CSPR1_FINAL);
-#endif
-#ifdef CONFIG_SYS_AMASK1_FINAL
- set_ifc_amask(IFC_CS1, CONFIG_SYS_AMASK1_FINAL);
-#endif
-#ifdef CONFIG_SYS_CSPR2_FINAL
- set_ifc_cspr(IFC_CS2, CONFIG_SYS_CSPR2_FINAL);
-#endif
-#ifdef CONFIG_SYS_AMASK2_FINAL
- set_ifc_amask(IFC_CS2, CONFIG_SYS_AMASK2);
-#endif
-#ifdef CONFIG_SYS_CSPR3_FINAL
- set_ifc_cspr(IFC_CS3, CONFIG_SYS_CSPR3_FINAL);
-#endif
-#ifdef CONFIG_SYS_AMASK3_FINAL
- set_ifc_amask(IFC_CS3, CONFIG_SYS_AMASK3);
-#endif
+ int i;
+ struct ifc_regs *regs;
+ struct ifc_regs_info regs_info;
+
+ ifc_cfg_boot_info(®s_info);
+ regs = regs_info.regs;
+
+ for (i = 0 ; i < regs_info.cs_size && i < ARRAY_SIZE(regs->ftim); i++) {
+ if (!(regs[i].pr_final & CSPR_V))
+ continue;
+ if (regs[i].pr_final)
+ set_ifc_cspr(i, regs[i].pr_final);
+ if (regs[i].amask_final)
+ set_ifc_amask(i, (i == 1) ? regs[i].amask_final :
+ regs[i].amask);
+ }
}
diff --git a/include/fsl_ifc.h b/include/fsl_ifc.h
index 17697c7341..c42affcf1f 100644
--- a/include/fsl_ifc.h
+++ b/include/fsl_ifc.h
@@ -1031,6 +1031,23 @@ struct fsl_ifc {
struct fsl_ifc_runtime *rregs;
};
+struct ifc_regs {
+ const char *name;
+ uint32_t pr;
+ uint32_t pr_ext;
+ uint32_t amask;
+ uint32_t or;
+ uint32_t ftim[4];
+ uint32_t or_ext;
+ uint32_t pr_final;
+ uint32_t amask_final;
+};
+
+struct ifc_regs_info {
+ struct ifc_regs *regs;
+ uint32_t cs_size;
+};
+
#ifdef CONFIG_SYS_FSL_ERRATUM_IFC_A002769
#undef CSPR_MSEL_NOR
#define CSPR_MSEL_NOR CSPR_MSEL_GPCM
--
2.17.1
next prev parent reply other threads:[~2018-10-27 13:15 UTC|newest]
Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-10-27 13:15 [U-Boot] [PATCH v5 00/27] TF-A Boot support for NXP Chassis 2 platforms Rajesh Bhagat
2018-10-27 13:15 ` [U-Boot] [PATCH v5 01/27] move data structure out of cpu.h Rajesh Bhagat
2018-10-27 13:15 ` [U-Boot] [PATCH v5 02/27] env: allow flash and nand env driver to compile together Rajesh Bhagat
2018-10-27 13:15 ` [U-Boot] [PATCH v5 03/27] env: sf: define API to override sf environment address Rajesh Bhagat
2018-10-27 13:15 ` [U-Boot] [PATCH v5 04/27] driver/ifc: replace __ilog2 with LOG2 macro Rajesh Bhagat
2018-10-27 13:15 ` [U-Boot] [PATCH v5 05/27] armv8: layerscape: Enable routing SError exception Rajesh Bhagat
2018-10-27 13:15 ` [U-Boot] [PATCH v5 06/27] armv8: fsl-layerscape: change tlb base from OCRAM to DDR in EL < 3 Rajesh Bhagat
2018-10-27 13:15 ` Rajesh Bhagat [this message]
2018-10-27 13:15 ` [U-Boot] [PATCH v5 08/27] armv8: layerscape: Add TFABOOT support Rajesh Bhagat
2018-10-27 13:15 ` [U-Boot] [PATCH v5 09/27] armv8: fsl-layerscape: identify boot source from PORSR register Rajesh Bhagat
2018-10-27 13:15 ` [U-Boot] [PATCH v5 10/27] armv8: layerscape: remove EL3 specific erratas for TFABOOT Rajesh Bhagat
2018-10-27 13:15 ` [U-Boot] [PATCH v5 11/27] armv8: fsl-layerscape: bootcmd identification " Rajesh Bhagat
2018-10-27 13:15 ` [U-Boot] [PATCH v5 12/27] armv8: layerscape: add SMC calls for DDR size and bank info Rajesh Bhagat
2018-10-27 13:15 ` [U-Boot] [PATCH v5 13/27] armv8: layerscape: skip OCRAM init for TFABOOT Rajesh Bhagat
2018-10-27 13:15 ` [U-Boot] [PATCH v5 14/27] armv8: fsl-layerscape: Update parsing boot source Rajesh Bhagat
2018-10-27 13:15 ` [U-Boot] [PATCH v5 15/27] armv8: sec_firmware: change el2_to_aarch32 SMC ID Rajesh Bhagat
2018-10-27 13:15 ` [U-Boot] [PATCH v5 16/27] armv8: sec_firmware: return job ring status as true in TFABOOT Rajesh Bhagat
2018-10-27 13:15 ` [U-Boot] [PATCH v5 17/27] net: fm: add TFABOOT support Rajesh Bhagat
2018-10-27 13:16 ` [U-Boot] [PATCH v5 18/27] drivers: qe: " Rajesh Bhagat
2018-10-27 13:16 ` [U-Boot] [PATCH v5 19/27] armv8: fsl-layerscape: add support of MC framework for TFA Rajesh Bhagat
2018-10-27 13:16 ` [U-Boot] [PATCH v5 20/27] armv8: ls1046ardb: Add TFABOOT support Rajesh Bhagat
2018-10-27 13:16 ` [U-Boot] [PATCH v5 21/27] armv8: ls1046aqds: " Rajesh Bhagat
2018-10-27 13:16 ` [U-Boot] [PATCH v5 22/27] armv8: ls1043ardb: " Rajesh Bhagat
2018-10-27 13:16 ` [U-Boot] [PATCH v5 23/27] armv8: ls1043aqds: " Rajesh Bhagat
2018-10-27 13:16 ` [U-Boot] [PATCH v5 24/27] armv8: ls1012ardb: " Rajesh Bhagat
2018-10-27 13:16 ` [U-Boot] [PATCH v5 25/27] armv8: ls1012aqds: fix secure boot compilation Rajesh Bhagat
2018-10-27 13:16 ` [U-Boot] [PATCH v5 26/27] armv8: ls1012aqds: Add TFABOOT support Rajesh Bhagat
2018-10-27 13:16 ` [U-Boot] [PATCH v5 27/27] armv8: ls1012afrx: " Rajesh Bhagat
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