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* [PATCH v3 1/4] drm/i915/icl: Add WaEnable32PlaneMode
@ 2018-10-30  8:45 Radhakrishna Sripada
  2018-10-30  8:45 ` [PATCH v3 2/4] drm/i915/icl: Implement Display WA_1405510057 Radhakrishna Sripada
                   ` (5 more replies)
  0 siblings, 6 replies; 20+ messages in thread
From: Radhakrishna Sripada @ 2018-10-30  8:45 UTC (permalink / raw)
  To: intel-gfx; +Cc: Michel Thierry

Gen11 Display suports 32 planes in total. Enable the new format in context
status to be used and expanded to 32 planes.

V2: Move the WA to display WA's(Chris)

Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Michel Thierry <michel.thierry@intel.com>
Cc: James Ausmus <james.ausmus@intel.com>
Reviewed-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
Signed-off-by: Radhakrishna Sripada <radhakrishna.sripada@intel.com>
---
 drivers/gpu/drm/i915/i915_reg.h | 1 +
 drivers/gpu/drm/i915/intel_pm.c | 4 ++++
 2 files changed, 5 insertions(+)

diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index bcee91bcfba6..f76fa13a12a2 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -2537,6 +2537,7 @@ enum i915_power_well_id {
 /* chicken reg for WaConextSwitchWithConcurrentTLBInvalidate */
 #define GEN9_CSFE_CHICKEN1_RCS _MMIO(0x20D4)
 #define   GEN9_PREEMPT_GPGPU_SYNC_SWITCH_DISABLE (1 << 2)
+#define   GEN11_ENABLE_32_PLANE_MODE (1 << 7)
 
 /* WaClearTdlStateAckDirtyBits */
 #define GEN8_STATE_ACK		_MMIO(0x20F0)
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 82c82e233154..32d051fd45ee 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -8865,6 +8865,10 @@ static void icl_init_clock_gating(struct drm_i915_private *dev_priv)
 	/* This is not an Wa. Enable to reduce Sampler power */
 	I915_WRITE(GEN10_DFR_RATIO_EN_AND_CHICKEN,
 		   I915_READ(GEN10_DFR_RATIO_EN_AND_CHICKEN) & ~DFR_DISABLE);
+
+	/* WaEnable32PlaneMode:icl */
+	I915_WRITE(GEN9_CSFE_CHICKEN1_RCS,
+		   _MASKED_BIT_ENABLE(GEN11_ENABLE_32_PLANE_MODE));
 }
 
 static void cnp_init_clock_gating(struct drm_i915_private *dev_priv)
-- 
2.9.3

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^ permalink raw reply related	[flat|nested] 20+ messages in thread

end of thread, other threads:[~2018-11-02  1:08 UTC | newest]

Thread overview: 20+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2018-10-30  8:45 [PATCH v3 1/4] drm/i915/icl: Add WaEnable32PlaneMode Radhakrishna Sripada
2018-10-30  8:45 ` [PATCH v3 2/4] drm/i915/icl: Implement Display WA_1405510057 Radhakrishna Sripada
2018-10-30  9:17   ` kbuild test robot
2018-10-30  9:30   ` kbuild test robot
2018-10-30 22:35     ` Rodrigo Vivi
2018-10-31 18:54       ` Radhakrishna Sripada
2018-10-30 22:27   ` Rodrigo Vivi
2018-11-01 19:33     ` Rodrigo Vivi
2018-11-01 23:52       ` Imre Deak
2018-11-02  0:34         ` Rodrigo Vivi
2018-11-02  1:08           ` Imre Deak
2018-10-30  8:45 ` [PATCH v3 3/4] drm/i915/icl: WaAllowUMDToModifyHalfSliceChicken7 Radhakrishna Sripada
2018-10-31 18:59   ` Srivatsa, Anusha
2018-10-30  8:45 ` [PATCH v3 4/4] drm/i915/icl: WaAllowUMDToModifySamplerMode Radhakrishna Sripada
2018-10-30  9:12   ` Chris Wilson
2018-10-30  9:20     ` Chris Wilson
2018-10-31 18:50   ` Srivatsa, Anusha
2018-10-30  9:18 ` ✗ Fi.CI.BAT: failure for series starting with [v3,1/4] drm/i915/icl: Add WaEnable32PlaneMode Patchwork
2018-10-31 20:02 ` ✓ Fi.CI.BAT: success " Patchwork
2018-11-01  5:02 ` ✓ Fi.CI.IGT: " Patchwork

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