[PATCH 0/8] drm/i915/icl: Fix HDMI on TypeC static ports

[PATCH 0/8] drm/i915/icl: Fix HDMI on TypeC static ports

[Imre Deak]

ICL has repurposed some of the AUX HW signals/flags, so that we have to
program these for HDMI too. In practice this means enabling the AUX
power well for HDMI mode too.

The last patch fixes an issue where BIOS leaves the PLL->port mapping
enabled even though the corresponding encoder is disabled. This happens
at least on ICL when booting with an HDMI output connected, where the
PLL->port mapping will be enabled for eDP, while the eDP encoder is
disabled.

Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>

Imre Deak (8):
  drm/i915: Move intel_aux_ch() to intel_bios.c
  drm/i915: Move aux_ch to intel_digital_port
  drm/i915: Init aux_ch for HDMI ports too
  drm/i915: Use a helper to get the aux power domain
  drm/i915: Enable AUX power earlier
  drm/i915: Enable AUX power for HDMI DDI/TypeC main link too
  drm/i915: Configure AUX_CH_CTL when enabling the AUX power domain
  drm/i915/icl+: Sanitize port to PLL mapping

 drivers/gpu/drm/i915/i915_drv.h         |   2 +
 drivers/gpu/drm/i915/intel_bios.c       |  45 ++++++++++
 drivers/gpu/drm/i915/intel_ddi.c        |  81 +++++++++++++----
 drivers/gpu/drm/i915/intel_display.c    |  28 ++++++
 drivers/gpu/drm/i915/intel_dp.c         | 148 +++++++++++---------------------
 drivers/gpu/drm/i915/intel_drv.h        |   6 +-
 drivers/gpu/drm/i915/intel_hdmi.c       |   1 +
 drivers/gpu/drm/i915/intel_runtime_pm.c |  69 +++++++++++++--
 8 files changed, 257 insertions(+), 123 deletions(-)

-- 
2.13.2




*** BLURB HERE ***

Imre Deak (8):
  drm/i915: Move intel_aux_ch() to intel_bios.c
  drm/i915: Move aux_ch to intel_digital_port
  drm/i915: Init aux_ch for HDMI ports too
  drm/i915: Use a helper to get the aux power domain
  drm/i915: Enable AUX power earlier
  drm/i915: Enable AUX power for HDMI DDI/TypeC main link too
  drm/i915: Configure AUX_CH_CTL when enabling the AUX power domain
  drm/i915/icl+: Sanitize port to PLL mapping

 drivers/gpu/drm/i915/i915_drv.h         |   2 +
 drivers/gpu/drm/i915/intel_bios.c       |  45 ++++++++++
 drivers/gpu/drm/i915/intel_ddi.c        |  81 +++++++++++++----
 drivers/gpu/drm/i915/intel_display.c    |  28 ++++++
 drivers/gpu/drm/i915/intel_dp.c         | 148 +++++++++++---------------------
 drivers/gpu/drm/i915/intel_drv.h        |   6 +-
 drivers/gpu/drm/i915/intel_hdmi.c       |   1 +
 drivers/gpu/drm/i915/intel_runtime_pm.c |  69 +++++++++++++--
 8 files changed, 257 insertions(+), 123 deletions(-)

-- 
2.13.2

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[PATCH 1/8] drm/i915: Move intel_aux_ch() to intel_bios.c

[Imre Deak]

From ICL onwards all the DDI/TypeC ports - even working in HDMI mode -
need to know their corresponding AUX channel, so move the corresponding
helper to a common place.

No functional change.

Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
---
 drivers/gpu/drm/i915/i915_drv.h   |  1 +
 drivers/gpu/drm/i915/intel_bios.c | 45 +++++++++++++++++++++++++++++++++++
 drivers/gpu/drm/i915/intel_dp.c   | 50 +--------------------------------------
 3 files changed, 47 insertions(+), 49 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index c9e5bab6861b..c57b701f72a7 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -3445,6 +3445,7 @@ bool intel_bios_is_port_hpd_inverted(struct drm_i915_private *dev_priv,
 				     enum port port);
 bool intel_bios_is_lspcon_present(struct drm_i915_private *dev_priv,
 				enum port port);
+enum aux_ch intel_aux_ch(struct drm_i915_private *dev_priv, enum port port);
 
 /* intel_acpi.c */
 #ifdef CONFIG_ACPI
diff --git a/drivers/gpu/drm/i915/intel_bios.c b/drivers/gpu/drm/i915/intel_bios.c
index 1faa494e2bc9..c7682a470c6a 100644
--- a/drivers/gpu/drm/i915/intel_bios.c
+++ b/drivers/gpu/drm/i915/intel_bios.c
@@ -2159,3 +2159,48 @@ intel_bios_is_lspcon_present(struct drm_i915_private *dev_priv,
 
 	return false;
 }
+
+enum aux_ch intel_aux_ch(struct drm_i915_private *dev_priv, enum port port)
+{
+	const struct ddi_vbt_port_info *info =
+		&dev_priv->vbt.ddi_port_info[port];
+	enum aux_ch aux_ch;
+
+	if (!info->alternate_aux_channel) {
+		aux_ch = (enum aux_ch) port;
+
+		DRM_DEBUG_KMS("using AUX %c for port %c (platform default)\n",
+			      aux_ch_name(aux_ch), port_name(port));
+		return aux_ch;
+	}
+
+	switch (info->alternate_aux_channel) {
+	case DP_AUX_A:
+		aux_ch = AUX_CH_A;
+		break;
+	case DP_AUX_B:
+		aux_ch = AUX_CH_B;
+		break;
+	case DP_AUX_C:
+		aux_ch = AUX_CH_C;
+		break;
+	case DP_AUX_D:
+		aux_ch = AUX_CH_D;
+		break;
+	case DP_AUX_E:
+		aux_ch = AUX_CH_E;
+		break;
+	case DP_AUX_F:
+		aux_ch = AUX_CH_F;
+		break;
+	default:
+		MISSING_CASE(info->alternate_aux_channel);
+		aux_ch = AUX_CH_A;
+		break;
+	}
+
+	DRM_DEBUG_KMS("using AUX %c for port %c (VBT)\n",
+		      aux_ch_name(aux_ch), port_name(port));
+
+	return aux_ch;
+}
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index 6b37d66194a3..2445897b8f6c 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -1503,54 +1503,6 @@ intel_dp_aux_transfer(struct drm_dp_aux *aux, struct drm_dp_aux_msg *msg)
 	return ret;
 }
 
-static enum aux_ch intel_aux_ch(struct intel_dp *intel_dp)
-{
-	struct intel_encoder *encoder = &dp_to_dig_port(intel_dp)->base;
-	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
-	enum port port = encoder->port;
-	const struct ddi_vbt_port_info *info =
-		&dev_priv->vbt.ddi_port_info[port];
-	enum aux_ch aux_ch;
-
-	if (!info->alternate_aux_channel) {
-		aux_ch = (enum aux_ch) port;
-
-		DRM_DEBUG_KMS("using AUX %c for port %c (platform default)\n",
-			      aux_ch_name(aux_ch), port_name(port));
-		return aux_ch;
-	}
-
-	switch (info->alternate_aux_channel) {
-	case DP_AUX_A:
-		aux_ch = AUX_CH_A;
-		break;
-	case DP_AUX_B:
-		aux_ch = AUX_CH_B;
-		break;
-	case DP_AUX_C:
-		aux_ch = AUX_CH_C;
-		break;
-	case DP_AUX_D:
-		aux_ch = AUX_CH_D;
-		break;
-	case DP_AUX_E:
-		aux_ch = AUX_CH_E;
-		break;
-	case DP_AUX_F:
-		aux_ch = AUX_CH_F;
-		break;
-	default:
-		MISSING_CASE(info->alternate_aux_channel);
-		aux_ch = AUX_CH_A;
-		break;
-	}
-
-	DRM_DEBUG_KMS("using AUX %c for port %c (VBT)\n",
-		      aux_ch_name(aux_ch), port_name(port));
-
-	return aux_ch;
-}
-
 static enum intel_display_power_domain
 intel_aux_power_domain(struct intel_dp *intel_dp)
 {
@@ -1691,7 +1643,7 @@ intel_dp_aux_init(struct intel_dp *intel_dp)
 	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
 	struct intel_encoder *encoder = &dp_to_dig_port(intel_dp)->base;
 
-	intel_dp->aux_ch = intel_aux_ch(intel_dp);
+	intel_dp->aux_ch = intel_aux_ch(dev_priv, encoder->port);
 	intel_dp->aux_power_domain = intel_aux_power_domain(intel_dp);
 
 	if (INTEL_GEN(dev_priv) >= 9) {
-- 
2.13.2

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Re: [PATCH 1/8] drm/i915: Move intel_aux_ch() to intel_bios.c

[Souza, Jose]

On Tue, 2018-10-30 at 17:40 +0200, Imre Deak wrote:
> From ICL onwards all the DDI/TypeC ports - even working in HDMI mode
> -
> need to know their corresponding AUX channel, so move the
> corresponding
> helper to a common place.
> 
> No functional change.
> 

Reviewed-by: José Roberto de Souza <jose.souza@intel.com>

> Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Signed-off-by: Imre Deak <imre.deak@intel.com>
> ---
>  drivers/gpu/drm/i915/i915_drv.h   |  1 +
>  drivers/gpu/drm/i915/intel_bios.c | 45
> +++++++++++++++++++++++++++++++++++
>  drivers/gpu/drm/i915/intel_dp.c   | 50 +--------------------------
> ------------
>  3 files changed, 47 insertions(+), 49 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_drv.h
> b/drivers/gpu/drm/i915/i915_drv.h
> index c9e5bab6861b..c57b701f72a7 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -3445,6 +3445,7 @@ bool intel_bios_is_port_hpd_inverted(struct
> drm_i915_private *dev_priv,
>  				     enum port port);
>  bool intel_bios_is_lspcon_present(struct drm_i915_private *dev_priv,
>  				enum port port);
> +enum aux_ch intel_aux_ch(struct drm_i915_private *dev_priv, enum
> port port);
>  
>  /* intel_acpi.c */
>  #ifdef CONFIG_ACPI
> diff --git a/drivers/gpu/drm/i915/intel_bios.c
> b/drivers/gpu/drm/i915/intel_bios.c
> index 1faa494e2bc9..c7682a470c6a 100644
> --- a/drivers/gpu/drm/i915/intel_bios.c
> +++ b/drivers/gpu/drm/i915/intel_bios.c
> @@ -2159,3 +2159,48 @@ intel_bios_is_lspcon_present(struct
> drm_i915_private *dev_priv,
>  
>  	return false;
>  }
> +
> +enum aux_ch intel_aux_ch(struct drm_i915_private *dev_priv, enum
> port port)
> +{
> +	const struct ddi_vbt_port_info *info =
> +		&dev_priv->vbt.ddi_port_info[port];
> +	enum aux_ch aux_ch;
> +
> +	if (!info->alternate_aux_channel) {
> +		aux_ch = (enum aux_ch) port;
> +
> +		DRM_DEBUG_KMS("using AUX %c for port %c (platform
> default)\n",
> +			      aux_ch_name(aux_ch), port_name(port));
> +		return aux_ch;
> +	}
> +
> +	switch (info->alternate_aux_channel) {
> +	case DP_AUX_A:
> +		aux_ch = AUX_CH_A;
> +		break;
> +	case DP_AUX_B:
> +		aux_ch = AUX_CH_B;
> +		break;
> +	case DP_AUX_C:
> +		aux_ch = AUX_CH_C;
> +		break;
> +	case DP_AUX_D:
> +		aux_ch = AUX_CH_D;
> +		break;
> +	case DP_AUX_E:
> +		aux_ch = AUX_CH_E;
> +		break;
> +	case DP_AUX_F:
> +		aux_ch = AUX_CH_F;
> +		break;
> +	default:
> +		MISSING_CASE(info->alternate_aux_channel);
> +		aux_ch = AUX_CH_A;
> +		break;
> +	}
> +
> +	DRM_DEBUG_KMS("using AUX %c for port %c (VBT)\n",
> +		      aux_ch_name(aux_ch), port_name(port));
> +
> +	return aux_ch;
> +}
> diff --git a/drivers/gpu/drm/i915/intel_dp.c
> b/drivers/gpu/drm/i915/intel_dp.c
> index 6b37d66194a3..2445897b8f6c 100644
> --- a/drivers/gpu/drm/i915/intel_dp.c
> +++ b/drivers/gpu/drm/i915/intel_dp.c
> @@ -1503,54 +1503,6 @@ intel_dp_aux_transfer(struct drm_dp_aux *aux,
> struct drm_dp_aux_msg *msg)
>  	return ret;
>  }
>  
> -static enum aux_ch intel_aux_ch(struct intel_dp *intel_dp)
> -{
> -	struct intel_encoder *encoder = &dp_to_dig_port(intel_dp)-
> >base;
> -	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
> -	enum port port = encoder->port;
> -	const struct ddi_vbt_port_info *info =
> -		&dev_priv->vbt.ddi_port_info[port];
> -	enum aux_ch aux_ch;
> -
> -	if (!info->alternate_aux_channel) {
> -		aux_ch = (enum aux_ch) port;
> -
> -		DRM_DEBUG_KMS("using AUX %c for port %c (platform
> default)\n",
> -			      aux_ch_name(aux_ch), port_name(port));
> -		return aux_ch;
> -	}
> -
> -	switch (info->alternate_aux_channel) {
> -	case DP_AUX_A:
> -		aux_ch = AUX_CH_A;
> -		break;
> -	case DP_AUX_B:
> -		aux_ch = AUX_CH_B;
> -		break;
> -	case DP_AUX_C:
> -		aux_ch = AUX_CH_C;
> -		break;
> -	case DP_AUX_D:
> -		aux_ch = AUX_CH_D;
> -		break;
> -	case DP_AUX_E:
> -		aux_ch = AUX_CH_E;
> -		break;
> -	case DP_AUX_F:
> -		aux_ch = AUX_CH_F;
> -		break;
> -	default:
> -		MISSING_CASE(info->alternate_aux_channel);
> -		aux_ch = AUX_CH_A;
> -		break;
> -	}
> -
> -	DRM_DEBUG_KMS("using AUX %c for port %c (VBT)\n",
> -		      aux_ch_name(aux_ch), port_name(port));
> -
> -	return aux_ch;
> -}
> -
>  static enum intel_display_power_domain
>  intel_aux_power_domain(struct intel_dp *intel_dp)
>  {
> @@ -1691,7 +1643,7 @@ intel_dp_aux_init(struct intel_dp *intel_dp)
>  	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
>  	struct intel_encoder *encoder = &dp_to_dig_port(intel_dp)-
> >base;
>  
> -	intel_dp->aux_ch = intel_aux_ch(intel_dp);
> +	intel_dp->aux_ch = intel_aux_ch(dev_priv, encoder->port);
>  	intel_dp->aux_power_domain = intel_aux_power_domain(intel_dp);
>  
>  	if (INTEL_GEN(dev_priv) >= 9) {
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[PATCH 2/8] drm/i915: Move aux_ch to intel_digital_port

[Imre Deak]

From ICL onwards all DDI/TypeC ports - even working in HDMI mode - need
to know their corresponding AUX CH, so move the field to a common
struct.

No functional change.

Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
---
 drivers/gpu/drm/i915/intel_ddi.c |  4 +++-
 drivers/gpu/drm/i915/intel_dp.c  | 35 +++++++++++++++++++++++------------
 drivers/gpu/drm/i915/intel_drv.h |  2 +-
 3 files changed, 27 insertions(+), 14 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c
index e40a8c97d34b..32a080265d03 100644
--- a/drivers/gpu/drm/i915/intel_ddi.c
+++ b/drivers/gpu/drm/i915/intel_ddi.c
@@ -2084,6 +2084,8 @@ bool intel_ddi_get_hw_state(struct intel_encoder *encoder,
 static inline enum intel_display_power_domain
 intel_ddi_main_link_aux_domain(struct intel_dp *intel_dp)
 {
+	struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
+
 	/* CNL+ HW requires corresponding AUX IOs to be powered up for PSR with
 	 * DC states enabled at the same time, while for driver initiated AUX
 	 * transfers we need the same AUX IOs to be powered but with DC states
@@ -2096,7 +2098,7 @@ intel_ddi_main_link_aux_domain(struct intel_dp *intel_dp)
 	 * Note that PSR is enabled only on Port A even though this function
 	 * returns the correct domain for other ports too.
 	 */
-	return intel_dp->aux_ch == AUX_CH_A ? POWER_DOMAIN_AUX_IO_A :
+	return dig_port->aux_ch == AUX_CH_A ? POWER_DOMAIN_AUX_IO_A :
 					      intel_dp->aux_power_domain;
 }
 
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index 2445897b8f6c..5530c604c694 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -1156,6 +1156,7 @@ static uint32_t g4x_get_aux_clock_divider(struct intel_dp *intel_dp, int index)
 static uint32_t ilk_get_aux_clock_divider(struct intel_dp *intel_dp, int index)
 {
 	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
+	struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
 
 	if (index)
 		return 0;
@@ -1165,7 +1166,7 @@ static uint32_t ilk_get_aux_clock_divider(struct intel_dp *intel_dp, int index)
 	 * like to run at 2MHz.  So, take the cdclk or PCH rawclk value and
 	 * divide by 2000 and use that
 	 */
-	if (intel_dp->aux_ch == AUX_CH_A)
+	if (dig_port->aux_ch == AUX_CH_A)
 		return DIV_ROUND_CLOSEST(dev_priv->cdclk.hw.cdclk, 2000);
 	else
 		return DIV_ROUND_CLOSEST(dev_priv->rawclk_freq, 2000);
@@ -1174,8 +1175,9 @@ static uint32_t ilk_get_aux_clock_divider(struct intel_dp *intel_dp, int index)
 static uint32_t hsw_get_aux_clock_divider(struct intel_dp *intel_dp, int index)
 {
 	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
+	struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
 
-	if (intel_dp->aux_ch != AUX_CH_A && HAS_PCH_LPT_H(dev_priv)) {
+	if (dig_port->aux_ch != AUX_CH_A && HAS_PCH_LPT_H(dev_priv)) {
 		/* Workaround for non-ULT HSW */
 		switch (index) {
 		case 0: return 63;
@@ -1506,7 +1508,9 @@ intel_dp_aux_transfer(struct drm_dp_aux *aux, struct drm_dp_aux_msg *msg)
 static enum intel_display_power_domain
 intel_aux_power_domain(struct intel_dp *intel_dp)
 {
-	switch (intel_dp->aux_ch) {
+	struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
+
+	switch (dig_port->aux_ch) {
 	case AUX_CH_A:
 		return POWER_DOMAIN_AUX_A;
 	case AUX_CH_B:
@@ -1520,7 +1524,7 @@ intel_aux_power_domain(struct intel_dp *intel_dp)
 	case AUX_CH_F:
 		return POWER_DOMAIN_AUX_F;
 	default:
-		MISSING_CASE(intel_dp->aux_ch);
+		MISSING_CASE(dig_port->aux_ch);
 		return POWER_DOMAIN_AUX_A;
 	}
 }
@@ -1528,7 +1532,8 @@ intel_aux_power_domain(struct intel_dp *intel_dp)
 static i915_reg_t g4x_aux_ctl_reg(struct intel_dp *intel_dp)
 {
 	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
-	enum aux_ch aux_ch = intel_dp->aux_ch;
+	struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
+	enum aux_ch aux_ch = dig_port->aux_ch;
 
 	switch (aux_ch) {
 	case AUX_CH_B:
@@ -1544,7 +1549,8 @@ static i915_reg_t g4x_aux_ctl_reg(struct intel_dp *intel_dp)
 static i915_reg_t g4x_aux_data_reg(struct intel_dp *intel_dp, int index)
 {
 	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
-	enum aux_ch aux_ch = intel_dp->aux_ch;
+	struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
+	enum aux_ch aux_ch = dig_port->aux_ch;
 
 	switch (aux_ch) {
 	case AUX_CH_B:
@@ -1560,7 +1566,8 @@ static i915_reg_t g4x_aux_data_reg(struct intel_dp *intel_dp, int index)
 static i915_reg_t ilk_aux_ctl_reg(struct intel_dp *intel_dp)
 {
 	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
-	enum aux_ch aux_ch = intel_dp->aux_ch;
+	struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
+	enum aux_ch aux_ch = dig_port->aux_ch;
 
 	switch (aux_ch) {
 	case AUX_CH_A:
@@ -1578,7 +1585,8 @@ static i915_reg_t ilk_aux_ctl_reg(struct intel_dp *intel_dp)
 static i915_reg_t ilk_aux_data_reg(struct intel_dp *intel_dp, int index)
 {
 	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
-	enum aux_ch aux_ch = intel_dp->aux_ch;
+	struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
+	enum aux_ch aux_ch = dig_port->aux_ch;
 
 	switch (aux_ch) {
 	case AUX_CH_A:
@@ -1596,7 +1604,8 @@ static i915_reg_t ilk_aux_data_reg(struct intel_dp *intel_dp, int index)
 static i915_reg_t skl_aux_ctl_reg(struct intel_dp *intel_dp)
 {
 	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
-	enum aux_ch aux_ch = intel_dp->aux_ch;
+	struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
+	enum aux_ch aux_ch = dig_port->aux_ch;
 
 	switch (aux_ch) {
 	case AUX_CH_A:
@@ -1615,7 +1624,8 @@ static i915_reg_t skl_aux_ctl_reg(struct intel_dp *intel_dp)
 static i915_reg_t skl_aux_data_reg(struct intel_dp *intel_dp, int index)
 {
 	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
-	enum aux_ch aux_ch = intel_dp->aux_ch;
+	struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
+	enum aux_ch aux_ch = dig_port->aux_ch;
 
 	switch (aux_ch) {
 	case AUX_CH_A:
@@ -1641,9 +1651,10 @@ static void
 intel_dp_aux_init(struct intel_dp *intel_dp)
 {
 	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
-	struct intel_encoder *encoder = &dp_to_dig_port(intel_dp)->base;
+	struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
+	struct intel_encoder *encoder = &dig_port->base;
 
-	intel_dp->aux_ch = intel_aux_ch(dev_priv, encoder->port);
+	dig_port->aux_ch = intel_aux_ch(dev_priv, encoder->port);
 	intel_dp->aux_power_domain = intel_aux_power_domain(intel_dp);
 
 	if (INTEL_GEN(dev_priv) >= 9) {
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index 268afb6d2746..a242a118389d 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -1109,7 +1109,6 @@ struct intel_dp {
 	bool link_trained;
 	bool has_audio;
 	bool reset_link_params;
-	enum aux_ch aux_ch;
 	uint8_t dpcd[DP_RECEIVER_CAP_SIZE];
 	uint8_t psr_dpcd[EDP_PSR_RECEIVER_CAP_SIZE];
 	uint8_t downstream_ports[DP_MAX_DOWNSTREAM_PORTS];
@@ -1213,6 +1212,7 @@ struct intel_digital_port {
 	enum irqreturn (*hpd_pulse)(struct intel_digital_port *, bool);
 	bool release_cl2_override;
 	uint8_t max_lanes;
+	enum aux_ch aux_ch;
 	enum intel_display_power_domain ddi_io_power_domain;
 	enum tc_port_type tc_type;
 
-- 
2.13.2

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Re: [PATCH 2/8] drm/i915: Move aux_ch to intel_digital_port

[Souza, Jose]

On Tue, 2018-10-30 at 17:40 +0200, Imre Deak wrote:
> From ICL onwards all DDI/TypeC ports - even working in HDMI mode -
> need
> to know their corresponding AUX CH, so move the field to a common
> struct.
> 
> No functional change.
> 
> Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Signed-off-by: Imre Deak <imre.deak@intel.com>
> ---
>  drivers/gpu/drm/i915/intel_ddi.c |  4 +++-
>  drivers/gpu/drm/i915/intel_dp.c  | 35 +++++++++++++++++++++++-------
> -----
>  drivers/gpu/drm/i915/intel_drv.h |  2 +-
>  3 files changed, 27 insertions(+), 14 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_ddi.c
> b/drivers/gpu/drm/i915/intel_ddi.c
> index e40a8c97d34b..32a080265d03 100644
> --- a/drivers/gpu/drm/i915/intel_ddi.c
> +++ b/drivers/gpu/drm/i915/intel_ddi.c
> @@ -2084,6 +2084,8 @@ bool intel_ddi_get_hw_state(struct
> intel_encoder *encoder,
>  static inline enum intel_display_power_domain
>  intel_ddi_main_link_aux_domain(struct intel_dp *intel_dp)
>  {
> +	struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
> +
>  	/* CNL+ HW requires corresponding AUX IOs to be powered up for
> PSR with
>  	 * DC states enabled at the same time, while for driver
> initiated AUX
>  	 * transfers we need the same AUX IOs to be powered but with DC
> states
> @@ -2096,7 +2098,7 @@ intel_ddi_main_link_aux_domain(struct intel_dp
> *intel_dp)
>  	 * Note that PSR is enabled only on Port A even though this
> function
>  	 * returns the correct domain for other ports too.
>  	 */
> -	return intel_dp->aux_ch == AUX_CH_A ? POWER_DOMAIN_AUX_IO_A :
> +	return dig_port->aux_ch == AUX_CH_A ? POWER_DOMAIN_AUX_IO_A :
>  					      intel_dp-
> >aux_power_domain;
>  }
>  
> diff --git a/drivers/gpu/drm/i915/intel_dp.c
> b/drivers/gpu/drm/i915/intel_dp.c
> index 2445897b8f6c..5530c604c694 100644
> --- a/drivers/gpu/drm/i915/intel_dp.c
> +++ b/drivers/gpu/drm/i915/intel_dp.c
> @@ -1156,6 +1156,7 @@ static uint32_t
> g4x_get_aux_clock_divider(struct intel_dp *intel_dp, int index)
>  static uint32_t ilk_get_aux_clock_divider(struct intel_dp *intel_dp,
> int index)
>  {
>  	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
> +	struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
>  
>  	if (index)
>  		return 0;
> @@ -1165,7 +1166,7 @@ static uint32_t
> ilk_get_aux_clock_divider(struct intel_dp *intel_dp, int index)
>  	 * like to run at 2MHz.  So, take the cdclk or PCH rawclk value
> and
>  	 * divide by 2000 and use that
>  	 */
> -	if (intel_dp->aux_ch == AUX_CH_A)
> +	if (dig_port->aux_ch == AUX_CH_A)
>  		return DIV_ROUND_CLOSEST(dev_priv->cdclk.hw.cdclk,
> 2000);
>  	else
>  		return DIV_ROUND_CLOSEST(dev_priv->rawclk_freq, 2000);
> @@ -1174,8 +1175,9 @@ static uint32_t
> ilk_get_aux_clock_divider(struct intel_dp *intel_dp, int index)
>  static uint32_t hsw_get_aux_clock_divider(struct intel_dp *intel_dp,
> int index)
>  {
>  	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
> +	struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
>  
> -	if (intel_dp->aux_ch != AUX_CH_A && HAS_PCH_LPT_H(dev_priv)) {
> +	if (dig_port->aux_ch != AUX_CH_A && HAS_PCH_LPT_H(dev_priv)) {
>  		/* Workaround for non-ULT HSW */
>  		switch (index) {
>  		case 0: return 63;
> @@ -1506,7 +1508,9 @@ intel_dp_aux_transfer(struct drm_dp_aux *aux,
> struct drm_dp_aux_msg *msg)
>  static enum intel_display_power_domain
>  intel_aux_power_domain(struct intel_dp *intel_dp)
>  {
> -	switch (intel_dp->aux_ch) {
> +	struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
> +
> +	switch (dig_port->aux_ch) {
>  	case AUX_CH_A:
>  		return POWER_DOMAIN_AUX_A;
>  	case AUX_CH_B:
> @@ -1520,7 +1524,7 @@ intel_aux_power_domain(struct intel_dp
> *intel_dp)
>  	case AUX_CH_F:
>  		return POWER_DOMAIN_AUX_F;
>  	default:
> -		MISSING_CASE(intel_dp->aux_ch);
> +		MISSING_CASE(dig_port->aux_ch);
>  		return POWER_DOMAIN_AUX_A;
>  	}
>  }
> @@ -1528,7 +1532,8 @@ intel_aux_power_domain(struct intel_dp
> *intel_dp)
>  static i915_reg_t g4x_aux_ctl_reg(struct intel_dp *intel_dp)
>  {
>  	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
> -	enum aux_ch aux_ch = intel_dp->aux_ch;
> +	struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
> +	enum aux_ch aux_ch = dig_port->aux_ch;
>  
>  	switch (aux_ch) {
>  	case AUX_CH_B:
> @@ -1544,7 +1549,8 @@ static i915_reg_t g4x_aux_ctl_reg(struct
> intel_dp *intel_dp)
>  static i915_reg_t g4x_aux_data_reg(struct intel_dp *intel_dp, int
> index)
>  {
>  	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
> -	enum aux_ch aux_ch = intel_dp->aux_ch;
> +	struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
> +	enum aux_ch aux_ch = dig_port->aux_ch;
>  
>  	switch (aux_ch) {
>  	case AUX_CH_B:
> @@ -1560,7 +1566,8 @@ static i915_reg_t g4x_aux_data_reg(struct
> intel_dp *intel_dp, int index)
>  static i915_reg_t ilk_aux_ctl_reg(struct intel_dp *intel_dp)
>  {
>  	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
> -	enum aux_ch aux_ch = intel_dp->aux_ch;
> +	struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
> +	enum aux_ch aux_ch = dig_port->aux_ch;
>  
>  	switch (aux_ch) {
>  	case AUX_CH_A:
> @@ -1578,7 +1585,8 @@ static i915_reg_t ilk_aux_ctl_reg(struct
> intel_dp *intel_dp)
>  static i915_reg_t ilk_aux_data_reg(struct intel_dp *intel_dp, int
> index)
>  {
>  	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
> -	enum aux_ch aux_ch = intel_dp->aux_ch;
> +	struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
> +	enum aux_ch aux_ch = dig_port->aux_ch;
>  
>  	switch (aux_ch) {
>  	case AUX_CH_A:
> @@ -1596,7 +1604,8 @@ static i915_reg_t ilk_aux_data_reg(struct
> intel_dp *intel_dp, int index)
>  static i915_reg_t skl_aux_ctl_reg(struct intel_dp *intel_dp)
>  {
>  	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
> -	enum aux_ch aux_ch = intel_dp->aux_ch;
> +	struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
> +	enum aux_ch aux_ch = dig_port->aux_ch;
>  
>  	switch (aux_ch) {
>  	case AUX_CH_A:
> @@ -1615,7 +1624,8 @@ static i915_reg_t skl_aux_ctl_reg(struct
> intel_dp *intel_dp)
>  static i915_reg_t skl_aux_data_reg(struct intel_dp *intel_dp, int
> index)
>  {
>  	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
> -	enum aux_ch aux_ch = intel_dp->aux_ch;
> +	struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
> +	enum aux_ch aux_ch = dig_port->aux_ch;
>  
>  	switch (aux_ch) {
>  	case AUX_CH_A:
> @@ -1641,9 +1651,10 @@ static void
>  intel_dp_aux_init(struct intel_dp *intel_dp)
>  {
>  	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
> -	struct intel_encoder *encoder = &dp_to_dig_port(intel_dp)-
> >base;
> +	struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
> +	struct intel_encoder *encoder = &dig_port->base;
>  
> -	intel_dp->aux_ch = intel_aux_ch(dev_priv, encoder->port);
> +	dig_port->aux_ch = intel_aux_ch(dev_priv, encoder->port);
>  	intel_dp->aux_power_domain = intel_aux_power_domain(intel_dp);
>  
>  	if (INTEL_GEN(dev_priv) >= 9) {
> diff --git a/drivers/gpu/drm/i915/intel_drv.h
> b/drivers/gpu/drm/i915/intel_drv.h
> index 268afb6d2746..a242a118389d 100644
> --- a/drivers/gpu/drm/i915/intel_drv.h
> +++ b/drivers/gpu/drm/i915/intel_drv.h
> @@ -1109,7 +1109,6 @@ struct intel_dp {
>  	bool link_trained;
>  	bool has_audio;
>  	bool reset_link_params;
> -	enum aux_ch aux_ch;
>  	uint8_t dpcd[DP_RECEIVER_CAP_SIZE];
>  	uint8_t psr_dpcd[EDP_PSR_RECEIVER_CAP_SIZE];
>  	uint8_t downstream_ports[DP_MAX_DOWNSTREAM_PORTS];
> @@ -1213,6 +1212,7 @@ struct intel_digital_port {
>  	enum irqreturn (*hpd_pulse)(struct intel_digital_port *, bool);
>  	bool release_cl2_override;
>  	uint8_t max_lanes;

Please leave a comment here, with the commit message explanation so no
one uses it my mistake like using for HDMI in combophy ports.

> +	enum aux_ch aux_ch;
>  	enum intel_display_power_domain ddi_io_power_domain;
>  	enum tc_port_type tc_type;
>  
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Re: [PATCH 2/8] drm/i915: Move aux_ch to intel_digital_port

[Imre Deak]

On Wed, Oct 31, 2018 at 12:36:00AM +0200, Souza, Jose wrote:
> On Tue, 2018-10-30 at 17:40 +0200, Imre Deak wrote:
> > From ICL onwards all DDI/TypeC ports - even working in HDMI mode -
> > need
> > to know their corresponding AUX CH, so move the field to a common
> > struct.
> > 
> > No functional change.
> > 
> > Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
> > Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > Signed-off-by: Imre Deak <imre.deak@intel.com>
> > ---
> >  drivers/gpu/drm/i915/intel_ddi.c |  4 +++-
> >  drivers/gpu/drm/i915/intel_dp.c  | 35 +++++++++++++++++++++++-------
> > -----
> >  drivers/gpu/drm/i915/intel_drv.h |  2 +-
> >  3 files changed, 27 insertions(+), 14 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/intel_ddi.c
> > b/drivers/gpu/drm/i915/intel_ddi.c
> > index e40a8c97d34b..32a080265d03 100644
> > --- a/drivers/gpu/drm/i915/intel_ddi.c
> > +++ b/drivers/gpu/drm/i915/intel_ddi.c
> > @@ -2084,6 +2084,8 @@ bool intel_ddi_get_hw_state(struct
> > intel_encoder *encoder,
> >  static inline enum intel_display_power_domain
> >  intel_ddi_main_link_aux_domain(struct intel_dp *intel_dp)
> >  {
> > +	struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
> > +
> >  	/* CNL+ HW requires corresponding AUX IOs to be powered up for
> > PSR with
> >  	 * DC states enabled at the same time, while for driver
> > initiated AUX
> >  	 * transfers we need the same AUX IOs to be powered but with DC
> > states
> > @@ -2096,7 +2098,7 @@ intel_ddi_main_link_aux_domain(struct intel_dp
> > *intel_dp)
> >  	 * Note that PSR is enabled only on Port A even though this
> > function
> >  	 * returns the correct domain for other ports too.
> >  	 */
> > -	return intel_dp->aux_ch == AUX_CH_A ? POWER_DOMAIN_AUX_IO_A :
> > +	return dig_port->aux_ch == AUX_CH_A ? POWER_DOMAIN_AUX_IO_A :
> >  					      intel_dp-
> > >aux_power_domain;
> >  }
> >  
> > diff --git a/drivers/gpu/drm/i915/intel_dp.c
> > b/drivers/gpu/drm/i915/intel_dp.c
> > index 2445897b8f6c..5530c604c694 100644
> > --- a/drivers/gpu/drm/i915/intel_dp.c
> > +++ b/drivers/gpu/drm/i915/intel_dp.c
> > @@ -1156,6 +1156,7 @@ static uint32_t
> > g4x_get_aux_clock_divider(struct intel_dp *intel_dp, int index)
> >  static uint32_t ilk_get_aux_clock_divider(struct intel_dp *intel_dp,
> > int index)
> >  {
> >  	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
> > +	struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
> >  
> >  	if (index)
> >  		return 0;
> > @@ -1165,7 +1166,7 @@ static uint32_t
> > ilk_get_aux_clock_divider(struct intel_dp *intel_dp, int index)
> >  	 * like to run at 2MHz.  So, take the cdclk or PCH rawclk value
> > and
> >  	 * divide by 2000 and use that
> >  	 */
> > -	if (intel_dp->aux_ch == AUX_CH_A)
> > +	if (dig_port->aux_ch == AUX_CH_A)
> >  		return DIV_ROUND_CLOSEST(dev_priv->cdclk.hw.cdclk,
> > 2000);
> >  	else
> >  		return DIV_ROUND_CLOSEST(dev_priv->rawclk_freq, 2000);
> > @@ -1174,8 +1175,9 @@ static uint32_t
> > ilk_get_aux_clock_divider(struct intel_dp *intel_dp, int index)
> >  static uint32_t hsw_get_aux_clock_divider(struct intel_dp *intel_dp,
> > int index)
> >  {
> >  	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
> > +	struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
> >  
> > -	if (intel_dp->aux_ch != AUX_CH_A && HAS_PCH_LPT_H(dev_priv)) {
> > +	if (dig_port->aux_ch != AUX_CH_A && HAS_PCH_LPT_H(dev_priv)) {
> >  		/* Workaround for non-ULT HSW */
> >  		switch (index) {
> >  		case 0: return 63;
> > @@ -1506,7 +1508,9 @@ intel_dp_aux_transfer(struct drm_dp_aux *aux,
> > struct drm_dp_aux_msg *msg)
> >  static enum intel_display_power_domain
> >  intel_aux_power_domain(struct intel_dp *intel_dp)
> >  {
> > -	switch (intel_dp->aux_ch) {
> > +	struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
> > +
> > +	switch (dig_port->aux_ch) {
> >  	case AUX_CH_A:
> >  		return POWER_DOMAIN_AUX_A;
> >  	case AUX_CH_B:
> > @@ -1520,7 +1524,7 @@ intel_aux_power_domain(struct intel_dp
> > *intel_dp)
> >  	case AUX_CH_F:
> >  		return POWER_DOMAIN_AUX_F;
> >  	default:
> > -		MISSING_CASE(intel_dp->aux_ch);
> > +		MISSING_CASE(dig_port->aux_ch);
> >  		return POWER_DOMAIN_AUX_A;
> >  	}
> >  }
> > @@ -1528,7 +1532,8 @@ intel_aux_power_domain(struct intel_dp
> > *intel_dp)
> >  static i915_reg_t g4x_aux_ctl_reg(struct intel_dp *intel_dp)
> >  {
> >  	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
> > -	enum aux_ch aux_ch = intel_dp->aux_ch;
> > +	struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
> > +	enum aux_ch aux_ch = dig_port->aux_ch;
> >  
> >  	switch (aux_ch) {
> >  	case AUX_CH_B:
> > @@ -1544,7 +1549,8 @@ static i915_reg_t g4x_aux_ctl_reg(struct
> > intel_dp *intel_dp)
> >  static i915_reg_t g4x_aux_data_reg(struct intel_dp *intel_dp, int
> > index)
> >  {
> >  	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
> > -	enum aux_ch aux_ch = intel_dp->aux_ch;
> > +	struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
> > +	enum aux_ch aux_ch = dig_port->aux_ch;
> >  
> >  	switch (aux_ch) {
> >  	case AUX_CH_B:
> > @@ -1560,7 +1566,8 @@ static i915_reg_t g4x_aux_data_reg(struct
> > intel_dp *intel_dp, int index)
> >  static i915_reg_t ilk_aux_ctl_reg(struct intel_dp *intel_dp)
> >  {
> >  	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
> > -	enum aux_ch aux_ch = intel_dp->aux_ch;
> > +	struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
> > +	enum aux_ch aux_ch = dig_port->aux_ch;
> >  
> >  	switch (aux_ch) {
> >  	case AUX_CH_A:
> > @@ -1578,7 +1585,8 @@ static i915_reg_t ilk_aux_ctl_reg(struct
> > intel_dp *intel_dp)
> >  static i915_reg_t ilk_aux_data_reg(struct intel_dp *intel_dp, int
> > index)
> >  {
> >  	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
> > -	enum aux_ch aux_ch = intel_dp->aux_ch;
> > +	struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
> > +	enum aux_ch aux_ch = dig_port->aux_ch;
> >  
> >  	switch (aux_ch) {
> >  	case AUX_CH_A:
> > @@ -1596,7 +1604,8 @@ static i915_reg_t ilk_aux_data_reg(struct
> > intel_dp *intel_dp, int index)
> >  static i915_reg_t skl_aux_ctl_reg(struct intel_dp *intel_dp)
> >  {
> >  	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
> > -	enum aux_ch aux_ch = intel_dp->aux_ch;
> > +	struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
> > +	enum aux_ch aux_ch = dig_port->aux_ch;
> >  
> >  	switch (aux_ch) {
> >  	case AUX_CH_A:
> > @@ -1615,7 +1624,8 @@ static i915_reg_t skl_aux_ctl_reg(struct
> > intel_dp *intel_dp)
> >  static i915_reg_t skl_aux_data_reg(struct intel_dp *intel_dp, int
> > index)
> >  {
> >  	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
> > -	enum aux_ch aux_ch = intel_dp->aux_ch;
> > +	struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
> > +	enum aux_ch aux_ch = dig_port->aux_ch;
> >  
> >  	switch (aux_ch) {
> >  	case AUX_CH_A:
> > @@ -1641,9 +1651,10 @@ static void
> >  intel_dp_aux_init(struct intel_dp *intel_dp)
> >  {
> >  	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
> > -	struct intel_encoder *encoder = &dp_to_dig_port(intel_dp)-
> > >base;
> > +	struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
> > +	struct intel_encoder *encoder = &dig_port->base;
> >  
> > -	intel_dp->aux_ch = intel_aux_ch(dev_priv, encoder->port);
> > +	dig_port->aux_ch = intel_aux_ch(dev_priv, encoder->port);
> >  	intel_dp->aux_power_domain = intel_aux_power_domain(intel_dp);
> >  
> >  	if (INTEL_GEN(dev_priv) >= 9) {
> > diff --git a/drivers/gpu/drm/i915/intel_drv.h
> > b/drivers/gpu/drm/i915/intel_drv.h
> > index 268afb6d2746..a242a118389d 100644
> > --- a/drivers/gpu/drm/i915/intel_drv.h
> > +++ b/drivers/gpu/drm/i915/intel_drv.h
> > @@ -1109,7 +1109,6 @@ struct intel_dp {
> >  	bool link_trained;
> >  	bool has_audio;
> >  	bool reset_link_params;
> > -	enum aux_ch aux_ch;
> >  	uint8_t dpcd[DP_RECEIVER_CAP_SIZE];
> >  	uint8_t psr_dpcd[EDP_PSR_RECEIVER_CAP_SIZE];
> >  	uint8_t downstream_ports[DP_MAX_DOWNSTREAM_PORTS];
> > @@ -1213,6 +1212,7 @@ struct intel_digital_port {
> >  	enum irqreturn (*hpd_pulse)(struct intel_digital_port *, bool);
> >  	bool release_cl2_override;
> >  	uint8_t max_lanes;
> 
> Please leave a comment here, with the commit message explanation so no
> one uses it my mistake like using for HDMI in combophy ports.

Ok.

> 
> > +	enum aux_ch aux_ch;
> >  	enum intel_display_power_domain ddi_io_power_domain;
> >  	enum tc_port_type tc_type;
> >  
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[PATCH 3/8] drm/i915: Init aux_ch for HDMI ports too

[Imre Deak]

From ICL onwards DDI/TypeC ports - even in HDMI static mode - need to know
which AUX CH belongs to them, so initialize aux_ch for those ports too.
For consistency do this for all HDMI ports, not only for DDI/TypeC ones.

Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
---
 drivers/gpu/drm/i915/intel_ddi.c  | 1 +
 drivers/gpu/drm/i915/intel_dp.c   | 2 +-
 drivers/gpu/drm/i915/intel_hdmi.c | 1 +
 3 files changed, 3 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c
index 32a080265d03..3739ef003819 100644
--- a/drivers/gpu/drm/i915/intel_ddi.c
+++ b/drivers/gpu/drm/i915/intel_ddi.c
@@ -3852,6 +3852,7 @@ void intel_ddi_init(struct drm_i915_private *dev_priv, enum port port)
 			(DDI_BUF_PORT_REVERSAL | DDI_A_4_LANES);
 	intel_dig_port->dp.output_reg = INVALID_MMIO_REG;
 	intel_dig_port->max_lanes = intel_ddi_max_lanes(intel_dig_port);
+	intel_dig_port->aux_ch = intel_aux_ch(dev_priv, port);
 
 	switch (port) {
 	case PORT_A:
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index 5530c604c694..6645c9faca9a 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -1654,7 +1654,6 @@ intel_dp_aux_init(struct intel_dp *intel_dp)
 	struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
 	struct intel_encoder *encoder = &dig_port->base;
 
-	dig_port->aux_ch = intel_aux_ch(dev_priv, encoder->port);
 	intel_dp->aux_power_domain = intel_aux_power_domain(intel_dp);
 
 	if (INTEL_GEN(dev_priv) >= 9) {
@@ -6706,6 +6705,7 @@ bool intel_dp_init(struct drm_i915_private *dev_priv,
 	if (port != PORT_A)
 		intel_infoframe_init(intel_dig_port);
 
+	intel_dig_port->aux_ch = intel_aux_ch(dev_priv, port);
 	if (!intel_dp_init_connector(intel_dig_port, intel_connector))
 		goto err_init_connector;
 
diff --git a/drivers/gpu/drm/i915/intel_hdmi.c b/drivers/gpu/drm/i915/intel_hdmi.c
index 129b880bce64..b50c5497048a 100644
--- a/drivers/gpu/drm/i915/intel_hdmi.c
+++ b/drivers/gpu/drm/i915/intel_hdmi.c
@@ -2506,5 +2506,6 @@ void intel_hdmi_init(struct drm_i915_private *dev_priv,
 
 	intel_infoframe_init(intel_dig_port);
 
+	intel_dig_port->aux_ch = intel_aux_ch(dev_priv, port);
 	intel_hdmi_init_connector(intel_dig_port, intel_connector);
 }
-- 
2.13.2

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Re: [PATCH 3/8] drm/i915: Init aux_ch for HDMI ports too

[Souza, Jose]

On Tue, 2018-10-30 at 17:40 +0200, Imre Deak wrote:
> From ICL onwards DDI/TypeC ports - even in HDMI static mode - need to
> know
> which AUX CH belongs to them, so initialize aux_ch for those ports
> too.
> For consistency do this for all HDMI ports, not only for DDI/TypeC
> ones.
> 
> Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Signed-off-by: Imre Deak <imre.deak@intel.com>
> ---
>  drivers/gpu/drm/i915/intel_ddi.c  | 1 +
>  drivers/gpu/drm/i915/intel_dp.c   | 2 +-
>  drivers/gpu/drm/i915/intel_hdmi.c | 1 +
>  3 files changed, 3 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_ddi.c
> b/drivers/gpu/drm/i915/intel_ddi.c
> index 32a080265d03..3739ef003819 100644
> --- a/drivers/gpu/drm/i915/intel_ddi.c
> +++ b/drivers/gpu/drm/i915/intel_ddi.c
> @@ -3852,6 +3852,7 @@ void intel_ddi_init(struct drm_i915_private
> *dev_priv, enum port port)
>  			(DDI_BUF_PORT_REVERSAL | DDI_A_4_LANES);
>  	intel_dig_port->dp.output_reg = INVALID_MMIO_REG;
>  	intel_dig_port->max_lanes =
> intel_ddi_max_lanes(intel_dig_port);
> +	intel_dig_port->aux_ch = intel_aux_ch(dev_priv, port);
>  
>  	switch (port) {
>  	case PORT_A:
> diff --git a/drivers/gpu/drm/i915/intel_dp.c
> b/drivers/gpu/drm/i915/intel_dp.c
> index 5530c604c694..6645c9faca9a 100644
> --- a/drivers/gpu/drm/i915/intel_dp.c
> +++ b/drivers/gpu/drm/i915/intel_dp.c
> @@ -1654,7 +1654,6 @@ intel_dp_aux_init(struct intel_dp *intel_dp)
>  	struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
>  	struct intel_encoder *encoder = &dig_port->base;
>  
> -	dig_port->aux_ch = intel_aux_ch(dev_priv, encoder->port);
>  	intel_dp->aux_power_domain = intel_aux_power_domain(intel_dp);
>  
>  	if (INTEL_GEN(dev_priv) >= 9) {
> @@ -6706,6 +6705,7 @@ bool intel_dp_init(struct drm_i915_private
> *dev_priv,
>  	if (port != PORT_A)
>  		intel_infoframe_init(intel_dig_port);
>  
> +	intel_dig_port->aux_ch = intel_aux_ch(dev_priv, port);
>  	if (!intel_dp_init_connector(intel_dig_port, intel_connector))
>  		goto err_init_connector;
>  
> diff --git a/drivers/gpu/drm/i915/intel_hdmi.c
> b/drivers/gpu/drm/i915/intel_hdmi.c
> index 129b880bce64..b50c5497048a 100644
> --- a/drivers/gpu/drm/i915/intel_hdmi.c
> +++ b/drivers/gpu/drm/i915/intel_hdmi.c
> @@ -2506,5 +2506,6 @@ void intel_hdmi_init(struct drm_i915_private
> *dev_priv,
>  
>  	intel_infoframe_init(intel_dig_port);
>  
> +	intel_dig_port->aux_ch = intel_aux_ch(dev_priv, port);

All ICL ports are DDI ports and aux_ch will not be used in previous
gens so I don't see the point to set it here and in intel_dp_init().

>  	intel_hdmi_init_connector(intel_dig_port, intel_connector);
>  }
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Re: [PATCH 3/8] drm/i915: Init aux_ch for HDMI ports too

[Imre Deak]

On Wed, Oct 31, 2018 at 12:32:35AM +0200, Souza, Jose wrote:
> On Tue, 2018-10-30 at 17:40 +0200, Imre Deak wrote:
> > From ICL onwards DDI/TypeC ports - even in HDMI static mode - need to
> > know
> > which AUX CH belongs to them, so initialize aux_ch for those ports
> > too.
> > For consistency do this for all HDMI ports, not only for DDI/TypeC
> > ones.
> > 
> > Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
> > Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > Signed-off-by: Imre Deak <imre.deak@intel.com>
> > ---
> >  drivers/gpu/drm/i915/intel_ddi.c  | 1 +
> >  drivers/gpu/drm/i915/intel_dp.c   | 2 +-
> >  drivers/gpu/drm/i915/intel_hdmi.c | 1 +
> >  3 files changed, 3 insertions(+), 1 deletion(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/intel_ddi.c
> > b/drivers/gpu/drm/i915/intel_ddi.c
> > index 32a080265d03..3739ef003819 100644
> > --- a/drivers/gpu/drm/i915/intel_ddi.c
> > +++ b/drivers/gpu/drm/i915/intel_ddi.c
> > @@ -3852,6 +3852,7 @@ void intel_ddi_init(struct drm_i915_private
> > *dev_priv, enum port port)
> >  			(DDI_BUF_PORT_REVERSAL | DDI_A_4_LANES);
> >  	intel_dig_port->dp.output_reg = INVALID_MMIO_REG;
> >  	intel_dig_port->max_lanes =
> > intel_ddi_max_lanes(intel_dig_port);
> > +	intel_dig_port->aux_ch = intel_aux_ch(dev_priv, port);
> >  
> >  	switch (port) {
> >  	case PORT_A:
> > diff --git a/drivers/gpu/drm/i915/intel_dp.c
> > b/drivers/gpu/drm/i915/intel_dp.c
> > index 5530c604c694..6645c9faca9a 100644
> > --- a/drivers/gpu/drm/i915/intel_dp.c
> > +++ b/drivers/gpu/drm/i915/intel_dp.c
> > @@ -1654,7 +1654,6 @@ intel_dp_aux_init(struct intel_dp *intel_dp)
> >  	struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
> >  	struct intel_encoder *encoder = &dig_port->base;
> >  
> > -	dig_port->aux_ch = intel_aux_ch(dev_priv, encoder->port);
> >  	intel_dp->aux_power_domain = intel_aux_power_domain(intel_dp);
> >  
> >  	if (INTEL_GEN(dev_priv) >= 9) {
> > @@ -6706,6 +6705,7 @@ bool intel_dp_init(struct drm_i915_private
> > *dev_priv,
> >  	if (port != PORT_A)
> >  		intel_infoframe_init(intel_dig_port);
> >  
> > +	intel_dig_port->aux_ch = intel_aux_ch(dev_priv, port);
> >  	if (!intel_dp_init_connector(intel_dig_port, intel_connector))
> >  		goto err_init_connector;
> >  
> > diff --git a/drivers/gpu/drm/i915/intel_hdmi.c
> > b/drivers/gpu/drm/i915/intel_hdmi.c
> > index 129b880bce64..b50c5497048a 100644
> > --- a/drivers/gpu/drm/i915/intel_hdmi.c
> > +++ b/drivers/gpu/drm/i915/intel_hdmi.c
> > @@ -2506,5 +2506,6 @@ void intel_hdmi_init(struct drm_i915_private
> > *dev_priv,
> >  
> >  	intel_infoframe_init(intel_dig_port);
> >  
> > +	intel_dig_port->aux_ch = intel_aux_ch(dev_priv, port);
> 
> All ICL ports are DDI ports and aux_ch will not be used in previous
> gens so I don't see the point to set it here and in intel_dp_init().

aux_ch is used on all GENs for DP ports. As I mentioned in the commit
message I initialize it for HDMI ports too for consistency.

> 
> >  	intel_hdmi_init_connector(intel_dig_port, intel_connector);
> >  }
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Re: [PATCH 3/8] drm/i915: Init aux_ch for HDMI ports too

[Souza, Jose]

On Wed, 2018-10-31 at 00:38 +0200, Imre Deak wrote:
> On Wed, Oct 31, 2018 at 12:32:35AM +0200, Souza, Jose wrote:
> > On Tue, 2018-10-30 at 17:40 +0200, Imre Deak wrote:
> > > From ICL onwards DDI/TypeC ports - even in HDMI static mode -
> > > need to
> > > know
> > > which AUX CH belongs to them, so initialize aux_ch for those
> > > ports
> > > too.
> > > For consistency do this for all HDMI ports, not only for
> > > DDI/TypeC
> > > ones.
> > > 
> > > Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
> > > Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > > Signed-off-by: Imre Deak <imre.deak@intel.com>
> > > ---
> > >  drivers/gpu/drm/i915/intel_ddi.c  | 1 +
> > >  drivers/gpu/drm/i915/intel_dp.c   | 2 +-
> > >  drivers/gpu/drm/i915/intel_hdmi.c | 1 +
> > >  3 files changed, 3 insertions(+), 1 deletion(-)
> > > 
> > > diff --git a/drivers/gpu/drm/i915/intel_ddi.c
> > > b/drivers/gpu/drm/i915/intel_ddi.c
> > > index 32a080265d03..3739ef003819 100644
> > > --- a/drivers/gpu/drm/i915/intel_ddi.c
> > > +++ b/drivers/gpu/drm/i915/intel_ddi.c
> > > @@ -3852,6 +3852,7 @@ void intel_ddi_init(struct drm_i915_private
> > > *dev_priv, enum port port)
> > >  			(DDI_BUF_PORT_REVERSAL | DDI_A_4_LANES);
> > >  	intel_dig_port->dp.output_reg = INVALID_MMIO_REG;
> > >  	intel_dig_port->max_lanes =
> > > intel_ddi_max_lanes(intel_dig_port);
> > > +	intel_dig_port->aux_ch = intel_aux_ch(dev_priv, port);
> > >  
> > >  	switch (port) {
> > >  	case PORT_A:
> > > diff --git a/drivers/gpu/drm/i915/intel_dp.c
> > > b/drivers/gpu/drm/i915/intel_dp.c
> > > index 5530c604c694..6645c9faca9a 100644
> > > --- a/drivers/gpu/drm/i915/intel_dp.c
> > > +++ b/drivers/gpu/drm/i915/intel_dp.c
> > > @@ -1654,7 +1654,6 @@ intel_dp_aux_init(struct intel_dp
> > > *intel_dp)
> > >  	struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
> > >  	struct intel_encoder *encoder = &dig_port->base;
> > >  
> > > -	dig_port->aux_ch = intel_aux_ch(dev_priv, encoder->port);
> > >  	intel_dp->aux_power_domain = intel_aux_power_domain(intel_dp);
> > >  
> > >  	if (INTEL_GEN(dev_priv) >= 9) {
> > > @@ -6706,6 +6705,7 @@ bool intel_dp_init(struct drm_i915_private
> > > *dev_priv,
> > >  	if (port != PORT_A)
> > >  		intel_infoframe_init(intel_dig_port);
> > >  
> > > +	intel_dig_port->aux_ch = intel_aux_ch(dev_priv, port);
> > >  	if (!intel_dp_init_connector(intel_dig_port, intel_connector))
> > >  		goto err_init_connector;
> > >  
> > > diff --git a/drivers/gpu/drm/i915/intel_hdmi.c
> > > b/drivers/gpu/drm/i915/intel_hdmi.c
> > > index 129b880bce64..b50c5497048a 100644
> > > --- a/drivers/gpu/drm/i915/intel_hdmi.c
> > > +++ b/drivers/gpu/drm/i915/intel_hdmi.c
> > > @@ -2506,5 +2506,6 @@ void intel_hdmi_init(struct
> > > drm_i915_private
> > > *dev_priv,
> > >  
> > >  	intel_infoframe_init(intel_dig_port);
> > >  
> > > +	intel_dig_port->aux_ch = intel_aux_ch(dev_priv, port);
> > 
> > All ICL ports are DDI ports and aux_ch will not be used in previous
> > gens so I don't see the point to set it here and in
> > intel_dp_init().
> 
> aux_ch is used on all GENs for DP ports. As I mentioned in the 
> message I initialize it for HDMI ports too for consistency.

Huuum you are right but I still have mixed feelings about adding it to
intel_hdmi_init(), I will leave to someone else to comment on that.

> 
> > >  	intel_hdmi_init_connector(intel_dig_port, intel_connector);
> > >  }
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[PATCH 4/8] drm/i915: Use a helper to get the aux power domain

[Imre Deak]

From ICL onwards the AUX power domain may change dynamically based on
whether a DDI/TypeC port is in thunderbolt or non-thunderbolt mode, so
use a helper function instead of a static field to get the current
domain.

Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
---
 drivers/gpu/drm/i915/intel_ddi.c     |  2 +-
 drivers/gpu/drm/i915/intel_display.c | 22 +++++++++++
 drivers/gpu/drm/i915/intel_dp.c      | 73 +++++++++++++++---------------------
 drivers/gpu/drm/i915/intel_drv.h     |  3 +-
 4 files changed, 56 insertions(+), 44 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c
index 3739ef003819..5bb459011a49 100644
--- a/drivers/gpu/drm/i915/intel_ddi.c
+++ b/drivers/gpu/drm/i915/intel_ddi.c
@@ -2099,7 +2099,7 @@ intel_ddi_main_link_aux_domain(struct intel_dp *intel_dp)
 	 * returns the correct domain for other ports too.
 	 */
 	return dig_port->aux_ch == AUX_CH_A ? POWER_DOMAIN_AUX_IO_A :
-					      intel_dp->aux_power_domain;
+					      intel_aux_power_domain(dig_port);
 }
 
 static u64 intel_ddi_get_power_domains(struct intel_encoder *encoder,
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index c3cadc09f859..36710a30fb37 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -5949,6 +5949,28 @@ enum intel_display_power_domain intel_port_to_power_domain(enum port port)
 	}
 }
 
+enum intel_display_power_domain
+intel_aux_power_domain(struct intel_digital_port *dig_port)
+{
+	switch (dig_port->aux_ch) {
+	case AUX_CH_A:
+		return POWER_DOMAIN_AUX_A;
+	case AUX_CH_B:
+		return POWER_DOMAIN_AUX_B;
+	case AUX_CH_C:
+		return POWER_DOMAIN_AUX_C;
+	case AUX_CH_D:
+		return POWER_DOMAIN_AUX_D;
+	case AUX_CH_E:
+		return POWER_DOMAIN_AUX_E;
+	case AUX_CH_F:
+		return POWER_DOMAIN_AUX_F;
+	default:
+		MISSING_CASE(dig_port->aux_ch);
+		return POWER_DOMAIN_AUX_A;
+	}
+}
+
 static u64 get_crtc_power_domains(struct drm_crtc *crtc,
 				  struct intel_crtc_state *crtc_state)
 {
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index 6645c9faca9a..e6f59ef59be6 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -690,7 +690,8 @@ static void pps_lock(struct intel_dp *intel_dp)
 	 * See intel_power_sequencer_reset() why we need
 	 * a power domain reference here.
 	 */
-	intel_display_power_get(dev_priv, intel_dp->aux_power_domain);
+	intel_display_power_get(dev_priv,
+				intel_aux_power_domain(dp_to_dig_port(intel_dp)));
 
 	mutex_lock(&dev_priv->pps_mutex);
 }
@@ -701,7 +702,8 @@ static void pps_unlock(struct intel_dp *intel_dp)
 
 	mutex_unlock(&dev_priv->pps_mutex);
 
-	intel_display_power_put(dev_priv, intel_dp->aux_power_domain);
+	intel_display_power_put(dev_priv,
+				intel_aux_power_domain(dp_to_dig_port(intel_dp)));
 }
 
 static void
@@ -1505,29 +1507,6 @@ intel_dp_aux_transfer(struct drm_dp_aux *aux, struct drm_dp_aux_msg *msg)
 	return ret;
 }
 
-static enum intel_display_power_domain
-intel_aux_power_domain(struct intel_dp *intel_dp)
-{
-	struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
-
-	switch (dig_port->aux_ch) {
-	case AUX_CH_A:
-		return POWER_DOMAIN_AUX_A;
-	case AUX_CH_B:
-		return POWER_DOMAIN_AUX_B;
-	case AUX_CH_C:
-		return POWER_DOMAIN_AUX_C;
-	case AUX_CH_D:
-		return POWER_DOMAIN_AUX_D;
-	case AUX_CH_E:
-		return POWER_DOMAIN_AUX_E;
-	case AUX_CH_F:
-		return POWER_DOMAIN_AUX_F;
-	default:
-		MISSING_CASE(dig_port->aux_ch);
-		return POWER_DOMAIN_AUX_A;
-	}
-}
 
 static i915_reg_t g4x_aux_ctl_reg(struct intel_dp *intel_dp)
 {
@@ -1654,8 +1633,6 @@ intel_dp_aux_init(struct intel_dp *intel_dp)
 	struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
 	struct intel_encoder *encoder = &dig_port->base;
 
-	intel_dp->aux_power_domain = intel_aux_power_domain(intel_dp);
-
 	if (INTEL_GEN(dev_priv) >= 9) {
 		intel_dp->aux_ch_ctl_reg = skl_aux_ctl_reg;
 		intel_dp->aux_ch_data_reg = skl_aux_data_reg;
@@ -2356,7 +2333,8 @@ static bool edp_panel_vdd_on(struct intel_dp *intel_dp)
 	if (edp_have_panel_vdd(intel_dp))
 		return need_to_disable;
 
-	intel_display_power_get(dev_priv, intel_dp->aux_power_domain);
+	intel_display_power_get(dev_priv,
+				intel_aux_power_domain(intel_dig_port));
 
 	DRM_DEBUG_KMS("Turning eDP port %c VDD on\n",
 		      port_name(intel_dig_port->base.port));
@@ -2442,7 +2420,8 @@ static void edp_panel_vdd_off_sync(struct intel_dp *intel_dp)
 	if ((pp & PANEL_POWER_ON) == 0)
 		intel_dp->panel_power_off_time = ktime_get_boottime();
 
-	intel_display_power_put(dev_priv, intel_dp->aux_power_domain);
+	intel_display_power_put(dev_priv,
+				intel_aux_power_domain(intel_dig_port));
 }
 
 static void edp_panel_vdd_work(struct work_struct *__work)
@@ -2555,6 +2534,7 @@ void intel_edp_panel_on(struct intel_dp *intel_dp)
 static void edp_panel_off(struct intel_dp *intel_dp)
 {
 	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
+	struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
 	u32 pp;
 	i915_reg_t pp_ctrl_reg;
 
@@ -2564,10 +2544,10 @@ static void edp_panel_off(struct intel_dp *intel_dp)
 		return;
 
 	DRM_DEBUG_KMS("Turn eDP port %c panel power off\n",
-		      port_name(dp_to_dig_port(intel_dp)->base.port));
+		      port_name(dig_port->base.port));
 
 	WARN(!intel_dp->want_panel_vdd, "Need eDP port %c VDD to turn off panel\n",
-	     port_name(dp_to_dig_port(intel_dp)->base.port));
+	     port_name(dig_port->base.port));
 
 	pp = ironlake_get_pp_control(intel_dp);
 	/* We need to switch off panel power _and_ force vdd, for otherwise some
@@ -2586,7 +2566,7 @@ static void edp_panel_off(struct intel_dp *intel_dp)
 	intel_dp->panel_power_off_time = ktime_get_boottime();
 
 	/* We got a reference when we enabled the VDD. */
-	intel_display_power_put(dev_priv, intel_dp->aux_power_domain);
+	intel_display_power_put(dev_priv, intel_aux_power_domain(dig_port));
 }
 
 void intel_edp_panel_off(struct intel_dp *intel_dp)
@@ -5069,14 +5049,17 @@ intel_dp_detect(struct drm_connector *connector,
 {
 	struct drm_i915_private *dev_priv = to_i915(connector->dev);
 	struct intel_dp *intel_dp = intel_attached_dp(connector);
-	struct intel_encoder *encoder = &dp_to_dig_port(intel_dp)->base;
+	struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
+	struct intel_encoder *encoder = &dig_port->base;
 	enum drm_connector_status status;
+	enum intel_display_power_domain aux_domain =
+		intel_aux_power_domain(dig_port);
 
 	DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
 		      connector->base.id, connector->name);
 	WARN_ON(!drm_modeset_is_locked(&dev_priv->drm.mode_config.connection_mutex));
 
-	intel_display_power_get(dev_priv, intel_dp->aux_power_domain);
+	intel_display_power_get(dev_priv, aux_domain);
 
 	/* Can't disconnect eDP */
 	if (intel_dp_is_edp(intel_dp))
@@ -5138,7 +5121,7 @@ intel_dp_detect(struct drm_connector *connector,
 		ret = intel_dp_retrain_link(encoder, ctx);
 		if (ret) {
 			intel_display_power_put(dev_priv,
-						intel_dp->aux_power_domain);
+						intel_aux_power_domain(dig_port));
 			return ret;
 		}
 	}
@@ -5162,7 +5145,7 @@ intel_dp_detect(struct drm_connector *connector,
 	if (status != connector_status_connected && !intel_dp->is_mst)
 		intel_dp_unset_edid(intel_dp);
 
-	intel_display_power_put(dev_priv, intel_dp->aux_power_domain);
+	intel_display_power_put(dev_priv, aux_domain);
 	return status;
 }
 
@@ -5170,8 +5153,11 @@ static void
 intel_dp_force(struct drm_connector *connector)
 {
 	struct intel_dp *intel_dp = intel_attached_dp(connector);
-	struct intel_encoder *intel_encoder = &dp_to_dig_port(intel_dp)->base;
+	struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
+	struct intel_encoder *intel_encoder = &dig_port->base;
 	struct drm_i915_private *dev_priv = to_i915(intel_encoder->base.dev);
+	enum intel_display_power_domain aux_domain =
+		intel_aux_power_domain(dig_port);
 
 	DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
 		      connector->base.id, connector->name);
@@ -5180,11 +5166,11 @@ intel_dp_force(struct drm_connector *connector)
 	if (connector->status != connector_status_connected)
 		return;
 
-	intel_display_power_get(dev_priv, intel_dp->aux_power_domain);
+	intel_display_power_get(dev_priv, aux_domain);
 
 	intel_dp_set_edid(intel_dp);
 
-	intel_display_power_put(dev_priv, intel_dp->aux_power_domain);
+	intel_display_power_put(dev_priv, aux_domain);
 }
 
 static int intel_dp_get_modes(struct drm_connector *connector)
@@ -5530,6 +5516,7 @@ static const struct intel_hdcp_shim intel_dp_hdcp_shim = {
 static void intel_edp_panel_vdd_sanitize(struct intel_dp *intel_dp)
 {
 	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
+	struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
 
 	lockdep_assert_held(&dev_priv->pps_mutex);
 
@@ -5543,7 +5530,7 @@ static void intel_edp_panel_vdd_sanitize(struct intel_dp *intel_dp)
 	 * indefinitely.
 	 */
 	DRM_DEBUG_KMS("VDD left on by BIOS, adjusting state tracking\n");
-	intel_display_power_get(dev_priv, intel_dp->aux_power_domain);
+	intel_display_power_get(dev_priv, intel_aux_power_domain(dig_port));
 
 	edp_panel_vdd_schedule_off(intel_dp);
 }
@@ -5641,7 +5628,8 @@ intel_dp_hpd_pulse(struct intel_digital_port *intel_dig_port, bool long_hpd)
 		return IRQ_NONE;
 	}
 
-	intel_display_power_get(dev_priv, intel_dp->aux_power_domain);
+	intel_display_power_get(dev_priv,
+				intel_aux_power_domain(intel_dig_port));
 
 	if (intel_dp->is_mst) {
 		if (intel_dp_check_mst_status(intel_dp) == -EINVAL) {
@@ -5670,7 +5658,8 @@ intel_dp_hpd_pulse(struct intel_digital_port *intel_dig_port, bool long_hpd)
 	ret = IRQ_HANDLED;
 
 put_power:
-	intel_display_power_put(dev_priv, intel_dp->aux_power_domain);
+	intel_display_power_put(dev_priv,
+				intel_aux_power_domain(intel_dig_port));
 
 	return ret;
 }
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index a242a118389d..a3d7b93ecddd 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -1130,7 +1130,6 @@ struct intel_dp {
 	/* sink or branch descriptor */
 	struct drm_dp_desc desc;
 	struct drm_dp_aux aux;
-	enum intel_display_power_domain aux_power_domain;
 	uint8_t train_set[4];
 	int panel_power_up_delay;
 	int panel_power_down_delay;
@@ -1709,6 +1708,8 @@ bool hsw_crtc_state_ips_capable(const struct intel_crtc_state *crtc_state);
 void hsw_enable_ips(const struct intel_crtc_state *crtc_state);
 void hsw_disable_ips(const struct intel_crtc_state *crtc_state);
 enum intel_display_power_domain intel_port_to_power_domain(enum port port);
+enum intel_display_power_domain
+intel_aux_power_domain(struct intel_digital_port *dig_port);
 void intel_mode_from_pipe_config(struct drm_display_mode *mode,
 				 struct intel_crtc_state *pipe_config);
 void intel_crtc_arm_fifo_underrun(struct intel_crtc *crtc,
-- 
2.13.2

_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

Re: [PATCH 4/8] drm/i915: Use a helper to get the aux power domain

[Lucas De Marchi]

On Tue, Oct 30, 2018 at 05:40:47PM +0200, Imre Deak wrote:
> From ICL onwards the AUX power domain may change dynamically based on
> whether a DDI/TypeC port is in thunderbolt or non-thunderbolt mode, so
> use a helper function instead of a static field to get the current
> domain.
> 
> Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Signed-off-by: Imre Deak <imre.deak@intel.com>
> ---
>  drivers/gpu/drm/i915/intel_ddi.c     |  2 +-
>  drivers/gpu/drm/i915/intel_display.c | 22 +++++++++++
>  drivers/gpu/drm/i915/intel_dp.c      | 73 +++++++++++++++---------------------
>  drivers/gpu/drm/i915/intel_drv.h     |  3 +-
>  4 files changed, 56 insertions(+), 44 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c
> index 3739ef003819..5bb459011a49 100644
> --- a/drivers/gpu/drm/i915/intel_ddi.c
> +++ b/drivers/gpu/drm/i915/intel_ddi.c
> @@ -2099,7 +2099,7 @@ intel_ddi_main_link_aux_domain(struct intel_dp *intel_dp)
>  	 * returns the correct domain for other ports too.
>  	 */
>  	return dig_port->aux_ch == AUX_CH_A ? POWER_DOMAIN_AUX_IO_A :
> -					      intel_dp->aux_power_domain;
> +					      intel_aux_power_domain(dig_port);
>  }
>  
>  static u64 intel_ddi_get_power_domains(struct intel_encoder *encoder,
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index c3cadc09f859..36710a30fb37 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -5949,6 +5949,28 @@ enum intel_display_power_domain intel_port_to_power_domain(enum port port)
>  	}
>  }
>  
> +enum intel_display_power_domain
> +intel_aux_power_domain(struct intel_digital_port *dig_port)
> +{

couldn't we just move aux_power_domain up like yod did for aux_ch?  This way we initialize the
power domain bassed on the aux channel, and just use it on the other functions. I think this is
more future-proof for platforms changing the mapping aux <-> power domain. And avoids passing
dev_priv around later just for checking that.

Lucas De Marchi

> +	switch (dig_port->aux_ch) {
> +	case AUX_CH_A:
> +		return POWER_DOMAIN_AUX_A;
> +	case AUX_CH_B:
> +		return POWER_DOMAIN_AUX_B;
> +	case AUX_CH_C:
> +		return POWER_DOMAIN_AUX_C;
> +	case AUX_CH_D:
> +		return POWER_DOMAIN_AUX_D;
> +	case AUX_CH_E:
> +		return POWER_DOMAIN_AUX_E;
> +	case AUX_CH_F:
> +		return POWER_DOMAIN_AUX_F;
> +	default:
> +		MISSING_CASE(dig_port->aux_ch);
> +		return POWER_DOMAIN_AUX_A;
> +	}
> +}
> +
>  static u64 get_crtc_power_domains(struct drm_crtc *crtc,
>  				  struct intel_crtc_state *crtc_state)
>  {
> diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
> index 6645c9faca9a..e6f59ef59be6 100644
> --- a/drivers/gpu/drm/i915/intel_dp.c
> +++ b/drivers/gpu/drm/i915/intel_dp.c
> @@ -690,7 +690,8 @@ static void pps_lock(struct intel_dp *intel_dp)
>  	 * See intel_power_sequencer_reset() why we need
>  	 * a power domain reference here.
>  	 */
> -	intel_display_power_get(dev_priv, intel_dp->aux_power_domain);
> +	intel_display_power_get(dev_priv,
> +				intel_aux_power_domain(dp_to_dig_port(intel_dp)));
>  
>  	mutex_lock(&dev_priv->pps_mutex);
>  }
> @@ -701,7 +702,8 @@ static void pps_unlock(struct intel_dp *intel_dp)
>  
>  	mutex_unlock(&dev_priv->pps_mutex);
>  
> -	intel_display_power_put(dev_priv, intel_dp->aux_power_domain);
> +	intel_display_power_put(dev_priv,
> +				intel_aux_power_domain(dp_to_dig_port(intel_dp)));
>  }
>  
>  static void
> @@ -1505,29 +1507,6 @@ intel_dp_aux_transfer(struct drm_dp_aux *aux, struct drm_dp_aux_msg *msg)
>  	return ret;
>  }
>  
> -static enum intel_display_power_domain
> -intel_aux_power_domain(struct intel_dp *intel_dp)
> -{
> -	struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
> -
> -	switch (dig_port->aux_ch) {
> -	case AUX_CH_A:
> -		return POWER_DOMAIN_AUX_A;
> -	case AUX_CH_B:
> -		return POWER_DOMAIN_AUX_B;
> -	case AUX_CH_C:
> -		return POWER_DOMAIN_AUX_C;
> -	case AUX_CH_D:
> -		return POWER_DOMAIN_AUX_D;
> -	case AUX_CH_E:
> -		return POWER_DOMAIN_AUX_E;
> -	case AUX_CH_F:
> -		return POWER_DOMAIN_AUX_F;
> -	default:
> -		MISSING_CASE(dig_port->aux_ch);
> -		return POWER_DOMAIN_AUX_A;
> -	}
> -}
>  
>  static i915_reg_t g4x_aux_ctl_reg(struct intel_dp *intel_dp)
>  {
> @@ -1654,8 +1633,6 @@ intel_dp_aux_init(struct intel_dp *intel_dp)
>  	struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
>  	struct intel_encoder *encoder = &dig_port->base;
>  
> -	intel_dp->aux_power_domain = intel_aux_power_domain(intel_dp);
> -
>  	if (INTEL_GEN(dev_priv) >= 9) {
>  		intel_dp->aux_ch_ctl_reg = skl_aux_ctl_reg;
>  		intel_dp->aux_ch_data_reg = skl_aux_data_reg;
> @@ -2356,7 +2333,8 @@ static bool edp_panel_vdd_on(struct intel_dp *intel_dp)
>  	if (edp_have_panel_vdd(intel_dp))
>  		return need_to_disable;
>  
> -	intel_display_power_get(dev_priv, intel_dp->aux_power_domain);
> +	intel_display_power_get(dev_priv,
> +				intel_aux_power_domain(intel_dig_port));
>  
>  	DRM_DEBUG_KMS("Turning eDP port %c VDD on\n",
>  		      port_name(intel_dig_port->base.port));
> @@ -2442,7 +2420,8 @@ static void edp_panel_vdd_off_sync(struct intel_dp *intel_dp)
>  	if ((pp & PANEL_POWER_ON) == 0)
>  		intel_dp->panel_power_off_time = ktime_get_boottime();
>  
> -	intel_display_power_put(dev_priv, intel_dp->aux_power_domain);
> +	intel_display_power_put(dev_priv,
> +				intel_aux_power_domain(intel_dig_port));
>  }
>  
>  static void edp_panel_vdd_work(struct work_struct *__work)
> @@ -2555,6 +2534,7 @@ void intel_edp_panel_on(struct intel_dp *intel_dp)
>  static void edp_panel_off(struct intel_dp *intel_dp)
>  {
>  	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
> +	struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
>  	u32 pp;
>  	i915_reg_t pp_ctrl_reg;
>  
> @@ -2564,10 +2544,10 @@ static void edp_panel_off(struct intel_dp *intel_dp)
>  		return;
>  
>  	DRM_DEBUG_KMS("Turn eDP port %c panel power off\n",
> -		      port_name(dp_to_dig_port(intel_dp)->base.port));
> +		      port_name(dig_port->base.port));
>  
>  	WARN(!intel_dp->want_panel_vdd, "Need eDP port %c VDD to turn off panel\n",
> -	     port_name(dp_to_dig_port(intel_dp)->base.port));
> +	     port_name(dig_port->base.port));
>  
>  	pp = ironlake_get_pp_control(intel_dp);
>  	/* We need to switch off panel power _and_ force vdd, for otherwise some
> @@ -2586,7 +2566,7 @@ static void edp_panel_off(struct intel_dp *intel_dp)
>  	intel_dp->panel_power_off_time = ktime_get_boottime();
>  
>  	/* We got a reference when we enabled the VDD. */
> -	intel_display_power_put(dev_priv, intel_dp->aux_power_domain);
> +	intel_display_power_put(dev_priv, intel_aux_power_domain(dig_port));
>  }
>  
>  void intel_edp_panel_off(struct intel_dp *intel_dp)
> @@ -5069,14 +5049,17 @@ intel_dp_detect(struct drm_connector *connector,
>  {
>  	struct drm_i915_private *dev_priv = to_i915(connector->dev);
>  	struct intel_dp *intel_dp = intel_attached_dp(connector);
> -	struct intel_encoder *encoder = &dp_to_dig_port(intel_dp)->base;
> +	struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
> +	struct intel_encoder *encoder = &dig_port->base;
>  	enum drm_connector_status status;
> +	enum intel_display_power_domain aux_domain =
> +		intel_aux_power_domain(dig_port);
>  
>  	DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
>  		      connector->base.id, connector->name);
>  	WARN_ON(!drm_modeset_is_locked(&dev_priv->drm.mode_config.connection_mutex));
>  
> -	intel_display_power_get(dev_priv, intel_dp->aux_power_domain);
> +	intel_display_power_get(dev_priv, aux_domain);
>  
>  	/* Can't disconnect eDP */
>  	if (intel_dp_is_edp(intel_dp))
> @@ -5138,7 +5121,7 @@ intel_dp_detect(struct drm_connector *connector,
>  		ret = intel_dp_retrain_link(encoder, ctx);
>  		if (ret) {
>  			intel_display_power_put(dev_priv,
> -						intel_dp->aux_power_domain);
> +						intel_aux_power_domain(dig_port));
>  			return ret;
>  		}
>  	}
> @@ -5162,7 +5145,7 @@ intel_dp_detect(struct drm_connector *connector,
>  	if (status != connector_status_connected && !intel_dp->is_mst)
>  		intel_dp_unset_edid(intel_dp);
>  
> -	intel_display_power_put(dev_priv, intel_dp->aux_power_domain);
> +	intel_display_power_put(dev_priv, aux_domain);
>  	return status;
>  }
>  
> @@ -5170,8 +5153,11 @@ static void
>  intel_dp_force(struct drm_connector *connector)
>  {
>  	struct intel_dp *intel_dp = intel_attached_dp(connector);
> -	struct intel_encoder *intel_encoder = &dp_to_dig_port(intel_dp)->base;
> +	struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
> +	struct intel_encoder *intel_encoder = &dig_port->base;
>  	struct drm_i915_private *dev_priv = to_i915(intel_encoder->base.dev);
> +	enum intel_display_power_domain aux_domain =
> +		intel_aux_power_domain(dig_port);
>  
>  	DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
>  		      connector->base.id, connector->name);
> @@ -5180,11 +5166,11 @@ intel_dp_force(struct drm_connector *connector)
>  	if (connector->status != connector_status_connected)
>  		return;
>  
> -	intel_display_power_get(dev_priv, intel_dp->aux_power_domain);
> +	intel_display_power_get(dev_priv, aux_domain);
>  
>  	intel_dp_set_edid(intel_dp);
>  
> -	intel_display_power_put(dev_priv, intel_dp->aux_power_domain);
> +	intel_display_power_put(dev_priv, aux_domain);
>  }
>  
>  static int intel_dp_get_modes(struct drm_connector *connector)
> @@ -5530,6 +5516,7 @@ static const struct intel_hdcp_shim intel_dp_hdcp_shim = {
>  static void intel_edp_panel_vdd_sanitize(struct intel_dp *intel_dp)
>  {
>  	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
> +	struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
>  
>  	lockdep_assert_held(&dev_priv->pps_mutex);
>  
> @@ -5543,7 +5530,7 @@ static void intel_edp_panel_vdd_sanitize(struct intel_dp *intel_dp)
>  	 * indefinitely.
>  	 */
>  	DRM_DEBUG_KMS("VDD left on by BIOS, adjusting state tracking\n");
> -	intel_display_power_get(dev_priv, intel_dp->aux_power_domain);
> +	intel_display_power_get(dev_priv, intel_aux_power_domain(dig_port));
>  
>  	edp_panel_vdd_schedule_off(intel_dp);
>  }
> @@ -5641,7 +5628,8 @@ intel_dp_hpd_pulse(struct intel_digital_port *intel_dig_port, bool long_hpd)
>  		return IRQ_NONE;
>  	}
>  
> -	intel_display_power_get(dev_priv, intel_dp->aux_power_domain);
> +	intel_display_power_get(dev_priv,
> +				intel_aux_power_domain(intel_dig_port));
>  
>  	if (intel_dp->is_mst) {
>  		if (intel_dp_check_mst_status(intel_dp) == -EINVAL) {
> @@ -5670,7 +5658,8 @@ intel_dp_hpd_pulse(struct intel_digital_port *intel_dig_port, bool long_hpd)
>  	ret = IRQ_HANDLED;
>  
>  put_power:
> -	intel_display_power_put(dev_priv, intel_dp->aux_power_domain);
> +	intel_display_power_put(dev_priv,
> +				intel_aux_power_domain(intel_dig_port));
>  
>  	return ret;
>  }
> diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
> index a242a118389d..a3d7b93ecddd 100644
> --- a/drivers/gpu/drm/i915/intel_drv.h
> +++ b/drivers/gpu/drm/i915/intel_drv.h
> @@ -1130,7 +1130,6 @@ struct intel_dp {
>  	/* sink or branch descriptor */
>  	struct drm_dp_desc desc;
>  	struct drm_dp_aux aux;
> -	enum intel_display_power_domain aux_power_domain;
>  	uint8_t train_set[4];
>  	int panel_power_up_delay;
>  	int panel_power_down_delay;
> @@ -1709,6 +1708,8 @@ bool hsw_crtc_state_ips_capable(const struct intel_crtc_state *crtc_state);
>  void hsw_enable_ips(const struct intel_crtc_state *crtc_state);
>  void hsw_disable_ips(const struct intel_crtc_state *crtc_state);
>  enum intel_display_power_domain intel_port_to_power_domain(enum port port);
> +enum intel_display_power_domain
> +intel_aux_power_domain(struct intel_digital_port *dig_port);
>  void intel_mode_from_pipe_config(struct drm_display_mode *mode,
>  				 struct intel_crtc_state *pipe_config);
>  void intel_crtc_arm_fifo_underrun(struct intel_crtc *crtc,
> -- 
> 2.13.2
> 
> _______________________________________________
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> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
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Re: [PATCH 4/8] drm/i915: Use a helper to get the aux power domain

[Imre Deak]

On Tue, Oct 30, 2018 at 02:16:08PM -0700, Lucas De Marchi wrote:
> On Tue, Oct 30, 2018 at 05:40:47PM +0200, Imre Deak wrote:
> > From ICL onwards the AUX power domain may change dynamically based on
> > whether a DDI/TypeC port is in thunderbolt or non-thunderbolt mode, so
> > use a helper function instead of a static field to get the current
> > domain.
> > 
> > Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
> > Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > Signed-off-by: Imre Deak <imre.deak@intel.com>
> > ---
> >  drivers/gpu/drm/i915/intel_ddi.c     |  2 +-
> >  drivers/gpu/drm/i915/intel_display.c | 22 +++++++++++
> >  drivers/gpu/drm/i915/intel_dp.c      | 73 +++++++++++++++---------------------
> >  drivers/gpu/drm/i915/intel_drv.h     |  3 +-
> >  4 files changed, 56 insertions(+), 44 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c
> > index 3739ef003819..5bb459011a49 100644
> > --- a/drivers/gpu/drm/i915/intel_ddi.c
> > +++ b/drivers/gpu/drm/i915/intel_ddi.c
> > @@ -2099,7 +2099,7 @@ intel_ddi_main_link_aux_domain(struct intel_dp *intel_dp)
> >  	 * returns the correct domain for other ports too.
> >  	 */
> >  	return dig_port->aux_ch == AUX_CH_A ? POWER_DOMAIN_AUX_IO_A :
> > -					      intel_dp->aux_power_domain;
> > +					      intel_aux_power_domain(dig_port);
> >  }
> >  
> >  static u64 intel_ddi_get_power_domains(struct intel_encoder *encoder,
> > diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> > index c3cadc09f859..36710a30fb37 100644
> > --- a/drivers/gpu/drm/i915/intel_display.c
> > +++ b/drivers/gpu/drm/i915/intel_display.c
> > @@ -5949,6 +5949,28 @@ enum intel_display_power_domain intel_port_to_power_domain(enum port port)
> >  	}
> >  }
> >  
> > +enum intel_display_power_domain
> > +intel_aux_power_domain(struct intel_digital_port *dig_port)
> > +{
> 
> couldn't we just move aux_power_domain up like yod did for aux_ch?  This way we initialize the
> power domain bassed on the aux channel, and just use it on the other functions. I think this is
> more future-proof for platforms changing the mapping aux <-> power domain. And avoids passing
> dev_priv around later just for checking that.

Well, the fact that the mapping can change dynamically is the reason I
chose to have a helper. Once Thunderbolt support is added we would check
in this function something like dig_port->is_tbt and return
POWER_DOMAIN_AUX_TBT_[1-4] instead of AUX_[A-D].

> 
> Lucas De Marchi
> 
> > +	switch (dig_port->aux_ch) {
> > +	case AUX_CH_A:
> > +		return POWER_DOMAIN_AUX_A;
> > +	case AUX_CH_B:
> > +		return POWER_DOMAIN_AUX_B;
> > +	case AUX_CH_C:
> > +		return POWER_DOMAIN_AUX_C;
> > +	case AUX_CH_D:
> > +		return POWER_DOMAIN_AUX_D;
> > +	case AUX_CH_E:
> > +		return POWER_DOMAIN_AUX_E;
> > +	case AUX_CH_F:
> > +		return POWER_DOMAIN_AUX_F;
> > +	default:
> > +		MISSING_CASE(dig_port->aux_ch);
> > +		return POWER_DOMAIN_AUX_A;
> > +	}
> > +}
> > +
> >  static u64 get_crtc_power_domains(struct drm_crtc *crtc,
> >  				  struct intel_crtc_state *crtc_state)
> >  {
> > diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
> > index 6645c9faca9a..e6f59ef59be6 100644
> > --- a/drivers/gpu/drm/i915/intel_dp.c
> > +++ b/drivers/gpu/drm/i915/intel_dp.c
> > @@ -690,7 +690,8 @@ static void pps_lock(struct intel_dp *intel_dp)
> >  	 * See intel_power_sequencer_reset() why we need
> >  	 * a power domain reference here.
> >  	 */
> > -	intel_display_power_get(dev_priv, intel_dp->aux_power_domain);
> > +	intel_display_power_get(dev_priv,
> > +				intel_aux_power_domain(dp_to_dig_port(intel_dp)));
> >  
> >  	mutex_lock(&dev_priv->pps_mutex);
> >  }
> > @@ -701,7 +702,8 @@ static void pps_unlock(struct intel_dp *intel_dp)
> >  
> >  	mutex_unlock(&dev_priv->pps_mutex);
> >  
> > -	intel_display_power_put(dev_priv, intel_dp->aux_power_domain);
> > +	intel_display_power_put(dev_priv,
> > +				intel_aux_power_domain(dp_to_dig_port(intel_dp)));
> >  }
> >  
> >  static void
> > @@ -1505,29 +1507,6 @@ intel_dp_aux_transfer(struct drm_dp_aux *aux, struct drm_dp_aux_msg *msg)
> >  	return ret;
> >  }
> >  
> > -static enum intel_display_power_domain
> > -intel_aux_power_domain(struct intel_dp *intel_dp)
> > -{
> > -	struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
> > -
> > -	switch (dig_port->aux_ch) {
> > -	case AUX_CH_A:
> > -		return POWER_DOMAIN_AUX_A;
> > -	case AUX_CH_B:
> > -		return POWER_DOMAIN_AUX_B;
> > -	case AUX_CH_C:
> > -		return POWER_DOMAIN_AUX_C;
> > -	case AUX_CH_D:
> > -		return POWER_DOMAIN_AUX_D;
> > -	case AUX_CH_E:
> > -		return POWER_DOMAIN_AUX_E;
> > -	case AUX_CH_F:
> > -		return POWER_DOMAIN_AUX_F;
> > -	default:
> > -		MISSING_CASE(dig_port->aux_ch);
> > -		return POWER_DOMAIN_AUX_A;
> > -	}
> > -}
> >  
> >  static i915_reg_t g4x_aux_ctl_reg(struct intel_dp *intel_dp)
> >  {
> > @@ -1654,8 +1633,6 @@ intel_dp_aux_init(struct intel_dp *intel_dp)
> >  	struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
> >  	struct intel_encoder *encoder = &dig_port->base;
> >  
> > -	intel_dp->aux_power_domain = intel_aux_power_domain(intel_dp);
> > -
> >  	if (INTEL_GEN(dev_priv) >= 9) {
> >  		intel_dp->aux_ch_ctl_reg = skl_aux_ctl_reg;
> >  		intel_dp->aux_ch_data_reg = skl_aux_data_reg;
> > @@ -2356,7 +2333,8 @@ static bool edp_panel_vdd_on(struct intel_dp *intel_dp)
> >  	if (edp_have_panel_vdd(intel_dp))
> >  		return need_to_disable;
> >  
> > -	intel_display_power_get(dev_priv, intel_dp->aux_power_domain);
> > +	intel_display_power_get(dev_priv,
> > +				intel_aux_power_domain(intel_dig_port));
> >  
> >  	DRM_DEBUG_KMS("Turning eDP port %c VDD on\n",
> >  		      port_name(intel_dig_port->base.port));
> > @@ -2442,7 +2420,8 @@ static void edp_panel_vdd_off_sync(struct intel_dp *intel_dp)
> >  	if ((pp & PANEL_POWER_ON) == 0)
> >  		intel_dp->panel_power_off_time = ktime_get_boottime();
> >  
> > -	intel_display_power_put(dev_priv, intel_dp->aux_power_domain);
> > +	intel_display_power_put(dev_priv,
> > +				intel_aux_power_domain(intel_dig_port));
> >  }
> >  
> >  static void edp_panel_vdd_work(struct work_struct *__work)
> > @@ -2555,6 +2534,7 @@ void intel_edp_panel_on(struct intel_dp *intel_dp)
> >  static void edp_panel_off(struct intel_dp *intel_dp)
> >  {
> >  	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
> > +	struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
> >  	u32 pp;
> >  	i915_reg_t pp_ctrl_reg;
> >  
> > @@ -2564,10 +2544,10 @@ static void edp_panel_off(struct intel_dp *intel_dp)
> >  		return;
> >  
> >  	DRM_DEBUG_KMS("Turn eDP port %c panel power off\n",
> > -		      port_name(dp_to_dig_port(intel_dp)->base.port));
> > +		      port_name(dig_port->base.port));
> >  
> >  	WARN(!intel_dp->want_panel_vdd, "Need eDP port %c VDD to turn off panel\n",
> > -	     port_name(dp_to_dig_port(intel_dp)->base.port));
> > +	     port_name(dig_port->base.port));
> >  
> >  	pp = ironlake_get_pp_control(intel_dp);
> >  	/* We need to switch off panel power _and_ force vdd, for otherwise some
> > @@ -2586,7 +2566,7 @@ static void edp_panel_off(struct intel_dp *intel_dp)
> >  	intel_dp->panel_power_off_time = ktime_get_boottime();
> >  
> >  	/* We got a reference when we enabled the VDD. */
> > -	intel_display_power_put(dev_priv, intel_dp->aux_power_domain);
> > +	intel_display_power_put(dev_priv, intel_aux_power_domain(dig_port));
> >  }
> >  
> >  void intel_edp_panel_off(struct intel_dp *intel_dp)
> > @@ -5069,14 +5049,17 @@ intel_dp_detect(struct drm_connector *connector,
> >  {
> >  	struct drm_i915_private *dev_priv = to_i915(connector->dev);
> >  	struct intel_dp *intel_dp = intel_attached_dp(connector);
> > -	struct intel_encoder *encoder = &dp_to_dig_port(intel_dp)->base;
> > +	struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
> > +	struct intel_encoder *encoder = &dig_port->base;
> >  	enum drm_connector_status status;
> > +	enum intel_display_power_domain aux_domain =
> > +		intel_aux_power_domain(dig_port);
> >  
> >  	DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
> >  		      connector->base.id, connector->name);
> >  	WARN_ON(!drm_modeset_is_locked(&dev_priv->drm.mode_config.connection_mutex));
> >  
> > -	intel_display_power_get(dev_priv, intel_dp->aux_power_domain);
> > +	intel_display_power_get(dev_priv, aux_domain);
> >  
> >  	/* Can't disconnect eDP */
> >  	if (intel_dp_is_edp(intel_dp))
> > @@ -5138,7 +5121,7 @@ intel_dp_detect(struct drm_connector *connector,
> >  		ret = intel_dp_retrain_link(encoder, ctx);
> >  		if (ret) {
> >  			intel_display_power_put(dev_priv,
> > -						intel_dp->aux_power_domain);
> > +						intel_aux_power_domain(dig_port));
> >  			return ret;
> >  		}
> >  	}
> > @@ -5162,7 +5145,7 @@ intel_dp_detect(struct drm_connector *connector,
> >  	if (status != connector_status_connected && !intel_dp->is_mst)
> >  		intel_dp_unset_edid(intel_dp);
> >  
> > -	intel_display_power_put(dev_priv, intel_dp->aux_power_domain);
> > +	intel_display_power_put(dev_priv, aux_domain);
> >  	return status;
> >  }
> >  
> > @@ -5170,8 +5153,11 @@ static void
> >  intel_dp_force(struct drm_connector *connector)
> >  {
> >  	struct intel_dp *intel_dp = intel_attached_dp(connector);
> > -	struct intel_encoder *intel_encoder = &dp_to_dig_port(intel_dp)->base;
> > +	struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
> > +	struct intel_encoder *intel_encoder = &dig_port->base;
> >  	struct drm_i915_private *dev_priv = to_i915(intel_encoder->base.dev);
> > +	enum intel_display_power_domain aux_domain =
> > +		intel_aux_power_domain(dig_port);
> >  
> >  	DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
> >  		      connector->base.id, connector->name);
> > @@ -5180,11 +5166,11 @@ intel_dp_force(struct drm_connector *connector)
> >  	if (connector->status != connector_status_connected)
> >  		return;
> >  
> > -	intel_display_power_get(dev_priv, intel_dp->aux_power_domain);
> > +	intel_display_power_get(dev_priv, aux_domain);
> >  
> >  	intel_dp_set_edid(intel_dp);
> >  
> > -	intel_display_power_put(dev_priv, intel_dp->aux_power_domain);
> > +	intel_display_power_put(dev_priv, aux_domain);
> >  }
> >  
> >  static int intel_dp_get_modes(struct drm_connector *connector)
> > @@ -5530,6 +5516,7 @@ static const struct intel_hdcp_shim intel_dp_hdcp_shim = {
> >  static void intel_edp_panel_vdd_sanitize(struct intel_dp *intel_dp)
> >  {
> >  	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
> > +	struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
> >  
> >  	lockdep_assert_held(&dev_priv->pps_mutex);
> >  
> > @@ -5543,7 +5530,7 @@ static void intel_edp_panel_vdd_sanitize(struct intel_dp *intel_dp)
> >  	 * indefinitely.
> >  	 */
> >  	DRM_DEBUG_KMS("VDD left on by BIOS, adjusting state tracking\n");
> > -	intel_display_power_get(dev_priv, intel_dp->aux_power_domain);
> > +	intel_display_power_get(dev_priv, intel_aux_power_domain(dig_port));
> >  
> >  	edp_panel_vdd_schedule_off(intel_dp);
> >  }
> > @@ -5641,7 +5628,8 @@ intel_dp_hpd_pulse(struct intel_digital_port *intel_dig_port, bool long_hpd)
> >  		return IRQ_NONE;
> >  	}
> >  
> > -	intel_display_power_get(dev_priv, intel_dp->aux_power_domain);
> > +	intel_display_power_get(dev_priv,
> > +				intel_aux_power_domain(intel_dig_port));
> >  
> >  	if (intel_dp->is_mst) {
> >  		if (intel_dp_check_mst_status(intel_dp) == -EINVAL) {
> > @@ -5670,7 +5658,8 @@ intel_dp_hpd_pulse(struct intel_digital_port *intel_dig_port, bool long_hpd)
> >  	ret = IRQ_HANDLED;
> >  
> >  put_power:
> > -	intel_display_power_put(dev_priv, intel_dp->aux_power_domain);
> > +	intel_display_power_put(dev_priv,
> > +				intel_aux_power_domain(intel_dig_port));
> >  
> >  	return ret;
> >  }
> > diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
> > index a242a118389d..a3d7b93ecddd 100644
> > --- a/drivers/gpu/drm/i915/intel_drv.h
> > +++ b/drivers/gpu/drm/i915/intel_drv.h
> > @@ -1130,7 +1130,6 @@ struct intel_dp {
> >  	/* sink or branch descriptor */
> >  	struct drm_dp_desc desc;
> >  	struct drm_dp_aux aux;
> > -	enum intel_display_power_domain aux_power_domain;
> >  	uint8_t train_set[4];
> >  	int panel_power_up_delay;
> >  	int panel_power_down_delay;
> > @@ -1709,6 +1708,8 @@ bool hsw_crtc_state_ips_capable(const struct intel_crtc_state *crtc_state);
> >  void hsw_enable_ips(const struct intel_crtc_state *crtc_state);
> >  void hsw_disable_ips(const struct intel_crtc_state *crtc_state);
> >  enum intel_display_power_domain intel_port_to_power_domain(enum port port);
> > +enum intel_display_power_domain
> > +intel_aux_power_domain(struct intel_digital_port *dig_port);
> >  void intel_mode_from_pipe_config(struct drm_display_mode *mode,
> >  				 struct intel_crtc_state *pipe_config);
> >  void intel_crtc_arm_fifo_underrun(struct intel_crtc *crtc,
> > -- 
> > 2.13.2
> > 
> > _______________________________________________
> > Intel-gfx mailing list
> > Intel-gfx@lists.freedesktop.org
> > https://lists.freedesktop.org/mailman/listinfo/intel-gfx
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[PATCH 5/8] drm/i915: Enable AUX power earlier

[Imre Deak]

For DDI/TypeC ports the AUX power domain needs to be enabled before the
port's PLL is enabled, so move the enabling earlier accordingly.

Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
---
 drivers/gpu/drm/i915/intel_ddi.c     | 46 +++++++++++++++++++++++++-----------
 drivers/gpu/drm/i915/intel_display.c |  2 ++
 2 files changed, 34 insertions(+), 14 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c
index 5bb459011a49..7731ca704862 100644
--- a/drivers/gpu/drm/i915/intel_ddi.c
+++ b/drivers/gpu/drm/i915/intel_ddi.c
@@ -2082,10 +2082,8 @@ bool intel_ddi_get_hw_state(struct intel_encoder *encoder,
 }
 
 static inline enum intel_display_power_domain
-intel_ddi_main_link_aux_domain(struct intel_dp *intel_dp)
+intel_ddi_main_link_aux_domain(struct intel_digital_port *dig_port)
 {
-	struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
-
 	/* CNL+ HW requires corresponding AUX IOs to be powered up for PSR with
 	 * DC states enabled at the same time, while for driver initiated AUX
 	 * transfers we need the same AUX IOs to be powered but with DC states
@@ -2120,11 +2118,8 @@ static u64 intel_ddi_get_power_domains(struct intel_encoder *encoder,
 	domains = BIT_ULL(dig_port->ddi_io_power_domain);
 
 	/* AUX power is only needed for (e)DP mode, not for HDMI. */
-	if (intel_crtc_has_dp_encoder(crtc_state)) {
-		struct intel_dp *intel_dp = &dig_port->dp;
-
-		domains |= BIT_ULL(intel_ddi_main_link_aux_domain(intel_dp));
-	}
+	if (intel_crtc_has_dp_encoder(crtc_state))
+		domains |= BIT_ULL(intel_ddi_main_link_aux_domain(dig_port));
 
 	return domains;
 }
@@ -2891,6 +2886,32 @@ static void intel_ddi_clk_disable(struct intel_encoder *encoder)
 	}
 }
 
+static void
+intel_ddi_pre_pll_enable(struct intel_encoder *encoder,
+			 const struct intel_crtc_state *crtc_state,
+			 const struct drm_connector_state *conn_state)
+{
+	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
+	struct intel_digital_port *dig_port = enc_to_dig_port(&encoder->base);
+
+	if (intel_crtc_has_dp_encoder(crtc_state))
+		intel_display_power_get(dev_priv,
+					intel_ddi_main_link_aux_domain(dig_port));
+}
+
+static void
+intel_ddi_post_pll_disable(struct intel_encoder *encoder,
+			   const struct intel_crtc_state *crtc_state,
+			   const struct drm_connector_state *conn_state)
+{
+	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
+	struct intel_digital_port *dig_port = enc_to_dig_port(&encoder->base);
+
+	if (intel_crtc_has_dp_encoder(crtc_state))
+		intel_display_power_put(dev_priv,
+					intel_ddi_main_link_aux_domain(dig_port));
+}
+
 static void intel_ddi_pre_enable_dp(struct intel_encoder *encoder,
 				    const struct intel_crtc_state *crtc_state,
 				    const struct drm_connector_state *conn_state)
@@ -2904,9 +2925,6 @@ static void intel_ddi_pre_enable_dp(struct intel_encoder *encoder,
 
 	WARN_ON(is_mst && (port == PORT_A || port == PORT_E));
 
-	intel_display_power_get(dev_priv,
-				intel_ddi_main_link_aux_domain(intel_dp));
-
 	intel_dp_set_link_params(intel_dp, crtc_state->port_clock,
 				 crtc_state->lane_count, is_mst);
 
@@ -3071,9 +3089,6 @@ static void intel_ddi_post_disable_dp(struct intel_encoder *encoder,
 	intel_display_power_put(dev_priv, dig_port->ddi_io_power_domain);
 
 	intel_ddi_clk_disable(encoder);
-
-	intel_display_power_put(dev_priv,
-				intel_ddi_main_link_aux_domain(intel_dp));
 }
 
 static void intel_ddi_post_disable_hdmi(struct intel_encoder *encoder,
@@ -3830,6 +3845,9 @@ void intel_ddi_init(struct drm_i915_private *dev_priv, enum port port)
 	intel_encoder->enable = intel_enable_ddi;
 	if (IS_GEN9_LP(dev_priv))
 		intel_encoder->pre_pll_enable = bxt_ddi_pre_pll_enable;
+
+	intel_encoder->pre_pll_enable = intel_ddi_pre_pll_enable;
+	intel_encoder->post_pll_disable = intel_ddi_post_pll_disable;
 	intel_encoder->pre_enable = intel_ddi_pre_enable;
 	intel_encoder->disable = intel_disable_ddi;
 	intel_encoder->post_disable = intel_ddi_post_disable;
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 36710a30fb37..12ba2b923e6b 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -5876,6 +5876,8 @@ static void haswell_crtc_disable(struct intel_crtc_state *old_crtc_state,
 
 	if (INTEL_GEN(dev_priv) >= 11)
 		icl_unmap_plls_to_ports(crtc, old_crtc_state, old_state);
+
+	intel_encoders_post_pll_disable(crtc, old_crtc_state, old_state);
 }
 
 static void i9xx_pfit_enable(const struct intel_crtc_state *crtc_state)
-- 
2.13.2

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[PATCH v2 5/8] drm/i915: Enable AUX power earlier

[Imre Deak]

For DDI/TypeC ports the AUX power domain needs to be enabled before the
port's PLL is enabled, so move the enabling earlier accordingly.

v2:
- Preserve the pre_pll hook for GEN9_LP. (Ville)

Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
---
 drivers/gpu/drm/i915/intel_ddi.c     | 60 +++++++++++++++++++++---------------
 drivers/gpu/drm/i915/intel_display.c |  2 ++
 2 files changed, 37 insertions(+), 25 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c
index 5bb459011a49..9554da06e19a 100644
--- a/drivers/gpu/drm/i915/intel_ddi.c
+++ b/drivers/gpu/drm/i915/intel_ddi.c
@@ -2082,10 +2082,8 @@ bool intel_ddi_get_hw_state(struct intel_encoder *encoder,
 }
 
 static inline enum intel_display_power_domain
-intel_ddi_main_link_aux_domain(struct intel_dp *intel_dp)
+intel_ddi_main_link_aux_domain(struct intel_digital_port *dig_port)
 {
-	struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
-
 	/* CNL+ HW requires corresponding AUX IOs to be powered up for PSR with
 	 * DC states enabled at the same time, while for driver initiated AUX
 	 * transfers we need the same AUX IOs to be powered but with DC states
@@ -2120,11 +2118,8 @@ static u64 intel_ddi_get_power_domains(struct intel_encoder *encoder,
 	domains = BIT_ULL(dig_port->ddi_io_power_domain);
 
 	/* AUX power is only needed for (e)DP mode, not for HDMI. */
-	if (intel_crtc_has_dp_encoder(crtc_state)) {
-		struct intel_dp *intel_dp = &dig_port->dp;
-
-		domains |= BIT_ULL(intel_ddi_main_link_aux_domain(intel_dp));
-	}
+	if (intel_crtc_has_dp_encoder(crtc_state))
+		domains |= BIT_ULL(intel_ddi_main_link_aux_domain(dig_port));
 
 	return domains;
 }
@@ -2891,6 +2886,36 @@ static void intel_ddi_clk_disable(struct intel_encoder *encoder)
 	}
 }
 
+static void
+intel_ddi_pre_pll_enable(struct intel_encoder *encoder,
+			 const struct intel_crtc_state *crtc_state,
+			 const struct drm_connector_state *conn_state)
+{
+	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
+	struct intel_digital_port *dig_port = enc_to_dig_port(&encoder->base);
+
+	if (intel_crtc_has_dp_encoder(crtc_state))
+		intel_display_power_get(dev_priv,
+					intel_ddi_main_link_aux_domain(dig_port));
+
+	if (IS_GEN9_LP(dev_priv))
+		bxt_ddi_phy_set_lane_optim_mask(encoder,
+					       crtc_state->lane_lat_optim_mask);
+}
+
+static void
+intel_ddi_post_pll_disable(struct intel_encoder *encoder,
+			   const struct intel_crtc_state *crtc_state,
+			   const struct drm_connector_state *conn_state)
+{
+	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
+	struct intel_digital_port *dig_port = enc_to_dig_port(&encoder->base);
+
+	if (intel_crtc_has_dp_encoder(crtc_state))
+		intel_display_power_put(dev_priv,
+					intel_ddi_main_link_aux_domain(dig_port));
+}
+
 static void intel_ddi_pre_enable_dp(struct intel_encoder *encoder,
 				    const struct intel_crtc_state *crtc_state,
 				    const struct drm_connector_state *conn_state)
@@ -2904,9 +2929,6 @@ static void intel_ddi_pre_enable_dp(struct intel_encoder *encoder,
 
 	WARN_ON(is_mst && (port == PORT_A || port == PORT_E));
 
-	intel_display_power_get(dev_priv,
-				intel_ddi_main_link_aux_domain(intel_dp));
-
 	intel_dp_set_link_params(intel_dp, crtc_state->port_clock,
 				 crtc_state->lane_count, is_mst);
 
@@ -3071,9 +3093,6 @@ static void intel_ddi_post_disable_dp(struct intel_encoder *encoder,
 	intel_display_power_put(dev_priv, dig_port->ddi_io_power_domain);
 
 	intel_ddi_clk_disable(encoder);
-
-	intel_display_power_put(dev_priv,
-				intel_ddi_main_link_aux_domain(intel_dp));
 }
 
 static void intel_ddi_post_disable_hdmi(struct intel_encoder *encoder,
@@ -3304,15 +3323,6 @@ static void intel_disable_ddi(struct intel_encoder *encoder,
 		intel_disable_ddi_dp(encoder, old_crtc_state, old_conn_state);
 }
 
-static void bxt_ddi_pre_pll_enable(struct intel_encoder *encoder,
-				   const struct intel_crtc_state *pipe_config,
-				   const struct drm_connector_state *conn_state)
-{
-	uint8_t mask = pipe_config->lane_lat_optim_mask;
-
-	bxt_ddi_phy_set_lane_optim_mask(encoder, mask);
-}
-
 void intel_ddi_prepare_link_retrain(struct intel_dp *intel_dp)
 {
 	struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp);
@@ -3828,8 +3838,8 @@ void intel_ddi_init(struct drm_i915_private *dev_priv, enum port port)
 	intel_encoder->compute_output_type = intel_ddi_compute_output_type;
 	intel_encoder->compute_config = intel_ddi_compute_config;
 	intel_encoder->enable = intel_enable_ddi;
-	if (IS_GEN9_LP(dev_priv))
-		intel_encoder->pre_pll_enable = bxt_ddi_pre_pll_enable;
+	intel_encoder->pre_pll_enable = intel_ddi_pre_pll_enable;
+	intel_encoder->post_pll_disable = intel_ddi_post_pll_disable;
 	intel_encoder->pre_enable = intel_ddi_pre_enable;
 	intel_encoder->disable = intel_disable_ddi;
 	intel_encoder->post_disable = intel_ddi_post_disable;
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 36710a30fb37..12ba2b923e6b 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -5876,6 +5876,8 @@ static void haswell_crtc_disable(struct intel_crtc_state *old_crtc_state,
 
 	if (INTEL_GEN(dev_priv) >= 11)
 		icl_unmap_plls_to_ports(crtc, old_crtc_state, old_state);
+
+	intel_encoders_post_pll_disable(crtc, old_crtc_state, old_state);
 }
 
 static void i9xx_pfit_enable(const struct intel_crtc_state *crtc_state)
-- 
2.13.2

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Re: [PATCH v2 5/8] drm/i915: Enable AUX power earlier

[Manasi Navare]

On Tue, Oct 30, 2018 at 09:05:57PM +0200, Imre Deak wrote:
> For DDI/TypeC ports the AUX power domain needs to be enabled before the
> port's PLL is enabled, so move the enabling earlier accordingly.
> 
> v2:
> - Preserve the pre_pll hook for GEN9_LP. (Ville)
> 
> Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Signed-off-by: Imre Deak <imre.deak@intel.com>
> ---
>  drivers/gpu/drm/i915/intel_ddi.c     | 60 +++++++++++++++++++++---------------
>  drivers/gpu/drm/i915/intel_display.c |  2 ++
>  2 files changed, 37 insertions(+), 25 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c
> index 5bb459011a49..9554da06e19a 100644
> --- a/drivers/gpu/drm/i915/intel_ddi.c
> +++ b/drivers/gpu/drm/i915/intel_ddi.c
> @@ -2082,10 +2082,8 @@ bool intel_ddi_get_hw_state(struct intel_encoder *encoder,
>  }
>  
>  static inline enum intel_display_power_domain
> -intel_ddi_main_link_aux_domain(struct intel_dp *intel_dp)
> +intel_ddi_main_link_aux_domain(struct intel_digital_port *dig_port)
>  {
> -	struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
> -
>  	/* CNL+ HW requires corresponding AUX IOs to be powered up for PSR with
>  	 * DC states enabled at the same time, while for driver initiated AUX
>  	 * transfers we need the same AUX IOs to be powered but with DC states
> @@ -2120,11 +2118,8 @@ static u64 intel_ddi_get_power_domains(struct intel_encoder *encoder,
>  	domains = BIT_ULL(dig_port->ddi_io_power_domain);
>  
>  	/* AUX power is only needed for (e)DP mode, not for HDMI. */
> -	if (intel_crtc_has_dp_encoder(crtc_state)) {
> -		struct intel_dp *intel_dp = &dig_port->dp;
> -
> -		domains |= BIT_ULL(intel_ddi_main_link_aux_domain(intel_dp));
> -	}
> +	if (intel_crtc_has_dp_encoder(crtc_state))
> +		domains |= BIT_ULL(intel_ddi_main_link_aux_domain(dig_port));
>  
>  	return domains;
>  }
> @@ -2891,6 +2886,36 @@ static void intel_ddi_clk_disable(struct intel_encoder *encoder)
>  	}
>  }
>

I just realized while merging that my previous patches that are reviewed-by
add icl_ddi_pre_pll_enable hook for Gen 11. 
Either the below pre_pll_enable should be part of that or I will have to respin those
before merging and call it intel_ddi_pre_pll_enable() hook.
https://patchwork.freedesktop.org/patch/258008/

Manasi

> +static void
> +intel_ddi_pre_pll_enable(struct intel_encoder *encoder,
> +			 const struct intel_crtc_state *crtc_state,
> +			 const struct drm_connector_state *conn_state)
> +{
> +	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
> +	struct intel_digital_port *dig_port = enc_to_dig_port(&encoder->base);
> +
> +	if (intel_crtc_has_dp_encoder(crtc_state))
> +		intel_display_power_get(dev_priv,
> +					intel_ddi_main_link_aux_domain(dig_port));
> +
> +	if (IS_GEN9_LP(dev_priv))
> +		bxt_ddi_phy_set_lane_optim_mask(encoder,
> +					       crtc_state->lane_lat_optim_mask);
> +}
> +
> +static void
> +intel_ddi_post_pll_disable(struct intel_encoder *encoder,
> +			   const struct intel_crtc_state *crtc_state,
> +			   const struct drm_connector_state *conn_state)
> +{
> +	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
> +	struct intel_digital_port *dig_port = enc_to_dig_port(&encoder->base);
> +
> +	if (intel_crtc_has_dp_encoder(crtc_state))
> +		intel_display_power_put(dev_priv,
> +					intel_ddi_main_link_aux_domain(dig_port));
> +}
> +
>  static void intel_ddi_pre_enable_dp(struct intel_encoder *encoder,
>  				    const struct intel_crtc_state *crtc_state,
>  				    const struct drm_connector_state *conn_state)
> @@ -2904,9 +2929,6 @@ static void intel_ddi_pre_enable_dp(struct intel_encoder *encoder,
>  
>  	WARN_ON(is_mst && (port == PORT_A || port == PORT_E));
>  
> -	intel_display_power_get(dev_priv,
> -				intel_ddi_main_link_aux_domain(intel_dp));
> -
>  	intel_dp_set_link_params(intel_dp, crtc_state->port_clock,
>  				 crtc_state->lane_count, is_mst);
>  
> @@ -3071,9 +3093,6 @@ static void intel_ddi_post_disable_dp(struct intel_encoder *encoder,
>  	intel_display_power_put(dev_priv, dig_port->ddi_io_power_domain);
>  
>  	intel_ddi_clk_disable(encoder);
> -
> -	intel_display_power_put(dev_priv,
> -				intel_ddi_main_link_aux_domain(intel_dp));
>  }
>  
>  static void intel_ddi_post_disable_hdmi(struct intel_encoder *encoder,
> @@ -3304,15 +3323,6 @@ static void intel_disable_ddi(struct intel_encoder *encoder,
>  		intel_disable_ddi_dp(encoder, old_crtc_state, old_conn_state);
>  }
>  
> -static void bxt_ddi_pre_pll_enable(struct intel_encoder *encoder,
> -				   const struct intel_crtc_state *pipe_config,
> -				   const struct drm_connector_state *conn_state)
> -{
> -	uint8_t mask = pipe_config->lane_lat_optim_mask;
> -
> -	bxt_ddi_phy_set_lane_optim_mask(encoder, mask);
> -}
> -
>  void intel_ddi_prepare_link_retrain(struct intel_dp *intel_dp)
>  {
>  	struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp);
> @@ -3828,8 +3838,8 @@ void intel_ddi_init(struct drm_i915_private *dev_priv, enum port port)
>  	intel_encoder->compute_output_type = intel_ddi_compute_output_type;
>  	intel_encoder->compute_config = intel_ddi_compute_config;
>  	intel_encoder->enable = intel_enable_ddi;
> -	if (IS_GEN9_LP(dev_priv))
> -		intel_encoder->pre_pll_enable = bxt_ddi_pre_pll_enable;
> +	intel_encoder->pre_pll_enable = intel_ddi_pre_pll_enable;
> +	intel_encoder->post_pll_disable = intel_ddi_post_pll_disable;
>  	intel_encoder->pre_enable = intel_ddi_pre_enable;
>  	intel_encoder->disable = intel_disable_ddi;
>  	intel_encoder->post_disable = intel_ddi_post_disable;
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index 36710a30fb37..12ba2b923e6b 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -5876,6 +5876,8 @@ static void haswell_crtc_disable(struct intel_crtc_state *old_crtc_state,
>  
>  	if (INTEL_GEN(dev_priv) >= 11)
>  		icl_unmap_plls_to_ports(crtc, old_crtc_state, old_state);
> +
> +	intel_encoders_post_pll_disable(crtc, old_crtc_state, old_state);
>  }
>  
>  static void i9xx_pfit_enable(const struct intel_crtc_state *crtc_state)
> -- 
> 2.13.2
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
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Re: [PATCH v2 5/8] drm/i915: Enable AUX power earlier

[Imre Deak]

On Tue, Oct 30, 2018 at 02:55:00PM -0700, Manasi Navare wrote:
> On Tue, Oct 30, 2018 at 09:05:57PM +0200, Imre Deak wrote:
> > For DDI/TypeC ports the AUX power domain needs to be enabled before the
> > port's PLL is enabled, so move the enabling earlier accordingly.
> > 
> > v2:
> > - Preserve the pre_pll hook for GEN9_LP. (Ville)
> > 
> > Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
> > Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > Signed-off-by: Imre Deak <imre.deak@intel.com>
> > ---
> >  drivers/gpu/drm/i915/intel_ddi.c     | 60 +++++++++++++++++++++---------------
> >  drivers/gpu/drm/i915/intel_display.c |  2 ++
> >  2 files changed, 37 insertions(+), 25 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c
> > index 5bb459011a49..9554da06e19a 100644
> > --- a/drivers/gpu/drm/i915/intel_ddi.c
> > +++ b/drivers/gpu/drm/i915/intel_ddi.c
> > @@ -2082,10 +2082,8 @@ bool intel_ddi_get_hw_state(struct intel_encoder *encoder,
> >  }
> >  
> >  static inline enum intel_display_power_domain
> > -intel_ddi_main_link_aux_domain(struct intel_dp *intel_dp)
> > +intel_ddi_main_link_aux_domain(struct intel_digital_port *dig_port)
> >  {
> > -	struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
> > -
> >  	/* CNL+ HW requires corresponding AUX IOs to be powered up for PSR with
> >  	 * DC states enabled at the same time, while for driver initiated AUX
> >  	 * transfers we need the same AUX IOs to be powered but with DC states
> > @@ -2120,11 +2118,8 @@ static u64 intel_ddi_get_power_domains(struct intel_encoder *encoder,
> >  	domains = BIT_ULL(dig_port->ddi_io_power_domain);
> >  
> >  	/* AUX power is only needed for (e)DP mode, not for HDMI. */
> > -	if (intel_crtc_has_dp_encoder(crtc_state)) {
> > -		struct intel_dp *intel_dp = &dig_port->dp;
> > -
> > -		domains |= BIT_ULL(intel_ddi_main_link_aux_domain(intel_dp));
> > -	}
> > +	if (intel_crtc_has_dp_encoder(crtc_state))
> > +		domains |= BIT_ULL(intel_ddi_main_link_aux_domain(dig_port));
> >  
> >  	return domains;
> >  }
> > @@ -2891,6 +2886,36 @@ static void intel_ddi_clk_disable(struct intel_encoder *encoder)
> >  	}
> >  }
> >
> 
> I just realized while merging that my previous patches that are reviewed-by
> add icl_ddi_pre_pll_enable hook for Gen 11. 
> Either the below pre_pll_enable should be part of that or I will have to respin those
> before merging and call it intel_ddi_pre_pll_enable() hook.
> https://patchwork.freedesktop.org/patch/258008/

I'm fine with merging either patchset first, it's a simple rebase in
both cases.

> 
> Manasi
> 
> > +static void
> > +intel_ddi_pre_pll_enable(struct intel_encoder *encoder,
> > +			 const struct intel_crtc_state *crtc_state,
> > +			 const struct drm_connector_state *conn_state)
> > +{
> > +	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
> > +	struct intel_digital_port *dig_port = enc_to_dig_port(&encoder->base);
> > +
> > +	if (intel_crtc_has_dp_encoder(crtc_state))
> > +		intel_display_power_get(dev_priv,
> > +					intel_ddi_main_link_aux_domain(dig_port));
> > +
> > +	if (IS_GEN9_LP(dev_priv))
> > +		bxt_ddi_phy_set_lane_optim_mask(encoder,
> > +					       crtc_state->lane_lat_optim_mask);
> > +}
> > +
> > +static void
> > +intel_ddi_post_pll_disable(struct intel_encoder *encoder,
> > +			   const struct intel_crtc_state *crtc_state,
> > +			   const struct drm_connector_state *conn_state)
> > +{
> > +	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
> > +	struct intel_digital_port *dig_port = enc_to_dig_port(&encoder->base);
> > +
> > +	if (intel_crtc_has_dp_encoder(crtc_state))
> > +		intel_display_power_put(dev_priv,
> > +					intel_ddi_main_link_aux_domain(dig_port));
> > +}
> > +
> >  static void intel_ddi_pre_enable_dp(struct intel_encoder *encoder,
> >  				    const struct intel_crtc_state *crtc_state,
> >  				    const struct drm_connector_state *conn_state)
> > @@ -2904,9 +2929,6 @@ static void intel_ddi_pre_enable_dp(struct intel_encoder *encoder,
> >  
> >  	WARN_ON(is_mst && (port == PORT_A || port == PORT_E));
> >  
> > -	intel_display_power_get(dev_priv,
> > -				intel_ddi_main_link_aux_domain(intel_dp));
> > -
> >  	intel_dp_set_link_params(intel_dp, crtc_state->port_clock,
> >  				 crtc_state->lane_count, is_mst);
> >  
> > @@ -3071,9 +3093,6 @@ static void intel_ddi_post_disable_dp(struct intel_encoder *encoder,
> >  	intel_display_power_put(dev_priv, dig_port->ddi_io_power_domain);
> >  
> >  	intel_ddi_clk_disable(encoder);
> > -
> > -	intel_display_power_put(dev_priv,
> > -				intel_ddi_main_link_aux_domain(intel_dp));
> >  }
> >  
> >  static void intel_ddi_post_disable_hdmi(struct intel_encoder *encoder,
> > @@ -3304,15 +3323,6 @@ static void intel_disable_ddi(struct intel_encoder *encoder,
> >  		intel_disable_ddi_dp(encoder, old_crtc_state, old_conn_state);
> >  }
> >  
> > -static void bxt_ddi_pre_pll_enable(struct intel_encoder *encoder,
> > -				   const struct intel_crtc_state *pipe_config,
> > -				   const struct drm_connector_state *conn_state)
> > -{
> > -	uint8_t mask = pipe_config->lane_lat_optim_mask;
> > -
> > -	bxt_ddi_phy_set_lane_optim_mask(encoder, mask);
> > -}
> > -
> >  void intel_ddi_prepare_link_retrain(struct intel_dp *intel_dp)
> >  {
> >  	struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp);
> > @@ -3828,8 +3838,8 @@ void intel_ddi_init(struct drm_i915_private *dev_priv, enum port port)
> >  	intel_encoder->compute_output_type = intel_ddi_compute_output_type;
> >  	intel_encoder->compute_config = intel_ddi_compute_config;
> >  	intel_encoder->enable = intel_enable_ddi;
> > -	if (IS_GEN9_LP(dev_priv))
> > -		intel_encoder->pre_pll_enable = bxt_ddi_pre_pll_enable;
> > +	intel_encoder->pre_pll_enable = intel_ddi_pre_pll_enable;
> > +	intel_encoder->post_pll_disable = intel_ddi_post_pll_disable;
> >  	intel_encoder->pre_enable = intel_ddi_pre_enable;
> >  	intel_encoder->disable = intel_disable_ddi;
> >  	intel_encoder->post_disable = intel_ddi_post_disable;
> > diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> > index 36710a30fb37..12ba2b923e6b 100644
> > --- a/drivers/gpu/drm/i915/intel_display.c
> > +++ b/drivers/gpu/drm/i915/intel_display.c
> > @@ -5876,6 +5876,8 @@ static void haswell_crtc_disable(struct intel_crtc_state *old_crtc_state,
> >  
> >  	if (INTEL_GEN(dev_priv) >= 11)
> >  		icl_unmap_plls_to_ports(crtc, old_crtc_state, old_state);
> > +
> > +	intel_encoders_post_pll_disable(crtc, old_crtc_state, old_state);
> >  }
> >  
> >  static void i9xx_pfit_enable(const struct intel_crtc_state *crtc_state)
> > -- 
> > 2.13.2
> > 
> > _______________________________________________
> > Intel-gfx mailing list
> > Intel-gfx@lists.freedesktop.org
> > https://lists.freedesktop.org/mailman/listinfo/intel-gfx
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Re: [PATCH 5/8] drm/i915: Enable AUX power earlier

[Souza, Jose]

On Tue, 2018-10-30 at 17:40 +0200, Imre Deak wrote:
> For DDI/TypeC ports the AUX power domain needs to be enabled before
> the
> port's PLL is enabled, so move the enabling earlier accordingly.

Could you just pointed out where did you got this information? I
checked in this Bspec pages 20845, 20598 and 21750 and I did not found.

With that:
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>

> 
> Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Signed-off-by: Imre Deak <imre.deak@intel.com>
> ---
>  drivers/gpu/drm/i915/intel_ddi.c     | 46 +++++++++++++++++++++++++-
> ----------
>  drivers/gpu/drm/i915/intel_display.c |  2 ++
>  2 files changed, 34 insertions(+), 14 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_ddi.c
> b/drivers/gpu/drm/i915/intel_ddi.c
> index 5bb459011a49..7731ca704862 100644
> --- a/drivers/gpu/drm/i915/intel_ddi.c
> +++ b/drivers/gpu/drm/i915/intel_ddi.c
> @@ -2082,10 +2082,8 @@ bool intel_ddi_get_hw_state(struct
> intel_encoder *encoder,
>  }
>  
>  static inline enum intel_display_power_domain
> -intel_ddi_main_link_aux_domain(struct intel_dp *intel_dp)
> +intel_ddi_main_link_aux_domain(struct intel_digital_port *dig_port)
>  {
> -	struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
> -
>  	/* CNL+ HW requires corresponding AUX IOs to be powered up for
> PSR with
>  	 * DC states enabled at the same time, while for driver
> initiated AUX
>  	 * transfers we need the same AUX IOs to be powered but with DC
> states
> @@ -2120,11 +2118,8 @@ static u64 intel_ddi_get_power_domains(struct
> intel_encoder *encoder,
>  	domains = BIT_ULL(dig_port->ddi_io_power_domain);
>  
>  	/* AUX power is only needed for (e)DP mode, not for HDMI. */
> -	if (intel_crtc_has_dp_encoder(crtc_state)) {
> -		struct intel_dp *intel_dp = &dig_port->dp;
> -
> -		domains |=
> BIT_ULL(intel_ddi_main_link_aux_domain(intel_dp));
> -	}
> +	if (intel_crtc_has_dp_encoder(crtc_state))
> +		domains |=
> BIT_ULL(intel_ddi_main_link_aux_domain(dig_port));
>  
>  	return domains;
>  }
> @@ -2891,6 +2886,32 @@ static void intel_ddi_clk_disable(struct
> intel_encoder *encoder)
>  	}
>  }
>  
> +static void
> +intel_ddi_pre_pll_enable(struct intel_encoder *encoder,
> +			 const struct intel_crtc_state *crtc_state,
> +			 const struct drm_connector_state *conn_state)
> +{
> +	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
> +	struct intel_digital_port *dig_port = enc_to_dig_port(&encoder-
> >base);
> +
> +	if (intel_crtc_has_dp_encoder(crtc_state))
> +		intel_display_power_get(dev_priv,
> +					intel_ddi_main_link_aux_domain(
> dig_port));
> +}
> +
> +static void
> +intel_ddi_post_pll_disable(struct intel_encoder *encoder,
> +			   const struct intel_crtc_state *crtc_state,
> +			   const struct drm_connector_state
> *conn_state)
> +{
> +	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
> +	struct intel_digital_port *dig_port = enc_to_dig_port(&encoder-
> >base);
> +
> +	if (intel_crtc_has_dp_encoder(crtc_state))
> +		intel_display_power_put(dev_priv,
> +					intel_ddi_main_link_aux_domain(
> dig_port));
> +}
> +
>  static void intel_ddi_pre_enable_dp(struct intel_encoder *encoder,
>  				    const struct intel_crtc_state
> *crtc_state,
>  				    const struct drm_connector_state
> *conn_state)
> @@ -2904,9 +2925,6 @@ static void intel_ddi_pre_enable_dp(struct
> intel_encoder *encoder,
>  
>  	WARN_ON(is_mst && (port == PORT_A || port == PORT_E));
>  
> -	intel_display_power_get(dev_priv,
> -				intel_ddi_main_link_aux_domain(intel_dp
> ));
> -
>  	intel_dp_set_link_params(intel_dp, crtc_state->port_clock,
>  				 crtc_state->lane_count, is_mst);
>  
> @@ -3071,9 +3089,6 @@ static void intel_ddi_post_disable_dp(struct
> intel_encoder *encoder,
>  	intel_display_power_put(dev_priv, dig_port-
> >ddi_io_power_domain);
>  
>  	intel_ddi_clk_disable(encoder);
> -
> -	intel_display_power_put(dev_priv,
> -				intel_ddi_main_link_aux_domain(intel_dp
> ));
>  }
>  
>  static void intel_ddi_post_disable_hdmi(struct intel_encoder
> *encoder,
> @@ -3830,6 +3845,9 @@ void intel_ddi_init(struct drm_i915_private
> *dev_priv, enum port port)
>  	intel_encoder->enable = intel_enable_ddi;
>  	if (IS_GEN9_LP(dev_priv))
>  		intel_encoder->pre_pll_enable = bxt_ddi_pre_pll_enable;
> +
> +	intel_encoder->pre_pll_enable = intel_ddi_pre_pll_enable;
> +	intel_encoder->post_pll_disable = intel_ddi_post_pll_disable;
>  	intel_encoder->pre_enable = intel_ddi_pre_enable;
>  	intel_encoder->disable = intel_disable_ddi;
>  	intel_encoder->post_disable = intel_ddi_post_disable;
> diff --git a/drivers/gpu/drm/i915/intel_display.c
> b/drivers/gpu/drm/i915/intel_display.c
> index 36710a30fb37..12ba2b923e6b 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -5876,6 +5876,8 @@ static void haswell_crtc_disable(struct
> intel_crtc_state *old_crtc_state,
>  
>  	if (INTEL_GEN(dev_priv) >= 11)
>  		icl_unmap_plls_to_ports(crtc, old_crtc_state,
> old_state);
> +
> +	intel_encoders_post_pll_disable(crtc, old_crtc_state,
> old_state);
>  }
>  
>  static void i9xx_pfit_enable(const struct intel_crtc_state
> *crtc_state)
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Re: [PATCH 5/8] drm/i915: Enable AUX power earlier

[Imre Deak]

On Wed, Oct 31, 2018 at 01:07:04AM +0200, Souza, Jose wrote:
> On Tue, 2018-10-30 at 17:40 +0200, Imre Deak wrote:
> > For DDI/TypeC ports the AUX power domain needs to be enabled before
> > the
> > port's PLL is enabled, so move the enabling earlier accordingly.
> 
> Could you just pointed out where did you got this information? I
> checked in this Bspec pages 20845, 20598 and 21750 and I did not found.

It's at 21750, connect/disconnect flows.

> 
> With that:
> Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
> 
> > 
> > Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
> > Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > Signed-off-by: Imre Deak <imre.deak@intel.com>
> > ---
> >  drivers/gpu/drm/i915/intel_ddi.c     | 46 +++++++++++++++++++++++++-
> > ----------
> >  drivers/gpu/drm/i915/intel_display.c |  2 ++
> >  2 files changed, 34 insertions(+), 14 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/intel_ddi.c
> > b/drivers/gpu/drm/i915/intel_ddi.c
> > index 5bb459011a49..7731ca704862 100644
> > --- a/drivers/gpu/drm/i915/intel_ddi.c
> > +++ b/drivers/gpu/drm/i915/intel_ddi.c
> > @@ -2082,10 +2082,8 @@ bool intel_ddi_get_hw_state(struct
> > intel_encoder *encoder,
> >  }
> >  
> >  static inline enum intel_display_power_domain
> > -intel_ddi_main_link_aux_domain(struct intel_dp *intel_dp)
> > +intel_ddi_main_link_aux_domain(struct intel_digital_port *dig_port)
> >  {
> > -	struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
> > -
> >  	/* CNL+ HW requires corresponding AUX IOs to be powered up for
> > PSR with
> >  	 * DC states enabled at the same time, while for driver
> > initiated AUX
> >  	 * transfers we need the same AUX IOs to be powered but with DC
> > states
> > @@ -2120,11 +2118,8 @@ static u64 intel_ddi_get_power_domains(struct
> > intel_encoder *encoder,
> >  	domains = BIT_ULL(dig_port->ddi_io_power_domain);
> >  
> >  	/* AUX power is only needed for (e)DP mode, not for HDMI. */
> > -	if (intel_crtc_has_dp_encoder(crtc_state)) {
> > -		struct intel_dp *intel_dp = &dig_port->dp;
> > -
> > -		domains |=
> > BIT_ULL(intel_ddi_main_link_aux_domain(intel_dp));
> > -	}
> > +	if (intel_crtc_has_dp_encoder(crtc_state))
> > +		domains |=
> > BIT_ULL(intel_ddi_main_link_aux_domain(dig_port));
> >  
> >  	return domains;
> >  }
> > @@ -2891,6 +2886,32 @@ static void intel_ddi_clk_disable(struct
> > intel_encoder *encoder)
> >  	}
> >  }
> >  
> > +static void
> > +intel_ddi_pre_pll_enable(struct intel_encoder *encoder,
> > +			 const struct intel_crtc_state *crtc_state,
> > +			 const struct drm_connector_state *conn_state)
> > +{
> > +	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
> > +	struct intel_digital_port *dig_port = enc_to_dig_port(&encoder-
> > >base);
> > +
> > +	if (intel_crtc_has_dp_encoder(crtc_state))
> > +		intel_display_power_get(dev_priv,
> > +					intel_ddi_main_link_aux_domain(
> > dig_port));
> > +}
> > +
> > +static void
> > +intel_ddi_post_pll_disable(struct intel_encoder *encoder,
> > +			   const struct intel_crtc_state *crtc_state,
> > +			   const struct drm_connector_state
> > *conn_state)
> > +{
> > +	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
> > +	struct intel_digital_port *dig_port = enc_to_dig_port(&encoder-
> > >base);
> > +
> > +	if (intel_crtc_has_dp_encoder(crtc_state))
> > +		intel_display_power_put(dev_priv,
> > +					intel_ddi_main_link_aux_domain(
> > dig_port));
> > +}
> > +
> >  static void intel_ddi_pre_enable_dp(struct intel_encoder *encoder,
> >  				    const struct intel_crtc_state
> > *crtc_state,
> >  				    const struct drm_connector_state
> > *conn_state)
> > @@ -2904,9 +2925,6 @@ static void intel_ddi_pre_enable_dp(struct
> > intel_encoder *encoder,
> >  
> >  	WARN_ON(is_mst && (port == PORT_A || port == PORT_E));
> >  
> > -	intel_display_power_get(dev_priv,
> > -				intel_ddi_main_link_aux_domain(intel_dp
> > ));
> > -
> >  	intel_dp_set_link_params(intel_dp, crtc_state->port_clock,
> >  				 crtc_state->lane_count, is_mst);
> >  
> > @@ -3071,9 +3089,6 @@ static void intel_ddi_post_disable_dp(struct
> > intel_encoder *encoder,
> >  	intel_display_power_put(dev_priv, dig_port-
> > >ddi_io_power_domain);
> >  
> >  	intel_ddi_clk_disable(encoder);
> > -
> > -	intel_display_power_put(dev_priv,
> > -				intel_ddi_main_link_aux_domain(intel_dp
> > ));
> >  }
> >  
> >  static void intel_ddi_post_disable_hdmi(struct intel_encoder
> > *encoder,
> > @@ -3830,6 +3845,9 @@ void intel_ddi_init(struct drm_i915_private
> > *dev_priv, enum port port)
> >  	intel_encoder->enable = intel_enable_ddi;
> >  	if (IS_GEN9_LP(dev_priv))
> >  		intel_encoder->pre_pll_enable = bxt_ddi_pre_pll_enable;
> > +
> > +	intel_encoder->pre_pll_enable = intel_ddi_pre_pll_enable;
> > +	intel_encoder->post_pll_disable = intel_ddi_post_pll_disable;
> >  	intel_encoder->pre_enable = intel_ddi_pre_enable;
> >  	intel_encoder->disable = intel_disable_ddi;
> >  	intel_encoder->post_disable = intel_ddi_post_disable;
> > diff --git a/drivers/gpu/drm/i915/intel_display.c
> > b/drivers/gpu/drm/i915/intel_display.c
> > index 36710a30fb37..12ba2b923e6b 100644
> > --- a/drivers/gpu/drm/i915/intel_display.c
> > +++ b/drivers/gpu/drm/i915/intel_display.c
> > @@ -5876,6 +5876,8 @@ static void haswell_crtc_disable(struct
> > intel_crtc_state *old_crtc_state,
> >  
> >  	if (INTEL_GEN(dev_priv) >= 11)
> >  		icl_unmap_plls_to_ports(crtc, old_crtc_state,
> > old_state);
> > +
> > +	intel_encoders_post_pll_disable(crtc, old_crtc_state,
> > old_state);
> >  }
> >  
> >  static void i9xx_pfit_enable(const struct intel_crtc_state
> > *crtc_state)
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Re: [PATCH 5/8] drm/i915: Enable AUX power earlier

[Souza, Jose]

On Wed, 2018-10-31 at 01:12 +0200, Imre Deak wrote:
> On Wed, Oct 31, 2018 at 01:07:04AM +0200, Souza, Jose wrote:
> > On Tue, 2018-10-30 at 17:40 +0200, Imre Deak wrote:
> > > For DDI/TypeC ports the AUX power domain needs to be enabled
> > > before
> > > the
> > > port's PLL is enabled, so move the enabling earlier accordingly.
> > 
> > Could you just pointed out where did you got this information? I
> > checked in this Bspec pages 20845, 20598 and 21750 and I did not
> > found.
> 
> It's at 21750, connect/disconnect flows.

What piece specifically?
The only related that I can find is this one:
"Aux power must be enabled while using Aux channel or the main link
(including HDMI). It should be disabled to save power when not using
Aux channel or main link."

> 
> > With that:
> > Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
> > 
> > > Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
> > > Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > > Signed-off-by: Imre Deak <imre.deak@intel.com>
> > > ---
> > >  drivers/gpu/drm/i915/intel_ddi.c     | 46
> > > +++++++++++++++++++++++++-
> > > ----------
> > >  drivers/gpu/drm/i915/intel_display.c |  2 ++
> > >  2 files changed, 34 insertions(+), 14 deletions(-)
> > > 
> > > diff --git a/drivers/gpu/drm/i915/intel_ddi.c
> > > b/drivers/gpu/drm/i915/intel_ddi.c
> > > index 5bb459011a49..7731ca704862 100644
> > > --- a/drivers/gpu/drm/i915/intel_ddi.c
> > > +++ b/drivers/gpu/drm/i915/intel_ddi.c
> > > @@ -2082,10 +2082,8 @@ bool intel_ddi_get_hw_state(struct
> > > intel_encoder *encoder,
> > >  }
> > >  
> > >  static inline enum intel_display_power_domain
> > > -intel_ddi_main_link_aux_domain(struct intel_dp *intel_dp)
> > > +intel_ddi_main_link_aux_domain(struct intel_digital_port
> > > *dig_port)
> > >  {
> > > -	struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
> > > -
> > >  	/* CNL+ HW requires corresponding AUX IOs to be powered up for
> > > PSR with
> > >  	 * DC states enabled at the same time, while for driver
> > > initiated AUX
> > >  	 * transfers we need the same AUX IOs to be powered but with DC
> > > states
> > > @@ -2120,11 +2118,8 @@ static u64
> > > intel_ddi_get_power_domains(struct
> > > intel_encoder *encoder,
> > >  	domains = BIT_ULL(dig_port->ddi_io_power_domain);
> > >  
> > >  	/* AUX power is only needed for (e)DP mode, not for HDMI. */
> > > -	if (intel_crtc_has_dp_encoder(crtc_state)) {
> > > -		struct intel_dp *intel_dp = &dig_port->dp;
> > > -
> > > -		domains |=
> > > BIT_ULL(intel_ddi_main_link_aux_domain(intel_dp));
> > > -	}
> > > +	if (intel_crtc_has_dp_encoder(crtc_state))
> > > +		domains |=
> > > BIT_ULL(intel_ddi_main_link_aux_domain(dig_port));
> > >  
> > >  	return domains;
> > >  }
> > > @@ -2891,6 +2886,32 @@ static void intel_ddi_clk_disable(struct
> > > intel_encoder *encoder)
> > >  	}
> > >  }
> > >  
> > > +static void
> > > +intel_ddi_pre_pll_enable(struct intel_encoder *encoder,
> > > +			 const struct intel_crtc_state *crtc_state,
> > > +			 const struct drm_connector_state *conn_state)
> > > +{
> > > +	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
> > > +	struct intel_digital_port *dig_port = enc_to_dig_port(&encoder-
> > > > base);
> > > +
> > > +	if (intel_crtc_has_dp_encoder(crtc_state))
> > > +		intel_display_power_get(dev_priv,
> > > +					intel_ddi_main_link_aux_domain(
> > > dig_port));
> > > +}
> > > +
> > > +static void
> > > +intel_ddi_post_pll_disable(struct intel_encoder *encoder,
> > > +			   const struct intel_crtc_state *crtc_state,
> > > +			   const struct drm_connector_state
> > > *conn_state)
> > > +{
> > > +	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
> > > +	struct intel_digital_port *dig_port = enc_to_dig_port(&encoder-
> > > > base);
> > > +
> > > +	if (intel_crtc_has_dp_encoder(crtc_state))
> > > +		intel_display_power_put(dev_priv,
> > > +					intel_ddi_main_link_aux_domain(
> > > dig_port));
> > > +}
> > > +
> > >  static void intel_ddi_pre_enable_dp(struct intel_encoder
> > > *encoder,
> > >  				    const struct intel_crtc_state
> > > *crtc_state,
> > >  				    const struct drm_connector_state
> > > *conn_state)
> > > @@ -2904,9 +2925,6 @@ static void intel_ddi_pre_enable_dp(struct
> > > intel_encoder *encoder,
> > >  
> > >  	WARN_ON(is_mst && (port == PORT_A || port == PORT_E));
> > >  
> > > -	intel_display_power_get(dev_priv,
> > > -				intel_ddi_main_link_aux_domain(intel_dp
> > > ));
> > > -
> > >  	intel_dp_set_link_params(intel_dp, crtc_state->port_clock,
> > >  				 crtc_state->lane_count, is_mst);
> > >  
> > > @@ -3071,9 +3089,6 @@ static void
> > > intel_ddi_post_disable_dp(struct
> > > intel_encoder *encoder,
> > >  	intel_display_power_put(dev_priv, dig_port-
> > > > ddi_io_power_domain);
> > >  
> > >  	intel_ddi_clk_disable(encoder);
> > > -
> > > -	intel_display_power_put(dev_priv,
> > > -				intel_ddi_main_link_aux_domain(intel_dp
> > > ));
> > >  }
> > >  
> > >  static void intel_ddi_post_disable_hdmi(struct intel_encoder
> > > *encoder,
> > > @@ -3830,6 +3845,9 @@ void intel_ddi_init(struct drm_i915_private
> > > *dev_priv, enum port port)
> > >  	intel_encoder->enable = intel_enable_ddi;
> > >  	if (IS_GEN9_LP(dev_priv))
> > >  		intel_encoder->pre_pll_enable = bxt_ddi_pre_pll_enable;
> > > +
> > > +	intel_encoder->pre_pll_enable = intel_ddi_pre_pll_enable;
> > > +	intel_encoder->post_pll_disable = intel_ddi_post_pll_disable;
> > >  	intel_encoder->pre_enable = intel_ddi_pre_enable;
> > >  	intel_encoder->disable = intel_disable_ddi;
> > >  	intel_encoder->post_disable = intel_ddi_post_disable;
> > > diff --git a/drivers/gpu/drm/i915/intel_display.c
> > > b/drivers/gpu/drm/i915/intel_display.c
> > > index 36710a30fb37..12ba2b923e6b 100644
> > > --- a/drivers/gpu/drm/i915/intel_display.c
> > > +++ b/drivers/gpu/drm/i915/intel_display.c
> > > @@ -5876,6 +5876,8 @@ static void haswell_crtc_disable(struct
> > > intel_crtc_state *old_crtc_state,
> > >  
> > >  	if (INTEL_GEN(dev_priv) >= 11)
> > >  		icl_unmap_plls_to_ports(crtc, old_crtc_state,
> > > old_state);
> > > +
> > > +	intel_encoders_post_pll_disable(crtc, old_crtc_state,
> > > old_state);
> > >  }
> > >  
> > >  static void i9xx_pfit_enable(const struct intel_crtc_state
> > > *crtc_state)
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Re: [PATCH 5/8] drm/i915: Enable AUX power earlier

[Imre Deak]

On Wed, Oct 31, 2018 at 01:18:09AM +0200, Souza, Jose wrote:
> On Wed, 2018-10-31 at 01:12 +0200, Imre Deak wrote:
> > On Wed, Oct 31, 2018 at 01:07:04AM +0200, Souza, Jose wrote:
> > > On Tue, 2018-10-30 at 17:40 +0200, Imre Deak wrote:
> > > > For DDI/TypeC ports the AUX power domain needs to be enabled
> > > > before
> > > > the
> > > > port's PLL is enabled, so move the enabling earlier accordingly.
> > > 
> > > Could you just pointed out where did you got this information? I
> > > checked in this Bspec pages 20845, 20598 and 21750 and I did not
> > > found.
> > 
> > It's at 21750, connect/disconnect flows.
> 
> What piece specifically?
> The only related that I can find is this one:
> "Aux power must be enabled while using Aux channel or the main link
> (including HDMI). It should be disabled to save power when not using
> Aux channel or main link."

We can do AUX transfers even before enabling the main link, where we
enable already AUX power. In fact all the connect flows have:

"Display software issues AUX reads for EDID/DPCD."

So now if we enabled it after PLL programming we'd have the two things
happen in both orders, which I'd rather not do, if not necessary.

> 
> > 
> > > With that:
> > > Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
> > > 
> > > > Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
> > > > Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > > > Signed-off-by: Imre Deak <imre.deak@intel.com>
> > > > ---
> > > >  drivers/gpu/drm/i915/intel_ddi.c     | 46
> > > > +++++++++++++++++++++++++-
> > > > ----------
> > > >  drivers/gpu/drm/i915/intel_display.c |  2 ++
> > > >  2 files changed, 34 insertions(+), 14 deletions(-)
> > > > 
> > > > diff --git a/drivers/gpu/drm/i915/intel_ddi.c
> > > > b/drivers/gpu/drm/i915/intel_ddi.c
> > > > index 5bb459011a49..7731ca704862 100644
> > > > --- a/drivers/gpu/drm/i915/intel_ddi.c
> > > > +++ b/drivers/gpu/drm/i915/intel_ddi.c
> > > > @@ -2082,10 +2082,8 @@ bool intel_ddi_get_hw_state(struct
> > > > intel_encoder *encoder,
> > > >  }
> > > >  
> > > >  static inline enum intel_display_power_domain
> > > > -intel_ddi_main_link_aux_domain(struct intel_dp *intel_dp)
> > > > +intel_ddi_main_link_aux_domain(struct intel_digital_port
> > > > *dig_port)
> > > >  {
> > > > -	struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
> > > > -
> > > >  	/* CNL+ HW requires corresponding AUX IOs to be powered up for
> > > > PSR with
> > > >  	 * DC states enabled at the same time, while for driver
> > > > initiated AUX
> > > >  	 * transfers we need the same AUX IOs to be powered but with DC
> > > > states
> > > > @@ -2120,11 +2118,8 @@ static u64
> > > > intel_ddi_get_power_domains(struct
> > > > intel_encoder *encoder,
> > > >  	domains = BIT_ULL(dig_port->ddi_io_power_domain);
> > > >  
> > > >  	/* AUX power is only needed for (e)DP mode, not for HDMI. */
> > > > -	if (intel_crtc_has_dp_encoder(crtc_state)) {
> > > > -		struct intel_dp *intel_dp = &dig_port->dp;
> > > > -
> > > > -		domains |=
> > > > BIT_ULL(intel_ddi_main_link_aux_domain(intel_dp));
> > > > -	}
> > > > +	if (intel_crtc_has_dp_encoder(crtc_state))
> > > > +		domains |=
> > > > BIT_ULL(intel_ddi_main_link_aux_domain(dig_port));
> > > >  
> > > >  	return domains;
> > > >  }
> > > > @@ -2891,6 +2886,32 @@ static void intel_ddi_clk_disable(struct
> > > > intel_encoder *encoder)
> > > >  	}
> > > >  }
> > > >  
> > > > +static void
> > > > +intel_ddi_pre_pll_enable(struct intel_encoder *encoder,
> > > > +			 const struct intel_crtc_state *crtc_state,
> > > > +			 const struct drm_connector_state *conn_state)
> > > > +{
> > > > +	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
> > > > +	struct intel_digital_port *dig_port = enc_to_dig_port(&encoder-
> > > > > base);
> > > > +
> > > > +	if (intel_crtc_has_dp_encoder(crtc_state))
> > > > +		intel_display_power_get(dev_priv,
> > > > +					intel_ddi_main_link_aux_domain(
> > > > dig_port));
> > > > +}
> > > > +
> > > > +static void
> > > > +intel_ddi_post_pll_disable(struct intel_encoder *encoder,
> > > > +			   const struct intel_crtc_state *crtc_state,
> > > > +			   const struct drm_connector_state
> > > > *conn_state)
> > > > +{
> > > > +	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
> > > > +	struct intel_digital_port *dig_port = enc_to_dig_port(&encoder-
> > > > > base);
> > > > +
> > > > +	if (intel_crtc_has_dp_encoder(crtc_state))
> > > > +		intel_display_power_put(dev_priv,
> > > > +					intel_ddi_main_link_aux_domain(
> > > > dig_port));
> > > > +}
> > > > +
> > > >  static void intel_ddi_pre_enable_dp(struct intel_encoder
> > > > *encoder,
> > > >  				    const struct intel_crtc_state
> > > > *crtc_state,
> > > >  				    const struct drm_connector_state
> > > > *conn_state)
> > > > @@ -2904,9 +2925,6 @@ static void intel_ddi_pre_enable_dp(struct
> > > > intel_encoder *encoder,
> > > >  
> > > >  	WARN_ON(is_mst && (port == PORT_A || port == PORT_E));
> > > >  
> > > > -	intel_display_power_get(dev_priv,
> > > > -				intel_ddi_main_link_aux_domain(intel_dp
> > > > ));
> > > > -
> > > >  	intel_dp_set_link_params(intel_dp, crtc_state->port_clock,
> > > >  				 crtc_state->lane_count, is_mst);
> > > >  
> > > > @@ -3071,9 +3089,6 @@ static void
> > > > intel_ddi_post_disable_dp(struct
> > > > intel_encoder *encoder,
> > > >  	intel_display_power_put(dev_priv, dig_port-
> > > > > ddi_io_power_domain);
> > > >  
> > > >  	intel_ddi_clk_disable(encoder);
> > > > -
> > > > -	intel_display_power_put(dev_priv,
> > > > -				intel_ddi_main_link_aux_domain(intel_dp
> > > > ));
> > > >  }
> > > >  
> > > >  static void intel_ddi_post_disable_hdmi(struct intel_encoder
> > > > *encoder,
> > > > @@ -3830,6 +3845,9 @@ void intel_ddi_init(struct drm_i915_private
> > > > *dev_priv, enum port port)
> > > >  	intel_encoder->enable = intel_enable_ddi;
> > > >  	if (IS_GEN9_LP(dev_priv))
> > > >  		intel_encoder->pre_pll_enable = bxt_ddi_pre_pll_enable;
> > > > +
> > > > +	intel_encoder->pre_pll_enable = intel_ddi_pre_pll_enable;
> > > > +	intel_encoder->post_pll_disable = intel_ddi_post_pll_disable;
> > > >  	intel_encoder->pre_enable = intel_ddi_pre_enable;
> > > >  	intel_encoder->disable = intel_disable_ddi;
> > > >  	intel_encoder->post_disable = intel_ddi_post_disable;
> > > > diff --git a/drivers/gpu/drm/i915/intel_display.c
> > > > b/drivers/gpu/drm/i915/intel_display.c
> > > > index 36710a30fb37..12ba2b923e6b 100644
> > > > --- a/drivers/gpu/drm/i915/intel_display.c
> > > > +++ b/drivers/gpu/drm/i915/intel_display.c
> > > > @@ -5876,6 +5876,8 @@ static void haswell_crtc_disable(struct
> > > > intel_crtc_state *old_crtc_state,
> > > >  
> > > >  	if (INTEL_GEN(dev_priv) >= 11)
> > > >  		icl_unmap_plls_to_ports(crtc, old_crtc_state,
> > > > old_state);
> > > > +
> > > > +	intel_encoders_post_pll_disable(crtc, old_crtc_state,
> > > > old_state);
> > > >  }
> > > >  
> > > >  static void i9xx_pfit_enable(const struct intel_crtc_state
> > > > *crtc_state)
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Re: [PATCH 5/8] drm/i915: Enable AUX power earlier

[Souza, Jose]

On Wed, 2018-10-31 at 01:28 +0200, Imre Deak wrote:
> On Wed, Oct 31, 2018 at 01:18:09AM +0200, Souza, Jose wrote:
> > On Wed, 2018-10-31 at 01:12 +0200, Imre Deak wrote:
> > > On Wed, Oct 31, 2018 at 01:07:04AM +0200, Souza, Jose wrote:
> > > > On Tue, 2018-10-30 at 17:40 +0200, Imre Deak wrote:
> > > > > For DDI/TypeC ports the AUX power domain needs to be enabled
> > > > > before
> > > > > the
> > > > > port's PLL is enabled, so move the enabling earlier
> > > > > accordingly.
> > > > 
> > > > Could you just pointed out where did you got this information?
> > > > I
> > > > checked in this Bspec pages 20845, 20598 and 21750 and I did
> > > > not
> > > > found.
> > > 
> > > It's at 21750, connect/disconnect flows.
> > 
> > What piece specifically?
> > The only related that I can find is this one:
> > "Aux power must be enabled while using Aux channel or the main link
> > (including HDMI). It should be disabled to save power when not
> > using
> > Aux channel or main link."
> 
> We can do AUX transfers even before enabling the main link, where we
> enable already AUX power. In fact all the connect flows have:
> 
> "Display software issues AUX reads for EDID/DPCD."
> 
> So now if we enabled it after PLL programming we'd have the two
> things
> happen in both orders, which I'd rather not do, if not necessary.

I still don't get your point.

The reads for EDID/DPCD is executed way before PLL programming, so it
will still enable and disable power aux power wells.
Also I did not found any aux transactions between the current places
that gets and puts a aux power well reference.

haswell_crtc_enable()	
	intel_encoders_pre_pll_enable(crtc, pipe_config, old_state);

	if (pipe_config->shared_dpll)
		intel_enable_shared_dpll(pipe_config);

	if (INTEL_GEN(dev_priv) >= 11)
		icl_map_plls_to_ports(crtc, pipe_config, old_state);

	intel_encoders_pre_enable(crtc, pipe_config, old_state);


haswell_crtc_disable()
	intel_encoders_post_disable(crtc, old_crtc_state, old_state);

	if (INTEL_GEN(dev_priv) >= 11)
		icl_unmap_plls_to_ports(crtc, old_crtc_state,
old_state);

	intel_encoders_post_pll_disable(crtc, old_crtc_state,
old_state);

So if it is not sequence or requirement I don't see why we should
enable earlier.

> 
> > > > With that:
> > > > Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
> > > > 
> > > > > Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
> > > > > Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > > > > Signed-off-by: Imre Deak <imre.deak@intel.com>
> > > > > ---
> > > > >  drivers/gpu/drm/i915/intel_ddi.c     | 46
> > > > > +++++++++++++++++++++++++-
> > > > > ----------
> > > > >  drivers/gpu/drm/i915/intel_display.c |  2 ++
> > > > >  2 files changed, 34 insertions(+), 14 deletions(-)
> > > > > 
> > > > > diff --git a/drivers/gpu/drm/i915/intel_ddi.c
> > > > > b/drivers/gpu/drm/i915/intel_ddi.c
> > > > > index 5bb459011a49..7731ca704862 100644
> > > > > --- a/drivers/gpu/drm/i915/intel_ddi.c
> > > > > +++ b/drivers/gpu/drm/i915/intel_ddi.c
> > > > > @@ -2082,10 +2082,8 @@ bool intel_ddi_get_hw_state(struct
> > > > > intel_encoder *encoder,
> > > > >  }
> > > > >  
> > > > >  static inline enum intel_display_power_domain
> > > > > -intel_ddi_main_link_aux_domain(struct intel_dp *intel_dp)
> > > > > +intel_ddi_main_link_aux_domain(struct intel_digital_port
> > > > > *dig_port)
> > > > >  {
> > > > > -	struct intel_digital_port *dig_port =
> > > > > dp_to_dig_port(intel_dp);
> > > > > -
> > > > >  	/* CNL+ HW requires corresponding AUX IOs to be powered
> > > > > up for
> > > > > PSR with
> > > > >  	 * DC states enabled at the same time, while for driver
> > > > > initiated AUX
> > > > >  	 * transfers we need the same AUX IOs to be powered but
> > > > > with DC
> > > > > states
> > > > > @@ -2120,11 +2118,8 @@ static u64
> > > > > intel_ddi_get_power_domains(struct
> > > > > intel_encoder *encoder,
> > > > >  	domains = BIT_ULL(dig_port->ddi_io_power_domain);
> > > > >  
> > > > >  	/* AUX power is only needed for (e)DP mode, not for
> > > > > HDMI. */
> > > > > -	if (intel_crtc_has_dp_encoder(crtc_state)) {
> > > > > -		struct intel_dp *intel_dp = &dig_port->dp;
> > > > > -
> > > > > -		domains |=
> > > > > BIT_ULL(intel_ddi_main_link_aux_domain(intel_dp));
> > > > > -	}
> > > > > +	if (intel_crtc_has_dp_encoder(crtc_state))
> > > > > +		domains |=
> > > > > BIT_ULL(intel_ddi_main_link_aux_domain(dig_port));
> > > > >  
> > > > >  	return domains;
> > > > >  }
> > > > > @@ -2891,6 +2886,32 @@ static void
> > > > > intel_ddi_clk_disable(struct
> > > > > intel_encoder *encoder)
> > > > >  	}
> > > > >  }
> > > > >  
> > > > > +static void
> > > > > +intel_ddi_pre_pll_enable(struct intel_encoder *encoder,
> > > > > +			 const struct intel_crtc_state
> > > > > *crtc_state,
> > > > > +			 const struct drm_connector_state
> > > > > *conn_state)
> > > > > +{
> > > > > +	struct drm_i915_private *dev_priv = to_i915(encoder-
> > > > > >base.dev);
> > > > > +	struct intel_digital_port *dig_port =
> > > > > enc_to_dig_port(&encoder-
> > > > > > base);
> > > > > +
> > > > > +	if (intel_crtc_has_dp_encoder(crtc_state))
> > > > > +		intel_display_power_get(dev_priv,
> > > > > +					intel_ddi_main_link_aux
> > > > > _domain(
> > > > > dig_port));
> > > > > +}
> > > > > +
> > > > > +static void
> > > > > +intel_ddi_post_pll_disable(struct intel_encoder *encoder,
> > > > > +			   const struct intel_crtc_state
> > > > > *crtc_state,
> > > > > +			   const struct drm_connector_state
> > > > > *conn_state)
> > > > > +{
> > > > > +	struct drm_i915_private *dev_priv = to_i915(encoder-
> > > > > >base.dev);
> > > > > +	struct intel_digital_port *dig_port =
> > > > > enc_to_dig_port(&encoder-
> > > > > > base);
> > > > > +
> > > > > +	if (intel_crtc_has_dp_encoder(crtc_state))
> > > > > +		intel_display_power_put(dev_priv,
> > > > > +					intel_ddi_main_link_aux
> > > > > _domain(
> > > > > dig_port));
> > > > > +}
> > > > > +
> > > > >  static void intel_ddi_pre_enable_dp(struct intel_encoder
> > > > > *encoder,
> > > > >  				    const struct
> > > > > intel_crtc_state
> > > > > *crtc_state,
> > > > >  				    const struct
> > > > > drm_connector_state
> > > > > *conn_state)
> > > > > @@ -2904,9 +2925,6 @@ static void
> > > > > intel_ddi_pre_enable_dp(struct
> > > > > intel_encoder *encoder,
> > > > >  
> > > > >  	WARN_ON(is_mst && (port == PORT_A || port == PORT_E));
> > > > >  
> > > > > -	intel_display_power_get(dev_priv,
> > > > > -				intel_ddi_main_link_aux_domain(
> > > > > intel_dp
> > > > > ));
> > > > > -
> > > > >  	intel_dp_set_link_params(intel_dp, crtc_state-
> > > > > >port_clock,
> > > > >  				 crtc_state->lane_count,
> > > > > is_mst);
> > > > >  
> > > > > @@ -3071,9 +3089,6 @@ static void
> > > > > intel_ddi_post_disable_dp(struct
> > > > > intel_encoder *encoder,
> > > > >  	intel_display_power_put(dev_priv, dig_port-
> > > > > > ddi_io_power_domain);
> > > > >  
> > > > >  	intel_ddi_clk_disable(encoder);
> > > > > -
> > > > > -	intel_display_power_put(dev_priv,
> > > > > -				intel_ddi_main_link_aux_domain(
> > > > > intel_dp
> > > > > ));
> > > > >  }
> > > > >  
> > > > >  static void intel_ddi_post_disable_hdmi(struct intel_encoder
> > > > > *encoder,
> > > > > @@ -3830,6 +3845,9 @@ void intel_ddi_init(struct
> > > > > drm_i915_private
> > > > > *dev_priv, enum port port)
> > > > >  	intel_encoder->enable = intel_enable_ddi;
> > > > >  	if (IS_GEN9_LP(dev_priv))
> > > > >  		intel_encoder->pre_pll_enable =
> > > > > bxt_ddi_pre_pll_enable;
> > > > > +
> > > > > +	intel_encoder->pre_pll_enable =
> > > > > intel_ddi_pre_pll_enable;
> > > > > +	intel_encoder->post_pll_disable =
> > > > > intel_ddi_post_pll_disable;
> > > > >  	intel_encoder->pre_enable = intel_ddi_pre_enable;
> > > > >  	intel_encoder->disable = intel_disable_ddi;
> > > > >  	intel_encoder->post_disable = intel_ddi_post_disable;
> > > > > diff --git a/drivers/gpu/drm/i915/intel_display.c
> > > > > b/drivers/gpu/drm/i915/intel_display.c
> > > > > index 36710a30fb37..12ba2b923e6b 100644
> > > > > --- a/drivers/gpu/drm/i915/intel_display.c
> > > > > +++ b/drivers/gpu/drm/i915/intel_display.c
> > > > > @@ -5876,6 +5876,8 @@ static void haswell_crtc_disable(struct
> > > > > intel_crtc_state *old_crtc_state,
> > > > >  
> > > > >  	if (INTEL_GEN(dev_priv) >= 11)
> > > > >  		icl_unmap_plls_to_ports(crtc, old_crtc_state,
> > > > > old_state);
> > > > > +
> > > > > +	intel_encoders_post_pll_disable(crtc, old_crtc_state,
> > > > > old_state);
> > > > >  }
> > > > >  
> > > > >  static void i9xx_pfit_enable(const struct intel_crtc_state
> > > > > *crtc_state)
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Re: [PATCH 5/8] drm/i915: Enable AUX power earlier

[Imre Deak]

On Wed, Oct 31, 2018 at 01:52:58AM +0200, Souza, Jose wrote:
> On Wed, 2018-10-31 at 01:28 +0200, Imre Deak wrote:
> > On Wed, Oct 31, 2018 at 01:18:09AM +0200, Souza, Jose wrote:
> > > On Wed, 2018-10-31 at 01:12 +0200, Imre Deak wrote:
> > > > On Wed, Oct 31, 2018 at 01:07:04AM +0200, Souza, Jose wrote:
> > > > > On Tue, 2018-10-30 at 17:40 +0200, Imre Deak wrote:
> > > > > > For DDI/TypeC ports the AUX power domain needs to be enabled
> > > > > > before
> > > > > > the
> > > > > > port's PLL is enabled, so move the enabling earlier
> > > > > > accordingly.
> > > > > 
> > > > > Could you just pointed out where did you got this information?
> > > > > I
> > > > > checked in this Bspec pages 20845, 20598 and 21750 and I did
> > > > > not
> > > > > found.
> > > > 
> > > > It's at 21750, connect/disconnect flows.
> > > 
> > > What piece specifically?
> > > The only related that I can find is this one:
> > > "Aux power must be enabled while using Aux channel or the main link
> > > (including HDMI). It should be disabled to save power when not
> > > using
> > > Aux channel or main link."
> > 
> > We can do AUX transfers even before enabling the main link, where we
> > enable already AUX power. In fact all the connect flows have:
> > 
> > "Display software issues AUX reads for EDID/DPCD."
> > 
> > So now if we enabled it after PLL programming we'd have the two
> > things
> > happen in both orders, which I'd rather not do, if not necessary.
> 
> I still don't get your point.
> 
> The reads for EDID/DPCD is executed way before PLL programming, so it
> will still enable and disable power aux power wells.

Yes, so here PLL is not yet programmed and we enable AUX power. I want
to have only this sequence and avoid having also the opposite, where we
first program the PLL then enable AUX power.

> Also I did not found any aux transactions between the current places
> that gets and puts a aux power well reference.
> 
> haswell_crtc_enable()	
> 	intel_encoders_pre_pll_enable(crtc, pipe_config, old_state);
> 
> 	if (pipe_config->shared_dpll)
> 		intel_enable_shared_dpll(pipe_config);
> 
> 	if (INTEL_GEN(dev_priv) >= 11)
> 		icl_map_plls_to_ports(crtc, pipe_config, old_state);
> 
> 	intel_encoders_pre_enable(crtc, pipe_config, old_state);
> 
> 
> haswell_crtc_disable()
> 	intel_encoders_post_disable(crtc, old_crtc_state, old_state);
> 
> 	if (INTEL_GEN(dev_priv) >= 11)
> 		icl_unmap_plls_to_ports(crtc, old_crtc_state,
> old_state);
> 
> 	intel_encoders_post_pll_disable(crtc, old_crtc_state,
> old_state);
> 
> So if it is not sequence or requirement I don't see why we should
> enable earlier.

To have only one order of AUX enabling wrt. PLL programming.

> 
> > 
> > > > > With that:
> > > > > Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
> > > > > 
> > > > > > Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
> > > > > > Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > > > > > Signed-off-by: Imre Deak <imre.deak@intel.com>
> > > > > > ---
> > > > > >  drivers/gpu/drm/i915/intel_ddi.c     | 46
> > > > > > +++++++++++++++++++++++++-
> > > > > > ----------
> > > > > >  drivers/gpu/drm/i915/intel_display.c |  2 ++
> > > > > >  2 files changed, 34 insertions(+), 14 deletions(-)
> > > > > > 
> > > > > > diff --git a/drivers/gpu/drm/i915/intel_ddi.c
> > > > > > b/drivers/gpu/drm/i915/intel_ddi.c
> > > > > > index 5bb459011a49..7731ca704862 100644
> > > > > > --- a/drivers/gpu/drm/i915/intel_ddi.c
> > > > > > +++ b/drivers/gpu/drm/i915/intel_ddi.c
> > > > > > @@ -2082,10 +2082,8 @@ bool intel_ddi_get_hw_state(struct
> > > > > > intel_encoder *encoder,
> > > > > >  }
> > > > > >  
> > > > > >  static inline enum intel_display_power_domain
> > > > > > -intel_ddi_main_link_aux_domain(struct intel_dp *intel_dp)
> > > > > > +intel_ddi_main_link_aux_domain(struct intel_digital_port
> > > > > > *dig_port)
> > > > > >  {
> > > > > > -	struct intel_digital_port *dig_port =
> > > > > > dp_to_dig_port(intel_dp);
> > > > > > -
> > > > > >  	/* CNL+ HW requires corresponding AUX IOs to be powered
> > > > > > up for
> > > > > > PSR with
> > > > > >  	 * DC states enabled at the same time, while for driver
> > > > > > initiated AUX
> > > > > >  	 * transfers we need the same AUX IOs to be powered but
> > > > > > with DC
> > > > > > states
> > > > > > @@ -2120,11 +2118,8 @@ static u64
> > > > > > intel_ddi_get_power_domains(struct
> > > > > > intel_encoder *encoder,
> > > > > >  	domains = BIT_ULL(dig_port->ddi_io_power_domain);
> > > > > >  
> > > > > >  	/* AUX power is only needed for (e)DP mode, not for
> > > > > > HDMI. */
> > > > > > -	if (intel_crtc_has_dp_encoder(crtc_state)) {
> > > > > > -		struct intel_dp *intel_dp = &dig_port->dp;
> > > > > > -
> > > > > > -		domains |=
> > > > > > BIT_ULL(intel_ddi_main_link_aux_domain(intel_dp));
> > > > > > -	}
> > > > > > +	if (intel_crtc_has_dp_encoder(crtc_state))
> > > > > > +		domains |=
> > > > > > BIT_ULL(intel_ddi_main_link_aux_domain(dig_port));
> > > > > >  
> > > > > >  	return domains;
> > > > > >  }
> > > > > > @@ -2891,6 +2886,32 @@ static void
> > > > > > intel_ddi_clk_disable(struct
> > > > > > intel_encoder *encoder)
> > > > > >  	}
> > > > > >  }
> > > > > >  
> > > > > > +static void
> > > > > > +intel_ddi_pre_pll_enable(struct intel_encoder *encoder,
> > > > > > +			 const struct intel_crtc_state
> > > > > > *crtc_state,
> > > > > > +			 const struct drm_connector_state
> > > > > > *conn_state)
> > > > > > +{
> > > > > > +	struct drm_i915_private *dev_priv = to_i915(encoder-
> > > > > > >base.dev);
> > > > > > +	struct intel_digital_port *dig_port =
> > > > > > enc_to_dig_port(&encoder-
> > > > > > > base);
> > > > > > +
> > > > > > +	if (intel_crtc_has_dp_encoder(crtc_state))
> > > > > > +		intel_display_power_get(dev_priv,
> > > > > > +					intel_ddi_main_link_aux
> > > > > > _domain(
> > > > > > dig_port));
> > > > > > +}
> > > > > > +
> > > > > > +static void
> > > > > > +intel_ddi_post_pll_disable(struct intel_encoder *encoder,
> > > > > > +			   const struct intel_crtc_state
> > > > > > *crtc_state,
> > > > > > +			   const struct drm_connector_state
> > > > > > *conn_state)
> > > > > > +{
> > > > > > +	struct drm_i915_private *dev_priv = to_i915(encoder-
> > > > > > >base.dev);
> > > > > > +	struct intel_digital_port *dig_port =
> > > > > > enc_to_dig_port(&encoder-
> > > > > > > base);
> > > > > > +
> > > > > > +	if (intel_crtc_has_dp_encoder(crtc_state))
> > > > > > +		intel_display_power_put(dev_priv,
> > > > > > +					intel_ddi_main_link_aux
> > > > > > _domain(
> > > > > > dig_port));
> > > > > > +}
> > > > > > +
> > > > > >  static void intel_ddi_pre_enable_dp(struct intel_encoder
> > > > > > *encoder,
> > > > > >  				    const struct
> > > > > > intel_crtc_state
> > > > > > *crtc_state,
> > > > > >  				    const struct
> > > > > > drm_connector_state
> > > > > > *conn_state)
> > > > > > @@ -2904,9 +2925,6 @@ static void
> > > > > > intel_ddi_pre_enable_dp(struct
> > > > > > intel_encoder *encoder,
> > > > > >  
> > > > > >  	WARN_ON(is_mst && (port == PORT_A || port == PORT_E));
> > > > > >  
> > > > > > -	intel_display_power_get(dev_priv,
> > > > > > -				intel_ddi_main_link_aux_domain(
> > > > > > intel_dp
> > > > > > ));
> > > > > > -
> > > > > >  	intel_dp_set_link_params(intel_dp, crtc_state-
> > > > > > >port_clock,
> > > > > >  				 crtc_state->lane_count,
> > > > > > is_mst);
> > > > > >  
> > > > > > @@ -3071,9 +3089,6 @@ static void
> > > > > > intel_ddi_post_disable_dp(struct
> > > > > > intel_encoder *encoder,
> > > > > >  	intel_display_power_put(dev_priv, dig_port-
> > > > > > > ddi_io_power_domain);
> > > > > >  
> > > > > >  	intel_ddi_clk_disable(encoder);
> > > > > > -
> > > > > > -	intel_display_power_put(dev_priv,
> > > > > > -				intel_ddi_main_link_aux_domain(
> > > > > > intel_dp
> > > > > > ));
> > > > > >  }
> > > > > >  
> > > > > >  static void intel_ddi_post_disable_hdmi(struct intel_encoder
> > > > > > *encoder,
> > > > > > @@ -3830,6 +3845,9 @@ void intel_ddi_init(struct
> > > > > > drm_i915_private
> > > > > > *dev_priv, enum port port)
> > > > > >  	intel_encoder->enable = intel_enable_ddi;
> > > > > >  	if (IS_GEN9_LP(dev_priv))
> > > > > >  		intel_encoder->pre_pll_enable =
> > > > > > bxt_ddi_pre_pll_enable;
> > > > > > +
> > > > > > +	intel_encoder->pre_pll_enable =
> > > > > > intel_ddi_pre_pll_enable;
> > > > > > +	intel_encoder->post_pll_disable =
> > > > > > intel_ddi_post_pll_disable;
> > > > > >  	intel_encoder->pre_enable = intel_ddi_pre_enable;
> > > > > >  	intel_encoder->disable = intel_disable_ddi;
> > > > > >  	intel_encoder->post_disable = intel_ddi_post_disable;
> > > > > > diff --git a/drivers/gpu/drm/i915/intel_display.c
> > > > > > b/drivers/gpu/drm/i915/intel_display.c
> > > > > > index 36710a30fb37..12ba2b923e6b 100644
> > > > > > --- a/drivers/gpu/drm/i915/intel_display.c
> > > > > > +++ b/drivers/gpu/drm/i915/intel_display.c
> > > > > > @@ -5876,6 +5876,8 @@ static void haswell_crtc_disable(struct
> > > > > > intel_crtc_state *old_crtc_state,
> > > > > >  
> > > > > >  	if (INTEL_GEN(dev_priv) >= 11)
> > > > > >  		icl_unmap_plls_to_ports(crtc, old_crtc_state,
> > > > > > old_state);
> > > > > > +
> > > > > > +	intel_encoders_post_pll_disable(crtc, old_crtc_state,
> > > > > > old_state);
> > > > > >  }
> > > > > >  
> > > > > >  static void i9xx_pfit_enable(const struct intel_crtc_state
> > > > > > *crtc_state)
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Re: [PATCH 5/8] drm/i915: Enable AUX power earlier

[Souza, Jose]

On Wed, 2018-10-31 at 02:04 +0200, Imre Deak wrote:
> On Wed, Oct 31, 2018 at 01:52:58AM +0200, Souza, Jose wrote:
> > On Wed, 2018-10-31 at 01:28 +0200, Imre Deak wrote:
> > > On Wed, Oct 31, 2018 at 01:18:09AM +0200, Souza, Jose wrote:
> > > > On Wed, 2018-10-31 at 01:12 +0200, Imre Deak wrote:
> > > > > On Wed, Oct 31, 2018 at 01:07:04AM +0200, Souza, Jose wrote:
> > > > > > On Tue, 2018-10-30 at 17:40 +0200, Imre Deak wrote:
> > > > > > > For DDI/TypeC ports the AUX power domain needs to be
> > > > > > > enabled
> > > > > > > before
> > > > > > > the
> > > > > > > port's PLL is enabled, so move the enabling earlier
> > > > > > > accordingly.
> > > > > > 
> > > > > > Could you just pointed out where did you got this
> > > > > > information?
> > > > > > I
> > > > > > checked in this Bspec pages 20845, 20598 and 21750 and I
> > > > > > did
> > > > > > not
> > > > > > found.
> > > > > 
> > > > > It's at 21750, connect/disconnect flows.
> > > > 
> > > > What piece specifically?
> > > > The only related that I can find is this one:
> > > > "Aux power must be enabled while using Aux channel or the main
> > > > link
> > > > (including HDMI). It should be disabled to save power when not
> > > > using
> > > > Aux channel or main link."
> > > 
> > > We can do AUX transfers even before enabling the main link, where
> > > we
> > > enable already AUX power. In fact all the connect flows have:
> > > 
> > > "Display software issues AUX reads for EDID/DPCD."
> > > 
> > > So now if we enabled it after PLL programming we'd have the two
> > > things
> > > happen in both orders, which I'd rather not do, if not necessary.
> > 
> > I still don't get your point.
> > 
> > The reads for EDID/DPCD is executed way before PLL programming, so
> > it
> > will still enable and disable power aux power wells.
> 
> Yes, so here PLL is not yet programmed and we enable AUX power. I
> want
> to have only this sequence and avoid having also the opposite, where
> we
> first program the PLL then enable AUX power.

In what case aux power will be enabled when doing the PLL programming?

If this cases exits I agree in going forward with this change if the
commit message is updated, reading it looks like is a hardware
requirement.

> 
> > Also I did not found any aux transactions between the current
> > places
> > that gets and puts a aux power well reference.
> > 
> > haswell_crtc_enable()	
> > 	intel_encoders_pre_pll_enable(crtc, pipe_config, old_state);
> > 
> > 	if (pipe_config->shared_dpll)
> > 		intel_enable_shared_dpll(pipe_config);
> > 
> > 	if (INTEL_GEN(dev_priv) >= 11)
> > 		icl_map_plls_to_ports(crtc, pipe_config, old_state);
> > 
> > 	intel_encoders_pre_enable(crtc, pipe_config, old_state);
> > 
> > 
> > haswell_crtc_disable()
> > 	intel_encoders_post_disable(crtc, old_crtc_state, old_state);
> > 
> > 	if (INTEL_GEN(dev_priv) >= 11)
> > 		icl_unmap_plls_to_ports(crtc, old_crtc_state,
> > old_state);
> > 
> > 	intel_encoders_post_pll_disable(crtc, old_crtc_state,
> > old_state);
> > 
> > So if it is not sequence or requirement I don't see why we should
> > enable earlier.
> 
> To have only one order of AUX enabling wrt. PLL programming.
> 
> > > > > > With that:
> > > > > > Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
> > > > > > 
> > > > > > > Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
> > > > > > > Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > > > > > > Signed-off-by: Imre Deak <imre.deak@intel.com>
> > > > > > > ---
> > > > > > >  drivers/gpu/drm/i915/intel_ddi.c     | 46
> > > > > > > +++++++++++++++++++++++++-
> > > > > > > ----------
> > > > > > >  drivers/gpu/drm/i915/intel_display.c |  2 ++
> > > > > > >  2 files changed, 34 insertions(+), 14 deletions(-)
> > > > > > > 
> > > > > > > diff --git a/drivers/gpu/drm/i915/intel_ddi.c
> > > > > > > b/drivers/gpu/drm/i915/intel_ddi.c
> > > > > > > index 5bb459011a49..7731ca704862 100644
> > > > > > > --- a/drivers/gpu/drm/i915/intel_ddi.c
> > > > > > > +++ b/drivers/gpu/drm/i915/intel_ddi.c
> > > > > > > @@ -2082,10 +2082,8 @@ bool intel_ddi_get_hw_state(struct
> > > > > > > intel_encoder *encoder,
> > > > > > >  }
> > > > > > >  
> > > > > > >  static inline enum intel_display_power_domain
> > > > > > > -intel_ddi_main_link_aux_domain(struct intel_dp
> > > > > > > *intel_dp)
> > > > > > > +intel_ddi_main_link_aux_domain(struct intel_digital_port
> > > > > > > *dig_port)
> > > > > > >  {
> > > > > > > -	struct intel_digital_port *dig_port =
> > > > > > > dp_to_dig_port(intel_dp);
> > > > > > > -
> > > > > > >  	/* CNL+ HW requires corresponding AUX IOs to be powered
> > > > > > > up for
> > > > > > > PSR with
> > > > > > >  	 * DC states enabled at the same time, while for driver
> > > > > > > initiated AUX
> > > > > > >  	 * transfers we need the same AUX IOs to be powered but
> > > > > > > with DC
> > > > > > > states
> > > > > > > @@ -2120,11 +2118,8 @@ static u64
> > > > > > > intel_ddi_get_power_domains(struct
> > > > > > > intel_encoder *encoder,
> > > > > > >  	domains = BIT_ULL(dig_port->ddi_io_power_domain);
> > > > > > >  
> > > > > > >  	/* AUX power is only needed for (e)DP mode, not for
> > > > > > > HDMI. */
> > > > > > > -	if (intel_crtc_has_dp_encoder(crtc_state)) {
> > > > > > > -		struct intel_dp *intel_dp = &dig_port->dp;
> > > > > > > -
> > > > > > > -		domains |=
> > > > > > > BIT_ULL(intel_ddi_main_link_aux_domain(intel_dp));
> > > > > > > -	}
> > > > > > > +	if (intel_crtc_has_dp_encoder(crtc_state))
> > > > > > > +		domains |=
> > > > > > > BIT_ULL(intel_ddi_main_link_aux_domain(dig_port));
> > > > > > >  
> > > > > > >  	return domains;
> > > > > > >  }
> > > > > > > @@ -2891,6 +2886,32 @@ static void
> > > > > > > intel_ddi_clk_disable(struct
> > > > > > > intel_encoder *encoder)
> > > > > > >  	}
> > > > > > >  }
> > > > > > >  
> > > > > > > +static void
> > > > > > > +intel_ddi_pre_pll_enable(struct intel_encoder *encoder,
> > > > > > > +			 const struct intel_crtc_state
> > > > > > > *crtc_state,
> > > > > > > +			 const struct drm_connector_state
> > > > > > > *conn_state)
> > > > > > > +{
> > > > > > > +	struct drm_i915_private *dev_priv = to_i915(encoder-
> > > > > > > > base.dev);
> > > > > > > +	struct intel_digital_port *dig_port =
> > > > > > > enc_to_dig_port(&encoder-
> > > > > > > > base);
> > > > > > > +
> > > > > > > +	if (intel_crtc_has_dp_encoder(crtc_state))
> > > > > > > +		intel_display_power_get(dev_priv,
> > > > > > > +					intel_ddi_main_link_aux
> > > > > > > _domain(
> > > > > > > dig_port));
> > > > > > > +}
> > > > > > > +
> > > > > > > +static void
> > > > > > > +intel_ddi_post_pll_disable(struct intel_encoder
> > > > > > > *encoder,
> > > > > > > +			   const struct intel_crtc_state
> > > > > > > *crtc_state,
> > > > > > > +			   const struct drm_connector_state
> > > > > > > *conn_state)
> > > > > > > +{
> > > > > > > +	struct drm_i915_private *dev_priv = to_i915(encoder-
> > > > > > > > base.dev);
> > > > > > > +	struct intel_digital_port *dig_port =
> > > > > > > enc_to_dig_port(&encoder-
> > > > > > > > base);
> > > > > > > +
> > > > > > > +	if (intel_crtc_has_dp_encoder(crtc_state))
> > > > > > > +		intel_display_power_put(dev_priv,
> > > > > > > +					intel_ddi_main_link_aux
> > > > > > > _domain(
> > > > > > > dig_port));
> > > > > > > +}
> > > > > > > +
> > > > > > >  static void intel_ddi_pre_enable_dp(struct intel_encoder
> > > > > > > *encoder,
> > > > > > >  				    const struct
> > > > > > > intel_crtc_state
> > > > > > > *crtc_state,
> > > > > > >  				    const struct
> > > > > > > drm_connector_state
> > > > > > > *conn_state)
> > > > > > > @@ -2904,9 +2925,6 @@ static void
> > > > > > > intel_ddi_pre_enable_dp(struct
> > > > > > > intel_encoder *encoder,
> > > > > > >  
> > > > > > >  	WARN_ON(is_mst && (port == PORT_A || port == PORT_E));
> > > > > > >  
> > > > > > > -	intel_display_power_get(dev_priv,
> > > > > > > -				intel_ddi_main_link_aux_domain(
> > > > > > > intel_dp
> > > > > > > ));
> > > > > > > -
> > > > > > >  	intel_dp_set_link_params(intel_dp, crtc_state-
> > > > > > > > port_clock,
> > > > > > >  				 crtc_state->lane_count,
> > > > > > > is_mst);
> > > > > > >  
> > > > > > > @@ -3071,9 +3089,6 @@ static void
> > > > > > > intel_ddi_post_disable_dp(struct
> > > > > > > intel_encoder *encoder,
> > > > > > >  	intel_display_power_put(dev_priv, dig_port-
> > > > > > > > ddi_io_power_domain);
> > > > > > >  
> > > > > > >  	intel_ddi_clk_disable(encoder);
> > > > > > > -
> > > > > > > -	intel_display_power_put(dev_priv,
> > > > > > > -				intel_ddi_main_link_aux_domain(
> > > > > > > intel_dp
> > > > > > > ));
> > > > > > >  }
> > > > > > >  
> > > > > > >  static void intel_ddi_post_disable_hdmi(struct
> > > > > > > intel_encoder
> > > > > > > *encoder,
> > > > > > > @@ -3830,6 +3845,9 @@ void intel_ddi_init(struct
> > > > > > > drm_i915_private
> > > > > > > *dev_priv, enum port port)
> > > > > > >  	intel_encoder->enable = intel_enable_ddi;
> > > > > > >  	if (IS_GEN9_LP(dev_priv))
> > > > > > >  		intel_encoder->pre_pll_enable =
> > > > > > > bxt_ddi_pre_pll_enable;
> > > > > > > +
> > > > > > > +	intel_encoder->pre_pll_enable =
> > > > > > > intel_ddi_pre_pll_enable;
> > > > > > > +	intel_encoder->post_pll_disable =
> > > > > > > intel_ddi_post_pll_disable;
> > > > > > >  	intel_encoder->pre_enable = intel_ddi_pre_enable;
> > > > > > >  	intel_encoder->disable = intel_disable_ddi;
> > > > > > >  	intel_encoder->post_disable = intel_ddi_post_disable;
> > > > > > > diff --git a/drivers/gpu/drm/i915/intel_display.c
> > > > > > > b/drivers/gpu/drm/i915/intel_display.c
> > > > > > > index 36710a30fb37..12ba2b923e6b 100644
> > > > > > > --- a/drivers/gpu/drm/i915/intel_display.c
> > > > > > > +++ b/drivers/gpu/drm/i915/intel_display.c
> > > > > > > @@ -5876,6 +5876,8 @@ static void
> > > > > > > haswell_crtc_disable(struct
> > > > > > > intel_crtc_state *old_crtc_state,
> > > > > > >  
> > > > > > >  	if (INTEL_GEN(dev_priv) >= 11)
> > > > > > >  		icl_unmap_plls_to_ports(crtc, old_crtc_state,
> > > > > > > old_state);
> > > > > > > +
> > > > > > > +	intel_encoders_post_pll_disable(crtc, old_crtc_state,
> > > > > > > old_state);
> > > > > > >  }
> > > > > > >  
> > > > > > >  static void i9xx_pfit_enable(const struct
> > > > > > > intel_crtc_state
> > > > > > > *crtc_state)
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Re: [PATCH 5/8] drm/i915: Enable AUX power earlier

[Imre Deak]

On Wed, Oct 31, 2018 at 02:17:36AM +0200, Souza, Jose wrote:
> On Wed, 2018-10-31 at 02:04 +0200, Imre Deak wrote:
> > On Wed, Oct 31, 2018 at 01:52:58AM +0200, Souza, Jose wrote:
> > > On Wed, 2018-10-31 at 01:28 +0200, Imre Deak wrote:
> > > > On Wed, Oct 31, 2018 at 01:18:09AM +0200, Souza, Jose wrote:
> > > > > On Wed, 2018-10-31 at 01:12 +0200, Imre Deak wrote:
> > > > > > On Wed, Oct 31, 2018 at 01:07:04AM +0200, Souza, Jose wrote:
> > > > > > > On Tue, 2018-10-30 at 17:40 +0200, Imre Deak wrote:
> > > > > > > > For DDI/TypeC ports the AUX power domain needs to be
> > > > > > > > enabled
> > > > > > > > before
> > > > > > > > the
> > > > > > > > port's PLL is enabled, so move the enabling earlier
> > > > > > > > accordingly.
> > > > > > > 
> > > > > > > Could you just pointed out where did you got this
> > > > > > > information?
> > > > > > > I
> > > > > > > checked in this Bspec pages 20845, 20598 and 21750 and I
> > > > > > > did
> > > > > > > not
> > > > > > > found.
> > > > > > 
> > > > > > It's at 21750, connect/disconnect flows.
> > > > > 
> > > > > What piece specifically?
> > > > > The only related that I can find is this one:
> > > > > "Aux power must be enabled while using Aux channel or the main
> > > > > link
> > > > > (including HDMI). It should be disabled to save power when not
> > > > > using
> > > > > Aux channel or main link."
> > > > 
> > > > We can do AUX transfers even before enabling the main link, where
> > > > we
> > > > enable already AUX power. In fact all the connect flows have:
> > > > 
> > > > "Display software issues AUX reads for EDID/DPCD."
> > > > 
> > > > So now if we enabled it after PLL programming we'd have the two
> > > > things
> > > > happen in both orders, which I'd rather not do, if not necessary.
> > > 
> > > I still don't get your point.
> > > 
> > > The reads for EDID/DPCD is executed way before PLL programming, so
> > > it
> > > will still enable and disable power aux power wells.
> > 
> > Yes, so here PLL is not yet programmed and we enable AUX power. I
> > want
> > to have only this sequence and avoid having also the opposite, where
> > we
> > first program the PLL then enable AUX power.
> 
> In what case aux power will be enabled when doing the PLL programming?

That case doesn't have to exist for my point to be valid. But nothing
prevents us doing delayed AUX power disabling in the future.

> If this cases exits I agree in going forward with this change if the
> commit message is updated, reading it looks like is a hardware
> requirement.

In fact I found another point at 22243:

1. Enable Power Wells
a.    Based on the resources to be used, enable the appropriate power wells following the Sequences for Power Wel
b.  Type-C: Note that AUX power is required for running main link.

...

4. Enable Port PLL

> 
> > 
> > > Also I did not found any aux transactions between the current
> > > places
> > > that gets and puts a aux power well reference.
> > > 
> > > haswell_crtc_enable()	
> > > 	intel_encoders_pre_pll_enable(crtc, pipe_config, old_state);
> > > 
> > > 	if (pipe_config->shared_dpll)
> > > 		intel_enable_shared_dpll(pipe_config);
> > > 
> > > 	if (INTEL_GEN(dev_priv) >= 11)
> > > 		icl_map_plls_to_ports(crtc, pipe_config, old_state);
> > > 
> > > 	intel_encoders_pre_enable(crtc, pipe_config, old_state);
> > > 
> > > 
> > > haswell_crtc_disable()
> > > 	intel_encoders_post_disable(crtc, old_crtc_state, old_state);
> > > 
> > > 	if (INTEL_GEN(dev_priv) >= 11)
> > > 		icl_unmap_plls_to_ports(crtc, old_crtc_state,
> > > old_state);
> > > 
> > > 	intel_encoders_post_pll_disable(crtc, old_crtc_state,
> > > old_state);
> > > 
> > > So if it is not sequence or requirement I don't see why we should
> > > enable earlier.
> > 
> > To have only one order of AUX enabling wrt. PLL programming.
> > 
> > > > > > > With that:
> > > > > > > Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
> > > > > > > 
> > > > > > > > Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
> > > > > > > > Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > > > > > > > Signed-off-by: Imre Deak <imre.deak@intel.com>
> > > > > > > > ---
> > > > > > > >  drivers/gpu/drm/i915/intel_ddi.c     | 46
> > > > > > > > +++++++++++++++++++++++++-
> > > > > > > > ----------
> > > > > > > >  drivers/gpu/drm/i915/intel_display.c |  2 ++
> > > > > > > >  2 files changed, 34 insertions(+), 14 deletions(-)
> > > > > > > > 
> > > > > > > > diff --git a/drivers/gpu/drm/i915/intel_ddi.c
> > > > > > > > b/drivers/gpu/drm/i915/intel_ddi.c
> > > > > > > > index 5bb459011a49..7731ca704862 100644
> > > > > > > > --- a/drivers/gpu/drm/i915/intel_ddi.c
> > > > > > > > +++ b/drivers/gpu/drm/i915/intel_ddi.c
> > > > > > > > @@ -2082,10 +2082,8 @@ bool intel_ddi_get_hw_state(struct
> > > > > > > > intel_encoder *encoder,
> > > > > > > >  }
> > > > > > > >  
> > > > > > > >  static inline enum intel_display_power_domain
> > > > > > > > -intel_ddi_main_link_aux_domain(struct intel_dp
> > > > > > > > *intel_dp)
> > > > > > > > +intel_ddi_main_link_aux_domain(struct intel_digital_port
> > > > > > > > *dig_port)
> > > > > > > >  {
> > > > > > > > -	struct intel_digital_port *dig_port =
> > > > > > > > dp_to_dig_port(intel_dp);
> > > > > > > > -
> > > > > > > >  	/* CNL+ HW requires corresponding AUX IOs to be powered
> > > > > > > > up for
> > > > > > > > PSR with
> > > > > > > >  	 * DC states enabled at the same time, while for driver
> > > > > > > > initiated AUX
> > > > > > > >  	 * transfers we need the same AUX IOs to be powered but
> > > > > > > > with DC
> > > > > > > > states
> > > > > > > > @@ -2120,11 +2118,8 @@ static u64
> > > > > > > > intel_ddi_get_power_domains(struct
> > > > > > > > intel_encoder *encoder,
> > > > > > > >  	domains = BIT_ULL(dig_port->ddi_io_power_domain);
> > > > > > > >  
> > > > > > > >  	/* AUX power is only needed for (e)DP mode, not for
> > > > > > > > HDMI. */
> > > > > > > > -	if (intel_crtc_has_dp_encoder(crtc_state)) {
> > > > > > > > -		struct intel_dp *intel_dp = &dig_port->dp;
> > > > > > > > -
> > > > > > > > -		domains |=
> > > > > > > > BIT_ULL(intel_ddi_main_link_aux_domain(intel_dp));
> > > > > > > > -	}
> > > > > > > > +	if (intel_crtc_has_dp_encoder(crtc_state))
> > > > > > > > +		domains |=
> > > > > > > > BIT_ULL(intel_ddi_main_link_aux_domain(dig_port));
> > > > > > > >  
> > > > > > > >  	return domains;
> > > > > > > >  }
> > > > > > > > @@ -2891,6 +2886,32 @@ static void
> > > > > > > > intel_ddi_clk_disable(struct
> > > > > > > > intel_encoder *encoder)
> > > > > > > >  	}
> > > > > > > >  }
> > > > > > > >  
> > > > > > > > +static void
> > > > > > > > +intel_ddi_pre_pll_enable(struct intel_encoder *encoder,
> > > > > > > > +			 const struct intel_crtc_state
> > > > > > > > *crtc_state,
> > > > > > > > +			 const struct drm_connector_state
> > > > > > > > *conn_state)
> > > > > > > > +{
> > > > > > > > +	struct drm_i915_private *dev_priv = to_i915(encoder-
> > > > > > > > > base.dev);
> > > > > > > > +	struct intel_digital_port *dig_port =
> > > > > > > > enc_to_dig_port(&encoder-
> > > > > > > > > base);
> > > > > > > > +
> > > > > > > > +	if (intel_crtc_has_dp_encoder(crtc_state))
> > > > > > > > +		intel_display_power_get(dev_priv,
> > > > > > > > +					intel_ddi_main_link_aux
> > > > > > > > _domain(
> > > > > > > > dig_port));
> > > > > > > > +}
> > > > > > > > +
> > > > > > > > +static void
> > > > > > > > +intel_ddi_post_pll_disable(struct intel_encoder
> > > > > > > > *encoder,
> > > > > > > > +			   const struct intel_crtc_state
> > > > > > > > *crtc_state,
> > > > > > > > +			   const struct drm_connector_state
> > > > > > > > *conn_state)
> > > > > > > > +{
> > > > > > > > +	struct drm_i915_private *dev_priv = to_i915(encoder-
> > > > > > > > > base.dev);
> > > > > > > > +	struct intel_digital_port *dig_port =
> > > > > > > > enc_to_dig_port(&encoder-
> > > > > > > > > base);
> > > > > > > > +
> > > > > > > > +	if (intel_crtc_has_dp_encoder(crtc_state))
> > > > > > > > +		intel_display_power_put(dev_priv,
> > > > > > > > +					intel_ddi_main_link_aux
> > > > > > > > _domain(
> > > > > > > > dig_port));
> > > > > > > > +}
> > > > > > > > +
> > > > > > > >  static void intel_ddi_pre_enable_dp(struct intel_encoder
> > > > > > > > *encoder,
> > > > > > > >  				    const struct
> > > > > > > > intel_crtc_state
> > > > > > > > *crtc_state,
> > > > > > > >  				    const struct
> > > > > > > > drm_connector_state
> > > > > > > > *conn_state)
> > > > > > > > @@ -2904,9 +2925,6 @@ static void
> > > > > > > > intel_ddi_pre_enable_dp(struct
> > > > > > > > intel_encoder *encoder,
> > > > > > > >  
> > > > > > > >  	WARN_ON(is_mst && (port == PORT_A || port == PORT_E));
> > > > > > > >  
> > > > > > > > -	intel_display_power_get(dev_priv,
> > > > > > > > -				intel_ddi_main_link_aux_domain(
> > > > > > > > intel_dp
> > > > > > > > ));
> > > > > > > > -
> > > > > > > >  	intel_dp_set_link_params(intel_dp, crtc_state-
> > > > > > > > > port_clock,
> > > > > > > >  				 crtc_state->lane_count,
> > > > > > > > is_mst);
> > > > > > > >  
> > > > > > > > @@ -3071,9 +3089,6 @@ static void
> > > > > > > > intel_ddi_post_disable_dp(struct
> > > > > > > > intel_encoder *encoder,
> > > > > > > >  	intel_display_power_put(dev_priv, dig_port-
> > > > > > > > > ddi_io_power_domain);
> > > > > > > >  
> > > > > > > >  	intel_ddi_clk_disable(encoder);
> > > > > > > > -
> > > > > > > > -	intel_display_power_put(dev_priv,
> > > > > > > > -				intel_ddi_main_link_aux_domain(
> > > > > > > > intel_dp
> > > > > > > > ));
> > > > > > > >  }
> > > > > > > >  
> > > > > > > >  static void intel_ddi_post_disable_hdmi(struct
> > > > > > > > intel_encoder
> > > > > > > > *encoder,
> > > > > > > > @@ -3830,6 +3845,9 @@ void intel_ddi_init(struct
> > > > > > > > drm_i915_private
> > > > > > > > *dev_priv, enum port port)
> > > > > > > >  	intel_encoder->enable = intel_enable_ddi;
> > > > > > > >  	if (IS_GEN9_LP(dev_priv))
> > > > > > > >  		intel_encoder->pre_pll_enable =
> > > > > > > > bxt_ddi_pre_pll_enable;
> > > > > > > > +
> > > > > > > > +	intel_encoder->pre_pll_enable =
> > > > > > > > intel_ddi_pre_pll_enable;
> > > > > > > > +	intel_encoder->post_pll_disable =
> > > > > > > > intel_ddi_post_pll_disable;
> > > > > > > >  	intel_encoder->pre_enable = intel_ddi_pre_enable;
> > > > > > > >  	intel_encoder->disable = intel_disable_ddi;
> > > > > > > >  	intel_encoder->post_disable = intel_ddi_post_disable;
> > > > > > > > diff --git a/drivers/gpu/drm/i915/intel_display.c
> > > > > > > > b/drivers/gpu/drm/i915/intel_display.c
> > > > > > > > index 36710a30fb37..12ba2b923e6b 100644
> > > > > > > > --- a/drivers/gpu/drm/i915/intel_display.c
> > > > > > > > +++ b/drivers/gpu/drm/i915/intel_display.c
> > > > > > > > @@ -5876,6 +5876,8 @@ static void
> > > > > > > > haswell_crtc_disable(struct
> > > > > > > > intel_crtc_state *old_crtc_state,
> > > > > > > >  
> > > > > > > >  	if (INTEL_GEN(dev_priv) >= 11)
> > > > > > > >  		icl_unmap_plls_to_ports(crtc, old_crtc_state,
> > > > > > > > old_state);
> > > > > > > > +
> > > > > > > > +	intel_encoders_post_pll_disable(crtc, old_crtc_state,
> > > > > > > > old_state);
> > > > > > > >  }
> > > > > > > >  
> > > > > > > >  static void i9xx_pfit_enable(const struct
> > > > > > > > intel_crtc_state
> > > > > > > > *crtc_state)
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Re: [PATCH 5/8] drm/i915: Enable AUX power earlier

[Souza, Jose]

On Wed, 2018-10-31 at 02:33 +0200, Imre Deak wrote:
> On Wed, Oct 31, 2018 at 02:17:36AM +0200, Souza, Jose wrote:
> > On Wed, 2018-10-31 at 02:04 +0200, Imre Deak wrote:
> > > On Wed, Oct 31, 2018 at 01:52:58AM +0200, Souza, Jose wrote:
> > > > On Wed, 2018-10-31 at 01:28 +0200, Imre Deak wrote:
> > > > > On Wed, Oct 31, 2018 at 01:18:09AM +0200, Souza, Jose wrote:
> > > > > > On Wed, 2018-10-31 at 01:12 +0200, Imre Deak wrote:
> > > > > > > On Wed, Oct 31, 2018 at 01:07:04AM +0200, Souza, Jose
> > > > > > > wrote:
> > > > > > > > On Tue, 2018-10-30 at 17:40 +0200, Imre Deak wrote:
> > > > > > > > > For DDI/TypeC ports the AUX power domain needs to be
> > > > > > > > > enabled
> > > > > > > > > before
> > > > > > > > > the
> > > > > > > > > port's PLL is enabled, so move the enabling earlier
> > > > > > > > > accordingly.
> > > > > > > > 
> > > > > > > > Could you just pointed out where did you got this
> > > > > > > > information?
> > > > > > > > I
> > > > > > > > checked in this Bspec pages 20845, 20598 and 21750 and
> > > > > > > > I
> > > > > > > > did
> > > > > > > > not
> > > > > > > > found.
> > > > > > > 
> > > > > > > It's at 21750, connect/disconnect flows.
> > > > > > 
> > > > > > What piece specifically?
> > > > > > The only related that I can find is this one:
> > > > > > "Aux power must be enabled while using Aux channel or the
> > > > > > main
> > > > > > link
> > > > > > (including HDMI). It should be disabled to save power when
> > > > > > not
> > > > > > using
> > > > > > Aux channel or main link."
> > > > > 
> > > > > We can do AUX transfers even before enabling the main link,
> > > > > where
> > > > > we
> > > > > enable already AUX power. In fact all the connect flows have:
> > > > > 
> > > > > "Display software issues AUX reads for EDID/DPCD."
> > > > > 
> > > > > So now if we enabled it after PLL programming we'd have the
> > > > > two
> > > > > things
> > > > > happen in both orders, which I'd rather not do, if not
> > > > > necessary.
> > > > 
> > > > I still don't get your point.
> > > > 
> > > > The reads for EDID/DPCD is executed way before PLL programming,
> > > > so
> > > > it
> > > > will still enable and disable power aux power wells.
> > > 
> > > Yes, so here PLL is not yet programmed and we enable AUX power. I
> > > want
> > > to have only this sequence and avoid having also the opposite,
> > > where
> > > we
> > > first program the PLL then enable AUX power.
> > 
> > In what case aux power will be enabled when doing the PLL
> > programming?
> 
> That case doesn't have to exist for my point to be valid. But nothing
> prevents us doing delayed AUX power disabling in the future.
> 
> > If this cases exits I agree in going forward with this change if
> > the
> > commit message is updated, reading it looks like is a hardware
> > requirement.
> 
> In fact I found another point at 22243:
> 
> 1. Enable Power Wells
> a.    Based on the resources to be used, enable the appropriate power
> wells following the Sequences for Power Wel
> b.  Type-C: Note that AUX power is required for running main link.
> 
> ...
> 
> 4. Enable Port PLL

Nice, please just add some of it to the commit message.

Reviewed-by: José Roberto de Souza <jose.souza@intel.com>

> 
> > > > Also I did not found any aux transactions between the current
> > > > places
> > > > that gets and puts a aux power well reference.
> > > > 
> > > > haswell_crtc_enable()	
> > > > 	intel_encoders_pre_pll_enable(crtc, pipe_config,
> > > > old_state);
> > > > 
> > > > 	if (pipe_config->shared_dpll)
> > > > 		intel_enable_shared_dpll(pipe_config);
> > > > 
> > > > 	if (INTEL_GEN(dev_priv) >= 11)
> > > > 		icl_map_plls_to_ports(crtc, pipe_config,
> > > > old_state);
> > > > 
> > > > 	intel_encoders_pre_enable(crtc, pipe_config,
> > > > old_state);
> > > > 
> > > > 
> > > > haswell_crtc_disable()
> > > > 	intel_encoders_post_disable(crtc, old_crtc_state,
> > > > old_state);
> > > > 
> > > > 	if (INTEL_GEN(dev_priv) >= 11)
> > > > 		icl_unmap_plls_to_ports(crtc, old_crtc_state,
> > > > old_state);
> > > > 
> > > > 	intel_encoders_post_pll_disable(crtc, old_crtc_state,
> > > > old_state);
> > > > 
> > > > So if it is not sequence or requirement I don't see why we
> > > > should
> > > > enable earlier.
> > > 
> > > To have only one order of AUX enabling wrt. PLL programming.
> > > 
> > > > > > > > With that:
> > > > > > > > Reviewed-by: José Roberto de Souza <
> > > > > > > > jose.souza@intel.com>
> > > > > > > > 
> > > > > > > > > Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
> > > > > > > > > Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > > > > > > > > Signed-off-by: Imre Deak <imre.deak@intel.com>
> > > > > > > > > ---
> > > > > > > > >  drivers/gpu/drm/i915/intel_ddi.c     | 46
> > > > > > > > > +++++++++++++++++++++++++-
> > > > > > > > > ----------
> > > > > > > > >  drivers/gpu/drm/i915/intel_display.c |  2 ++
> > > > > > > > >  2 files changed, 34 insertions(+), 14 deletions(-)
> > > > > > > > > 
> > > > > > > > > diff --git a/drivers/gpu/drm/i915/intel_ddi.c
> > > > > > > > > b/drivers/gpu/drm/i915/intel_ddi.c
> > > > > > > > > index 5bb459011a49..7731ca704862 100644
> > > > > > > > > --- a/drivers/gpu/drm/i915/intel_ddi.c
> > > > > > > > > +++ b/drivers/gpu/drm/i915/intel_ddi.c
> > > > > > > > > @@ -2082,10 +2082,8 @@ bool
> > > > > > > > > intel_ddi_get_hw_state(struct
> > > > > > > > > intel_encoder *encoder,
> > > > > > > > >  }
> > > > > > > > >  
> > > > > > > > >  static inline enum intel_display_power_domain
> > > > > > > > > -intel_ddi_main_link_aux_domain(struct intel_dp
> > > > > > > > > *intel_dp)
> > > > > > > > > +intel_ddi_main_link_aux_domain(struct
> > > > > > > > > intel_digital_port
> > > > > > > > > *dig_port)
> > > > > > > > >  {
> > > > > > > > > -	struct intel_digital_port *dig_port =
> > > > > > > > > dp_to_dig_port(intel_dp);
> > > > > > > > > -
> > > > > > > > >  	/* CNL+ HW requires corresponding AUX IOs to be
> > > > > > > > > powered
> > > > > > > > > up for
> > > > > > > > > PSR with
> > > > > > > > >  	 * DC states enabled at the same time, while
> > > > > > > > > for driver
> > > > > > > > > initiated AUX
> > > > > > > > >  	 * transfers we need the same AUX IOs to be
> > > > > > > > > powered but
> > > > > > > > > with DC
> > > > > > > > > states
> > > > > > > > > @@ -2120,11 +2118,8 @@ static u64
> > > > > > > > > intel_ddi_get_power_domains(struct
> > > > > > > > > intel_encoder *encoder,
> > > > > > > > >  	domains = BIT_ULL(dig_port-
> > > > > > > > > >ddi_io_power_domain);
> > > > > > > > >  
> > > > > > > > >  	/* AUX power is only needed for (e)DP mode, not
> > > > > > > > > for
> > > > > > > > > HDMI. */
> > > > > > > > > -	if (intel_crtc_has_dp_encoder(crtc_state)) {
> > > > > > > > > -		struct intel_dp *intel_dp = &dig_port-
> > > > > > > > > >dp;
> > > > > > > > > -
> > > > > > > > > -		domains |=
> > > > > > > > > BIT_ULL(intel_ddi_main_link_aux_domain(intel_dp));
> > > > > > > > > -	}
> > > > > > > > > +	if (intel_crtc_has_dp_encoder(crtc_state))
> > > > > > > > > +		domains |=
> > > > > > > > > BIT_ULL(intel_ddi_main_link_aux_domain(dig_port));
> > > > > > > > >  
> > > > > > > > >  	return domains;
> > > > > > > > >  }
> > > > > > > > > @@ -2891,6 +2886,32 @@ static void
> > > > > > > > > intel_ddi_clk_disable(struct
> > > > > > > > > intel_encoder *encoder)
> > > > > > > > >  	}
> > > > > > > > >  }
> > > > > > > > >  
> > > > > > > > > +static void
> > > > > > > > > +intel_ddi_pre_pll_enable(struct intel_encoder
> > > > > > > > > *encoder,
> > > > > > > > > +			 const struct intel_crtc_state
> > > > > > > > > *crtc_state,
> > > > > > > > > +			 const struct
> > > > > > > > > drm_connector_state
> > > > > > > > > *conn_state)
> > > > > > > > > +{
> > > > > > > > > +	struct drm_i915_private *dev_priv =
> > > > > > > > > to_i915(encoder-
> > > > > > > > > > base.dev);
> > > > > > > > > +	struct intel_digital_port *dig_port =
> > > > > > > > > enc_to_dig_port(&encoder-
> > > > > > > > > > base);
> > > > > > > > > +
> > > > > > > > > +	if (intel_crtc_has_dp_encoder(crtc_state))
> > > > > > > > > +		intel_display_power_get(dev_priv,
> > > > > > > > > +					intel_ddi_main_
> > > > > > > > > link_aux
> > > > > > > > > _domain(
> > > > > > > > > dig_port));
> > > > > > > > > +}
> > > > > > > > > +
> > > > > > > > > +static void
> > > > > > > > > +intel_ddi_post_pll_disable(struct intel_encoder
> > > > > > > > > *encoder,
> > > > > > > > > +			   const struct
> > > > > > > > > intel_crtc_state
> > > > > > > > > *crtc_state,
> > > > > > > > > +			   const struct
> > > > > > > > > drm_connector_state
> > > > > > > > > *conn_state)
> > > > > > > > > +{
> > > > > > > > > +	struct drm_i915_private *dev_priv =
> > > > > > > > > to_i915(encoder-
> > > > > > > > > > base.dev);
> > > > > > > > > +	struct intel_digital_port *dig_port =
> > > > > > > > > enc_to_dig_port(&encoder-
> > > > > > > > > > base);
> > > > > > > > > +
> > > > > > > > > +	if (intel_crtc_has_dp_encoder(crtc_state))
> > > > > > > > > +		intel_display_power_put(dev_priv,
> > > > > > > > > +					intel_ddi_main_
> > > > > > > > > link_aux
> > > > > > > > > _domain(
> > > > > > > > > dig_port));
> > > > > > > > > +}
> > > > > > > > > +
> > > > > > > > >  static void intel_ddi_pre_enable_dp(struct
> > > > > > > > > intel_encoder
> > > > > > > > > *encoder,
> > > > > > > > >  				    const struct
> > > > > > > > > intel_crtc_state
> > > > > > > > > *crtc_state,
> > > > > > > > >  				    const struct
> > > > > > > > > drm_connector_state
> > > > > > > > > *conn_state)
> > > > > > > > > @@ -2904,9 +2925,6 @@ static void
> > > > > > > > > intel_ddi_pre_enable_dp(struct
> > > > > > > > > intel_encoder *encoder,
> > > > > > > > >  
> > > > > > > > >  	WARN_ON(is_mst && (port == PORT_A || port ==
> > > > > > > > > PORT_E));
> > > > > > > > >  
> > > > > > > > > -	intel_display_power_get(dev_priv,
> > > > > > > > > -				intel_ddi_main_link_aux
> > > > > > > > > _domain(
> > > > > > > > > intel_dp
> > > > > > > > > ));
> > > > > > > > > -
> > > > > > > > >  	intel_dp_set_link_params(intel_dp, crtc_state-
> > > > > > > > > > port_clock,
> > > > > > > > >  				 crtc_state-
> > > > > > > > > >lane_count,
> > > > > > > > > is_mst);
> > > > > > > > >  
> > > > > > > > > @@ -3071,9 +3089,6 @@ static void
> > > > > > > > > intel_ddi_post_disable_dp(struct
> > > > > > > > > intel_encoder *encoder,
> > > > > > > > >  	intel_display_power_put(dev_priv, dig_port-
> > > > > > > > > > ddi_io_power_domain);
> > > > > > > > >  
> > > > > > > > >  	intel_ddi_clk_disable(encoder);
> > > > > > > > > -
> > > > > > > > > -	intel_display_power_put(dev_priv,
> > > > > > > > > -				intel_ddi_main_link_aux
> > > > > > > > > _domain(
> > > > > > > > > intel_dp
> > > > > > > > > ));
> > > > > > > > >  }
> > > > > > > > >  
> > > > > > > > >  static void intel_ddi_post_disable_hdmi(struct
> > > > > > > > > intel_encoder
> > > > > > > > > *encoder,
> > > > > > > > > @@ -3830,6 +3845,9 @@ void intel_ddi_init(struct
> > > > > > > > > drm_i915_private
> > > > > > > > > *dev_priv, enum port port)
> > > > > > > > >  	intel_encoder->enable = intel_enable_ddi;
> > > > > > > > >  	if (IS_GEN9_LP(dev_priv))
> > > > > > > > >  		intel_encoder->pre_pll_enable =
> > > > > > > > > bxt_ddi_pre_pll_enable;
> > > > > > > > > +
> > > > > > > > > +	intel_encoder->pre_pll_enable =
> > > > > > > > > intel_ddi_pre_pll_enable;
> > > > > > > > > +	intel_encoder->post_pll_disable =
> > > > > > > > > intel_ddi_post_pll_disable;
> > > > > > > > >  	intel_encoder->pre_enable =
> > > > > > > > > intel_ddi_pre_enable;
> > > > > > > > >  	intel_encoder->disable = intel_disable_ddi;
> > > > > > > > >  	intel_encoder->post_disable =
> > > > > > > > > intel_ddi_post_disable;
> > > > > > > > > diff --git a/drivers/gpu/drm/i915/intel_display.c
> > > > > > > > > b/drivers/gpu/drm/i915/intel_display.c
> > > > > > > > > index 36710a30fb37..12ba2b923e6b 100644
> > > > > > > > > --- a/drivers/gpu/drm/i915/intel_display.c
> > > > > > > > > +++ b/drivers/gpu/drm/i915/intel_display.c
> > > > > > > > > @@ -5876,6 +5876,8 @@ static void
> > > > > > > > > haswell_crtc_disable(struct
> > > > > > > > > intel_crtc_state *old_crtc_state,
> > > > > > > > >  
> > > > > > > > >  	if (INTEL_GEN(dev_priv) >= 11)
> > > > > > > > >  		icl_unmap_plls_to_ports(crtc,
> > > > > > > > > old_crtc_state,
> > > > > > > > > old_state);
> > > > > > > > > +
> > > > > > > > > +	intel_encoders_post_pll_disable(crtc,
> > > > > > > > > old_crtc_state,
> > > > > > > > > old_state);
> > > > > > > > >  }
> > > > > > > > >  
> > > > > > > > >  static void i9xx_pfit_enable(const struct
> > > > > > > > > intel_crtc_state
> > > > > > > > > *crtc_state)
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[PATCH 6/8] drm/i915: Enable AUX power for HDMI DDI/TypeC main link too

[Imre Deak]

DDI/TypeC ports need the AUX power domain for main link functionality
even when they operate in HDMI static mode, so enable the power domain
for these ports too.

Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
---
 drivers/gpu/drm/i915/intel_ddi.c | 15 +++++++++++----
 1 file changed, 11 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c
index 7731ca704862..bf58816ed59c 100644
--- a/drivers/gpu/drm/i915/intel_ddi.c
+++ b/drivers/gpu/drm/i915/intel_ddi.c
@@ -2103,6 +2103,7 @@ intel_ddi_main_link_aux_domain(struct intel_digital_port *dig_port)
 static u64 intel_ddi_get_power_domains(struct intel_encoder *encoder,
 				       struct intel_crtc_state *crtc_state)
 {
+	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
 	struct intel_digital_port *dig_port;
 	u64 domains;
 
@@ -2117,8 +2118,12 @@ static u64 intel_ddi_get_power_domains(struct intel_encoder *encoder,
 	dig_port = enc_to_dig_port(&encoder->base);
 	domains = BIT_ULL(dig_port->ddi_io_power_domain);
 
-	/* AUX power is only needed for (e)DP mode, not for HDMI. */
-	if (intel_crtc_has_dp_encoder(crtc_state))
+	/*
+	 * AUX power is only needed for (e)DP mode, and for HDMI mode on TC
+	 * ports.
+	 */
+	if (intel_crtc_has_dp_encoder(crtc_state) ||
+	    intel_port_is_tc(dev_priv, encoder->port))
 		domains |= BIT_ULL(intel_ddi_main_link_aux_domain(dig_port));
 
 	return domains;
@@ -2894,7 +2899,8 @@ intel_ddi_pre_pll_enable(struct intel_encoder *encoder,
 	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
 	struct intel_digital_port *dig_port = enc_to_dig_port(&encoder->base);
 
-	if (intel_crtc_has_dp_encoder(crtc_state))
+	if (intel_crtc_has_dp_encoder(crtc_state) ||
+	    intel_port_is_tc(dev_priv, encoder->port))
 		intel_display_power_get(dev_priv,
 					intel_ddi_main_link_aux_domain(dig_port));
 }
@@ -2907,7 +2913,8 @@ intel_ddi_post_pll_disable(struct intel_encoder *encoder,
 	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
 	struct intel_digital_port *dig_port = enc_to_dig_port(&encoder->base);
 
-	if (intel_crtc_has_dp_encoder(crtc_state))
+	if (intel_crtc_has_dp_encoder(crtc_state) ||
+	    intel_port_is_tc(dev_priv, encoder->port))
 		intel_display_power_put(dev_priv,
 					intel_ddi_main_link_aux_domain(dig_port));
 }
-- 
2.13.2

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Re: [PATCH 6/8] drm/i915: Enable AUX power for HDMI DDI/TypeC main link too

[Souza, Jose]

On Tue, 2018-10-30 at 17:40 +0200, Imre Deak wrote:
> DDI/TypeC ports need the AUX power domain for main link functionality
> even when they operate in HDMI static mode, so enable the power
> domain
> for these ports too.
> 

Reviewed-by: José Roberto de Souza <jose.souza@intel.com>

> Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Signed-off-by: Imre Deak <imre.deak@intel.com>
> ---
>  drivers/gpu/drm/i915/intel_ddi.c | 15 +++++++++++----
>  1 file changed, 11 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_ddi.c
> b/drivers/gpu/drm/i915/intel_ddi.c
> index 7731ca704862..bf58816ed59c 100644
> --- a/drivers/gpu/drm/i915/intel_ddi.c
> +++ b/drivers/gpu/drm/i915/intel_ddi.c
> @@ -2103,6 +2103,7 @@ intel_ddi_main_link_aux_domain(struct
> intel_digital_port *dig_port)
>  static u64 intel_ddi_get_power_domains(struct intel_encoder
> *encoder,
>  				       struct intel_crtc_state
> *crtc_state)
>  {
> +	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
>  	struct intel_digital_port *dig_port;
>  	u64 domains;
>  
> @@ -2117,8 +2118,12 @@ static u64 intel_ddi_get_power_domains(struct
> intel_encoder *encoder,
>  	dig_port = enc_to_dig_port(&encoder->base);
>  	domains = BIT_ULL(dig_port->ddi_io_power_domain);
>  
> -	/* AUX power is only needed for (e)DP mode, not for HDMI. */
> -	if (intel_crtc_has_dp_encoder(crtc_state))
> +	/*
> +	 * AUX power is only needed for (e)DP mode, and for HDMI mode
> on TC
> +	 * ports.
> +	 */
> +	if (intel_crtc_has_dp_encoder(crtc_state) ||
> +	    intel_port_is_tc(dev_priv, encoder->port))
>  		domains |=
> BIT_ULL(intel_ddi_main_link_aux_domain(dig_port));
>  
>  	return domains;
> @@ -2894,7 +2899,8 @@ intel_ddi_pre_pll_enable(struct intel_encoder
> *encoder,
>  	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
>  	struct intel_digital_port *dig_port = enc_to_dig_port(&encoder-
> >base);
>  
> -	if (intel_crtc_has_dp_encoder(crtc_state))
> +	if (intel_crtc_has_dp_encoder(crtc_state) ||
> +	    intel_port_is_tc(dev_priv, encoder->port))
>  		intel_display_power_get(dev_priv,
>  					intel_ddi_main_link_aux_domain(
> dig_port));
>  }
> @@ -2907,7 +2913,8 @@ intel_ddi_post_pll_disable(struct intel_encoder
> *encoder,
>  	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
>  	struct intel_digital_port *dig_port = enc_to_dig_port(&encoder-
> >base);
>  
> -	if (intel_crtc_has_dp_encoder(crtc_state))
> +	if (intel_crtc_has_dp_encoder(crtc_state) ||
> +	    intel_port_is_tc(dev_priv, encoder->port))
>  		intel_display_power_put(dev_priv,
>  					intel_ddi_main_link_aux_domain(
> dig_port));
>  }
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[PATCH 7/8] drm/i915: Configure AUX_CH_CTL when enabling the AUX power domain

[Imre Deak]

Most of the AUX_CH_CTL flags are concerned with DP AUX transfer
parameters. As opposed to this the flag specifying the thunderbolt vs.
non-thunderbolt mode of the port is not related to AUX transfers at all
(rather it's repurposed to enable either TBT or non-TBT PHY HW blocks).
The programming has to be done before enabling the corresponding AUX
power well, so make it part of the power well code.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=108548
Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
---
 drivers/gpu/drm/i915/i915_drv.h         |  1 +
 drivers/gpu/drm/i915/intel_runtime_pm.c | 69 +++++++++++++++++++++++++++++----
 2 files changed, 62 insertions(+), 8 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index c57b701f72a7..dbf894835cb2 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -921,6 +921,7 @@ struct i915_power_well_desc {
 			/* The pw is backing the VGA functionality */
 			bool has_vga:1;
 			bool has_fuses:1;
+			bool is_tc_tbt;
 		} hsw;
 	};
 	const struct i915_power_well_ops *ops;
diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c b/drivers/gpu/drm/i915/intel_runtime_pm.c
index 5f5416eb9644..eed17440a4a7 100644
--- a/drivers/gpu/drm/i915/intel_runtime_pm.c
+++ b/drivers/gpu/drm/i915/intel_runtime_pm.c
@@ -465,6 +465,44 @@ icl_combo_phy_aux_power_well_disable(struct drm_i915_private *dev_priv,
 	hsw_wait_for_power_well_disable(dev_priv, power_well);
 }
 
+#define ICL_AUX_PW_TO_CH(pw_idx)	\
+	((pw_idx) - ICL_PW_CTL_IDX_AUX_A + AUX_CH_A)
+
+static void
+icl_tc_phy_aux_power_well_enable(struct drm_i915_private *dev_priv,
+				 struct i915_power_well *power_well)
+{
+	const struct i915_power_well_regs *regs = power_well->desc->hsw.regs;
+	int pw_idx = power_well->desc->hsw.idx;
+	enum aux_ch aux_ch = ICL_AUX_PW_TO_CH(pw_idx);
+	u32 val;
+
+	val = I915_READ(DP_AUX_CH_CTL(aux_ch));
+	val &= ~DP_AUX_CH_CTL_TBT_IO;
+	if (power_well->desc->hsw.is_tc_tbt)
+		val |= DP_AUX_CH_CTL_TBT_IO;
+	I915_WRITE(DP_AUX_CH_CTL(aux_ch), val);
+
+	val = I915_READ(regs->driver);
+	I915_WRITE(regs->driver, val | HSW_PWR_WELL_CTL_REQ(pw_idx));
+
+	hsw_wait_for_power_well_enable(dev_priv, power_well);
+}
+
+static void
+icl_tc_phy_aux_power_well_disable(struct drm_i915_private *dev_priv,
+				  struct i915_power_well *power_well)
+{
+	const struct i915_power_well_regs *regs = power_well->desc->hsw.regs;
+	int pw_idx = power_well->desc->hsw.idx;
+	u32 val;
+
+	val = I915_READ(regs->driver);
+	I915_WRITE(regs->driver, val & ~HSW_PWR_WELL_CTL_REQ(pw_idx));
+
+	hsw_wait_for_power_well_disable(dev_priv, power_well);
+}
+
 /*
  * We should only use the power well if we explicitly asked the hardware to
  * enable it, so check if it's enabled and also check if we've requested it to
@@ -2725,6 +2763,13 @@ static const struct i915_power_well_ops icl_combo_phy_aux_power_well_ops = {
 	.is_enabled = hsw_power_well_enabled,
 };
 
+static const struct i915_power_well_ops icl_tc_phy_aux_power_well_ops = {
+	.sync_hw = hsw_power_well_sync_hw,
+	.enable = icl_tc_phy_aux_power_well_enable,
+	.disable = icl_tc_phy_aux_power_well_disable,
+	.is_enabled = hsw_power_well_enabled,
+};
+
 static const struct i915_power_well_regs icl_aux_power_well_regs = {
 	.bios	= ICL_PWR_WELL_CTL_AUX1,
 	.driver	= ICL_PWR_WELL_CTL_AUX2,
@@ -2870,81 +2915,89 @@ static const struct i915_power_well_desc icl_power_wells[] = {
 	{
 		.name = "AUX C",
 		.domains = ICL_AUX_C_IO_POWER_DOMAINS,
-		.ops = &hsw_power_well_ops,
+		.ops = &icl_tc_phy_aux_power_well_ops,
 		.id = DISP_PW_ID_NONE,
 		{
 			.hsw.regs = &icl_aux_power_well_regs,
 			.hsw.idx = ICL_PW_CTL_IDX_AUX_C,
+			.hsw.is_tc_tbt = false,
 		},
 	},
 	{
 		.name = "AUX D",
 		.domains = ICL_AUX_D_IO_POWER_DOMAINS,
-		.ops = &hsw_power_well_ops,
+		.ops = &icl_tc_phy_aux_power_well_ops,
 		.id = DISP_PW_ID_NONE,
 		{
 			.hsw.regs = &icl_aux_power_well_regs,
 			.hsw.idx = ICL_PW_CTL_IDX_AUX_D,
+			.hsw.is_tc_tbt = false,
 		},
 	},
 	{
 		.name = "AUX E",
 		.domains = ICL_AUX_E_IO_POWER_DOMAINS,
-		.ops = &hsw_power_well_ops,
+		.ops = &icl_tc_phy_aux_power_well_ops,
 		.id = DISP_PW_ID_NONE,
 		{
 			.hsw.regs = &icl_aux_power_well_regs,
 			.hsw.idx = ICL_PW_CTL_IDX_AUX_E,
+			.hsw.is_tc_tbt = false,
 		},
 	},
 	{
 		.name = "AUX F",
 		.domains = ICL_AUX_F_IO_POWER_DOMAINS,
-		.ops = &hsw_power_well_ops,
+		.ops = &icl_tc_phy_aux_power_well_ops,
 		.id = DISP_PW_ID_NONE,
 		{
 			.hsw.regs = &icl_aux_power_well_regs,
 			.hsw.idx = ICL_PW_CTL_IDX_AUX_F,
+			.hsw.is_tc_tbt = false,
 		},
 	},
 	{
 		.name = "AUX TBT1",
 		.domains = ICL_AUX_TBT1_IO_POWER_DOMAINS,
-		.ops = &hsw_power_well_ops,
+		.ops = &icl_tc_phy_aux_power_well_ops,
 		.id = DISP_PW_ID_NONE,
 		{
 			.hsw.regs = &icl_aux_power_well_regs,
 			.hsw.idx = ICL_PW_CTL_IDX_AUX_TBT1,
+			.hsw.is_tc_tbt = true,
 		},
 	},
 	{
 		.name = "AUX TBT2",
 		.domains = ICL_AUX_TBT2_IO_POWER_DOMAINS,
-		.ops = &hsw_power_well_ops,
+		.ops = &icl_tc_phy_aux_power_well_ops,
 		.id = DISP_PW_ID_NONE,
 		{
 			.hsw.regs = &icl_aux_power_well_regs,
 			.hsw.idx = ICL_PW_CTL_IDX_AUX_TBT2,
+			.hsw.is_tc_tbt = true,
 		},
 	},
 	{
 		.name = "AUX TBT3",
 		.domains = ICL_AUX_TBT3_IO_POWER_DOMAINS,
-		.ops = &hsw_power_well_ops,
+		.ops = &icl_tc_phy_aux_power_well_ops,
 		.id = DISP_PW_ID_NONE,
 		{
 			.hsw.regs = &icl_aux_power_well_regs,
 			.hsw.idx = ICL_PW_CTL_IDX_AUX_TBT3,
+			.hsw.is_tc_tbt = true,
 		},
 	},
 	{
 		.name = "AUX TBT4",
 		.domains = ICL_AUX_TBT4_IO_POWER_DOMAINS,
-		.ops = &hsw_power_well_ops,
+		.ops = &icl_tc_phy_aux_power_well_ops,
 		.id = DISP_PW_ID_NONE,
 		{
 			.hsw.regs = &icl_aux_power_well_regs,
 			.hsw.idx = ICL_PW_CTL_IDX_AUX_TBT4,
+			.hsw.is_tc_tbt = true,
 		},
 	},
 	{
-- 
2.13.2

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Re: [PATCH 7/8] drm/i915: Configure AUX_CH_CTL when enabling the AUX power domain

[Lucas De Marchi]

On Tue, Oct 30, 2018 at 05:40:50PM +0200, Imre Deak wrote:
> Most of the AUX_CH_CTL flags are concerned with DP AUX transfer
> parameters. As opposed to this the flag specifying the thunderbolt vs.
> non-thunderbolt mode of the port is not related to AUX transfers at all
> (rather it's repurposed to enable either TBT or non-TBT PHY HW blocks).
> The programming has to be done before enabling the corresponding AUX
> power well, so make it part of the power well code.
> 
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=108548
> Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Signed-off-by: Imre Deak <imre.deak@intel.com>
> ---
>  drivers/gpu/drm/i915/i915_drv.h         |  1 +
>  drivers/gpu/drm/i915/intel_runtime_pm.c | 69 +++++++++++++++++++++++++++++----
>  2 files changed, 62 insertions(+), 8 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index c57b701f72a7..dbf894835cb2 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -921,6 +921,7 @@ struct i915_power_well_desc {
>  			/* The pw is backing the VGA functionality */
>  			bool has_vga:1;
>  			bool has_fuses:1;
> +			bool is_tc_tbt;

what's up with the bitfield just above? Eitehr make this a bitfield or turn the others into
!bitfield ?

We also may want to do:

struct {
        struct _hsw;
        bool is_tc_tbt;
} icl;

to clarify this is icl+...

ugh, but that needs a "subdir-ccflags-y += -fms-extensions" :(.


Lucas De Marchi

>  		} hsw;
>  	};
>  	const struct i915_power_well_ops *ops;
> diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c b/drivers/gpu/drm/i915/intel_runtime_pm.c
> index 5f5416eb9644..eed17440a4a7 100644
> --- a/drivers/gpu/drm/i915/intel_runtime_pm.c
> +++ b/drivers/gpu/drm/i915/intel_runtime_pm.c
> @@ -465,6 +465,44 @@ icl_combo_phy_aux_power_well_disable(struct drm_i915_private *dev_priv,
>  	hsw_wait_for_power_well_disable(dev_priv, power_well);
>  }
>  
> +#define ICL_AUX_PW_TO_CH(pw_idx)	\
> +	((pw_idx) - ICL_PW_CTL_IDX_AUX_A + AUX_CH_A)
> +
> +static void
> +icl_tc_phy_aux_power_well_enable(struct drm_i915_private *dev_priv,
> +				 struct i915_power_well *power_well)
> +{
> +	const struct i915_power_well_regs *regs = power_well->desc->hsw.regs;
> +	int pw_idx = power_well->desc->hsw.idx;
> +	enum aux_ch aux_ch = ICL_AUX_PW_TO_CH(pw_idx);
> +	u32 val;
> +
> +	val = I915_READ(DP_AUX_CH_CTL(aux_ch));
> +	val &= ~DP_AUX_CH_CTL_TBT_IO;
> +	if (power_well->desc->hsw.is_tc_tbt)
> +		val |= DP_AUX_CH_CTL_TBT_IO;
> +	I915_WRITE(DP_AUX_CH_CTL(aux_ch), val);
> +
> +	val = I915_READ(regs->driver);
> +	I915_WRITE(regs->driver, val | HSW_PWR_WELL_CTL_REQ(pw_idx));
> +
> +	hsw_wait_for_power_well_enable(dev_priv, power_well);
> +}
> +
> +static void
> +icl_tc_phy_aux_power_well_disable(struct drm_i915_private *dev_priv,
> +				  struct i915_power_well *power_well)
> +{
> +	const struct i915_power_well_regs *regs = power_well->desc->hsw.regs;
> +	int pw_idx = power_well->desc->hsw.idx;
> +	u32 val;
> +
> +	val = I915_READ(regs->driver);
> +	I915_WRITE(regs->driver, val & ~HSW_PWR_WELL_CTL_REQ(pw_idx));
> +
> +	hsw_wait_for_power_well_disable(dev_priv, power_well);
> +}
> +
>  /*
>   * We should only use the power well if we explicitly asked the hardware to
>   * enable it, so check if it's enabled and also check if we've requested it to
> @@ -2725,6 +2763,13 @@ static const struct i915_power_well_ops icl_combo_phy_aux_power_well_ops = {
>  	.is_enabled = hsw_power_well_enabled,
>  };
>  
> +static const struct i915_power_well_ops icl_tc_phy_aux_power_well_ops = {
> +	.sync_hw = hsw_power_well_sync_hw,
> +	.enable = icl_tc_phy_aux_power_well_enable,
> +	.disable = icl_tc_phy_aux_power_well_disable,
> +	.is_enabled = hsw_power_well_enabled,
> +};
> +
>  static const struct i915_power_well_regs icl_aux_power_well_regs = {
>  	.bios	= ICL_PWR_WELL_CTL_AUX1,
>  	.driver	= ICL_PWR_WELL_CTL_AUX2,
> @@ -2870,81 +2915,89 @@ static const struct i915_power_well_desc icl_power_wells[] = {
>  	{
>  		.name = "AUX C",
>  		.domains = ICL_AUX_C_IO_POWER_DOMAINS,
> -		.ops = &hsw_power_well_ops,
> +		.ops = &icl_tc_phy_aux_power_well_ops,
>  		.id = DISP_PW_ID_NONE,
>  		{
>  			.hsw.regs = &icl_aux_power_well_regs,
>  			.hsw.idx = ICL_PW_CTL_IDX_AUX_C,
> +			.hsw.is_tc_tbt = false,
>  		},
>  	},
>  	{
>  		.name = "AUX D",
>  		.domains = ICL_AUX_D_IO_POWER_DOMAINS,
> -		.ops = &hsw_power_well_ops,
> +		.ops = &icl_tc_phy_aux_power_well_ops,
>  		.id = DISP_PW_ID_NONE,
>  		{
>  			.hsw.regs = &icl_aux_power_well_regs,
>  			.hsw.idx = ICL_PW_CTL_IDX_AUX_D,
> +			.hsw.is_tc_tbt = false,
>  		},
>  	},
>  	{
>  		.name = "AUX E",
>  		.domains = ICL_AUX_E_IO_POWER_DOMAINS,
> -		.ops = &hsw_power_well_ops,
> +		.ops = &icl_tc_phy_aux_power_well_ops,
>  		.id = DISP_PW_ID_NONE,
>  		{
>  			.hsw.regs = &icl_aux_power_well_regs,
>  			.hsw.idx = ICL_PW_CTL_IDX_AUX_E,
> +			.hsw.is_tc_tbt = false,
>  		},
>  	},
>  	{
>  		.name = "AUX F",
>  		.domains = ICL_AUX_F_IO_POWER_DOMAINS,
> -		.ops = &hsw_power_well_ops,
> +		.ops = &icl_tc_phy_aux_power_well_ops,
>  		.id = DISP_PW_ID_NONE,
>  		{
>  			.hsw.regs = &icl_aux_power_well_regs,
>  			.hsw.idx = ICL_PW_CTL_IDX_AUX_F,
> +			.hsw.is_tc_tbt = false,
>  		},
>  	},
>  	{
>  		.name = "AUX TBT1",
>  		.domains = ICL_AUX_TBT1_IO_POWER_DOMAINS,
> -		.ops = &hsw_power_well_ops,
> +		.ops = &icl_tc_phy_aux_power_well_ops,
>  		.id = DISP_PW_ID_NONE,
>  		{
>  			.hsw.regs = &icl_aux_power_well_regs,
>  			.hsw.idx = ICL_PW_CTL_IDX_AUX_TBT1,
> +			.hsw.is_tc_tbt = true,
>  		},
>  	},
>  	{
>  		.name = "AUX TBT2",
>  		.domains = ICL_AUX_TBT2_IO_POWER_DOMAINS,
> -		.ops = &hsw_power_well_ops,
> +		.ops = &icl_tc_phy_aux_power_well_ops,
>  		.id = DISP_PW_ID_NONE,
>  		{
>  			.hsw.regs = &icl_aux_power_well_regs,
>  			.hsw.idx = ICL_PW_CTL_IDX_AUX_TBT2,
> +			.hsw.is_tc_tbt = true,
>  		},
>  	},
>  	{
>  		.name = "AUX TBT3",
>  		.domains = ICL_AUX_TBT3_IO_POWER_DOMAINS,
> -		.ops = &hsw_power_well_ops,
> +		.ops = &icl_tc_phy_aux_power_well_ops,
>  		.id = DISP_PW_ID_NONE,
>  		{
>  			.hsw.regs = &icl_aux_power_well_regs,
>  			.hsw.idx = ICL_PW_CTL_IDX_AUX_TBT3,
> +			.hsw.is_tc_tbt = true,
>  		},
>  	},
>  	{
>  		.name = "AUX TBT4",
>  		.domains = ICL_AUX_TBT4_IO_POWER_DOMAINS,
> -		.ops = &hsw_power_well_ops,
> +		.ops = &icl_tc_phy_aux_power_well_ops,
>  		.id = DISP_PW_ID_NONE,
>  		{
>  			.hsw.regs = &icl_aux_power_well_regs,
>  			.hsw.idx = ICL_PW_CTL_IDX_AUX_TBT4,
> +			.hsw.is_tc_tbt = true,
>  		},
>  	},
>  	{
> -- 
> 2.13.2
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
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Re: [PATCH 7/8] drm/i915: Configure AUX_CH_CTL when enabling the AUX power domain

[Imre Deak]

On Tue, Oct 30, 2018 at 02:57:51PM -0700, Lucas De Marchi wrote:
> On Tue, Oct 30, 2018 at 05:40:50PM +0200, Imre Deak wrote:
> > Most of the AUX_CH_CTL flags are concerned with DP AUX transfer
> > parameters. As opposed to this the flag specifying the thunderbolt vs.
> > non-thunderbolt mode of the port is not related to AUX transfers at all
> > (rather it's repurposed to enable either TBT or non-TBT PHY HW blocks).
> > The programming has to be done before enabling the corresponding AUX
> > power well, so make it part of the power well code.
> > 
> > Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=108548
> > Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
> > Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > Signed-off-by: Imre Deak <imre.deak@intel.com>
> > ---
> >  drivers/gpu/drm/i915/i915_drv.h         |  1 +
> >  drivers/gpu/drm/i915/intel_runtime_pm.c | 69 +++++++++++++++++++++++++++++----
> >  2 files changed, 62 insertions(+), 8 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> > index c57b701f72a7..dbf894835cb2 100644
> > --- a/drivers/gpu/drm/i915/i915_drv.h
> > +++ b/drivers/gpu/drm/i915/i915_drv.h
> > @@ -921,6 +921,7 @@ struct i915_power_well_desc {
> >  			/* The pw is backing the VGA functionality */
> >  			bool has_vga:1;
> >  			bool has_fuses:1;
> > +			bool is_tc_tbt;
> 
> what's up with the bitfield just above? Eitehr make this a bitfield or turn the others into
> !bitfield ?

Yes, typoed it, thanks for catching it. It should remain a bitfield.

> 
> We also may want to do:
> 
> struct {
>         struct _hsw;
>         bool is_tc_tbt;
> } icl;
> 
> to clarify this is icl+...

Not sure, since we'd still use power_well->desc->hsw if calling a helper
like hsw_wait_for_power_well_enable(). I can add a comment that the
field is for ICL TC PHYs.

> 
> ugh, but that needs a "subdir-ccflags-y += -fms-extensions" :(.
> 
> 
> Lucas De Marchi
> 
> >  		} hsw;
> >  	};
> >  	const struct i915_power_well_ops *ops;
> > diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c b/drivers/gpu/drm/i915/intel_runtime_pm.c
> > index 5f5416eb9644..eed17440a4a7 100644
> > --- a/drivers/gpu/drm/i915/intel_runtime_pm.c
> > +++ b/drivers/gpu/drm/i915/intel_runtime_pm.c
> > @@ -465,6 +465,44 @@ icl_combo_phy_aux_power_well_disable(struct drm_i915_private *dev_priv,
> >  	hsw_wait_for_power_well_disable(dev_priv, power_well);
> >  }
> >  
> > +#define ICL_AUX_PW_TO_CH(pw_idx)	\
> > +	((pw_idx) - ICL_PW_CTL_IDX_AUX_A + AUX_CH_A)
> > +
> > +static void
> > +icl_tc_phy_aux_power_well_enable(struct drm_i915_private *dev_priv,
> > +				 struct i915_power_well *power_well)
> > +{
> > +	const struct i915_power_well_regs *regs = power_well->desc->hsw.regs;
> > +	int pw_idx = power_well->desc->hsw.idx;
> > +	enum aux_ch aux_ch = ICL_AUX_PW_TO_CH(pw_idx);
> > +	u32 val;
> > +
> > +	val = I915_READ(DP_AUX_CH_CTL(aux_ch));
> > +	val &= ~DP_AUX_CH_CTL_TBT_IO;
> > +	if (power_well->desc->hsw.is_tc_tbt)
> > +		val |= DP_AUX_CH_CTL_TBT_IO;
> > +	I915_WRITE(DP_AUX_CH_CTL(aux_ch), val);
> > +
> > +	val = I915_READ(regs->driver);
> > +	I915_WRITE(regs->driver, val | HSW_PWR_WELL_CTL_REQ(pw_idx));
> > +
> > +	hsw_wait_for_power_well_enable(dev_priv, power_well);
> > +}
> > +
> > +static void
> > +icl_tc_phy_aux_power_well_disable(struct drm_i915_private *dev_priv,
> > +				  struct i915_power_well *power_well)
> > +{
> > +	const struct i915_power_well_regs *regs = power_well->desc->hsw.regs;
> > +	int pw_idx = power_well->desc->hsw.idx;
> > +	u32 val;
> > +
> > +	val = I915_READ(regs->driver);
> > +	I915_WRITE(regs->driver, val & ~HSW_PWR_WELL_CTL_REQ(pw_idx));
> > +
> > +	hsw_wait_for_power_well_disable(dev_priv, power_well);
> > +}
> > +
> >  /*
> >   * We should only use the power well if we explicitly asked the hardware to
> >   * enable it, so check if it's enabled and also check if we've requested it to
> > @@ -2725,6 +2763,13 @@ static const struct i915_power_well_ops icl_combo_phy_aux_power_well_ops = {
> >  	.is_enabled = hsw_power_well_enabled,
> >  };
> >  
> > +static const struct i915_power_well_ops icl_tc_phy_aux_power_well_ops = {
> > +	.sync_hw = hsw_power_well_sync_hw,
> > +	.enable = icl_tc_phy_aux_power_well_enable,
> > +	.disable = icl_tc_phy_aux_power_well_disable,
> > +	.is_enabled = hsw_power_well_enabled,
> > +};
> > +
> >  static const struct i915_power_well_regs icl_aux_power_well_regs = {
> >  	.bios	= ICL_PWR_WELL_CTL_AUX1,
> >  	.driver	= ICL_PWR_WELL_CTL_AUX2,
> > @@ -2870,81 +2915,89 @@ static const struct i915_power_well_desc icl_power_wells[] = {
> >  	{
> >  		.name = "AUX C",
> >  		.domains = ICL_AUX_C_IO_POWER_DOMAINS,
> > -		.ops = &hsw_power_well_ops,
> > +		.ops = &icl_tc_phy_aux_power_well_ops,
> >  		.id = DISP_PW_ID_NONE,
> >  		{
> >  			.hsw.regs = &icl_aux_power_well_regs,
> >  			.hsw.idx = ICL_PW_CTL_IDX_AUX_C,
> > +			.hsw.is_tc_tbt = false,
> >  		},
> >  	},
> >  	{
> >  		.name = "AUX D",
> >  		.domains = ICL_AUX_D_IO_POWER_DOMAINS,
> > -		.ops = &hsw_power_well_ops,
> > +		.ops = &icl_tc_phy_aux_power_well_ops,
> >  		.id = DISP_PW_ID_NONE,
> >  		{
> >  			.hsw.regs = &icl_aux_power_well_regs,
> >  			.hsw.idx = ICL_PW_CTL_IDX_AUX_D,
> > +			.hsw.is_tc_tbt = false,
> >  		},
> >  	},
> >  	{
> >  		.name = "AUX E",
> >  		.domains = ICL_AUX_E_IO_POWER_DOMAINS,
> > -		.ops = &hsw_power_well_ops,
> > +		.ops = &icl_tc_phy_aux_power_well_ops,
> >  		.id = DISP_PW_ID_NONE,
> >  		{
> >  			.hsw.regs = &icl_aux_power_well_regs,
> >  			.hsw.idx = ICL_PW_CTL_IDX_AUX_E,
> > +			.hsw.is_tc_tbt = false,
> >  		},
> >  	},
> >  	{
> >  		.name = "AUX F",
> >  		.domains = ICL_AUX_F_IO_POWER_DOMAINS,
> > -		.ops = &hsw_power_well_ops,
> > +		.ops = &icl_tc_phy_aux_power_well_ops,
> >  		.id = DISP_PW_ID_NONE,
> >  		{
> >  			.hsw.regs = &icl_aux_power_well_regs,
> >  			.hsw.idx = ICL_PW_CTL_IDX_AUX_F,
> > +			.hsw.is_tc_tbt = false,
> >  		},
> >  	},
> >  	{
> >  		.name = "AUX TBT1",
> >  		.domains = ICL_AUX_TBT1_IO_POWER_DOMAINS,
> > -		.ops = &hsw_power_well_ops,
> > +		.ops = &icl_tc_phy_aux_power_well_ops,
> >  		.id = DISP_PW_ID_NONE,
> >  		{
> >  			.hsw.regs = &icl_aux_power_well_regs,
> >  			.hsw.idx = ICL_PW_CTL_IDX_AUX_TBT1,
> > +			.hsw.is_tc_tbt = true,
> >  		},
> >  	},
> >  	{
> >  		.name = "AUX TBT2",
> >  		.domains = ICL_AUX_TBT2_IO_POWER_DOMAINS,
> > -		.ops = &hsw_power_well_ops,
> > +		.ops = &icl_tc_phy_aux_power_well_ops,
> >  		.id = DISP_PW_ID_NONE,
> >  		{
> >  			.hsw.regs = &icl_aux_power_well_regs,
> >  			.hsw.idx = ICL_PW_CTL_IDX_AUX_TBT2,
> > +			.hsw.is_tc_tbt = true,
> >  		},
> >  	},
> >  	{
> >  		.name = "AUX TBT3",
> >  		.domains = ICL_AUX_TBT3_IO_POWER_DOMAINS,
> > -		.ops = &hsw_power_well_ops,
> > +		.ops = &icl_tc_phy_aux_power_well_ops,
> >  		.id = DISP_PW_ID_NONE,
> >  		{
> >  			.hsw.regs = &icl_aux_power_well_regs,
> >  			.hsw.idx = ICL_PW_CTL_IDX_AUX_TBT3,
> > +			.hsw.is_tc_tbt = true,
> >  		},
> >  	},
> >  	{
> >  		.name = "AUX TBT4",
> >  		.domains = ICL_AUX_TBT4_IO_POWER_DOMAINS,
> > -		.ops = &hsw_power_well_ops,
> > +		.ops = &icl_tc_phy_aux_power_well_ops,
> >  		.id = DISP_PW_ID_NONE,
> >  		{
> >  			.hsw.regs = &icl_aux_power_well_regs,
> >  			.hsw.idx = ICL_PW_CTL_IDX_AUX_TBT4,
> > +			.hsw.is_tc_tbt = true,
> >  		},
> >  	},
> >  	{
> > -- 
> > 2.13.2
> > 
> > _______________________________________________
> > Intel-gfx mailing list
> > Intel-gfx@lists.freedesktop.org
> > https://lists.freedesktop.org/mailman/listinfo/intel-gfx
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Re: [PATCH 7/8] drm/i915: Configure AUX_CH_CTL when enabling the AUX power domain

[Souza, Jose]

On Tue, 2018-10-30 at 17:40 +0200, Imre Deak wrote:
> Most of the AUX_CH_CTL flags are concerned with DP AUX transfer
> parameters. As opposed to this the flag specifying the thunderbolt
> vs.
> non-thunderbolt mode of the port is not related to AUX transfers at
> all
> (rather it's repurposed to enable either TBT or non-TBT PHY HW
> blocks).
> The programming has to be done before enabling the corresponding AUX
> power well, so make it part of the power well code.
> 
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=108548
> Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>

Reviewed-by: José Roberto de Souza <jose.souza@intel.com>

If respinning this patch please consider the comments bellow but nice
catch.

> Signed-off-by: Imre Deak <imre.deak@intel.com>
> ---
>  drivers/gpu/drm/i915/i915_drv.h         |  1 +
>  drivers/gpu/drm/i915/intel_runtime_pm.c | 69
> +++++++++++++++++++++++++++++----
>  2 files changed, 62 insertions(+), 8 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_drv.h
> b/drivers/gpu/drm/i915/i915_drv.h
> index c57b701f72a7..dbf894835cb2 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -921,6 +921,7 @@ struct i915_power_well_desc {
>  			/* The pw is backing the VGA functionality */
>  			bool has_vga:1;
>  			bool has_fuses:1;
> +			bool is_tc_tbt;
>  		} hsw;
>  	};
>  	const struct i915_power_well_ops *ops;
> diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c
> b/drivers/gpu/drm/i915/intel_runtime_pm.c
> index 5f5416eb9644..eed17440a4a7 100644
> --- a/drivers/gpu/drm/i915/intel_runtime_pm.c
> +++ b/drivers/gpu/drm/i915/intel_runtime_pm.c
> @@ -465,6 +465,44 @@ icl_combo_phy_aux_power_well_disable(struct
> drm_i915_private *dev_priv,
>  	hsw_wait_for_power_well_disable(dev_priv, power_well);
>  }
>  
> +#define ICL_AUX_PW_TO_CH(pw_idx)	\
> +	((pw_idx) - ICL_PW_CTL_IDX_AUX_A + AUX_CH_A)
> +
> +static void
> +icl_tc_phy_aux_power_well_enable(struct drm_i915_private *dev_priv,
> +				 struct i915_power_well *power_well)
> +{
> +	const struct i915_power_well_regs *regs = power_well->desc-
> >hsw.regs;
> +	int pw_idx = power_well->desc->hsw.idx;
> +	enum aux_ch aux_ch = ICL_AUX_PW_TO_CH(pw_idx);
> +	u32 val;
> +
> +	val = I915_READ(DP_AUX_CH_CTL(aux_ch));
> +	val &= ~DP_AUX_CH_CTL_TBT_IO;
> +	if (power_well->desc->hsw.is_tc_tbt)
> +		val |= DP_AUX_CH_CTL_TBT_IO;
> +	I915_WRITE(DP_AUX_CH_CTL(aux_ch), val);
> +
> +	val = I915_READ(regs->driver);
> +	I915_WRITE(regs->driver, val | HSW_PWR_WELL_CTL_REQ(pw_idx));
> +
> +	hsw_wait_for_power_well_enable(dev_priv, power_well);

Minor but you could call hsw_power_well_enable() after write to
DP_AUX_CH_CTL instead of duplicate code.
 
> +}
> +
> +static void
> +icl_tc_phy_aux_power_well_disable(struct drm_i915_private *dev_priv,
> +				  struct i915_power_well *power_well)
> +{
> +	const struct i915_power_well_regs *regs = power_well->desc-
> >hsw.regs;
> +	int pw_idx = power_well->desc->hsw.idx;
> +	u32 val;
> +
> +	val = I915_READ(regs->driver);
> +	I915_WRITE(regs->driver, val & ~HSW_PWR_WELL_CTL_REQ(pw_idx));
> +
> +	hsw_wait_for_power_well_disable(dev_priv, power_well);
> +}

Minor too you could use the hsw_power_well_disable() instead of
duplicate code.

> +
>  /*
>   * We should only use the power well if we explicitly asked the
> hardware to
>   * enable it, so check if it's enabled and also check if we've
> requested it to
> @@ -2725,6 +2763,13 @@ static const struct i915_power_well_ops
> icl_combo_phy_aux_power_well_ops = {
>  	.is_enabled = hsw_power_well_enabled,
>  };
>  
> +static const struct i915_power_well_ops
> icl_tc_phy_aux_power_well_ops = {
> +	.sync_hw = hsw_power_well_sync_hw,
> +	.enable = icl_tc_phy_aux_power_well_enable,
> +	.disable = icl_tc_phy_aux_power_well_disable,
> +	.is_enabled = hsw_power_well_enabled,
> +};
> +
>  static const struct i915_power_well_regs icl_aux_power_well_regs = {
>  	.bios	= ICL_PWR_WELL_CTL_AUX1,
>  	.driver	= ICL_PWR_WELL_CTL_AUX2,
> @@ -2870,81 +2915,89 @@ static const struct i915_power_well_desc
> icl_power_wells[] = {
>  	{
>  		.name = "AUX C",
>  		.domains = ICL_AUX_C_IO_POWER_DOMAINS,
> -		.ops = &hsw_power_well_ops,
> +		.ops = &icl_tc_phy_aux_power_well_ops,
>  		.id = DISP_PW_ID_NONE,
>  		{
>  			.hsw.regs = &icl_aux_power_well_regs,
>  			.hsw.idx = ICL_PW_CTL_IDX_AUX_C,
> +			.hsw.is_tc_tbt = false,
>  		},
>  	},
>  	{
>  		.name = "AUX D",
>  		.domains = ICL_AUX_D_IO_POWER_DOMAINS,
> -		.ops = &hsw_power_well_ops,
> +		.ops = &icl_tc_phy_aux_power_well_ops,
>  		.id = DISP_PW_ID_NONE,
>  		{
>  			.hsw.regs = &icl_aux_power_well_regs,
>  			.hsw.idx = ICL_PW_CTL_IDX_AUX_D,
> +			.hsw.is_tc_tbt = false,
>  		},
>  	},
>  	{
>  		.name = "AUX E",
>  		.domains = ICL_AUX_E_IO_POWER_DOMAINS,
> -		.ops = &hsw_power_well_ops,
> +		.ops = &icl_tc_phy_aux_power_well_ops,
>  		.id = DISP_PW_ID_NONE,
>  		{
>  			.hsw.regs = &icl_aux_power_well_regs,
>  			.hsw.idx = ICL_PW_CTL_IDX_AUX_E,
> +			.hsw.is_tc_tbt = false,
>  		},
>  	},
>  	{
>  		.name = "AUX F",
>  		.domains = ICL_AUX_F_IO_POWER_DOMAINS,
> -		.ops = &hsw_power_well_ops,
> +		.ops = &icl_tc_phy_aux_power_well_ops,
>  		.id = DISP_PW_ID_NONE,
>  		{
>  			.hsw.regs = &icl_aux_power_well_regs,
>  			.hsw.idx = ICL_PW_CTL_IDX_AUX_F,
> +			.hsw.is_tc_tbt = false,
>  		},
>  	},
>  	{
>  		.name = "AUX TBT1",
>  		.domains = ICL_AUX_TBT1_IO_POWER_DOMAINS,
> -		.ops = &hsw_power_well_ops,
> +		.ops = &icl_tc_phy_aux_power_well_ops,
>  		.id = DISP_PW_ID_NONE,
>  		{
>  			.hsw.regs = &icl_aux_power_well_regs,
>  			.hsw.idx = ICL_PW_CTL_IDX_AUX_TBT1,
> +			.hsw.is_tc_tbt = true,
>  		},
>  	},
>  	{
>  		.name = "AUX TBT2",
>  		.domains = ICL_AUX_TBT2_IO_POWER_DOMAINS,
> -		.ops = &hsw_power_well_ops,
> +		.ops = &icl_tc_phy_aux_power_well_ops,
>  		.id = DISP_PW_ID_NONE,
>  		{
>  			.hsw.regs = &icl_aux_power_well_regs,
>  			.hsw.idx = ICL_PW_CTL_IDX_AUX_TBT2,
> +			.hsw.is_tc_tbt = true,
>  		},
>  	},
>  	{
>  		.name = "AUX TBT3",
>  		.domains = ICL_AUX_TBT3_IO_POWER_DOMAINS,
> -		.ops = &hsw_power_well_ops,
> +		.ops = &icl_tc_phy_aux_power_well_ops,
>  		.id = DISP_PW_ID_NONE,
>  		{
>  			.hsw.regs = &icl_aux_power_well_regs,
>  			.hsw.idx = ICL_PW_CTL_IDX_AUX_TBT3,
> +			.hsw.is_tc_tbt = true,
>  		},
>  	},
>  	{
>  		.name = "AUX TBT4",
>  		.domains = ICL_AUX_TBT4_IO_POWER_DOMAINS,
> -		.ops = &hsw_power_well_ops,
> +		.ops = &icl_tc_phy_aux_power_well_ops,
>  		.id = DISP_PW_ID_NONE,
>  		{
>  			.hsw.regs = &icl_aux_power_well_regs,
>  			.hsw.idx = ICL_PW_CTL_IDX_AUX_TBT4,
> +			.hsw.is_tc_tbt = true,
>  		},
>  	},
>  	{
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Re: [PATCH 7/8] drm/i915: Configure AUX_CH_CTL when enabling the AUX power domain

[Imre Deak]

On Wed, Oct 31, 2018 at 01:28:07AM +0200, Souza, Jose wrote:
> On Tue, 2018-10-30 at 17:40 +0200, Imre Deak wrote:
> > Most of the AUX_CH_CTL flags are concerned with DP AUX transfer
> > parameters. As opposed to this the flag specifying the thunderbolt
> > vs.
> > non-thunderbolt mode of the port is not related to AUX transfers at
> > all
> > (rather it's repurposed to enable either TBT or non-TBT PHY HW
> > blocks).
> > The programming has to be done before enabling the corresponding AUX
> > power well, so make it part of the power well code.
> > 
> > Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=108548
> > Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
> > Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
> 
> If respinning this patch please consider the comments bellow but nice
> catch.
> 
> > Signed-off-by: Imre Deak <imre.deak@intel.com>
> > ---
> >  drivers/gpu/drm/i915/i915_drv.h         |  1 +
> >  drivers/gpu/drm/i915/intel_runtime_pm.c | 69
> > +++++++++++++++++++++++++++++----
> >  2 files changed, 62 insertions(+), 8 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/i915_drv.h
> > b/drivers/gpu/drm/i915/i915_drv.h
> > index c57b701f72a7..dbf894835cb2 100644
> > --- a/drivers/gpu/drm/i915/i915_drv.h
> > +++ b/drivers/gpu/drm/i915/i915_drv.h
> > @@ -921,6 +921,7 @@ struct i915_power_well_desc {
> >  			/* The pw is backing the VGA functionality */
> >  			bool has_vga:1;
> >  			bool has_fuses:1;
> > +			bool is_tc_tbt;
> >  		} hsw;
> >  	};
> >  	const struct i915_power_well_ops *ops;
> > diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c
> > b/drivers/gpu/drm/i915/intel_runtime_pm.c
> > index 5f5416eb9644..eed17440a4a7 100644
> > --- a/drivers/gpu/drm/i915/intel_runtime_pm.c
> > +++ b/drivers/gpu/drm/i915/intel_runtime_pm.c
> > @@ -465,6 +465,44 @@ icl_combo_phy_aux_power_well_disable(struct
> > drm_i915_private *dev_priv,
> >  	hsw_wait_for_power_well_disable(dev_priv, power_well);
> >  }
> >  
> > +#define ICL_AUX_PW_TO_CH(pw_idx)	\
> > +	((pw_idx) - ICL_PW_CTL_IDX_AUX_A + AUX_CH_A)
> > +
> > +static void
> > +icl_tc_phy_aux_power_well_enable(struct drm_i915_private *dev_priv,
> > +				 struct i915_power_well *power_well)
> > +{
> > +	const struct i915_power_well_regs *regs = power_well->desc-
> > >hsw.regs;
> > +	int pw_idx = power_well->desc->hsw.idx;
> > +	enum aux_ch aux_ch = ICL_AUX_PW_TO_CH(pw_idx);
> > +	u32 val;
> > +
> > +	val = I915_READ(DP_AUX_CH_CTL(aux_ch));
> > +	val &= ~DP_AUX_CH_CTL_TBT_IO;
> > +	if (power_well->desc->hsw.is_tc_tbt)
> > +		val |= DP_AUX_CH_CTL_TBT_IO;
> > +	I915_WRITE(DP_AUX_CH_CTL(aux_ch), val);
> > +
> > +	val = I915_READ(regs->driver);
> > +	I915_WRITE(regs->driver, val | HSW_PWR_WELL_CTL_REQ(pw_idx));
> > +
> > +	hsw_wait_for_power_well_enable(dev_priv, power_well);
> 
> Minor but you could call hsw_power_well_enable() after write to
> DP_AUX_CH_CTL instead of duplicate code.
>  
> > +}
> > +
> > +static void
> > +icl_tc_phy_aux_power_well_disable(struct drm_i915_private *dev_priv,
> > +				  struct i915_power_well *power_well)
> > +{
> > +	const struct i915_power_well_regs *regs = power_well->desc-
> > >hsw.regs;
> > +	int pw_idx = power_well->desc->hsw.idx;
> > +	u32 val;
> > +
> > +	val = I915_READ(regs->driver);
> > +	I915_WRITE(regs->driver, val & ~HSW_PWR_WELL_CTL_REQ(pw_idx));
> > +
> > +	hsw_wait_for_power_well_disable(dev_priv, power_well);
> > +}
> 
> Minor too you could use the hsw_power_well_disable() instead of
> duplicate code.

Ok, will change these.

> 
> > +
> >  /*
> >   * We should only use the power well if we explicitly asked the
> > hardware to
> >   * enable it, so check if it's enabled and also check if we've
> > requested it to
> > @@ -2725,6 +2763,13 @@ static const struct i915_power_well_ops
> > icl_combo_phy_aux_power_well_ops = {
> >  	.is_enabled = hsw_power_well_enabled,
> >  };
> >  
> > +static const struct i915_power_well_ops
> > icl_tc_phy_aux_power_well_ops = {
> > +	.sync_hw = hsw_power_well_sync_hw,
> > +	.enable = icl_tc_phy_aux_power_well_enable,
> > +	.disable = icl_tc_phy_aux_power_well_disable,
> > +	.is_enabled = hsw_power_well_enabled,
> > +};
> > +
> >  static const struct i915_power_well_regs icl_aux_power_well_regs = {
> >  	.bios	= ICL_PWR_WELL_CTL_AUX1,
> >  	.driver	= ICL_PWR_WELL_CTL_AUX2,
> > @@ -2870,81 +2915,89 @@ static const struct i915_power_well_desc
> > icl_power_wells[] = {
> >  	{
> >  		.name = "AUX C",
> >  		.domains = ICL_AUX_C_IO_POWER_DOMAINS,
> > -		.ops = &hsw_power_well_ops,
> > +		.ops = &icl_tc_phy_aux_power_well_ops,
> >  		.id = DISP_PW_ID_NONE,
> >  		{
> >  			.hsw.regs = &icl_aux_power_well_regs,
> >  			.hsw.idx = ICL_PW_CTL_IDX_AUX_C,
> > +			.hsw.is_tc_tbt = false,
> >  		},
> >  	},
> >  	{
> >  		.name = "AUX D",
> >  		.domains = ICL_AUX_D_IO_POWER_DOMAINS,
> > -		.ops = &hsw_power_well_ops,
> > +		.ops = &icl_tc_phy_aux_power_well_ops,
> >  		.id = DISP_PW_ID_NONE,
> >  		{
> >  			.hsw.regs = &icl_aux_power_well_regs,
> >  			.hsw.idx = ICL_PW_CTL_IDX_AUX_D,
> > +			.hsw.is_tc_tbt = false,
> >  		},
> >  	},
> >  	{
> >  		.name = "AUX E",
> >  		.domains = ICL_AUX_E_IO_POWER_DOMAINS,
> > -		.ops = &hsw_power_well_ops,
> > +		.ops = &icl_tc_phy_aux_power_well_ops,
> >  		.id = DISP_PW_ID_NONE,
> >  		{
> >  			.hsw.regs = &icl_aux_power_well_regs,
> >  			.hsw.idx = ICL_PW_CTL_IDX_AUX_E,
> > +			.hsw.is_tc_tbt = false,
> >  		},
> >  	},
> >  	{
> >  		.name = "AUX F",
> >  		.domains = ICL_AUX_F_IO_POWER_DOMAINS,
> > -		.ops = &hsw_power_well_ops,
> > +		.ops = &icl_tc_phy_aux_power_well_ops,
> >  		.id = DISP_PW_ID_NONE,
> >  		{
> >  			.hsw.regs = &icl_aux_power_well_regs,
> >  			.hsw.idx = ICL_PW_CTL_IDX_AUX_F,
> > +			.hsw.is_tc_tbt = false,
> >  		},
> >  	},
> >  	{
> >  		.name = "AUX TBT1",
> >  		.domains = ICL_AUX_TBT1_IO_POWER_DOMAINS,
> > -		.ops = &hsw_power_well_ops,
> > +		.ops = &icl_tc_phy_aux_power_well_ops,
> >  		.id = DISP_PW_ID_NONE,
> >  		{
> >  			.hsw.regs = &icl_aux_power_well_regs,
> >  			.hsw.idx = ICL_PW_CTL_IDX_AUX_TBT1,
> > +			.hsw.is_tc_tbt = true,
> >  		},
> >  	},
> >  	{
> >  		.name = "AUX TBT2",
> >  		.domains = ICL_AUX_TBT2_IO_POWER_DOMAINS,
> > -		.ops = &hsw_power_well_ops,
> > +		.ops = &icl_tc_phy_aux_power_well_ops,
> >  		.id = DISP_PW_ID_NONE,
> >  		{
> >  			.hsw.regs = &icl_aux_power_well_regs,
> >  			.hsw.idx = ICL_PW_CTL_IDX_AUX_TBT2,
> > +			.hsw.is_tc_tbt = true,
> >  		},
> >  	},
> >  	{
> >  		.name = "AUX TBT3",
> >  		.domains = ICL_AUX_TBT3_IO_POWER_DOMAINS,
> > -		.ops = &hsw_power_well_ops,
> > +		.ops = &icl_tc_phy_aux_power_well_ops,
> >  		.id = DISP_PW_ID_NONE,
> >  		{
> >  			.hsw.regs = &icl_aux_power_well_regs,
> >  			.hsw.idx = ICL_PW_CTL_IDX_AUX_TBT3,
> > +			.hsw.is_tc_tbt = true,
> >  		},
> >  	},
> >  	{
> >  		.name = "AUX TBT4",
> >  		.domains = ICL_AUX_TBT4_IO_POWER_DOMAINS,
> > -		.ops = &hsw_power_well_ops,
> > +		.ops = &icl_tc_phy_aux_power_well_ops,
> >  		.id = DISP_PW_ID_NONE,
> >  		{
> >  			.hsw.regs = &icl_aux_power_well_regs,
> >  			.hsw.idx = ICL_PW_CTL_IDX_AUX_TBT4,
> > +			.hsw.is_tc_tbt = true,
> >  		},
> >  	},
> >  	{
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[PATCH 8/8] drm/i915/icl+: Sanitize port to PLL mapping

[Imre Deak]

BIOS can leave the PLL to port mapping enabled, even if the
corresponding encoder is disabled. Disable the port mapping in this
case.

Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
---
 drivers/gpu/drm/i915/intel_ddi.c     | 23 +++++++++++++++++++++++
 drivers/gpu/drm/i915/intel_display.c |  4 ++++
 drivers/gpu/drm/i915/intel_drv.h     |  1 +
 3 files changed, 28 insertions(+)

diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c
index bf58816ed59c..8b7289af7558 100644
--- a/drivers/gpu/drm/i915/intel_ddi.c
+++ b/drivers/gpu/drm/i915/intel_ddi.c
@@ -2822,6 +2822,29 @@ void icl_unmap_plls_to_ports(struct drm_crtc *crtc,
 	}
 }
 
+void icl_sanitize_encoder_pll_mapping(struct intel_encoder *encoder)
+{
+	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
+	u32 val = I915_READ(DPCLKA_CFGCR0_ICL);
+	enum port port = encoder->port;
+	bool clk_enabled = !(val & icl_dpclka_cfgcr0_clk_off(dev_priv, port));
+
+	if (clk_enabled == !!encoder->base.crtc)
+		return;
+
+	/*
+	 * Punt on the case now where clock is disabled, but the encoder is
+	 * enabled, something else is really broken then.
+	 */
+	if (WARN_ON(!clk_enabled))
+		return;
+
+	DRM_NOTE("Port %c is disabled but it has a mapped PLL, unmap it\n",
+		 port_name(port));
+	val |= icl_dpclka_cfgcr0_clk_off(dev_priv, port);
+	I915_WRITE(DPCLKA_CFGCR0_ICL, val);
+}
+
 static void intel_ddi_clk_select(struct intel_encoder *encoder,
 				 const struct intel_crtc_state *crtc_state)
 {
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 12ba2b923e6b..2534263ebb41 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -15368,6 +15368,7 @@ static void intel_sanitize_crtc(struct intel_crtc *crtc,
 
 static void intel_sanitize_encoder(struct intel_encoder *encoder)
 {
+	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
 	struct intel_connector *connector;
 
 	/* We need to check both for a crtc link (meaning that the
@@ -15409,6 +15410,9 @@ static void intel_sanitize_encoder(struct intel_encoder *encoder)
 
 	/* notify opregion of the sanitized encoder state */
 	intel_opregion_notify_encoder(encoder, connector && has_active_crtc);
+
+	if (INTEL_GEN(dev_priv) >= 11)
+		icl_sanitize_encoder_pll_mapping(encoder);
 }
 
 void i915_redisable_vga_power_on(struct drm_i915_private *dev_priv)
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index a3d7b93ecddd..224edb1a95d5 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -1519,6 +1519,7 @@ void icl_map_plls_to_ports(struct drm_crtc *crtc,
 void icl_unmap_plls_to_ports(struct drm_crtc *crtc,
 			     struct intel_crtc_state *crtc_state,
 			     struct drm_atomic_state *old_state);
+void icl_sanitize_encoder_pll_mapping(struct intel_encoder *encoder);
 
 unsigned int intel_fb_align_height(const struct drm_framebuffer *fb,
 				   int color_plane, unsigned int height);
-- 
2.13.2

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Re: [PATCH 8/8] drm/i915/icl+: Sanitize port to PLL mapping

[Souza, Jose]

On Tue, 2018-10-30 at 17:40 +0200, Imre Deak wrote:
> BIOS can leave the PLL to port mapping enabled, even if the
> corresponding encoder is disabled. Disable the port mapping in this
> case.
> 

Reviewed-by: José Roberto de Souza <jose.souza@intel.com>

> Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Signed-off-by: Imre Deak <imre.deak@intel.com>
> ---
>  drivers/gpu/drm/i915/intel_ddi.c     | 23 +++++++++++++++++++++++
>  drivers/gpu/drm/i915/intel_display.c |  4 ++++
>  drivers/gpu/drm/i915/intel_drv.h     |  1 +
>  3 files changed, 28 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/intel_ddi.c
> b/drivers/gpu/drm/i915/intel_ddi.c
> index bf58816ed59c..8b7289af7558 100644
> --- a/drivers/gpu/drm/i915/intel_ddi.c
> +++ b/drivers/gpu/drm/i915/intel_ddi.c
> @@ -2822,6 +2822,29 @@ void icl_unmap_plls_to_ports(struct drm_crtc
> *crtc,
>  	}
>  }
>  
> +void icl_sanitize_encoder_pll_mapping(struct intel_encoder *encoder)
> +{
> +	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
> +	u32 val = I915_READ(DPCLKA_CFGCR0_ICL);
> +	enum port port = encoder->port;
> +	bool clk_enabled = !(val & icl_dpclka_cfgcr0_clk_off(dev_priv,
> port));
> +
> +	if (clk_enabled == !!encoder->base.crtc)
> +		return;
> +
> +	/*
> +	 * Punt on the case now where clock is disabled, but the
> encoder is
> +	 * enabled, something else is really broken then.
> +	 */
> +	if (WARN_ON(!clk_enabled))
> +		return;
> +
> +	DRM_NOTE("Port %c is disabled but it has a mapped PLL, unmap
> it\n",
> +		 port_name(port));
> +	val |= icl_dpclka_cfgcr0_clk_off(dev_priv, port);
> +	I915_WRITE(DPCLKA_CFGCR0_ICL, val);
> +}
> +
>  static void intel_ddi_clk_select(struct intel_encoder *encoder,
>  				 const struct intel_crtc_state
> *crtc_state)
>  {
> diff --git a/drivers/gpu/drm/i915/intel_display.c
> b/drivers/gpu/drm/i915/intel_display.c
> index 12ba2b923e6b..2534263ebb41 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -15368,6 +15368,7 @@ static void intel_sanitize_crtc(struct
> intel_crtc *crtc,
>  
>  static void intel_sanitize_encoder(struct intel_encoder *encoder)
>  {
> +	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
>  	struct intel_connector *connector;
>  
>  	/* We need to check both for a crtc link (meaning that the
> @@ -15409,6 +15410,9 @@ static void intel_sanitize_encoder(struct
> intel_encoder *encoder)
>  
>  	/* notify opregion of the sanitized encoder state */
>  	intel_opregion_notify_encoder(encoder, connector &&
> has_active_crtc);
> +
> +	if (INTEL_GEN(dev_priv) >= 11)
> +		icl_sanitize_encoder_pll_mapping(encoder);
>  }
>  
>  void i915_redisable_vga_power_on(struct drm_i915_private *dev_priv)
> diff --git a/drivers/gpu/drm/i915/intel_drv.h
> b/drivers/gpu/drm/i915/intel_drv.h
> index a3d7b93ecddd..224edb1a95d5 100644
> --- a/drivers/gpu/drm/i915/intel_drv.h
> +++ b/drivers/gpu/drm/i915/intel_drv.h
> @@ -1519,6 +1519,7 @@ void icl_map_plls_to_ports(struct drm_crtc
> *crtc,
>  void icl_unmap_plls_to_ports(struct drm_crtc *crtc,
>  			     struct intel_crtc_state *crtc_state,
>  			     struct drm_atomic_state *old_state);
> +void icl_sanitize_encoder_pll_mapping(struct intel_encoder
> *encoder);
>  
>  unsigned int intel_fb_align_height(const struct drm_framebuffer *fb,
>  				   int color_plane, unsigned int
> height);
_______________________________________________
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✗ Fi.CI.CHECKPATCH: warning for drm/i915/icl: Fix HDMI on TypeC static ports

[Patchwork]

== Series Details ==

Series: drm/i915/icl: Fix HDMI on TypeC static ports
URL   : https://patchwork.freedesktop.org/series/51765/
State : warning

== Summary ==

$ dim checkpatch origin/drm-tip
83eb4def4751 drm/i915: Move intel_aux_ch() to intel_bios.c
-:47: CHECK:SPACING: No space is necessary after a cast
#47: FILE: drivers/gpu/drm/i915/intel_bios.c:2170:
+		aux_ch = (enum aux_ch) port;

total: 0 errors, 0 warnings, 1 checks, 117 lines checked
0b6dfef45914 drm/i915: Move aux_ch to intel_digital_port
53ffb8f38693 drm/i915: Init aux_ch for HDMI ports too
220df38c6c99 drm/i915: Use a helper to get the aux power domain
f4b2a2abef1f drm/i915: Enable AUX power earlier
de78682eb1be drm/i915: Enable AUX power for HDMI DDI/TypeC main link too
95c39a9a3a65 drm/i915: Configure AUX_CH_CTL when enabling the AUX power domain
-:30: CHECK:BOOL_MEMBER: Avoid using bool structure members because of possible alignment issues - see: https://lkml.org/lkml/2017/11/21/384
#30: FILE: drivers/gpu/drm/i915/i915_drv.h:924:
+			bool is_tc_tbt;

total: 0 errors, 0 warnings, 1 checks, 161 lines checked
ef4031503b26 drm/i915/icl+: Sanitize port to PLL mapping

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

✗ Fi.CI.SPARSE: warning for drm/i915/icl: Fix HDMI on TypeC static ports

[Patchwork]

== Series Details ==

Series: drm/i915/icl: Fix HDMI on TypeC static ports
URL   : https://patchwork.freedesktop.org/series/51765/
State : warning

== Summary ==

$ dim sparse origin/drm-tip
Sparse version: v0.5.2
Commit: drm/i915: Move intel_aux_ch() to intel_bios.c
-drivers/gpu/drm/i915/selftests/../i915_drv.h:3699:16: warning: expression using sizeof(void)
+drivers/gpu/drm/i915/selftests/../i915_drv.h:3700:16: warning: expression using sizeof(void)

Commit: drm/i915: Move aux_ch to intel_digital_port
Okay!

Commit: drm/i915: Init aux_ch for HDMI ports too
Okay!

Commit: drm/i915: Use a helper to get the aux power domain
Okay!

Commit: drm/i915: Enable AUX power earlier
Okay!

Commit: drm/i915: Enable AUX power for HDMI DDI/TypeC main link too
Okay!

Commit: drm/i915: Configure AUX_CH_CTL when enabling the AUX power domain
-drivers/gpu/drm/i915/selftests/../i915_drv.h:3700:16: warning: expression using sizeof(void)
+drivers/gpu/drm/i915/selftests/../i915_drv.h:3701:16: warning: expression using sizeof(void)

Commit: drm/i915/icl+: Sanitize port to PLL mapping
Okay!

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

✗ Fi.CI.BAT: failure for drm/i915/icl: Fix HDMI on TypeC static ports

[Patchwork]

== Series Details ==

Series: drm/i915/icl: Fix HDMI on TypeC static ports
URL   : https://patchwork.freedesktop.org/series/51765/
State : failure

== Summary ==

= CI Bug Log - changes from CI_DRM_5055 -> Patchwork_10652 =

== Summary - FAILURE ==

  Serious unknown changes coming with Patchwork_10652 absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_10652, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  External URL: https://patchwork.freedesktop.org/api/1.0/series/51765/revisions/1/mbox/

== Possible new issues ==

  Here are the unknown changes that may have been introduced in Patchwork_10652:

  === IGT changes ===

    ==== Possible regressions ====

    igt@kms_busy@basic-flip-a:
      fi-apl-guc:         PASS -> DMESG-WARN +28

    igt@kms_pipe_crc_basic@hang-read-crc-pipe-b:
      fi-bxt-j4205:       PASS -> DMESG-WARN +25

    igt@pm_rpm@basic-rte:
      fi-glk-j4005:       PASS -> DMESG-WARN +27

    
    ==== Warnings ====

    igt@pm_rpm@module-reload:
      fi-hsw-4770r:       PASS -> SKIP

    
== Known issues ==

  Here are the changes found in Patchwork_10652 that come from known issues:

  === IGT changes ===

    ==== Issues hit ====

    igt@drv_module_reload@basic-reload-inject:
      fi-bxt-j4205:       PASS -> DMESG-WARN (fdo#107821)
      fi-hsw-4770r:       PASS -> DMESG-WARN (fdo#107924, fdo#107425)

    igt@drv_selftest@live_contexts:
      fi-icl-u:           NOTRUN -> DMESG-FAIL (fdo#108569)

    igt@drv_selftest@live_hangcheck:
      fi-icl-u2:          PASS -> INCOMPLETE (fdo#108315)

    igt@kms_flip@basic-flip-vs-modeset:
      fi-skl-6700hq:      PASS -> DMESG-WARN (fdo#105998)

    
    ==== Possible fixes ====

    igt@debugfs_test@read_all_entries:
      fi-icl-u2:          DMESG-WARN (fdo#108070) -> PASS

    igt@gem_ctx_switch@basic-default:
      fi-icl-u:           INCOMPLETE (fdo#108315) -> PASS

    igt@gem_exec_suspend@basic-s3:
      fi-icl-u2:          DMESG-WARN (fdo#106612) -> PASS
      fi-skl-6700k2:      INCOMPLETE (fdo#107773, k.org#199541, fdo#105524, fdo#104108) -> PASS
      fi-blb-e6850:       INCOMPLETE (fdo#107718) -> PASS

    
    ==== Warnings ====

    igt@drv_selftest@live_contexts:
      fi-icl-u2:          DMESG-FAIL (fdo#108569) -> INCOMPLETE (fdo#108315)

    
  fdo#104108 https://bugs.freedesktop.org/show_bug.cgi?id=104108
  fdo#105524 https://bugs.freedesktop.org/show_bug.cgi?id=105524
  fdo#105998 https://bugs.freedesktop.org/show_bug.cgi?id=105998
  fdo#106612 https://bugs.freedesktop.org/show_bug.cgi?id=106612
  fdo#107425 https://bugs.freedesktop.org/show_bug.cgi?id=107425
  fdo#107718 https://bugs.freedesktop.org/show_bug.cgi?id=107718
  fdo#107773 https://bugs.freedesktop.org/show_bug.cgi?id=107773
  fdo#107821 https://bugs.freedesktop.org/show_bug.cgi?id=107821
  fdo#107924 https://bugs.freedesktop.org/show_bug.cgi?id=107924
  fdo#108070 https://bugs.freedesktop.org/show_bug.cgi?id=108070
  fdo#108315 https://bugs.freedesktop.org/show_bug.cgi?id=108315
  fdo#108569 https://bugs.freedesktop.org/show_bug.cgi?id=108569
  k.org#199541 https://bugzilla.kernel.org/show_bug.cgi?id=199541


== Participating hosts (48 -> 42) ==

  Missing    (6): fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-pnv-d510 fi-kbl-7560u 


== Build changes ==

    * Linux: CI_DRM_5055 -> Patchwork_10652

  CI_DRM_5055: 9471771fb0a56bb6559279fcdbb445d270036af3 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_4700: b517f6533671552166c11748ee48019093ebd069 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_10652: ef4031503b26a3020e60e377a81856b3f6488f3a @ git://anongit.freedesktop.org/gfx-ci/linux


== Linux commits ==

ef4031503b26 drm/i915/icl+: Sanitize port to PLL mapping
95c39a9a3a65 drm/i915: Configure AUX_CH_CTL when enabling the AUX power domain
de78682eb1be drm/i915: Enable AUX power for HDMI DDI/TypeC main link too
f4b2a2abef1f drm/i915: Enable AUX power earlier
220df38c6c99 drm/i915: Use a helper to get the aux power domain
53ffb8f38693 drm/i915: Init aux_ch for HDMI ports too
0b6dfef45914 drm/i915: Move aux_ch to intel_digital_port
83eb4def4751 drm/i915: Move intel_aux_ch() to intel_bios.c

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_10652/issues.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

✗ Fi.CI.CHECKPATCH: warning for drm/i915/icl: Fix HDMI on TypeC static ports (rev2)

[Patchwork]

== Series Details ==

Series: drm/i915/icl: Fix HDMI on TypeC static ports (rev2)
URL   : https://patchwork.freedesktop.org/series/51765/
State : warning

== Summary ==

$ dim checkpatch origin/drm-tip
e4ad990a6870 drm/i915: Move intel_aux_ch() to intel_bios.c
-:47: CHECK:SPACING: No space is necessary after a cast
#47: FILE: drivers/gpu/drm/i915/intel_bios.c:2170:
+		aux_ch = (enum aux_ch) port;

total: 0 errors, 0 warnings, 1 checks, 117 lines checked
37f979051573 drm/i915: Move aux_ch to intel_digital_port
205acdca75bf drm/i915: Init aux_ch for HDMI ports too
d1f98d2d87ee drm/i915: Use a helper to get the aux power domain
4c39cbbf1d03 drm/i915: Enable AUX power earlier
-:67: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#67: FILE: drivers/gpu/drm/i915/intel_ddi.c:2903:
+		bxt_ddi_phy_set_lane_optim_mask(encoder,
+					       crtc_state->lane_lat_optim_mask);

total: 0 errors, 0 warnings, 1 checks, 111 lines checked
add3b19aab49 drm/i915: Enable AUX power for HDMI DDI/TypeC main link too
4241d974c2d7 drm/i915: Configure AUX_CH_CTL when enabling the AUX power domain
-:30: CHECK:BOOL_MEMBER: Avoid using bool structure members because of possible alignment issues - see: https://lkml.org/lkml/2017/11/21/384
#30: FILE: drivers/gpu/drm/i915/i915_drv.h:924:
+			bool is_tc_tbt;

total: 0 errors, 0 warnings, 1 checks, 161 lines checked
cb36ad65b0b1 drm/i915/icl+: Sanitize port to PLL mapping

_______________________________________________
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https://lists.freedesktop.org/mailman/listinfo/intel-gfx

✗ Fi.CI.SPARSE: warning for drm/i915/icl: Fix HDMI on TypeC static ports (rev2)

[Patchwork]

== Series Details ==

Series: drm/i915/icl: Fix HDMI on TypeC static ports (rev2)
URL   : https://patchwork.freedesktop.org/series/51765/
State : warning

== Summary ==

$ dim sparse origin/drm-tip
Sparse version: v0.5.2
Commit: drm/i915: Move intel_aux_ch() to intel_bios.c
-drivers/gpu/drm/i915/selftests/../i915_drv.h:3699:16: warning: expression using sizeof(void)
+drivers/gpu/drm/i915/selftests/../i915_drv.h:3700:16: warning: expression using sizeof(void)

Commit: drm/i915: Move aux_ch to intel_digital_port
Okay!

Commit: drm/i915: Init aux_ch for HDMI ports too
Okay!

Commit: drm/i915: Use a helper to get the aux power domain
Okay!

Commit: drm/i915: Enable AUX power earlier
Okay!

Commit: drm/i915: Enable AUX power for HDMI DDI/TypeC main link too
Okay!

Commit: drm/i915: Configure AUX_CH_CTL when enabling the AUX power domain
-drivers/gpu/drm/i915/selftests/../i915_drv.h:3700:16: warning: expression using sizeof(void)
+drivers/gpu/drm/i915/selftests/../i915_drv.h:3701:16: warning: expression using sizeof(void)

Commit: drm/i915/icl+: Sanitize port to PLL mapping
Okay!

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

✓ Fi.CI.BAT: success for drm/i915/icl: Fix HDMI on TypeC static ports (rev2)

[Patchwork]

== Series Details ==

Series: drm/i915/icl: Fix HDMI on TypeC static ports (rev2)
URL   : https://patchwork.freedesktop.org/series/51765/
State : success

== Summary ==

= CI Bug Log - changes from CI_DRM_5057 -> Patchwork_10653 =

== Summary - SUCCESS ==

  No regressions found.

  External URL: https://patchwork.freedesktop.org/api/1.0/series/51765/revisions/2/mbox/

== Known issues ==

  Here are the changes found in Patchwork_10653 that come from known issues:

  === IGT changes ===

    ==== Issues hit ====

    igt@kms_busy@basic-flip-c:
      fi-skl-6700hq:      PASS -> DMESG-WARN (fdo#105998)

    igt@kms_frontbuffer_tracking@basic:
      fi-icl-u2:          PASS -> FAIL (fdo#103167)
      fi-byt-clapper:     PASS -> FAIL (fdo#103167)

    igt@kms_pipe_crc_basic@nonblocking-crc-pipe-a-frame-sequence:
      fi-byt-clapper:     PASS -> FAIL (fdo#103191, fdo#107362) +1

    
    ==== Possible fixes ====

    igt@drv_selftest@live_coherency:
      fi-gdg-551:         DMESG-FAIL (fdo#107164) -> PASS

    igt@drv_selftest@live_hangcheck:
      fi-icl-u2:          INCOMPLETE (fdo#108315) -> PASS

    igt@kms_flip@basic-flip-vs-modeset:
      fi-skl-6700hq:      DMESG-WARN (fdo#105998) -> PASS

    
    ==== Warnings ====

    igt@drv_selftest@live_contexts:
      fi-icl-u2:          INCOMPLETE (fdo#108315) -> DMESG-FAIL (fdo#108569)

    
  fdo#103167 https://bugs.freedesktop.org/show_bug.cgi?id=103167
  fdo#103191 https://bugs.freedesktop.org/show_bug.cgi?id=103191
  fdo#105998 https://bugs.freedesktop.org/show_bug.cgi?id=105998
  fdo#107164 https://bugs.freedesktop.org/show_bug.cgi?id=107164
  fdo#107362 https://bugs.freedesktop.org/show_bug.cgi?id=107362
  fdo#108315 https://bugs.freedesktop.org/show_bug.cgi?id=108315
  fdo#108569 https://bugs.freedesktop.org/show_bug.cgi?id=108569


== Participating hosts (49 -> 42) ==

  Missing    (7): fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-ctg-p8600 fi-pnv-d510 fi-icl-u 


== Build changes ==

    * Linux: CI_DRM_5057 -> Patchwork_10653

  CI_DRM_5057: fd1827d4a1cb142452a3107f5e337043cabd56f4 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_4701: 3aedf1b000e27abfa1bf179205a81efe2b76a508 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_10653: cb36ad65b0b148dc379988005841a5b155a198bd @ git://anongit.freedesktop.org/gfx-ci/linux


== Linux commits ==

cb36ad65b0b1 drm/i915/icl+: Sanitize port to PLL mapping
4241d974c2d7 drm/i915: Configure AUX_CH_CTL when enabling the AUX power domain
add3b19aab49 drm/i915: Enable AUX power for HDMI DDI/TypeC main link too
4c39cbbf1d03 drm/i915: Enable AUX power earlier
d1f98d2d87ee drm/i915: Use a helper to get the aux power domain
205acdca75bf drm/i915: Init aux_ch for HDMI ports too
37f979051573 drm/i915: Move aux_ch to intel_digital_port
e4ad990a6870 drm/i915: Move intel_aux_ch() to intel_bios.c

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_10653/issues.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

✓ Fi.CI.IGT: success for drm/i915/icl: Fix HDMI on TypeC static ports (rev2)

[Patchwork]

== Series Details ==

Series: drm/i915/icl: Fix HDMI on TypeC static ports (rev2)
URL   : https://patchwork.freedesktop.org/series/51765/
State : success

== Summary ==

= CI Bug Log - changes from CI_DRM_5057_full -> Patchwork_10653_full =

== Summary - SUCCESS ==

  No regressions found.

  

== Known issues ==

  Here are the changes found in Patchwork_10653_full that come from known issues:

  === IGT changes ===

    ==== Issues hit ====

    igt@gem_ctx_isolation@bcs0-s3:
      shard-skl:          PASS -> INCOMPLETE (fdo#107773, fdo#104108)

    igt@gem_ppgtt@blt-vs-render-ctxn:
      shard-skl:          NOTRUN -> TIMEOUT (fdo#108039)

    igt@kms_color@pipe-c-ctm-green-to-red:
      shard-skl:          PASS -> FAIL (fdo#107201)

    igt@kms_cursor_crc@cursor-128x42-random:
      shard-glk:          PASS -> FAIL (fdo#103232) +1

    igt@kms_cursor_crc@cursor-256x256-offscreen:
      shard-skl:          PASS -> FAIL (fdo#103232)

    igt@kms_cursor_crc@cursor-64x21-onscreen:
      shard-apl:          PASS -> FAIL (fdo#103232)

    igt@kms_cursor_crc@cursor-64x64-suspend:
      shard-apl:          PASS -> FAIL (fdo#103191, fdo#103232)

    igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-render:
      shard-apl:          PASS -> FAIL (fdo#103167) +2

    igt@kms_frontbuffer_tracking@fbc-2p-primscrn-cur-indfb-draw-mmap-cpu:
      shard-glk:          PASS -> FAIL (fdo#103167) +4

    igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-spr-indfb-move:
      shard-skl:          NOTRUN -> FAIL (fdo#103167)

    igt@kms_frontbuffer_tracking@fbcpsr-stridechange:
      shard-skl:          NOTRUN -> FAIL (fdo#105683)

    igt@kms_plane@plane-position-covered-pipe-b-planes:
      shard-glk:          PASS -> FAIL (fdo#103166) +1

    igt@kms_plane_alpha_blend@pipe-a-alpha-7efc:
      shard-apl:          NOTRUN -> FAIL (fdo#108145) +1

    igt@kms_plane_alpha_blend@pipe-b-alpha-transparant-fb:
      shard-skl:          NOTRUN -> FAIL (fdo#108145)

    igt@kms_plane_multiple@atomic-pipe-b-tiling-x:
      shard-apl:          PASS -> FAIL (fdo#103166) +3

    igt@kms_setmode@basic:
      shard-skl:          NOTRUN -> FAIL (fdo#99912)

    
    ==== Possible fixes ====

    igt@gem_ctx_isolation@rcs0-none:
      shard-snb:          INCOMPLETE (fdo#105411) -> PASS

    igt@gem_ppgtt@blt-vs-render-ctxn:
      shard-kbl:          INCOMPLETE (fdo#106023, fdo#103665, fdo#106887) -> PASS

    igt@kms_color@pipe-a-ctm-max:
      shard-apl:          FAIL (fdo#108147) -> PASS

    igt@kms_cursor_crc@cursor-256x85-onscreen:
      shard-glk:          FAIL (fdo#103232) -> PASS +1

    igt@kms_cursor_crc@cursor-256x85-random:
      shard-apl:          FAIL (fdo#103232) -> PASS +1

    igt@kms_fbcon_fbt@fbc-suspend:
      shard-apl:          INCOMPLETE (fdo#103927) -> PASS +2

    igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-blt:
      shard-glk:          FAIL (fdo#103167) -> PASS +2

    igt@kms_frontbuffer_tracking@fbc-2p-rte:
      shard-glk:          FAIL (fdo#105682, fdo#103167) -> PASS

    igt@kms_plane_multiple@atomic-pipe-a-tiling-yf:
      shard-glk:          FAIL (fdo#103166) -> PASS

    igt@kms_plane_multiple@atomic-pipe-c-tiling-yf:
      shard-apl:          FAIL (fdo#103166) -> PASS +2

    igt@kms_setmode@basic:
      shard-kbl:          FAIL (fdo#99912) -> PASS

    
  fdo#103166 https://bugs.freedesktop.org/show_bug.cgi?id=103166
  fdo#103167 https://bugs.freedesktop.org/show_bug.cgi?id=103167
  fdo#103191 https://bugs.freedesktop.org/show_bug.cgi?id=103191
  fdo#103232 https://bugs.freedesktop.org/show_bug.cgi?id=103232
  fdo#103665 https://bugs.freedesktop.org/show_bug.cgi?id=103665
  fdo#103927 https://bugs.freedesktop.org/show_bug.cgi?id=103927
  fdo#104108 https://bugs.freedesktop.org/show_bug.cgi?id=104108
  fdo#105411 https://bugs.freedesktop.org/show_bug.cgi?id=105411
  fdo#105682 https://bugs.freedesktop.org/show_bug.cgi?id=105682
  fdo#105683 https://bugs.freedesktop.org/show_bug.cgi?id=105683
  fdo#106023 https://bugs.freedesktop.org/show_bug.cgi?id=106023
  fdo#106887 https://bugs.freedesktop.org/show_bug.cgi?id=106887
  fdo#107201 https://bugs.freedesktop.org/show_bug.cgi?id=107201
  fdo#107773 https://bugs.freedesktop.org/show_bug.cgi?id=107773
  fdo#108039 https://bugs.freedesktop.org/show_bug.cgi?id=108039
  fdo#108145 https://bugs.freedesktop.org/show_bug.cgi?id=108145
  fdo#108147 https://bugs.freedesktop.org/show_bug.cgi?id=108147
  fdo#99912 https://bugs.freedesktop.org/show_bug.cgi?id=99912


== Participating hosts (6 -> 6) ==

  No changes in participating hosts


== Build changes ==

    * Linux: CI_DRM_5057 -> Patchwork_10653

  CI_DRM_5057: fd1827d4a1cb142452a3107f5e337043cabd56f4 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_4701: 3aedf1b000e27abfa1bf179205a81efe2b76a508 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_10653: cb36ad65b0b148dc379988005841a5b155a198bd @ git://anongit.freedesktop.org/gfx-ci/linux
  piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_10653/shards.html
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