* [U-Boot] [PATCH] pinctrl: renesas: Fix DRV register offset
@ 2018-10-31 17:13 Marek Vasut
0 siblings, 0 replies; only message in thread
From: Marek Vasut @ 2018-10-31 17:13 UTC (permalink / raw)
To: u-boot
Use fixed 4bit size for generating the DRV register element mask,
not the size of the value, which can be smaller.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
---
drivers/pinctrl/renesas/pfc.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/pinctrl/renesas/pfc.c b/drivers/pinctrl/renesas/pfc.c
index 90011537a8..b3a4ff9049 100644
--- a/drivers/pinctrl/renesas/pfc.c
+++ b/drivers/pinctrl/renesas/pfc.c
@@ -591,7 +591,7 @@ static int sh_pfc_pinconf_set_drive_strength(struct sh_pfc *pfc,
strength = strength / step - 1;
val = sh_pfc_read_raw_reg(reg, 32);
- val &= ~GENMASK(offset + size - 1, offset);
+ val &= ~GENMASK(offset + 4 - 1, offset);
val |= strength << offset;
if (unlock_reg)
--
2.18.0
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2018-10-31 17:13 [U-Boot] [PATCH] pinctrl: renesas: Fix DRV register offset Marek Vasut
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