* [PATCH 0/3 v6] Switch Versatile Express to DRM @ 2018-11-12 12:31 ` Linus Walleij 0 siblings, 0 replies; 8+ messages in thread From: Linus Walleij @ 2018-11-12 12:31 UTC (permalink / raw) To: linux-arm-kernel This should finally (famous last words) switch the Versatile Express to use the new PL111 DRM driver. These changes depend on patches queued in the DRM tree, so it should resolve nicely in -next, also you can probably test them easiest by simply applying them on -next. The DTS and defconfig changes should ideally come in lockstep but I guess maybe the ARM maintainers want the DTS changes in one branch and the defconfig updates in another branch. As long as they go in the same merge window all should be fine, they should just be tested together (and with the pending DRM changes). Linus Walleij (3): ARM: dts: Modernize the Vexpress PL111 integration ARM: defconfig: Update the vexpress defconfig ARM: defconfig: Enable the PL111 DRM driver on vexpress arch/arm/boot/dts/vexpress-v2m-rs1.dtsi | 49 +++++---------- arch/arm/boot/dts/vexpress-v2m.dtsi | 63 +++++++++---------- arch/arm/boot/dts/vexpress-v2p-ca15-tc1.dts | 14 +++++ arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts | 14 +++++ arch/arm/boot/dts/vexpress-v2p-ca5s.dts | 14 +++++ arch/arm/boot/dts/vexpress-v2p-ca9.dts | 43 ++++++------- arch/arm/configs/vexpress_defconfig | 24 +++---- arch/arm64/boot/dts/arm/rtsm_ve-aemv8a.dts | 23 +++++++ .../boot/dts/arm/rtsm_ve-motherboard.dtsi | 37 ++--------- .../boot/dts/arm/vexpress-v2f-1xv7-ca53x2.dts | 14 +++++ 10 files changed, 158 insertions(+), 137 deletions(-) -- 2.17.2 ^ permalink raw reply [flat|nested] 8+ messages in thread
* [PATCH 0/3 v6] Switch Versatile Express to DRM @ 2018-11-12 12:31 ` Linus Walleij 0 siblings, 0 replies; 8+ messages in thread From: Linus Walleij @ 2018-11-12 12:31 UTC (permalink / raw) To: Sudeep Holla, Lorenzo Pieralisi, linux-arm-kernel; +Cc: Liviu Dudau, dri-devel This should finally (famous last words) switch the Versatile Express to use the new PL111 DRM driver. These changes depend on patches queued in the DRM tree, so it should resolve nicely in -next, also you can probably test them easiest by simply applying them on -next. The DTS and defconfig changes should ideally come in lockstep but I guess maybe the ARM maintainers want the DTS changes in one branch and the defconfig updates in another branch. As long as they go in the same merge window all should be fine, they should just be tested together (and with the pending DRM changes). Linus Walleij (3): ARM: dts: Modernize the Vexpress PL111 integration ARM: defconfig: Update the vexpress defconfig ARM: defconfig: Enable the PL111 DRM driver on vexpress arch/arm/boot/dts/vexpress-v2m-rs1.dtsi | 49 +++++---------- arch/arm/boot/dts/vexpress-v2m.dtsi | 63 +++++++++---------- arch/arm/boot/dts/vexpress-v2p-ca15-tc1.dts | 14 +++++ arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts | 14 +++++ arch/arm/boot/dts/vexpress-v2p-ca5s.dts | 14 +++++ arch/arm/boot/dts/vexpress-v2p-ca9.dts | 43 ++++++------- arch/arm/configs/vexpress_defconfig | 24 +++---- arch/arm64/boot/dts/arm/rtsm_ve-aemv8a.dts | 23 +++++++ .../boot/dts/arm/rtsm_ve-motherboard.dtsi | 37 ++--------- .../boot/dts/arm/vexpress-v2f-1xv7-ca53x2.dts | 14 +++++ 10 files changed, 158 insertions(+), 137 deletions(-) -- 2.17.2 _______________________________________________ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel ^ permalink raw reply [flat|nested] 8+ messages in thread
* [PATCH 1/3 v6] ARM: dts: Modernize the Vexpress PL111 integration 2018-11-12 12:31 ` Linus Walleij @ 2018-11-12 12:31 ` Linus Walleij -1 siblings, 0 replies; 8+ messages in thread From: Linus Walleij @ 2018-11-12 12:31 UTC (permalink / raw) To: linux-arm-kernel The Versatile Express was submitted with the actual display bridges unconnected (but defined in the device tree) and mock "panels" encoded in the device tree node of the PL111 controller. This doesn't even remotely describe the actual Versatile Express hardware. Exploit the SiI9022 bridge by connecting the PL111 pads to it, making it use EDID or fallback values to drive the monitor. The also has to use the reserved memory through the CMA pool rather than by open coding a memory region and remapping it explicitly in the driver. To achieve this, a reserved-memory node must exist in the root of the device tree, so we need to pull that out of the motherboard .dtsi include files, and push it into each top-level device tree instead. We do the same manouver for all the Versatile Express boards, taking into account the different location of the video RAM depending on which chip select is used on each platform. This plays nicely with the new PL111 DRM driver and follows the standard ways of assigning bridges and memory pools for graphics. Cc: Sudeep Holla <sudeep.holla@arm.com> Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Cc: Liviu Dudau <liviu.dudau@arm.com> Cc: Mali DP Maintainers <malidp@foss.arm.com> Cc: Robin Murphy <robin.murphy@arm.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> --- ChangeLog v5->v6: - Change the panel in the RTSMv8 to the simple panel "arm,rtsmv8-panel" simply. ChangeLog v4->v5: - Fix up the RTSMv8 AEM VE by using the new simple VGA panel I invented in the DRI simple panel. - NOTE: This patch depends at runtime on the DRM simple panel patch "drm/panel: simple: Support simple VGA panels" ChangeLog v3->v4: - Fix the ARM and ARM64 shared vexpress-v2m-rc1.dtsi file address-cells etc so that the ports do not give DTC warnings anymore. - Fixed up the CA53 DTS: use the right chip select base at 0x18000000. - Fixed up the Real-Time Systems Models Virtual Executive RTSMv8 AEM VE: - Added the I2C interface (whether implemented in the emulator or not) - Fixed the chip select of the memory node to the right memory base 0x18000000. - Add right address-cells and size-cells to the vexpress-v2m.dtsi dvi port as well. - Create two endpoints for the motherboard and the core tile in the vexpress-v2m.dtsi. This is just used by the CA9 VExpress. Tested on both QEMU and the actual hardware with the DRM driver. This removes the last warnings from the DTC. ChangeLog v2->v3: - Add some reg = <0>; to the ports to make the DTC happy. - Add reserved memory node to arch/arm64/boot/dts/arm/vexpress-v2f-1xv7-ca53x2.dts as well. ChangeLog v1->v2: - Fix up the memory address for the -rs1 tiles to 0x18000000 - Drop a bunch of extraneous reg props from the DVI adapter --- arch/arm/boot/dts/vexpress-v2m-rs1.dtsi | 49 +++++---------- arch/arm/boot/dts/vexpress-v2m.dtsi | 63 +++++++++---------- arch/arm/boot/dts/vexpress-v2p-ca15-tc1.dts | 14 +++++ arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts | 14 +++++ arch/arm/boot/dts/vexpress-v2p-ca5s.dts | 14 +++++ arch/arm/boot/dts/vexpress-v2p-ca9.dts | 43 ++++++------- arch/arm64/boot/dts/arm/rtsm_ve-aemv8a.dts | 23 +++++++ .../boot/dts/arm/rtsm_ve-motherboard.dtsi | 37 ++--------- .../boot/dts/arm/vexpress-v2f-1xv7-ca53x2.dts | 14 +++++ 9 files changed, 150 insertions(+), 121 deletions(-) diff --git a/arch/arm/boot/dts/vexpress-v2m-rs1.dtsi b/arch/arm/boot/dts/vexpress-v2m-rs1.dtsi index 4488c8fe213a..a9569d15de41 100644 --- a/arch/arm/boot/dts/vexpress-v2m-rs1.dtsi +++ b/arch/arm/boot/dts/vexpress-v2m-rs1.dtsi @@ -43,11 +43,6 @@ bank-width = <4>; }; - v2m_video_ram: vram at 2,00000000 { - compatible = "arm,vexpress-vram"; - reg = <2 0x00000000 0x00800000>; - }; - ethernet at 2,02000000 { compatible = "smsc,lan9118", "smsc,lan9115"; reg = <2 0x02000000 0x10000>; @@ -223,13 +218,24 @@ v2m_i2c_dvi: i2c at 160000 { compatible = "arm,versatile-i2c"; reg = <0x160000 0x1000>; - #address-cells = <1>; #size-cells = <0>; dvi-transmitter at 39 { compatible = "sil,sii9022-tpi", "sil,sii9022"; reg = <0x39>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port at 0 { + reg = <0>; + dvi_bridge_in: endpoint { + remote-endpoint = <&clcd_pads>; + }; + }; + }; }; dvi-transmitter at 60 { @@ -260,37 +266,16 @@ interrupts = <14>; clocks = <&v2m_oscclk1>, <&smbclk>; clock-names = "clcdclk", "apb_pclk"; - memory-region = <&v2m_video_ram>; - max-memory-bandwidth = <50350000>; /* 16bpp @ 25.175MHz */ + /* 800x600 16bpp @36MHz works fine */ + max-memory-bandwidth = <54000000>; + memory-region = <&vram>; port { - v2m_clcd_pads: endpoint { - remote-endpoint = <&v2m_clcd_panel>; + clcd_pads: endpoint { + remote-endpoint = <&dvi_bridge_in>; arm,pl11x,tft-r0g0b0-pads = <0 8 16>; }; }; - - panel { - compatible = "panel-dpi"; - - port { - v2m_clcd_panel: endpoint { - remote-endpoint = <&v2m_clcd_pads>; - }; - }; - - panel-timing { - clock-frequency = <25175000>; - hactive = <640>; - hback-porch = <40>; - hfront-porch = <24>; - hsync-len = <96>; - vactive = <480>; - vback-porch = <32>; - vfront-porch = <11>; - vsync-len = <2>; - }; - }; }; }; diff --git a/arch/arm/boot/dts/vexpress-v2m.dtsi b/arch/arm/boot/dts/vexpress-v2m.dtsi index 4db42f6326a3..fd42e1194179 100644 --- a/arch/arm/boot/dts/vexpress-v2m.dtsi +++ b/arch/arm/boot/dts/vexpress-v2m.dtsi @@ -43,11 +43,6 @@ bank-width = <4>; }; - v2m_video_ram: vram at 3,00000000 { - compatible = "arm,vexpress-vram"; - reg = <3 0x00000000 0x00800000>; - }; - ethernet at 3,02000000 { compatible = "smsc,lan9118", "smsc,lan9115"; reg = <3 0x02000000 0x10000>; @@ -223,13 +218,37 @@ v2m_i2c_dvi: i2c at 16000 { compatible = "arm,versatile-i2c"; reg = <0x16000 0x1000>; - #address-cells = <1>; #size-cells = <0>; dvi-transmitter at 39 { compatible = "sil,sii9022-tpi", "sil,sii9022"; reg = <0x39>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + /* + * Both the core tile and the motherboard routes their output + * pads to this transmitter. The motherboard system controller + * can select one of them as input using a mux register in + * "arm,vexpress-muxfpga". The Vexpress with the CA9 core tile is + * the only platform with this specific set-up. + */ + port at 0 { + reg = <0>; + dvi_bridge_in_ct: endpoint { + remote-endpoint = <&clcd_pads_ct>; + }; + }; + port at 1 { + reg = <1>; + dvi_bridge_in_mb: endpoint { + remote-endpoint = <&clcd_pads_mb>; + }; + }; + }; }; dvi-transmitter at 60 { @@ -253,6 +272,7 @@ reg-shift = <2>; }; + clcd at 1f000 { compatible = "arm,pl111", "arm,primecell"; reg = <0x1f000 0x1000>; @@ -260,37 +280,16 @@ interrupts = <14>; clocks = <&v2m_oscclk1>, <&smbclk>; clock-names = "clcdclk", "apb_pclk"; - memory-region = <&v2m_video_ram>; - max-memory-bandwidth = <50350000>; /* 16bpp @ 25.175MHz */ + /* 800x600 16bpp @36MHz works fine */ + max-memory-bandwidth = <54000000>; + memory-region = <&vram>; port { - v2m_clcd_pads: endpoint { - remote-endpoint = <&v2m_clcd_panel>; + clcd_pads_mb: endpoint { + remote-endpoint = <&dvi_bridge_in_mb>; arm,pl11x,tft-r0g0b0-pads = <0 8 16>; }; }; - - panel { - compatible = "panel-dpi"; - - port { - v2m_clcd_panel: endpoint { - remote-endpoint = <&v2m_clcd_pads>; - }; - }; - - panel-timing { - clock-frequency = <25175000>; - hactive = <640>; - hback-porch = <40>; - hfront-porch = <24>; - hsync-len = <96>; - vactive = <480>; - vback-porch = <32>; - vfront-porch = <11>; - vsync-len = <2>; - }; - }; }; }; diff --git a/arch/arm/boot/dts/vexpress-v2p-ca15-tc1.dts b/arch/arm/boot/dts/vexpress-v2p-ca15-tc1.dts index 3971427a105b..0dc4277d5f8b 100644 --- a/arch/arm/boot/dts/vexpress-v2p-ca15-tc1.dts +++ b/arch/arm/boot/dts/vexpress-v2p-ca15-tc1.dts @@ -53,6 +53,20 @@ reg = <0 0x80000000 0 0x40000000>; }; + reserved-memory { + #address-cells = <2>; + #size-cells = <2>; + ranges; + + /* Chipselect 2 is physically at 0x18000000 */ + vram: vram at 18000000 { + /* 8 MB of designated video RAM */ + compatible = "shared-dma-pool"; + reg = <0 0x18000000 0 0x00800000>; + no-map; + }; + }; + hdlcd at 2b000000 { compatible = "arm,hdlcd"; reg = <0 0x2b000000 0 0x1000>; diff --git a/arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts b/arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts index ac6b90e9d806..a5136b1adaa2 100644 --- a/arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts +++ b/arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts @@ -104,6 +104,20 @@ reg = <0 0x80000000 0 0x40000000>; }; + reserved-memory { + #address-cells = <2>; + #size-cells = <2>; + ranges; + + /* Chipselect 2 is physically at 0x18000000 */ + vram: vram at 18000000 { + /* 8 MB of designated video RAM */ + compatible = "shared-dma-pool"; + reg = <0 0x18000000 0 0x00800000>; + no-map; + }; + }; + wdt at 2a490000 { compatible = "arm,sp805", "arm,primecell"; reg = <0 0x2a490000 0 0x1000>; diff --git a/arch/arm/boot/dts/vexpress-v2p-ca5s.dts b/arch/arm/boot/dts/vexpress-v2p-ca5s.dts index e5b4a7570a01..d5b47d526f9e 100644 --- a/arch/arm/boot/dts/vexpress-v2p-ca5s.dts +++ b/arch/arm/boot/dts/vexpress-v2p-ca5s.dts @@ -55,6 +55,20 @@ reg = <0x80000000 0x40000000>; }; + reserved-memory { + #address-cells = <1>; + #size-cells = <1>; + ranges; + + /* Chipselect 2 is physically at 0x18000000 */ + vram: vram at 18000000 { + /* 8 MB of designated video RAM */ + compatible = "shared-dma-pool"; + reg = <0x18000000 0x00800000>; + no-map; + }; + }; + hdlcd at 2a110000 { compatible = "arm,hdlcd"; reg = <0x2a110000 0x1000>; diff --git a/arch/arm/boot/dts/vexpress-v2p-ca9.dts b/arch/arm/boot/dts/vexpress-v2p-ca9.dts index 7ec3dac1f61d..7f019e0eee84 100644 --- a/arch/arm/boot/dts/vexpress-v2p-ca9.dts +++ b/arch/arm/boot/dts/vexpress-v2p-ca9.dts @@ -69,6 +69,20 @@ reg = <0x60000000 0x40000000>; }; + reserved-memory { + #address-cells = <1>; + #size-cells = <1>; + ranges; + + /* Chipselect 3 is physically at 0x4c000000 */ + vram: vram at 4c000000 { + /* 8 MB of designated video RAM */ + compatible = "shared-dma-pool"; + reg = <0x4c000000 0x00800000>; + no-map; + }; + }; + clcd at 10020000 { compatible = "arm,pl111", "arm,primecell"; reg = <0x10020000 0x1000>; @@ -76,36 +90,15 @@ interrupts = <0 44 4>; clocks = <&oscclk1>, <&oscclk2>; clock-names = "clcdclk", "apb_pclk"; - max-memory-bandwidth = <130000000>; /* 16bpp @ 63.5MHz */ + /* 1024x768 16bpp @65MHz */ + max-memory-bandwidth = <95000000>; port { - clcd_pads: endpoint { - remote-endpoint = <&clcd_panel>; + clcd_pads_ct: endpoint { + remote-endpoint = <&dvi_bridge_in_ct>; arm,pl11x,tft-r0g0b0-pads = <0 8 16>; }; }; - - panel { - compatible = "panel-dpi"; - - port { - clcd_panel: endpoint { - remote-endpoint = <&clcd_pads>; - }; - }; - - panel-timing { - clock-frequency = <63500127>; - hactive = <1024>; - hback-porch = <152>; - hfront-porch = <48>; - hsync-len = <104>; - vactive = <768>; - vback-porch = <23>; - vfront-porch = <3>; - vsync-len = <4>; - }; - }; }; memory-controller at 100e0000 { diff --git a/arch/arm64/boot/dts/arm/rtsm_ve-aemv8a.dts b/arch/arm64/boot/dts/arm/rtsm_ve-aemv8a.dts index 602f63f72c37..fe4fda473c0a 100644 --- a/arch/arm64/boot/dts/arm/rtsm_ve-aemv8a.dts +++ b/arch/arm64/boot/dts/arm/rtsm_ve-aemv8a.dts @@ -78,6 +78,20 @@ <0x00000008 0x80000000 0 0x80000000>; }; + reserved-memory { + #address-cells = <2>; + #size-cells = <2>; + ranges; + + /* Chipselect 2,00000000 is physically at 0x18000000 */ + vram: vram at 18000000 { + /* 8 MB of designated video RAM */ + compatible = "shared-dma-pool"; + reg = <0x00000000 0x18000000 0 0x00800000>; + no-map; + }; + }; + gic: interrupt-controller at 2c001000 { compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic"; #interrupt-cells = <3>; @@ -107,6 +121,15 @@ <0 63 4>; }; + panel { + compatible = "arm,rtsm-display"; + port { + panel_in: endpoint { + remote-endpoint = <&clcd_pads>; + }; + }; + }; + smb at 8000000 { compatible = "simple-bus"; diff --git a/arch/arm64/boot/dts/arm/rtsm_ve-motherboard.dtsi b/arch/arm64/boot/dts/arm/rtsm_ve-motherboard.dtsi index d2dbc3f39263..b25f3cbd3da8 100644 --- a/arch/arm64/boot/dts/arm/rtsm_ve-motherboard.dtsi +++ b/arch/arm64/boot/dts/arm/rtsm_ve-motherboard.dtsi @@ -24,11 +24,6 @@ bank-width = <4>; }; - v2m_video_ram: vram at 2,00000000 { - compatible = "arm,vexpress-vram"; - reg = <2 0x00000000 0x00800000>; - }; - ethernet at 2,02000000 { compatible = "smsc,lan91c111"; reg = <2 0x02000000 0x10000>; @@ -187,38 +182,16 @@ interrupts = <14>; clocks = <&v2m_oscclk1>, <&v2m_clk24mhz>; clock-names = "clcdclk", "apb_pclk"; - arm,pl11x,framebuffer = <0x18000000 0x00180000>; - memory-region = <&v2m_video_ram>; - max-memory-bandwidth = <130000000>; /* 16bpp @ 63.5MHz */ + /* 800x600 16bpp @36MHz works fine */ + max-memory-bandwidth = <54000000>; + memory-region = <&vram>; port { - v2m_clcd_pads: endpoint { - remote-endpoint = <&v2m_clcd_panel>; + clcd_pads: endpoint { + remote-endpoint = <&panel_in>; arm,pl11x,tft-r0g0b0-pads = <0 8 16>; }; }; - - panel { - compatible = "panel-dpi"; - - port { - v2m_clcd_panel: endpoint { - remote-endpoint = <&v2m_clcd_pads>; - }; - }; - - panel-timing { - clock-frequency = <63500127>; - hactive = <1024>; - hback-porch = <152>; - hfront-porch = <48>; - hsync-len = <104>; - vactive = <768>; - vback-porch = <23>; - vfront-porch = <3>; - vsync-len = <4>; - }; - }; }; virtio-block at 130000 { diff --git a/arch/arm64/boot/dts/arm/vexpress-v2f-1xv7-ca53x2.dts b/arch/arm64/boot/dts/arm/vexpress-v2f-1xv7-ca53x2.dts index 38880380e0fa..8981c3d2ff18 100644 --- a/arch/arm64/boot/dts/arm/vexpress-v2f-1xv7-ca53x2.dts +++ b/arch/arm64/boot/dts/arm/vexpress-v2f-1xv7-ca53x2.dts @@ -65,6 +65,20 @@ reg = <0 0x80000000 0 0x80000000>; /* 2GB @ 2GB */ }; + reserved-memory { + #address-cells = <2>; + #size-cells = <2>; + ranges; + + /* Chipselect 2 is physically at 0x18000000 */ + vram: vram at 18000000 { + /* 8 MB of designated video RAM */ + compatible = "shared-dma-pool"; + reg = <0 0x18000000 0 0x00800000>; + no-map; + }; + }; + gic: interrupt-controller at 2c001000 { compatible = "arm,gic-400"; #interrupt-cells = <3>; -- 2.17.2 ^ permalink raw reply related [flat|nested] 8+ messages in thread
* [PATCH 1/3 v6] ARM: dts: Modernize the Vexpress PL111 integration @ 2018-11-12 12:31 ` Linus Walleij 0 siblings, 0 replies; 8+ messages in thread From: Linus Walleij @ 2018-11-12 12:31 UTC (permalink / raw) To: Sudeep Holla, Lorenzo Pieralisi, linux-arm-kernel Cc: Liviu Dudau, dri-devel, Mali DP Maintainers, Robin Murphy The Versatile Express was submitted with the actual display bridges unconnected (but defined in the device tree) and mock "panels" encoded in the device tree node of the PL111 controller. This doesn't even remotely describe the actual Versatile Express hardware. Exploit the SiI9022 bridge by connecting the PL111 pads to it, making it use EDID or fallback values to drive the monitor. The also has to use the reserved memory through the CMA pool rather than by open coding a memory region and remapping it explicitly in the driver. To achieve this, a reserved-memory node must exist in the root of the device tree, so we need to pull that out of the motherboard .dtsi include files, and push it into each top-level device tree instead. We do the same manouver for all the Versatile Express boards, taking into account the different location of the video RAM depending on which chip select is used on each platform. This plays nicely with the new PL111 DRM driver and follows the standard ways of assigning bridges and memory pools for graphics. Cc: Sudeep Holla <sudeep.holla@arm.com> Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Cc: Liviu Dudau <liviu.dudau@arm.com> Cc: Mali DP Maintainers <malidp@foss.arm.com> Cc: Robin Murphy <robin.murphy@arm.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> --- ChangeLog v5->v6: - Change the panel in the RTSMv8 to the simple panel "arm,rtsmv8-panel" simply. ChangeLog v4->v5: - Fix up the RTSMv8 AEM VE by using the new simple VGA panel I invented in the DRI simple panel. - NOTE: This patch depends at runtime on the DRM simple panel patch "drm/panel: simple: Support simple VGA panels" ChangeLog v3->v4: - Fix the ARM and ARM64 shared vexpress-v2m-rc1.dtsi file address-cells etc so that the ports do not give DTC warnings anymore. - Fixed up the CA53 DTS: use the right chip select base at 0x18000000. - Fixed up the Real-Time Systems Models Virtual Executive RTSMv8 AEM VE: - Added the I2C interface (whether implemented in the emulator or not) - Fixed the chip select of the memory node to the right memory base 0x18000000. - Add right address-cells and size-cells to the vexpress-v2m.dtsi dvi port as well. - Create two endpoints for the motherboard and the core tile in the vexpress-v2m.dtsi. This is just used by the CA9 VExpress. Tested on both QEMU and the actual hardware with the DRM driver. This removes the last warnings from the DTC. ChangeLog v2->v3: - Add some reg = <0>; to the ports to make the DTC happy. - Add reserved memory node to arch/arm64/boot/dts/arm/vexpress-v2f-1xv7-ca53x2.dts as well. ChangeLog v1->v2: - Fix up the memory address for the -rs1 tiles to 0x18000000 - Drop a bunch of extraneous reg props from the DVI adapter --- arch/arm/boot/dts/vexpress-v2m-rs1.dtsi | 49 +++++---------- arch/arm/boot/dts/vexpress-v2m.dtsi | 63 +++++++++---------- arch/arm/boot/dts/vexpress-v2p-ca15-tc1.dts | 14 +++++ arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts | 14 +++++ arch/arm/boot/dts/vexpress-v2p-ca5s.dts | 14 +++++ arch/arm/boot/dts/vexpress-v2p-ca9.dts | 43 ++++++------- arch/arm64/boot/dts/arm/rtsm_ve-aemv8a.dts | 23 +++++++ .../boot/dts/arm/rtsm_ve-motherboard.dtsi | 37 ++--------- .../boot/dts/arm/vexpress-v2f-1xv7-ca53x2.dts | 14 +++++ 9 files changed, 150 insertions(+), 121 deletions(-) diff --git a/arch/arm/boot/dts/vexpress-v2m-rs1.dtsi b/arch/arm/boot/dts/vexpress-v2m-rs1.dtsi index 4488c8fe213a..a9569d15de41 100644 --- a/arch/arm/boot/dts/vexpress-v2m-rs1.dtsi +++ b/arch/arm/boot/dts/vexpress-v2m-rs1.dtsi @@ -43,11 +43,6 @@ bank-width = <4>; }; - v2m_video_ram: vram@2,00000000 { - compatible = "arm,vexpress-vram"; - reg = <2 0x00000000 0x00800000>; - }; - ethernet@2,02000000 { compatible = "smsc,lan9118", "smsc,lan9115"; reg = <2 0x02000000 0x10000>; @@ -223,13 +218,24 @@ v2m_i2c_dvi: i2c@160000 { compatible = "arm,versatile-i2c"; reg = <0x160000 0x1000>; - #address-cells = <1>; #size-cells = <0>; dvi-transmitter@39 { compatible = "sil,sii9022-tpi", "sil,sii9022"; reg = <0x39>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + dvi_bridge_in: endpoint { + remote-endpoint = <&clcd_pads>; + }; + }; + }; }; dvi-transmitter@60 { @@ -260,37 +266,16 @@ interrupts = <14>; clocks = <&v2m_oscclk1>, <&smbclk>; clock-names = "clcdclk", "apb_pclk"; - memory-region = <&v2m_video_ram>; - max-memory-bandwidth = <50350000>; /* 16bpp @ 25.175MHz */ + /* 800x600 16bpp @36MHz works fine */ + max-memory-bandwidth = <54000000>; + memory-region = <&vram>; port { - v2m_clcd_pads: endpoint { - remote-endpoint = <&v2m_clcd_panel>; + clcd_pads: endpoint { + remote-endpoint = <&dvi_bridge_in>; arm,pl11x,tft-r0g0b0-pads = <0 8 16>; }; }; - - panel { - compatible = "panel-dpi"; - - port { - v2m_clcd_panel: endpoint { - remote-endpoint = <&v2m_clcd_pads>; - }; - }; - - panel-timing { - clock-frequency = <25175000>; - hactive = <640>; - hback-porch = <40>; - hfront-porch = <24>; - hsync-len = <96>; - vactive = <480>; - vback-porch = <32>; - vfront-porch = <11>; - vsync-len = <2>; - }; - }; }; }; diff --git a/arch/arm/boot/dts/vexpress-v2m.dtsi b/arch/arm/boot/dts/vexpress-v2m.dtsi index 4db42f6326a3..fd42e1194179 100644 --- a/arch/arm/boot/dts/vexpress-v2m.dtsi +++ b/arch/arm/boot/dts/vexpress-v2m.dtsi @@ -43,11 +43,6 @@ bank-width = <4>; }; - v2m_video_ram: vram@3,00000000 { - compatible = "arm,vexpress-vram"; - reg = <3 0x00000000 0x00800000>; - }; - ethernet@3,02000000 { compatible = "smsc,lan9118", "smsc,lan9115"; reg = <3 0x02000000 0x10000>; @@ -223,13 +218,37 @@ v2m_i2c_dvi: i2c@16000 { compatible = "arm,versatile-i2c"; reg = <0x16000 0x1000>; - #address-cells = <1>; #size-cells = <0>; dvi-transmitter@39 { compatible = "sil,sii9022-tpi", "sil,sii9022"; reg = <0x39>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + /* + * Both the core tile and the motherboard routes their output + * pads to this transmitter. The motherboard system controller + * can select one of them as input using a mux register in + * "arm,vexpress-muxfpga". The Vexpress with the CA9 core tile is + * the only platform with this specific set-up. + */ + port@0 { + reg = <0>; + dvi_bridge_in_ct: endpoint { + remote-endpoint = <&clcd_pads_ct>; + }; + }; + port@1 { + reg = <1>; + dvi_bridge_in_mb: endpoint { + remote-endpoint = <&clcd_pads_mb>; + }; + }; + }; }; dvi-transmitter@60 { @@ -253,6 +272,7 @@ reg-shift = <2>; }; + clcd@1f000 { compatible = "arm,pl111", "arm,primecell"; reg = <0x1f000 0x1000>; @@ -260,37 +280,16 @@ interrupts = <14>; clocks = <&v2m_oscclk1>, <&smbclk>; clock-names = "clcdclk", "apb_pclk"; - memory-region = <&v2m_video_ram>; - max-memory-bandwidth = <50350000>; /* 16bpp @ 25.175MHz */ + /* 800x600 16bpp @36MHz works fine */ + max-memory-bandwidth = <54000000>; + memory-region = <&vram>; port { - v2m_clcd_pads: endpoint { - remote-endpoint = <&v2m_clcd_panel>; + clcd_pads_mb: endpoint { + remote-endpoint = <&dvi_bridge_in_mb>; arm,pl11x,tft-r0g0b0-pads = <0 8 16>; }; }; - - panel { - compatible = "panel-dpi"; - - port { - v2m_clcd_panel: endpoint { - remote-endpoint = <&v2m_clcd_pads>; - }; - }; - - panel-timing { - clock-frequency = <25175000>; - hactive = <640>; - hback-porch = <40>; - hfront-porch = <24>; - hsync-len = <96>; - vactive = <480>; - vback-porch = <32>; - vfront-porch = <11>; - vsync-len = <2>; - }; - }; }; }; diff --git a/arch/arm/boot/dts/vexpress-v2p-ca15-tc1.dts b/arch/arm/boot/dts/vexpress-v2p-ca15-tc1.dts index 3971427a105b..0dc4277d5f8b 100644 --- a/arch/arm/boot/dts/vexpress-v2p-ca15-tc1.dts +++ b/arch/arm/boot/dts/vexpress-v2p-ca15-tc1.dts @@ -53,6 +53,20 @@ reg = <0 0x80000000 0 0x40000000>; }; + reserved-memory { + #address-cells = <2>; + #size-cells = <2>; + ranges; + + /* Chipselect 2 is physically at 0x18000000 */ + vram: vram@18000000 { + /* 8 MB of designated video RAM */ + compatible = "shared-dma-pool"; + reg = <0 0x18000000 0 0x00800000>; + no-map; + }; + }; + hdlcd@2b000000 { compatible = "arm,hdlcd"; reg = <0 0x2b000000 0 0x1000>; diff --git a/arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts b/arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts index ac6b90e9d806..a5136b1adaa2 100644 --- a/arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts +++ b/arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts @@ -104,6 +104,20 @@ reg = <0 0x80000000 0 0x40000000>; }; + reserved-memory { + #address-cells = <2>; + #size-cells = <2>; + ranges; + + /* Chipselect 2 is physically at 0x18000000 */ + vram: vram@18000000 { + /* 8 MB of designated video RAM */ + compatible = "shared-dma-pool"; + reg = <0 0x18000000 0 0x00800000>; + no-map; + }; + }; + wdt@2a490000 { compatible = "arm,sp805", "arm,primecell"; reg = <0 0x2a490000 0 0x1000>; diff --git a/arch/arm/boot/dts/vexpress-v2p-ca5s.dts b/arch/arm/boot/dts/vexpress-v2p-ca5s.dts index e5b4a7570a01..d5b47d526f9e 100644 --- a/arch/arm/boot/dts/vexpress-v2p-ca5s.dts +++ b/arch/arm/boot/dts/vexpress-v2p-ca5s.dts @@ -55,6 +55,20 @@ reg = <0x80000000 0x40000000>; }; + reserved-memory { + #address-cells = <1>; + #size-cells = <1>; + ranges; + + /* Chipselect 2 is physically at 0x18000000 */ + vram: vram@18000000 { + /* 8 MB of designated video RAM */ + compatible = "shared-dma-pool"; + reg = <0x18000000 0x00800000>; + no-map; + }; + }; + hdlcd@2a110000 { compatible = "arm,hdlcd"; reg = <0x2a110000 0x1000>; diff --git a/arch/arm/boot/dts/vexpress-v2p-ca9.dts b/arch/arm/boot/dts/vexpress-v2p-ca9.dts index 7ec3dac1f61d..7f019e0eee84 100644 --- a/arch/arm/boot/dts/vexpress-v2p-ca9.dts +++ b/arch/arm/boot/dts/vexpress-v2p-ca9.dts @@ -69,6 +69,20 @@ reg = <0x60000000 0x40000000>; }; + reserved-memory { + #address-cells = <1>; + #size-cells = <1>; + ranges; + + /* Chipselect 3 is physically at 0x4c000000 */ + vram: vram@4c000000 { + /* 8 MB of designated video RAM */ + compatible = "shared-dma-pool"; + reg = <0x4c000000 0x00800000>; + no-map; + }; + }; + clcd@10020000 { compatible = "arm,pl111", "arm,primecell"; reg = <0x10020000 0x1000>; @@ -76,36 +90,15 @@ interrupts = <0 44 4>; clocks = <&oscclk1>, <&oscclk2>; clock-names = "clcdclk", "apb_pclk"; - max-memory-bandwidth = <130000000>; /* 16bpp @ 63.5MHz */ + /* 1024x768 16bpp @65MHz */ + max-memory-bandwidth = <95000000>; port { - clcd_pads: endpoint { - remote-endpoint = <&clcd_panel>; + clcd_pads_ct: endpoint { + remote-endpoint = <&dvi_bridge_in_ct>; arm,pl11x,tft-r0g0b0-pads = <0 8 16>; }; }; - - panel { - compatible = "panel-dpi"; - - port { - clcd_panel: endpoint { - remote-endpoint = <&clcd_pads>; - }; - }; - - panel-timing { - clock-frequency = <63500127>; - hactive = <1024>; - hback-porch = <152>; - hfront-porch = <48>; - hsync-len = <104>; - vactive = <768>; - vback-porch = <23>; - vfront-porch = <3>; - vsync-len = <4>; - }; - }; }; memory-controller@100e0000 { diff --git a/arch/arm64/boot/dts/arm/rtsm_ve-aemv8a.dts b/arch/arm64/boot/dts/arm/rtsm_ve-aemv8a.dts index 602f63f72c37..fe4fda473c0a 100644 --- a/arch/arm64/boot/dts/arm/rtsm_ve-aemv8a.dts +++ b/arch/arm64/boot/dts/arm/rtsm_ve-aemv8a.dts @@ -78,6 +78,20 @@ <0x00000008 0x80000000 0 0x80000000>; }; + reserved-memory { + #address-cells = <2>; + #size-cells = <2>; + ranges; + + /* Chipselect 2,00000000 is physically at 0x18000000 */ + vram: vram@18000000 { + /* 8 MB of designated video RAM */ + compatible = "shared-dma-pool"; + reg = <0x00000000 0x18000000 0 0x00800000>; + no-map; + }; + }; + gic: interrupt-controller@2c001000 { compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic"; #interrupt-cells = <3>; @@ -107,6 +121,15 @@ <0 63 4>; }; + panel { + compatible = "arm,rtsm-display"; + port { + panel_in: endpoint { + remote-endpoint = <&clcd_pads>; + }; + }; + }; + smb@8000000 { compatible = "simple-bus"; diff --git a/arch/arm64/boot/dts/arm/rtsm_ve-motherboard.dtsi b/arch/arm64/boot/dts/arm/rtsm_ve-motherboard.dtsi index d2dbc3f39263..b25f3cbd3da8 100644 --- a/arch/arm64/boot/dts/arm/rtsm_ve-motherboard.dtsi +++ b/arch/arm64/boot/dts/arm/rtsm_ve-motherboard.dtsi @@ -24,11 +24,6 @@ bank-width = <4>; }; - v2m_video_ram: vram@2,00000000 { - compatible = "arm,vexpress-vram"; - reg = <2 0x00000000 0x00800000>; - }; - ethernet@2,02000000 { compatible = "smsc,lan91c111"; reg = <2 0x02000000 0x10000>; @@ -187,38 +182,16 @@ interrupts = <14>; clocks = <&v2m_oscclk1>, <&v2m_clk24mhz>; clock-names = "clcdclk", "apb_pclk"; - arm,pl11x,framebuffer = <0x18000000 0x00180000>; - memory-region = <&v2m_video_ram>; - max-memory-bandwidth = <130000000>; /* 16bpp @ 63.5MHz */ + /* 800x600 16bpp @36MHz works fine */ + max-memory-bandwidth = <54000000>; + memory-region = <&vram>; port { - v2m_clcd_pads: endpoint { - remote-endpoint = <&v2m_clcd_panel>; + clcd_pads: endpoint { + remote-endpoint = <&panel_in>; arm,pl11x,tft-r0g0b0-pads = <0 8 16>; }; }; - - panel { - compatible = "panel-dpi"; - - port { - v2m_clcd_panel: endpoint { - remote-endpoint = <&v2m_clcd_pads>; - }; - }; - - panel-timing { - clock-frequency = <63500127>; - hactive = <1024>; - hback-porch = <152>; - hfront-porch = <48>; - hsync-len = <104>; - vactive = <768>; - vback-porch = <23>; - vfront-porch = <3>; - vsync-len = <4>; - }; - }; }; virtio-block@130000 { diff --git a/arch/arm64/boot/dts/arm/vexpress-v2f-1xv7-ca53x2.dts b/arch/arm64/boot/dts/arm/vexpress-v2f-1xv7-ca53x2.dts index 38880380e0fa..8981c3d2ff18 100644 --- a/arch/arm64/boot/dts/arm/vexpress-v2f-1xv7-ca53x2.dts +++ b/arch/arm64/boot/dts/arm/vexpress-v2f-1xv7-ca53x2.dts @@ -65,6 +65,20 @@ reg = <0 0x80000000 0 0x80000000>; /* 2GB @ 2GB */ }; + reserved-memory { + #address-cells = <2>; + #size-cells = <2>; + ranges; + + /* Chipselect 2 is physically at 0x18000000 */ + vram: vram@18000000 { + /* 8 MB of designated video RAM */ + compatible = "shared-dma-pool"; + reg = <0 0x18000000 0 0x00800000>; + no-map; + }; + }; + gic: interrupt-controller@2c001000 { compatible = "arm,gic-400"; #interrupt-cells = <3>; -- 2.17.2 _______________________________________________ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel ^ permalink raw reply related [flat|nested] 8+ messages in thread
* [PATCH 2/3 v6] ARM: defconfig: Update the vexpress defconfig 2018-11-12 12:31 ` Linus Walleij @ 2018-11-12 12:31 ` Linus Walleij -1 siblings, 0 replies; 8+ messages in thread From: Linus Walleij @ 2018-11-12 12:31 UTC (permalink / raw) To: linux-arm-kernel Update the Versatile Express defconfig to match the Kconfig changes in the kernel. Cc: Sudeep Holla <sudeep.holla@arm.com> Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> --- ChangeLog v5->v6: - Resending ChangeLog v4->v5: - Resending ChangeLog v3->v4: - Resending ChangeLog v1->v3: - Rebased --- arch/arm/configs/vexpress_defconfig | 12 ------------ 1 file changed, 12 deletions(-) diff --git a/arch/arm/configs/vexpress_defconfig b/arch/arm/configs/vexpress_defconfig index edae1c58fe80..226fe4bfb487 100644 --- a/arch/arm/configs/vexpress_defconfig +++ b/arch/arm/configs/vexpress_defconfig @@ -21,20 +21,17 @@ CONFIG_MODULE_UNLOAD=y CONFIG_ARCH_VEXPRESS=y CONFIG_ARCH_VEXPRESS_DCSCB=y CONFIG_ARCH_VEXPRESS_TC2_PM=y -# CONFIG_SWP_EMULATE is not set CONFIG_SMP=y CONFIG_HAVE_ARM_ARCH_TIMER=y CONFIG_MCPM=y CONFIG_VMSPLIT_2G=y CONFIG_NR_CPUS=8 CONFIG_ARM_PSCI=y -CONFIG_AEABI=y CONFIG_CMA=y CONFIG_ZBOOT_ROM_TEXT=0x0 CONFIG_ZBOOT_ROM_BSS=0x0 CONFIG_CMDLINE="console=ttyAMA0" CONFIG_CPU_IDLE=y -CONFIG_CPU_IDLE_MULTIPLE_DRIVERS=y CONFIG_VFP=y CONFIG_NEON=y # CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set @@ -61,7 +58,6 @@ CONFIG_MTD_PHYSMAP=y CONFIG_MTD_PHYSMAP_OF=y CONFIG_MTD_PLATRAM=y CONFIG_MTD_UBI=y -CONFIG_PROC_DEVICETREE=y CONFIG_VIRTIO_BLK=y # CONFIG_SCSI_PROC_FS is not set CONFIG_BLK_DEV_SD=y @@ -85,7 +81,6 @@ CONFIG_HW_RANDOM_VIRTIO=y CONFIG_I2C=y CONFIG_I2C_VERSATILE=y CONFIG_SENSORS_VEXPRESS=y -CONFIG_REGULATOR=y CONFIG_REGULATOR_VEXPRESS=y CONFIG_FB=y CONFIG_FB_ARMCLCD=y @@ -95,8 +90,6 @@ CONFIG_LOGO=y # CONFIG_LOGO_LINUX_VGA16 is not set CONFIG_SOUND=y CONFIG_SND=y -CONFIG_SND_MIXER_OSS=y -CONFIG_SND_PCM_OSS=y # CONFIG_SND_DRIVERS is not set CONFIG_SND_ARMAACI=y CONFIG_HID_DRAGONRISE=y @@ -133,9 +126,6 @@ CONFIG_VIRTIO_MMIO=y CONFIG_VIRTIO_MMIO_CMDLINE_DEVICES=y CONFIG_EXT2_FS=y CONFIG_EXT3_FS=y -# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set -# CONFIG_EXT3_FS_XATTR is not set -CONFIG_EXT4_FS=y CONFIG_VFAT_FS=y CONFIG_TMPFS=y CONFIG_JFFS2_FS=y @@ -149,11 +139,9 @@ CONFIG_9P_FS=y CONFIG_NLS_CODEPAGE_437=y CONFIG_NLS_ISO8859_1=y CONFIG_DEBUG_INFO=y -CONFIG_DEBUG_FS=y CONFIG_MAGIC_SYSRQ=y CONFIG_DEBUG_KERNEL=y CONFIG_DETECT_HUNG_TASK=y # CONFIG_SCHED_DEBUG is not set CONFIG_DEBUG_USER=y -# CONFIG_CRYPTO_ANSI_CPRNG is not set # CONFIG_CRYPTO_HW is not set -- 2.17.2 ^ permalink raw reply related [flat|nested] 8+ messages in thread
* [PATCH 2/3 v6] ARM: defconfig: Update the vexpress defconfig @ 2018-11-12 12:31 ` Linus Walleij 0 siblings, 0 replies; 8+ messages in thread From: Linus Walleij @ 2018-11-12 12:31 UTC (permalink / raw) To: Sudeep Holla, Lorenzo Pieralisi, linux-arm-kernel; +Cc: Liviu Dudau, dri-devel Update the Versatile Express defconfig to match the Kconfig changes in the kernel. Cc: Sudeep Holla <sudeep.holla@arm.com> Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> --- ChangeLog v5->v6: - Resending ChangeLog v4->v5: - Resending ChangeLog v3->v4: - Resending ChangeLog v1->v3: - Rebased --- arch/arm/configs/vexpress_defconfig | 12 ------------ 1 file changed, 12 deletions(-) diff --git a/arch/arm/configs/vexpress_defconfig b/arch/arm/configs/vexpress_defconfig index edae1c58fe80..226fe4bfb487 100644 --- a/arch/arm/configs/vexpress_defconfig +++ b/arch/arm/configs/vexpress_defconfig @@ -21,20 +21,17 @@ CONFIG_MODULE_UNLOAD=y CONFIG_ARCH_VEXPRESS=y CONFIG_ARCH_VEXPRESS_DCSCB=y CONFIG_ARCH_VEXPRESS_TC2_PM=y -# CONFIG_SWP_EMULATE is not set CONFIG_SMP=y CONFIG_HAVE_ARM_ARCH_TIMER=y CONFIG_MCPM=y CONFIG_VMSPLIT_2G=y CONFIG_NR_CPUS=8 CONFIG_ARM_PSCI=y -CONFIG_AEABI=y CONFIG_CMA=y CONFIG_ZBOOT_ROM_TEXT=0x0 CONFIG_ZBOOT_ROM_BSS=0x0 CONFIG_CMDLINE="console=ttyAMA0" CONFIG_CPU_IDLE=y -CONFIG_CPU_IDLE_MULTIPLE_DRIVERS=y CONFIG_VFP=y CONFIG_NEON=y # CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set @@ -61,7 +58,6 @@ CONFIG_MTD_PHYSMAP=y CONFIG_MTD_PHYSMAP_OF=y CONFIG_MTD_PLATRAM=y CONFIG_MTD_UBI=y -CONFIG_PROC_DEVICETREE=y CONFIG_VIRTIO_BLK=y # CONFIG_SCSI_PROC_FS is not set CONFIG_BLK_DEV_SD=y @@ -85,7 +81,6 @@ CONFIG_HW_RANDOM_VIRTIO=y CONFIG_I2C=y CONFIG_I2C_VERSATILE=y CONFIG_SENSORS_VEXPRESS=y -CONFIG_REGULATOR=y CONFIG_REGULATOR_VEXPRESS=y CONFIG_FB=y CONFIG_FB_ARMCLCD=y @@ -95,8 +90,6 @@ CONFIG_LOGO=y # CONFIG_LOGO_LINUX_VGA16 is not set CONFIG_SOUND=y CONFIG_SND=y -CONFIG_SND_MIXER_OSS=y -CONFIG_SND_PCM_OSS=y # CONFIG_SND_DRIVERS is not set CONFIG_SND_ARMAACI=y CONFIG_HID_DRAGONRISE=y @@ -133,9 +126,6 @@ CONFIG_VIRTIO_MMIO=y CONFIG_VIRTIO_MMIO_CMDLINE_DEVICES=y CONFIG_EXT2_FS=y CONFIG_EXT3_FS=y -# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set -# CONFIG_EXT3_FS_XATTR is not set -CONFIG_EXT4_FS=y CONFIG_VFAT_FS=y CONFIG_TMPFS=y CONFIG_JFFS2_FS=y @@ -149,11 +139,9 @@ CONFIG_9P_FS=y CONFIG_NLS_CODEPAGE_437=y CONFIG_NLS_ISO8859_1=y CONFIG_DEBUG_INFO=y -CONFIG_DEBUG_FS=y CONFIG_MAGIC_SYSRQ=y CONFIG_DEBUG_KERNEL=y CONFIG_DETECT_HUNG_TASK=y # CONFIG_SCHED_DEBUG is not set CONFIG_DEBUG_USER=y -# CONFIG_CRYPTO_ANSI_CPRNG is not set # CONFIG_CRYPTO_HW is not set -- 2.17.2 _______________________________________________ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel ^ permalink raw reply related [flat|nested] 8+ messages in thread
* [PATCH 3/3 v6] ARM: defconfig: Enable the PL111 DRM driver on vexpress 2018-11-12 12:31 ` Linus Walleij @ 2018-11-12 12:31 ` Linus Walleij -1 siblings, 0 replies; 8+ messages in thread From: Linus Walleij @ 2018-11-12 12:31 UTC (permalink / raw) To: linux-arm-kernel This updates the Versatile defconfig to use the new P111 DRM driver that is merged in the DRM subsystem. We deactivate the old CLCD driver and activate the Pl111 DRM driver and the SiI9022 HDMI bridge. We activate DMA memory allocation using CMA so that the special graphics memory for the on-board CLCD can be used. Cc: Sudeep Holla <sudeep.holla@arm.com> Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> --- ChangeLog v5->v6: - Resending ChangeLog v4->v5: - Resending ChangeLog v3->v4: - Resending ChangeLog v1->v3: - Rebased --- arch/arm/configs/vexpress_defconfig | 12 ++++++++---- 1 file changed, 8 insertions(+), 4 deletions(-) diff --git a/arch/arm/configs/vexpress_defconfig b/arch/arm/configs/vexpress_defconfig index 226fe4bfb487..392ed3b3613c 100644 --- a/arch/arm/configs/vexpress_defconfig +++ b/arch/arm/configs/vexpress_defconfig @@ -48,6 +48,7 @@ CONFIG_NET_9P=y CONFIG_NET_9P_VIRTIO=y CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" CONFIG_DEVTMPFS=y +CONFIG_DMA_CMA=y CONFIG_MTD=y CONFIG_MTD_CMDLINE_PARTS=y CONFIG_MTD_BLOCK=y @@ -78,13 +79,16 @@ CONFIG_SERIAL_AMBA_PL011_CONSOLE=y CONFIG_VIRTIO_CONSOLE=y CONFIG_HW_RANDOM=y CONFIG_HW_RANDOM_VIRTIO=y -CONFIG_I2C=y CONFIG_I2C_VERSATILE=y CONFIG_SENSORS_VEXPRESS=y CONFIG_REGULATOR_VEXPRESS=y -CONFIG_FB=y -CONFIG_FB_ARMCLCD=y -CONFIG_FRAMEBUFFER_CONSOLE=y +CONFIG_DRM=y +CONFIG_DRM_PANEL_SIMPLE=y +CONFIG_DRM_SII902X=y +CONFIG_DRM_PL111=y +CONFIG_FB_MODE_HELPERS=y +CONFIG_BACKLIGHT_LCD_SUPPORT=y +CONFIG_BACKLIGHT_CLASS_DEVICE=y CONFIG_LOGO=y # CONFIG_LOGO_LINUX_MONO is not set # CONFIG_LOGO_LINUX_VGA16 is not set -- 2.17.2 ^ permalink raw reply related [flat|nested] 8+ messages in thread
* [PATCH 3/3 v6] ARM: defconfig: Enable the PL111 DRM driver on vexpress @ 2018-11-12 12:31 ` Linus Walleij 0 siblings, 0 replies; 8+ messages in thread From: Linus Walleij @ 2018-11-12 12:31 UTC (permalink / raw) To: Sudeep Holla, Lorenzo Pieralisi, linux-arm-kernel; +Cc: Liviu Dudau, dri-devel This updates the Versatile defconfig to use the new P111 DRM driver that is merged in the DRM subsystem. We deactivate the old CLCD driver and activate the Pl111 DRM driver and the SiI9022 HDMI bridge. We activate DMA memory allocation using CMA so that the special graphics memory for the on-board CLCD can be used. Cc: Sudeep Holla <sudeep.holla@arm.com> Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> --- ChangeLog v5->v6: - Resending ChangeLog v4->v5: - Resending ChangeLog v3->v4: - Resending ChangeLog v1->v3: - Rebased --- arch/arm/configs/vexpress_defconfig | 12 ++++++++---- 1 file changed, 8 insertions(+), 4 deletions(-) diff --git a/arch/arm/configs/vexpress_defconfig b/arch/arm/configs/vexpress_defconfig index 226fe4bfb487..392ed3b3613c 100644 --- a/arch/arm/configs/vexpress_defconfig +++ b/arch/arm/configs/vexpress_defconfig @@ -48,6 +48,7 @@ CONFIG_NET_9P=y CONFIG_NET_9P_VIRTIO=y CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" CONFIG_DEVTMPFS=y +CONFIG_DMA_CMA=y CONFIG_MTD=y CONFIG_MTD_CMDLINE_PARTS=y CONFIG_MTD_BLOCK=y @@ -78,13 +79,16 @@ CONFIG_SERIAL_AMBA_PL011_CONSOLE=y CONFIG_VIRTIO_CONSOLE=y CONFIG_HW_RANDOM=y CONFIG_HW_RANDOM_VIRTIO=y -CONFIG_I2C=y CONFIG_I2C_VERSATILE=y CONFIG_SENSORS_VEXPRESS=y CONFIG_REGULATOR_VEXPRESS=y -CONFIG_FB=y -CONFIG_FB_ARMCLCD=y -CONFIG_FRAMEBUFFER_CONSOLE=y +CONFIG_DRM=y +CONFIG_DRM_PANEL_SIMPLE=y +CONFIG_DRM_SII902X=y +CONFIG_DRM_PL111=y +CONFIG_FB_MODE_HELPERS=y +CONFIG_BACKLIGHT_LCD_SUPPORT=y +CONFIG_BACKLIGHT_CLASS_DEVICE=y CONFIG_LOGO=y # CONFIG_LOGO_LINUX_MONO is not set # CONFIG_LOGO_LINUX_VGA16 is not set -- 2.17.2 _______________________________________________ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel ^ permalink raw reply related [flat|nested] 8+ messages in thread
end of thread, other threads:[~2018-11-12 12:31 UTC | newest] Thread overview: 8+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2018-11-12 12:31 [PATCH 0/3 v6] Switch Versatile Express to DRM Linus Walleij 2018-11-12 12:31 ` Linus Walleij 2018-11-12 12:31 ` [PATCH 1/3 v6] ARM: dts: Modernize the Vexpress PL111 integration Linus Walleij 2018-11-12 12:31 ` Linus Walleij 2018-11-12 12:31 ` [PATCH 2/3 v6] ARM: defconfig: Update the vexpress defconfig Linus Walleij 2018-11-12 12:31 ` Linus Walleij 2018-11-12 12:31 ` [PATCH 3/3 v6] ARM: defconfig: Enable the PL111 DRM driver on vexpress Linus Walleij 2018-11-12 12:31 ` Linus Walleij
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