* [PATCH v2 0/4] AM654: Add pinmux support @ 2018-11-13 6:01 ` Vignesh R 0 siblings, 0 replies; 50+ messages in thread From: Vignesh R @ 2018-11-13 6:01 UTC (permalink / raw) To: Tero Kristo, Rob Herring Cc: Nishanth Menon, Mark Rutland, linux-kernel, linux-arm-kernel, devicetree, Vignesh R, linux-omap, Linus Walleij, Tony Lindgren Add pinmux definitions and pinctrl regions for AM654 SoCs and enable uart and i2c. v2: Add only minimum needed macros in dt-bindings include file New patches to illustrate pinmux using uart and i2c Tero Kristo (1): arm64: dts: ti: k3-am65: Add pinctrl regions Vignesh R (3): dt-bindings: pinctrl: k3: Introduce pinmux definitions arm64: dts: ti: am654-base-board: Add pinmux for main uart0 arm64: dts: ti: k3-am654-base-board: Add I2C nodes MAINTAINERS | 1 + arch/arm64/boot/dts/ti/k3-am65-main.dtsi | 60 +++++++++++++ arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi | 11 +++ arch/arm64/boot/dts/ti/k3-am65-wakeup.dtsi | 19 ++++ arch/arm64/boot/dts/ti/k3-am65.dtsi | 7 ++ .../arm64/boot/dts/ti/k3-am654-base-board.dts | 86 +++++++++++++++++++ include/dt-bindings/pinctrl/k3.h | 35 ++++++++ 7 files changed, 219 insertions(+) create mode 100644 include/dt-bindings/pinctrl/k3.h -- 2.19.1 ^ permalink raw reply [flat|nested] 50+ messages in thread
* [PATCH v2 0/4] AM654: Add pinmux support @ 2018-11-13 6:01 ` Vignesh R 0 siblings, 0 replies; 50+ messages in thread From: Vignesh R @ 2018-11-13 6:01 UTC (permalink / raw) To: linux-arm-kernel Add pinmux definitions and pinctrl regions for AM654 SoCs and enable uart and i2c. v2: Add only minimum needed macros in dt-bindings include file New patches to illustrate pinmux using uart and i2c Tero Kristo (1): arm64: dts: ti: k3-am65: Add pinctrl regions Vignesh R (3): dt-bindings: pinctrl: k3: Introduce pinmux definitions arm64: dts: ti: am654-base-board: Add pinmux for main uart0 arm64: dts: ti: k3-am654-base-board: Add I2C nodes MAINTAINERS | 1 + arch/arm64/boot/dts/ti/k3-am65-main.dtsi | 60 +++++++++++++ arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi | 11 +++ arch/arm64/boot/dts/ti/k3-am65-wakeup.dtsi | 19 ++++ arch/arm64/boot/dts/ti/k3-am65.dtsi | 7 ++ .../arm64/boot/dts/ti/k3-am654-base-board.dts | 86 +++++++++++++++++++ include/dt-bindings/pinctrl/k3.h | 35 ++++++++ 7 files changed, 219 insertions(+) create mode 100644 include/dt-bindings/pinctrl/k3.h -- 2.19.1 ^ permalink raw reply [flat|nested] 50+ messages in thread
* [PATCH v2 0/4] AM654: Add pinmux support @ 2018-11-13 6:01 ` Vignesh R 0 siblings, 0 replies; 50+ messages in thread From: Vignesh R @ 2018-11-13 6:01 UTC (permalink / raw) To: Tero Kristo, Rob Herring Cc: Nishanth Menon, Mark Rutland, linux-kernel, linux-arm-kernel, devicetree, Vignesh R, linux-omap, Linus Walleij, Tony Lindgren Add pinmux definitions and pinctrl regions for AM654 SoCs and enable uart and i2c. v2: Add only minimum needed macros in dt-bindings include file New patches to illustrate pinmux using uart and i2c Tero Kristo (1): arm64: dts: ti: k3-am65: Add pinctrl regions Vignesh R (3): dt-bindings: pinctrl: k3: Introduce pinmux definitions arm64: dts: ti: am654-base-board: Add pinmux for main uart0 arm64: dts: ti: k3-am654-base-board: Add I2C nodes MAINTAINERS | 1 + arch/arm64/boot/dts/ti/k3-am65-main.dtsi | 60 +++++++++++++ arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi | 11 +++ arch/arm64/boot/dts/ti/k3-am65-wakeup.dtsi | 19 ++++ arch/arm64/boot/dts/ti/k3-am65.dtsi | 7 ++ .../arm64/boot/dts/ti/k3-am654-base-board.dts | 86 +++++++++++++++++++ include/dt-bindings/pinctrl/k3.h | 35 ++++++++ 7 files changed, 219 insertions(+) create mode 100644 include/dt-bindings/pinctrl/k3.h -- 2.19.1 ^ permalink raw reply [flat|nested] 50+ messages in thread
* [PATCH v2 1/4] dt-bindings: pinctrl: k3: Introduce pinmux definitions 2018-11-13 6:01 ` Vignesh R (?) @ 2018-11-13 6:01 ` Vignesh R -1 siblings, 0 replies; 50+ messages in thread From: Vignesh R @ 2018-11-13 6:01 UTC (permalink / raw) To: Tero Kristo, Rob Herring Cc: Nishanth Menon, Mark Rutland, linux-kernel, linux-arm-kernel, devicetree, Vignesh R, linux-omap, Linus Walleij, Tony Lindgren The dt-bindings header for TI K3 AM6 SoCs define a set of macros for defining pinmux configs in human readable form, instead of raw-coded hex values. Signed-off-by: Vignesh R <vigneshr@ti.com> --- MAINTAINERS | 1 + include/dt-bindings/pinctrl/k3.h | 35 ++++++++++++++++++++++++++++++++ 2 files changed, 36 insertions(+) create mode 100644 include/dt-bindings/pinctrl/k3.h diff --git a/MAINTAINERS b/MAINTAINERS index fa45ff36fde9..1574ad6d7ead 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -2204,6 +2204,7 @@ S: Supported F: Documentation/devicetree/bindings/arm/ti/k3.txt F: arch/arm64/boot/dts/ti/Makefile F: arch/arm64/boot/dts/ti/k3-* +F: include/dt-bindings/pinctrl/k3.h ARM/TEXAS INSTRUMENT KEYSTONE ARCHITECTURE M: Santosh Shilimkar <ssantosh@kernel.org> diff --git a/include/dt-bindings/pinctrl/k3.h b/include/dt-bindings/pinctrl/k3.h new file mode 100644 index 000000000000..463d845a9b36 --- /dev/null +++ b/include/dt-bindings/pinctrl/k3.h @@ -0,0 +1,35 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * This header provides constants for pinctrl bindings for TI's K3 SoC + * family. + * + * Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com/ + */ +#ifndef _DT_BINDINGS_PINCTRL_TI_K3_H +#define _DT_BINDINGS_PINCTRL_TI_K3_H + +#define PULLUDEN_SHIFT (16) +#define PULLTYPESEL_SHIFT (17) +#define RXACTIVE_SHIFT (18) + +#define PULL_DISABLE (1 << PULLUDEN_SHIFT) +#define PULL_ENABLE (0 << PULLUDEN_SHIFT) + +#define PULL_UP (1 << PULLTYPESEL_SHIFT | PULL_ENABLE) +#define PULL_DOWN (0 << PULLTYPESEL_SHIFT | PULL_ENABLE) + +#define INPUT_EN (1 << RXACTIVE_SHIFT) +#define INPUT_DISABLE (0 << RXACTIVE_SHIFT) + +/* Only these macros are expected be used directly in device tree files */ +#define PIN_OUTPUT (INPUT_DISABLE | PULL_DISABLE) +#define PIN_OUTPUT_PULLUP (INPUT_DISABLE | PULL_UP) +#define PIN_OUTPUT_PULLDOWN (INPUT_DISABLE | PULL_DOWN) +#define PIN_INPUT (INPUT_EN | PULL_DISABLE) +#define PIN_INPUT_PULLUP (INPUT_EN | PULL_UP) +#define PIN_INPUT_PULLDOWN (INPUT_EN | PULL_DOWN) + +#define AM65X_IOPAD(pa, val, muxmode) (((pa) & 0x1fff)) ((val) | (muxmode)) +#define AM65X_WKUP_IOPAD(pa, val, muxmode) (((pa) & 0x1fff)) ((val) | (muxmode)) + +#endif -- 2.19.1 ^ permalink raw reply related [flat|nested] 50+ messages in thread
* [PATCH v2 1/4] dt-bindings: pinctrl: k3: Introduce pinmux definitions @ 2018-11-13 6:01 ` Vignesh R 0 siblings, 0 replies; 50+ messages in thread From: Vignesh R @ 2018-11-13 6:01 UTC (permalink / raw) To: linux-arm-kernel The dt-bindings header for TI K3 AM6 SoCs define a set of macros for defining pinmux configs in human readable form, instead of raw-coded hex values. Signed-off-by: Vignesh R <vigneshr@ti.com> --- MAINTAINERS | 1 + include/dt-bindings/pinctrl/k3.h | 35 ++++++++++++++++++++++++++++++++ 2 files changed, 36 insertions(+) create mode 100644 include/dt-bindings/pinctrl/k3.h diff --git a/MAINTAINERS b/MAINTAINERS index fa45ff36fde9..1574ad6d7ead 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -2204,6 +2204,7 @@ S: Supported F: Documentation/devicetree/bindings/arm/ti/k3.txt F: arch/arm64/boot/dts/ti/Makefile F: arch/arm64/boot/dts/ti/k3-* +F: include/dt-bindings/pinctrl/k3.h ARM/TEXAS INSTRUMENT KEYSTONE ARCHITECTURE M: Santosh Shilimkar <ssantosh@kernel.org> diff --git a/include/dt-bindings/pinctrl/k3.h b/include/dt-bindings/pinctrl/k3.h new file mode 100644 index 000000000000..463d845a9b36 --- /dev/null +++ b/include/dt-bindings/pinctrl/k3.h @@ -0,0 +1,35 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * This header provides constants for pinctrl bindings for TI's K3 SoC + * family. + * + * Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com/ + */ +#ifndef _DT_BINDINGS_PINCTRL_TI_K3_H +#define _DT_BINDINGS_PINCTRL_TI_K3_H + +#define PULLUDEN_SHIFT (16) +#define PULLTYPESEL_SHIFT (17) +#define RXACTIVE_SHIFT (18) + +#define PULL_DISABLE (1 << PULLUDEN_SHIFT) +#define PULL_ENABLE (0 << PULLUDEN_SHIFT) + +#define PULL_UP (1 << PULLTYPESEL_SHIFT | PULL_ENABLE) +#define PULL_DOWN (0 << PULLTYPESEL_SHIFT | PULL_ENABLE) + +#define INPUT_EN (1 << RXACTIVE_SHIFT) +#define INPUT_DISABLE (0 << RXACTIVE_SHIFT) + +/* Only these macros are expected be used directly in device tree files */ +#define PIN_OUTPUT (INPUT_DISABLE | PULL_DISABLE) +#define PIN_OUTPUT_PULLUP (INPUT_DISABLE | PULL_UP) +#define PIN_OUTPUT_PULLDOWN (INPUT_DISABLE | PULL_DOWN) +#define PIN_INPUT (INPUT_EN | PULL_DISABLE) +#define PIN_INPUT_PULLUP (INPUT_EN | PULL_UP) +#define PIN_INPUT_PULLDOWN (INPUT_EN | PULL_DOWN) + +#define AM65X_IOPAD(pa, val, muxmode) (((pa) & 0x1fff)) ((val) | (muxmode)) +#define AM65X_WKUP_IOPAD(pa, val, muxmode) (((pa) & 0x1fff)) ((val) | (muxmode)) + +#endif -- 2.19.1 ^ permalink raw reply related [flat|nested] 50+ messages in thread
* [PATCH v2 1/4] dt-bindings: pinctrl: k3: Introduce pinmux definitions @ 2018-11-13 6:01 ` Vignesh R 0 siblings, 0 replies; 50+ messages in thread From: Vignesh R @ 2018-11-13 6:01 UTC (permalink / raw) To: Tero Kristo, Rob Herring Cc: Nishanth Menon, Mark Rutland, linux-kernel, linux-arm-kernel, devicetree, Vignesh R, linux-omap, Linus Walleij, Tony Lindgren The dt-bindings header for TI K3 AM6 SoCs define a set of macros for defining pinmux configs in human readable form, instead of raw-coded hex values. Signed-off-by: Vignesh R <vigneshr@ti.com> --- MAINTAINERS | 1 + include/dt-bindings/pinctrl/k3.h | 35 ++++++++++++++++++++++++++++++++ 2 files changed, 36 insertions(+) create mode 100644 include/dt-bindings/pinctrl/k3.h diff --git a/MAINTAINERS b/MAINTAINERS index fa45ff36fde9..1574ad6d7ead 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -2204,6 +2204,7 @@ S: Supported F: Documentation/devicetree/bindings/arm/ti/k3.txt F: arch/arm64/boot/dts/ti/Makefile F: arch/arm64/boot/dts/ti/k3-* +F: include/dt-bindings/pinctrl/k3.h ARM/TEXAS INSTRUMENT KEYSTONE ARCHITECTURE M: Santosh Shilimkar <ssantosh@kernel.org> diff --git a/include/dt-bindings/pinctrl/k3.h b/include/dt-bindings/pinctrl/k3.h new file mode 100644 index 000000000000..463d845a9b36 --- /dev/null +++ b/include/dt-bindings/pinctrl/k3.h @@ -0,0 +1,35 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * This header provides constants for pinctrl bindings for TI's K3 SoC + * family. + * + * Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com/ + */ +#ifndef _DT_BINDINGS_PINCTRL_TI_K3_H +#define _DT_BINDINGS_PINCTRL_TI_K3_H + +#define PULLUDEN_SHIFT (16) +#define PULLTYPESEL_SHIFT (17) +#define RXACTIVE_SHIFT (18) + +#define PULL_DISABLE (1 << PULLUDEN_SHIFT) +#define PULL_ENABLE (0 << PULLUDEN_SHIFT) + +#define PULL_UP (1 << PULLTYPESEL_SHIFT | PULL_ENABLE) +#define PULL_DOWN (0 << PULLTYPESEL_SHIFT | PULL_ENABLE) + +#define INPUT_EN (1 << RXACTIVE_SHIFT) +#define INPUT_DISABLE (0 << RXACTIVE_SHIFT) + +/* Only these macros are expected be used directly in device tree files */ +#define PIN_OUTPUT (INPUT_DISABLE | PULL_DISABLE) +#define PIN_OUTPUT_PULLUP (INPUT_DISABLE | PULL_UP) +#define PIN_OUTPUT_PULLDOWN (INPUT_DISABLE | PULL_DOWN) +#define PIN_INPUT (INPUT_EN | PULL_DISABLE) +#define PIN_INPUT_PULLUP (INPUT_EN | PULL_UP) +#define PIN_INPUT_PULLDOWN (INPUT_EN | PULL_DOWN) + +#define AM65X_IOPAD(pa, val, muxmode) (((pa) & 0x1fff)) ((val) | (muxmode)) +#define AM65X_WKUP_IOPAD(pa, val, muxmode) (((pa) & 0x1fff)) ((val) | (muxmode)) + +#endif -- 2.19.1 ^ permalink raw reply related [flat|nested] 50+ messages in thread
* Re: [PATCH v2 1/4] dt-bindings: pinctrl: k3: Introduce pinmux definitions 2018-11-13 6:01 ` Vignesh R (?) @ 2018-11-17 12:27 ` Linus Walleij -1 siblings, 0 replies; 50+ messages in thread From: Linus Walleij @ 2018-11-17 12:27 UTC (permalink / raw) To: Vignesh R Cc: Tero Kristo, Rob Herring, ext Nishanth Menon, Mark Rutland, linux-kernel, Linux ARM, open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS, Linux-OMAP, ext Tony Lindgren On Tue, Nov 13, 2018 at 7:00 AM Vignesh R <vigneshr@ti.com> wrote: > The dt-bindings header for TI K3 AM6 SoCs define a set of macros for > defining pinmux configs in human readable form, instead of raw-coded > hex values. > > Signed-off-by: Vignesh R <vigneshr@ti.com> I guess you want to merge this through ARM SoC along witg the other patches so: Acked-by: Linus Walleij <linus.walleij@linaro.org> Yours, Linus Walleij ^ permalink raw reply [flat|nested] 50+ messages in thread
* [PATCH v2 1/4] dt-bindings: pinctrl: k3: Introduce pinmux definitions @ 2018-11-17 12:27 ` Linus Walleij 0 siblings, 0 replies; 50+ messages in thread From: Linus Walleij @ 2018-11-17 12:27 UTC (permalink / raw) To: linux-arm-kernel On Tue, Nov 13, 2018 at 7:00 AM Vignesh R <vigneshr@ti.com> wrote: > The dt-bindings header for TI K3 AM6 SoCs define a set of macros for > defining pinmux configs in human readable form, instead of raw-coded > hex values. > > Signed-off-by: Vignesh R <vigneshr@ti.com> I guess you want to merge this through ARM SoC along witg the other patches so: Acked-by: Linus Walleij <linus.walleij@linaro.org> Yours, Linus Walleij ^ permalink raw reply [flat|nested] 50+ messages in thread
* Re: [PATCH v2 1/4] dt-bindings: pinctrl: k3: Introduce pinmux definitions @ 2018-11-17 12:27 ` Linus Walleij 0 siblings, 0 replies; 50+ messages in thread From: Linus Walleij @ 2018-11-17 12:27 UTC (permalink / raw) To: Vignesh R Cc: Tero Kristo, Rob Herring, ext Nishanth Menon, Mark Rutland, linux-kernel, Linux ARM, open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS, Linux-OMAP, ext Tony Lindgren On Tue, Nov 13, 2018 at 7:00 AM Vignesh R <vigneshr@ti.com> wrote: > The dt-bindings header for TI K3 AM6 SoCs define a set of macros for > defining pinmux configs in human readable form, instead of raw-coded > hex values. > > Signed-off-by: Vignesh R <vigneshr@ti.com> I guess you want to merge this through ARM SoC along witg the other patches so: Acked-by: Linus Walleij <linus.walleij@linaro.org> Yours, Linus Walleij ^ permalink raw reply [flat|nested] 50+ messages in thread
* Re: [PATCH v2 1/4] dt-bindings: pinctrl: k3: Introduce pinmux definitions 2018-11-13 6:01 ` Vignesh R (?) @ 2018-11-17 15:43 ` Rob Herring -1 siblings, 0 replies; 50+ messages in thread From: Rob Herring @ 2018-11-17 15:43 UTC (permalink / raw) To: Vignesh R Cc: Tero Kristo, Nishanth Menon, Mark Rutland, linux-kernel, linux-arm-kernel, devicetree, Vignesh R, linux-omap, Linus Walleij, Tony Lindgren On Tue, 13 Nov 2018 11:31:08 +0530, Vignesh R wrote: > The dt-bindings header for TI K3 AM6 SoCs define a set of macros for > defining pinmux configs in human readable form, instead of raw-coded > hex values. > > Signed-off-by: Vignesh R <vigneshr@ti.com> > --- > MAINTAINERS | 1 + > include/dt-bindings/pinctrl/k3.h | 35 ++++++++++++++++++++++++++++++++ > 2 files changed, 36 insertions(+) > create mode 100644 include/dt-bindings/pinctrl/k3.h > Reviewed-by: Rob Herring <robh@kernel.org> ^ permalink raw reply [flat|nested] 50+ messages in thread
* [PATCH v2 1/4] dt-bindings: pinctrl: k3: Introduce pinmux definitions @ 2018-11-17 15:43 ` Rob Herring 0 siblings, 0 replies; 50+ messages in thread From: Rob Herring @ 2018-11-17 15:43 UTC (permalink / raw) To: linux-arm-kernel On Tue, 13 Nov 2018 11:31:08 +0530, Vignesh R wrote: > The dt-bindings header for TI K3 AM6 SoCs define a set of macros for > defining pinmux configs in human readable form, instead of raw-coded > hex values. > > Signed-off-by: Vignesh R <vigneshr@ti.com> > --- > MAINTAINERS | 1 + > include/dt-bindings/pinctrl/k3.h | 35 ++++++++++++++++++++++++++++++++ > 2 files changed, 36 insertions(+) > create mode 100644 include/dt-bindings/pinctrl/k3.h > Reviewed-by: Rob Herring <robh@kernel.org> ^ permalink raw reply [flat|nested] 50+ messages in thread
* Re: [PATCH v2 1/4] dt-bindings: pinctrl: k3: Introduce pinmux definitions @ 2018-11-17 15:43 ` Rob Herring 0 siblings, 0 replies; 50+ messages in thread From: Rob Herring @ 2018-11-17 15:43 UTC (permalink / raw) Cc: Tero Kristo, Nishanth Menon, Mark Rutland, linux-kernel, linux-arm-kernel, devicetree, Vignesh R, linux-omap, Linus Walleij, Tony Lindgren On Tue, 13 Nov 2018 11:31:08 +0530, Vignesh R wrote: > The dt-bindings header for TI K3 AM6 SoCs define a set of macros for > defining pinmux configs in human readable form, instead of raw-coded > hex values. > > Signed-off-by: Vignesh R <vigneshr@ti.com> > --- > MAINTAINERS | 1 + > include/dt-bindings/pinctrl/k3.h | 35 ++++++++++++++++++++++++++++++++ > 2 files changed, 36 insertions(+) > create mode 100644 include/dt-bindings/pinctrl/k3.h > Reviewed-by: Rob Herring <robh@kernel.org> ^ permalink raw reply [flat|nested] 50+ messages in thread
* Re: [PATCH v2 1/4] dt-bindings: pinctrl: k3: Introduce pinmux definitions 2018-11-13 6:01 ` Vignesh R (?) @ 2018-11-17 16:05 ` Nishanth Menon -1 siblings, 0 replies; 50+ messages in thread From: Nishanth Menon @ 2018-11-17 16:05 UTC (permalink / raw) To: Vignesh R Cc: Tero Kristo, Rob Herring, Mark Rutland, linux-kernel, linux-arm-kernel, devicetree, linux-omap, Linus Walleij, Tony Lindgren On 11:31-20181113, Vignesh R wrote: > The dt-bindings header for TI K3 AM6 SoCs define a set of macros for > defining pinmux configs in human readable form, instead of raw-coded > hex values. > > Signed-off-by: Vignesh R <vigneshr@ti.com> > --- > MAINTAINERS | 1 + > include/dt-bindings/pinctrl/k3.h | 35 ++++++++++++++++++++++++++++++++ > 2 files changed, 36 insertions(+) > create mode 100644 include/dt-bindings/pinctrl/k3.h > > diff --git a/MAINTAINERS b/MAINTAINERS > index fa45ff36fde9..1574ad6d7ead 100644 > --- a/MAINTAINERS > +++ b/MAINTAINERS > @@ -2204,6 +2204,7 @@ S: Supported > F: Documentation/devicetree/bindings/arm/ti/k3.txt > F: arch/arm64/boot/dts/ti/Makefile > F: arch/arm64/boot/dts/ti/k3-* > +F: include/dt-bindings/pinctrl/k3.h > > ARM/TEXAS INSTRUMENT KEYSTONE ARCHITECTURE > M: Santosh Shilimkar <ssantosh@kernel.org> > diff --git a/include/dt-bindings/pinctrl/k3.h b/include/dt-bindings/pinctrl/k3.h > new file mode 100644 > index 000000000000..463d845a9b36 > --- /dev/null > +++ b/include/dt-bindings/pinctrl/k3.h > @@ -0,0 +1,35 @@ > +/* SPDX-License-Identifier: GPL-2.0 */ > +/* > + * This header provides constants for pinctrl bindings for TI's K3 SoC > + * family. > + * > + * Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com/ > + */ > +#ifndef _DT_BINDINGS_PINCTRL_TI_K3_H > +#define _DT_BINDINGS_PINCTRL_TI_K3_H > + > +#define PULLUDEN_SHIFT (16) > +#define PULLTYPESEL_SHIFT (17) > +#define RXACTIVE_SHIFT (18) > + > +#define PULL_DISABLE (1 << PULLUDEN_SHIFT) > +#define PULL_ENABLE (0 << PULLUDEN_SHIFT) > + > +#define PULL_UP (1 << PULLTYPESEL_SHIFT | PULL_ENABLE) > +#define PULL_DOWN (0 << PULLTYPESEL_SHIFT | PULL_ENABLE) > + > +#define INPUT_EN (1 << RXACTIVE_SHIFT) > +#define INPUT_DISABLE (0 << RXACTIVE_SHIFT) > + > +/* Only these macros are expected be used directly in device tree files */ > +#define PIN_OUTPUT (INPUT_DISABLE | PULL_DISABLE) > +#define PIN_OUTPUT_PULLUP (INPUT_DISABLE | PULL_UP) > +#define PIN_OUTPUT_PULLDOWN (INPUT_DISABLE | PULL_DOWN) > +#define PIN_INPUT (INPUT_EN | PULL_DISABLE) > +#define PIN_INPUT_PULLUP (INPUT_EN | PULL_UP) > +#define PIN_INPUT_PULLDOWN (INPUT_EN | PULL_DOWN) Thanks for reducing the combinations down to the minimum needed. We can worry about the DS and isolation bits when we have a real user for them. Acked-by: Nishanth Menon <nm@ti.com> Tero: v4.21-rc1 perhaps ? -- Regards, Nishanth Menon ^ permalink raw reply [flat|nested] 50+ messages in thread
* [PATCH v2 1/4] dt-bindings: pinctrl: k3: Introduce pinmux definitions @ 2018-11-17 16:05 ` Nishanth Menon 0 siblings, 0 replies; 50+ messages in thread From: Nishanth Menon @ 2018-11-17 16:05 UTC (permalink / raw) To: linux-arm-kernel On 11:31-20181113, Vignesh R wrote: > The dt-bindings header for TI K3 AM6 SoCs define a set of macros for > defining pinmux configs in human readable form, instead of raw-coded > hex values. > > Signed-off-by: Vignesh R <vigneshr@ti.com> > --- > MAINTAINERS | 1 + > include/dt-bindings/pinctrl/k3.h | 35 ++++++++++++++++++++++++++++++++ > 2 files changed, 36 insertions(+) > create mode 100644 include/dt-bindings/pinctrl/k3.h > > diff --git a/MAINTAINERS b/MAINTAINERS > index fa45ff36fde9..1574ad6d7ead 100644 > --- a/MAINTAINERS > +++ b/MAINTAINERS > @@ -2204,6 +2204,7 @@ S: Supported > F: Documentation/devicetree/bindings/arm/ti/k3.txt > F: arch/arm64/boot/dts/ti/Makefile > F: arch/arm64/boot/dts/ti/k3-* > +F: include/dt-bindings/pinctrl/k3.h > > ARM/TEXAS INSTRUMENT KEYSTONE ARCHITECTURE > M: Santosh Shilimkar <ssantosh@kernel.org> > diff --git a/include/dt-bindings/pinctrl/k3.h b/include/dt-bindings/pinctrl/k3.h > new file mode 100644 > index 000000000000..463d845a9b36 > --- /dev/null > +++ b/include/dt-bindings/pinctrl/k3.h > @@ -0,0 +1,35 @@ > +/* SPDX-License-Identifier: GPL-2.0 */ > +/* > + * This header provides constants for pinctrl bindings for TI's K3 SoC > + * family. > + * > + * Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com/ > + */ > +#ifndef _DT_BINDINGS_PINCTRL_TI_K3_H > +#define _DT_BINDINGS_PINCTRL_TI_K3_H > + > +#define PULLUDEN_SHIFT (16) > +#define PULLTYPESEL_SHIFT (17) > +#define RXACTIVE_SHIFT (18) > + > +#define PULL_DISABLE (1 << PULLUDEN_SHIFT) > +#define PULL_ENABLE (0 << PULLUDEN_SHIFT) > + > +#define PULL_UP (1 << PULLTYPESEL_SHIFT | PULL_ENABLE) > +#define PULL_DOWN (0 << PULLTYPESEL_SHIFT | PULL_ENABLE) > + > +#define INPUT_EN (1 << RXACTIVE_SHIFT) > +#define INPUT_DISABLE (0 << RXACTIVE_SHIFT) > + > +/* Only these macros are expected be used directly in device tree files */ > +#define PIN_OUTPUT (INPUT_DISABLE | PULL_DISABLE) > +#define PIN_OUTPUT_PULLUP (INPUT_DISABLE | PULL_UP) > +#define PIN_OUTPUT_PULLDOWN (INPUT_DISABLE | PULL_DOWN) > +#define PIN_INPUT (INPUT_EN | PULL_DISABLE) > +#define PIN_INPUT_PULLUP (INPUT_EN | PULL_UP) > +#define PIN_INPUT_PULLDOWN (INPUT_EN | PULL_DOWN) Thanks for reducing the combinations down to the minimum needed. We can worry about the DS and isolation bits when we have a real user for them. Acked-by: Nishanth Menon <nm@ti.com> Tero: v4.21-rc1 perhaps ? -- Regards, Nishanth Menon ^ permalink raw reply [flat|nested] 50+ messages in thread
* Re: [PATCH v2 1/4] dt-bindings: pinctrl: k3: Introduce pinmux definitions @ 2018-11-17 16:05 ` Nishanth Menon 0 siblings, 0 replies; 50+ messages in thread From: Nishanth Menon @ 2018-11-17 16:05 UTC (permalink / raw) To: Vignesh R Cc: Tero Kristo, Rob Herring, Mark Rutland, linux-kernel, linux-arm-kernel, devicetree, linux-omap, Linus Walleij, Tony Lindgren On 11:31-20181113, Vignesh R wrote: > The dt-bindings header for TI K3 AM6 SoCs define a set of macros for > defining pinmux configs in human readable form, instead of raw-coded > hex values. > > Signed-off-by: Vignesh R <vigneshr@ti.com> > --- > MAINTAINERS | 1 + > include/dt-bindings/pinctrl/k3.h | 35 ++++++++++++++++++++++++++++++++ > 2 files changed, 36 insertions(+) > create mode 100644 include/dt-bindings/pinctrl/k3.h > > diff --git a/MAINTAINERS b/MAINTAINERS > index fa45ff36fde9..1574ad6d7ead 100644 > --- a/MAINTAINERS > +++ b/MAINTAINERS > @@ -2204,6 +2204,7 @@ S: Supported > F: Documentation/devicetree/bindings/arm/ti/k3.txt > F: arch/arm64/boot/dts/ti/Makefile > F: arch/arm64/boot/dts/ti/k3-* > +F: include/dt-bindings/pinctrl/k3.h > > ARM/TEXAS INSTRUMENT KEYSTONE ARCHITECTURE > M: Santosh Shilimkar <ssantosh@kernel.org> > diff --git a/include/dt-bindings/pinctrl/k3.h b/include/dt-bindings/pinctrl/k3.h > new file mode 100644 > index 000000000000..463d845a9b36 > --- /dev/null > +++ b/include/dt-bindings/pinctrl/k3.h > @@ -0,0 +1,35 @@ > +/* SPDX-License-Identifier: GPL-2.0 */ > +/* > + * This header provides constants for pinctrl bindings for TI's K3 SoC > + * family. > + * > + * Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com/ > + */ > +#ifndef _DT_BINDINGS_PINCTRL_TI_K3_H > +#define _DT_BINDINGS_PINCTRL_TI_K3_H > + > +#define PULLUDEN_SHIFT (16) > +#define PULLTYPESEL_SHIFT (17) > +#define RXACTIVE_SHIFT (18) > + > +#define PULL_DISABLE (1 << PULLUDEN_SHIFT) > +#define PULL_ENABLE (0 << PULLUDEN_SHIFT) > + > +#define PULL_UP (1 << PULLTYPESEL_SHIFT | PULL_ENABLE) > +#define PULL_DOWN (0 << PULLTYPESEL_SHIFT | PULL_ENABLE) > + > +#define INPUT_EN (1 << RXACTIVE_SHIFT) > +#define INPUT_DISABLE (0 << RXACTIVE_SHIFT) > + > +/* Only these macros are expected be used directly in device tree files */ > +#define PIN_OUTPUT (INPUT_DISABLE | PULL_DISABLE) > +#define PIN_OUTPUT_PULLUP (INPUT_DISABLE | PULL_UP) > +#define PIN_OUTPUT_PULLDOWN (INPUT_DISABLE | PULL_DOWN) > +#define PIN_INPUT (INPUT_EN | PULL_DISABLE) > +#define PIN_INPUT_PULLUP (INPUT_EN | PULL_UP) > +#define PIN_INPUT_PULLDOWN (INPUT_EN | PULL_DOWN) Thanks for reducing the combinations down to the minimum needed. We can worry about the DS and isolation bits when we have a real user for them. Acked-by: Nishanth Menon <nm@ti.com> Tero: v4.21-rc1 perhaps ? -- Regards, Nishanth Menon ^ permalink raw reply [flat|nested] 50+ messages in thread
* Re: [PATCH v2 1/4] dt-bindings: pinctrl: k3: Introduce pinmux definitions 2018-11-17 16:05 ` Nishanth Menon (?) @ 2018-11-19 7:19 ` Tero Kristo -1 siblings, 0 replies; 50+ messages in thread From: Tero Kristo @ 2018-11-19 7:19 UTC (permalink / raw) To: Nishanth Menon, Vignesh R Cc: Rob Herring, Mark Rutland, linux-kernel, linux-arm-kernel, devicetree, linux-omap, Linus Walleij, Tony Lindgren On 17/11/2018 18:05, Nishanth Menon wrote: > On 11:31-20181113, Vignesh R wrote: >> The dt-bindings header for TI K3 AM6 SoCs define a set of macros for >> defining pinmux configs in human readable form, instead of raw-coded >> hex values. >> >> Signed-off-by: Vignesh R <vigneshr@ti.com> >> --- >> MAINTAINERS | 1 + >> include/dt-bindings/pinctrl/k3.h | 35 ++++++++++++++++++++++++++++++++ >> 2 files changed, 36 insertions(+) >> create mode 100644 include/dt-bindings/pinctrl/k3.h >> >> diff --git a/MAINTAINERS b/MAINTAINERS >> index fa45ff36fde9..1574ad6d7ead 100644 >> --- a/MAINTAINERS >> +++ b/MAINTAINERS >> @@ -2204,6 +2204,7 @@ S: Supported >> F: Documentation/devicetree/bindings/arm/ti/k3.txt >> F: arch/arm64/boot/dts/ti/Makefile >> F: arch/arm64/boot/dts/ti/k3-* >> +F: include/dt-bindings/pinctrl/k3.h >> >> ARM/TEXAS INSTRUMENT KEYSTONE ARCHITECTURE >> M: Santosh Shilimkar <ssantosh@kernel.org> >> diff --git a/include/dt-bindings/pinctrl/k3.h b/include/dt-bindings/pinctrl/k3.h >> new file mode 100644 >> index 000000000000..463d845a9b36 >> --- /dev/null >> +++ b/include/dt-bindings/pinctrl/k3.h >> @@ -0,0 +1,35 @@ >> +/* SPDX-License-Identifier: GPL-2.0 */ >> +/* >> + * This header provides constants for pinctrl bindings for TI's K3 SoC >> + * family. >> + * >> + * Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com/ >> + */ >> +#ifndef _DT_BINDINGS_PINCTRL_TI_K3_H >> +#define _DT_BINDINGS_PINCTRL_TI_K3_H >> + >> +#define PULLUDEN_SHIFT (16) >> +#define PULLTYPESEL_SHIFT (17) >> +#define RXACTIVE_SHIFT (18) >> + >> +#define PULL_DISABLE (1 << PULLUDEN_SHIFT) >> +#define PULL_ENABLE (0 << PULLUDEN_SHIFT) >> + >> +#define PULL_UP (1 << PULLTYPESEL_SHIFT | PULL_ENABLE) >> +#define PULL_DOWN (0 << PULLTYPESEL_SHIFT | PULL_ENABLE) >> + >> +#define INPUT_EN (1 << RXACTIVE_SHIFT) >> +#define INPUT_DISABLE (0 << RXACTIVE_SHIFT) >> + >> +/* Only these macros are expected be used directly in device tree files */ >> +#define PIN_OUTPUT (INPUT_DISABLE | PULL_DISABLE) >> +#define PIN_OUTPUT_PULLUP (INPUT_DISABLE | PULL_UP) >> +#define PIN_OUTPUT_PULLDOWN (INPUT_DISABLE | PULL_DOWN) >> +#define PIN_INPUT (INPUT_EN | PULL_DISABLE) >> +#define PIN_INPUT_PULLUP (INPUT_EN | PULL_UP) >> +#define PIN_INPUT_PULLDOWN (INPUT_EN | PULL_DOWN) > > > Thanks for reducing the combinations down to the minimum needed. We can > worry about the DS and isolation bits when we have a real user for them. > > Acked-by: Nishanth Menon <nm@ti.com> > > Tero: v4.21-rc1 perhaps ? > Yeah, looks fine, queueing up for 4.21. -Tero -- Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki ^ permalink raw reply [flat|nested] 50+ messages in thread
* [PATCH v2 1/4] dt-bindings: pinctrl: k3: Introduce pinmux definitions @ 2018-11-19 7:19 ` Tero Kristo 0 siblings, 0 replies; 50+ messages in thread From: Tero Kristo @ 2018-11-19 7:19 UTC (permalink / raw) To: linux-arm-kernel On 17/11/2018 18:05, Nishanth Menon wrote: > On 11:31-20181113, Vignesh R wrote: >> The dt-bindings header for TI K3 AM6 SoCs define a set of macros for >> defining pinmux configs in human readable form, instead of raw-coded >> hex values. >> >> Signed-off-by: Vignesh R <vigneshr@ti.com> >> --- >> MAINTAINERS | 1 + >> include/dt-bindings/pinctrl/k3.h | 35 ++++++++++++++++++++++++++++++++ >> 2 files changed, 36 insertions(+) >> create mode 100644 include/dt-bindings/pinctrl/k3.h >> >> diff --git a/MAINTAINERS b/MAINTAINERS >> index fa45ff36fde9..1574ad6d7ead 100644 >> --- a/MAINTAINERS >> +++ b/MAINTAINERS >> @@ -2204,6 +2204,7 @@ S: Supported >> F: Documentation/devicetree/bindings/arm/ti/k3.txt >> F: arch/arm64/boot/dts/ti/Makefile >> F: arch/arm64/boot/dts/ti/k3-* >> +F: include/dt-bindings/pinctrl/k3.h >> >> ARM/TEXAS INSTRUMENT KEYSTONE ARCHITECTURE >> M: Santosh Shilimkar <ssantosh@kernel.org> >> diff --git a/include/dt-bindings/pinctrl/k3.h b/include/dt-bindings/pinctrl/k3.h >> new file mode 100644 >> index 000000000000..463d845a9b36 >> --- /dev/null >> +++ b/include/dt-bindings/pinctrl/k3.h >> @@ -0,0 +1,35 @@ >> +/* SPDX-License-Identifier: GPL-2.0 */ >> +/* >> + * This header provides constants for pinctrl bindings for TI's K3 SoC >> + * family. >> + * >> + * Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com/ >> + */ >> +#ifndef _DT_BINDINGS_PINCTRL_TI_K3_H >> +#define _DT_BINDINGS_PINCTRL_TI_K3_H >> + >> +#define PULLUDEN_SHIFT (16) >> +#define PULLTYPESEL_SHIFT (17) >> +#define RXACTIVE_SHIFT (18) >> + >> +#define PULL_DISABLE (1 << PULLUDEN_SHIFT) >> +#define PULL_ENABLE (0 << PULLUDEN_SHIFT) >> + >> +#define PULL_UP (1 << PULLTYPESEL_SHIFT | PULL_ENABLE) >> +#define PULL_DOWN (0 << PULLTYPESEL_SHIFT | PULL_ENABLE) >> + >> +#define INPUT_EN (1 << RXACTIVE_SHIFT) >> +#define INPUT_DISABLE (0 << RXACTIVE_SHIFT) >> + >> +/* Only these macros are expected be used directly in device tree files */ >> +#define PIN_OUTPUT (INPUT_DISABLE | PULL_DISABLE) >> +#define PIN_OUTPUT_PULLUP (INPUT_DISABLE | PULL_UP) >> +#define PIN_OUTPUT_PULLDOWN (INPUT_DISABLE | PULL_DOWN) >> +#define PIN_INPUT (INPUT_EN | PULL_DISABLE) >> +#define PIN_INPUT_PULLUP (INPUT_EN | PULL_UP) >> +#define PIN_INPUT_PULLDOWN (INPUT_EN | PULL_DOWN) > > > Thanks for reducing the combinations down to the minimum needed. We can > worry about the DS and isolation bits when we have a real user for them. > > Acked-by: Nishanth Menon <nm@ti.com> > > Tero: v4.21-rc1 perhaps ? > Yeah, looks fine, queueing up for 4.21. -Tero -- Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki ^ permalink raw reply [flat|nested] 50+ messages in thread
* Re: [PATCH v2 1/4] dt-bindings: pinctrl: k3: Introduce pinmux definitions @ 2018-11-19 7:19 ` Tero Kristo 0 siblings, 0 replies; 50+ messages in thread From: Tero Kristo @ 2018-11-19 7:19 UTC (permalink / raw) To: Nishanth Menon, Vignesh R Cc: Rob Herring, Mark Rutland, linux-kernel, linux-arm-kernel, devicetree, linux-omap, Linus Walleij, Tony Lindgren On 17/11/2018 18:05, Nishanth Menon wrote: > On 11:31-20181113, Vignesh R wrote: >> The dt-bindings header for TI K3 AM6 SoCs define a set of macros for >> defining pinmux configs in human readable form, instead of raw-coded >> hex values. >> >> Signed-off-by: Vignesh R <vigneshr@ti.com> >> --- >> MAINTAINERS | 1 + >> include/dt-bindings/pinctrl/k3.h | 35 ++++++++++++++++++++++++++++++++ >> 2 files changed, 36 insertions(+) >> create mode 100644 include/dt-bindings/pinctrl/k3.h >> >> diff --git a/MAINTAINERS b/MAINTAINERS >> index fa45ff36fde9..1574ad6d7ead 100644 >> --- a/MAINTAINERS >> +++ b/MAINTAINERS >> @@ -2204,6 +2204,7 @@ S: Supported >> F: Documentation/devicetree/bindings/arm/ti/k3.txt >> F: arch/arm64/boot/dts/ti/Makefile >> F: arch/arm64/boot/dts/ti/k3-* >> +F: include/dt-bindings/pinctrl/k3.h >> >> ARM/TEXAS INSTRUMENT KEYSTONE ARCHITECTURE >> M: Santosh Shilimkar <ssantosh@kernel.org> >> diff --git a/include/dt-bindings/pinctrl/k3.h b/include/dt-bindings/pinctrl/k3.h >> new file mode 100644 >> index 000000000000..463d845a9b36 >> --- /dev/null >> +++ b/include/dt-bindings/pinctrl/k3.h >> @@ -0,0 +1,35 @@ >> +/* SPDX-License-Identifier: GPL-2.0 */ >> +/* >> + * This header provides constants for pinctrl bindings for TI's K3 SoC >> + * family. >> + * >> + * Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com/ >> + */ >> +#ifndef _DT_BINDINGS_PINCTRL_TI_K3_H >> +#define _DT_BINDINGS_PINCTRL_TI_K3_H >> + >> +#define PULLUDEN_SHIFT (16) >> +#define PULLTYPESEL_SHIFT (17) >> +#define RXACTIVE_SHIFT (18) >> + >> +#define PULL_DISABLE (1 << PULLUDEN_SHIFT) >> +#define PULL_ENABLE (0 << PULLUDEN_SHIFT) >> + >> +#define PULL_UP (1 << PULLTYPESEL_SHIFT | PULL_ENABLE) >> +#define PULL_DOWN (0 << PULLTYPESEL_SHIFT | PULL_ENABLE) >> + >> +#define INPUT_EN (1 << RXACTIVE_SHIFT) >> +#define INPUT_DISABLE (0 << RXACTIVE_SHIFT) >> + >> +/* Only these macros are expected be used directly in device tree files */ >> +#define PIN_OUTPUT (INPUT_DISABLE | PULL_DISABLE) >> +#define PIN_OUTPUT_PULLUP (INPUT_DISABLE | PULL_UP) >> +#define PIN_OUTPUT_PULLDOWN (INPUT_DISABLE | PULL_DOWN) >> +#define PIN_INPUT (INPUT_EN | PULL_DISABLE) >> +#define PIN_INPUT_PULLUP (INPUT_EN | PULL_UP) >> +#define PIN_INPUT_PULLDOWN (INPUT_EN | PULL_DOWN) > > > Thanks for reducing the combinations down to the minimum needed. We can > worry about the DS and isolation bits when we have a real user for them. > > Acked-by: Nishanth Menon <nm@ti.com> > > Tero: v4.21-rc1 perhaps ? > Yeah, looks fine, queueing up for 4.21. -Tero -- Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki ^ permalink raw reply [flat|nested] 50+ messages in thread
* Re: [PATCH v2 1/4] dt-bindings: pinctrl: k3: Introduce pinmux definitions 2018-11-19 7:19 ` Tero Kristo (?) @ 2018-11-20 10:09 ` Vignesh R -1 siblings, 0 replies; 50+ messages in thread From: Vignesh R @ 2018-11-20 10:09 UTC (permalink / raw) To: Tero Kristo, Nishanth Menon Cc: Rob Herring, Mark Rutland, linux-kernel, linux-arm-kernel, devicetree, linux-omap, Linus Walleij, Tony Lindgren On 19/11/18 12:49 PM, Tero Kristo wrote: > On 17/11/2018 18:05, Nishanth Menon wrote: >> On 11:31-20181113, Vignesh R wrote: >>> The dt-bindings header for TI K3 AM6 SoCs define a set of macros for >> [...] >> >> Thanks for reducing the combinations down to the minimum needed. We can >> worry about the DS and isolation bits when we have a real user for them. >> >> Acked-by: Nishanth Menon <nm@ti.com> >> >> Tero: v4.21-rc1 perhaps ? >> > > Yeah, looks fine, queueing up for 4.21. > Thank you all for the review! Tero, Is there a branch with these patches that I can use as base for my next set of DT patches? -- Regards Vignesh ^ permalink raw reply [flat|nested] 50+ messages in thread
* [PATCH v2 1/4] dt-bindings: pinctrl: k3: Introduce pinmux definitions @ 2018-11-20 10:09 ` Vignesh R 0 siblings, 0 replies; 50+ messages in thread From: Vignesh R @ 2018-11-20 10:09 UTC (permalink / raw) To: linux-arm-kernel On 19/11/18 12:49 PM, Tero Kristo wrote: > On 17/11/2018 18:05, Nishanth Menon wrote: >> On 11:31-20181113, Vignesh R wrote: >>> The dt-bindings header for TI K3 AM6 SoCs define a set of macros for >> [...] >> >> Thanks for reducing the combinations down to the minimum needed. We can >> worry about the DS and isolation bits when we have a real user for them. >> >> Acked-by: Nishanth Menon <nm@ti.com> >> >> Tero: v4.21-rc1 perhaps ? >> > > Yeah, looks fine, queueing up for 4.21. > Thank you all for the review! Tero, Is there a branch with these patches that I can use as base for my next set of DT patches? -- Regards Vignesh ^ permalink raw reply [flat|nested] 50+ messages in thread
* Re: [PATCH v2 1/4] dt-bindings: pinctrl: k3: Introduce pinmux definitions @ 2018-11-20 10:09 ` Vignesh R 0 siblings, 0 replies; 50+ messages in thread From: Vignesh R @ 2018-11-20 10:09 UTC (permalink / raw) To: Tero Kristo, Nishanth Menon Cc: Rob Herring, Mark Rutland, linux-kernel, linux-arm-kernel, devicetree, linux-omap, Linus Walleij, Tony Lindgren On 19/11/18 12:49 PM, Tero Kristo wrote: > On 17/11/2018 18:05, Nishanth Menon wrote: >> On 11:31-20181113, Vignesh R wrote: >>> The dt-bindings header for TI K3 AM6 SoCs define a set of macros for >> [...] >> >> Thanks for reducing the combinations down to the minimum needed. We can >> worry about the DS and isolation bits when we have a real user for them. >> >> Acked-by: Nishanth Menon <nm@ti.com> >> >> Tero: v4.21-rc1 perhaps ? >> > > Yeah, looks fine, queueing up for 4.21. > Thank you all for the review! Tero, Is there a branch with these patches that I can use as base for my next set of DT patches? -- Regards Vignesh ^ permalink raw reply [flat|nested] 50+ messages in thread
* Re: [PATCH v2 1/4] dt-bindings: pinctrl: k3: Introduce pinmux definitions 2018-11-20 10:09 ` Vignesh R (?) @ 2018-11-20 10:37 ` Tero Kristo -1 siblings, 0 replies; 50+ messages in thread From: Tero Kristo @ 2018-11-20 10:37 UTC (permalink / raw) To: Vignesh R, Nishanth Menon Cc: Rob Herring, Mark Rutland, linux-kernel, linux-arm-kernel, devicetree, linux-omap, Linus Walleij, Tony Lindgren On 20/11/2018 12:09, Vignesh R wrote: > > > On 19/11/18 12:49 PM, Tero Kristo wrote: >> On 17/11/2018 18:05, Nishanth Menon wrote: >>> On 11:31-20181113, Vignesh R wrote: >>>> The dt-bindings header for TI K3 AM6 SoCs define a set of macros for >>> > [...] >>> >>> Thanks for reducing the combinations down to the minimum needed. We can >>> worry about the DS and isolation bits when we have a real user for them. >>> >>> Acked-by: Nishanth Menon <nm@ti.com> >>> >>> Tero: v4.21-rc1 perhaps ? >>> >> >> Yeah, looks fine, queueing up for 4.21. >> > > Thank you all for the review! > > Tero, > > Is there a branch with these patches that I can use as base for my next > set of DT patches? Don't have a branch for these atm, but I can create one if you need it. -Tero -- Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki ^ permalink raw reply [flat|nested] 50+ messages in thread
* [PATCH v2 1/4] dt-bindings: pinctrl: k3: Introduce pinmux definitions @ 2018-11-20 10:37 ` Tero Kristo 0 siblings, 0 replies; 50+ messages in thread From: Tero Kristo @ 2018-11-20 10:37 UTC (permalink / raw) To: linux-arm-kernel On 20/11/2018 12:09, Vignesh R wrote: > > > On 19/11/18 12:49 PM, Tero Kristo wrote: >> On 17/11/2018 18:05, Nishanth Menon wrote: >>> On 11:31-20181113, Vignesh R wrote: >>>> The dt-bindings header for TI K3 AM6 SoCs define a set of macros for >>> > [...] >>> >>> Thanks for reducing the combinations down to the minimum needed. We can >>> worry about the DS and isolation bits when we have a real user for them. >>> >>> Acked-by: Nishanth Menon <nm@ti.com> >>> >>> Tero: v4.21-rc1 perhaps ? >>> >> >> Yeah, looks fine, queueing up for 4.21. >> > > Thank you all for the review! > > Tero, > > Is there a branch with these patches that I can use as base for my next > set of DT patches? Don't have a branch for these atm, but I can create one if you need it. -Tero -- Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki ^ permalink raw reply [flat|nested] 50+ messages in thread
* Re: [PATCH v2 1/4] dt-bindings: pinctrl: k3: Introduce pinmux definitions @ 2018-11-20 10:37 ` Tero Kristo 0 siblings, 0 replies; 50+ messages in thread From: Tero Kristo @ 2018-11-20 10:37 UTC (permalink / raw) To: Vignesh R, Nishanth Menon Cc: Rob Herring, Mark Rutland, linux-kernel, linux-arm-kernel, devicetree, linux-omap, Linus Walleij, Tony Lindgren On 20/11/2018 12:09, Vignesh R wrote: > > > On 19/11/18 12:49 PM, Tero Kristo wrote: >> On 17/11/2018 18:05, Nishanth Menon wrote: >>> On 11:31-20181113, Vignesh R wrote: >>>> The dt-bindings header for TI K3 AM6 SoCs define a set of macros for >>> > [...] >>> >>> Thanks for reducing the combinations down to the minimum needed. We can >>> worry about the DS and isolation bits when we have a real user for them. >>> >>> Acked-by: Nishanth Menon <nm@ti.com> >>> >>> Tero: v4.21-rc1 perhaps ? >>> >> >> Yeah, looks fine, queueing up for 4.21. >> > > Thank you all for the review! > > Tero, > > Is there a branch with these patches that I can use as base for my next > set of DT patches? Don't have a branch for these atm, but I can create one if you need it. -Tero -- Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki ^ permalink raw reply [flat|nested] 50+ messages in thread
* Re: [PATCH v2 1/4] dt-bindings: pinctrl: k3: Introduce pinmux definitions 2018-11-20 10:37 ` Tero Kristo (?) @ 2018-11-20 10:44 ` Vignesh R -1 siblings, 0 replies; 50+ messages in thread From: Vignesh R @ 2018-11-20 10:44 UTC (permalink / raw) To: Tero Kristo, Nishanth Menon Cc: Rob Herring, Mark Rutland, linux-kernel, linux-arm-kernel, devicetree, linux-omap, Linus Walleij, Tony Lindgren On 20/11/18 4:07 PM, Tero Kristo wrote: > On 20/11/2018 12:09, Vignesh R wrote: >> On 19/11/18 12:49 PM, Tero Kristo wrote: >>> On 17/11/2018 18:05, Nishanth Menon wrote: >>>> On 11:31-20181113, Vignesh R wrote: >>>>> The dt-bindings header for TI K3 AM6 SoCs define a set of macros for >>>> >> [...] >>>> >>>> Thanks for reducing the combinations down to the minimum needed. We can >>>> worry about the DS and isolation bits when we have a real user for >>>> them. >>>> >>>> Acked-by: Nishanth Menon <nm@ti.com> >>>> >>>> Tero: v4.21-rc1 perhaps ? >>>> >>> >>> Yeah, looks fine, queueing up for 4.21. >>> >> >> Thank you all for the review! >> >> Tero, >> >> Is there a branch with these patches that I can use as base for my next >> set of DT patches? > > Don't have a branch for these atm, but I can create one if you need it. Yes, that would be great. Thanks! -- Regards Vignesh ^ permalink raw reply [flat|nested] 50+ messages in thread
* [PATCH v2 1/4] dt-bindings: pinctrl: k3: Introduce pinmux definitions @ 2018-11-20 10:44 ` Vignesh R 0 siblings, 0 replies; 50+ messages in thread From: Vignesh R @ 2018-11-20 10:44 UTC (permalink / raw) To: linux-arm-kernel On 20/11/18 4:07 PM, Tero Kristo wrote: > On 20/11/2018 12:09, Vignesh R wrote: >> On 19/11/18 12:49 PM, Tero Kristo wrote: >>> On 17/11/2018 18:05, Nishanth Menon wrote: >>>> On 11:31-20181113, Vignesh R wrote: >>>>> The dt-bindings header for TI K3 AM6 SoCs define a set of macros for >>>> >> [...] >>>> >>>> Thanks for reducing the combinations down to the minimum needed. We can >>>> worry about the DS and isolation bits when we have a real user for >>>> them. >>>> >>>> Acked-by: Nishanth Menon <nm@ti.com> >>>> >>>> Tero: v4.21-rc1 perhaps ? >>>> >>> >>> Yeah, looks fine, queueing up for 4.21. >>> >> >> Thank you all for the review! >> >> Tero, >> >> Is there a branch with these patches that I can use as base for my next >> set of DT patches? > > Don't have a branch for these atm, but I can create one if you need it. Yes, that would be great. Thanks! -- Regards Vignesh ^ permalink raw reply [flat|nested] 50+ messages in thread
* Re: [PATCH v2 1/4] dt-bindings: pinctrl: k3: Introduce pinmux definitions @ 2018-11-20 10:44 ` Vignesh R 0 siblings, 0 replies; 50+ messages in thread From: Vignesh R @ 2018-11-20 10:44 UTC (permalink / raw) To: Tero Kristo, Nishanth Menon Cc: Rob Herring, Mark Rutland, linux-kernel, linux-arm-kernel, devicetree, linux-omap, Linus Walleij, Tony Lindgren On 20/11/18 4:07 PM, Tero Kristo wrote: > On 20/11/2018 12:09, Vignesh R wrote: >> On 19/11/18 12:49 PM, Tero Kristo wrote: >>> On 17/11/2018 18:05, Nishanth Menon wrote: >>>> On 11:31-20181113, Vignesh R wrote: >>>>> The dt-bindings header for TI K3 AM6 SoCs define a set of macros for >>>> >> [...] >>>> >>>> Thanks for reducing the combinations down to the minimum needed. We can >>>> worry about the DS and isolation bits when we have a real user for >>>> them. >>>> >>>> Acked-by: Nishanth Menon <nm@ti.com> >>>> >>>> Tero: v4.21-rc1 perhaps ? >>>> >>> >>> Yeah, looks fine, queueing up for 4.21. >>> >> >> Thank you all for the review! >> >> Tero, >> >> Is there a branch with these patches that I can use as base for my next >> set of DT patches? > > Don't have a branch for these atm, but I can create one if you need it. Yes, that would be great. Thanks! -- Regards Vignesh ^ permalink raw reply [flat|nested] 50+ messages in thread
* Re: [PATCH v2 1/4] dt-bindings: pinctrl: k3: Introduce pinmux definitions 2018-11-20 10:44 ` Vignesh R (?) @ 2018-11-23 10:21 ` Tero Kristo -1 siblings, 0 replies; 50+ messages in thread From: Tero Kristo @ 2018-11-23 10:21 UTC (permalink / raw) To: Vignesh R, Nishanth Menon Cc: Rob Herring, Mark Rutland, linux-kernel, linux-arm-kernel, devicetree, linux-omap, Linus Walleij, Tony Lindgren On 20/11/2018 12:44, Vignesh R wrote: > On 20/11/18 4:07 PM, Tero Kristo wrote: >> On 20/11/2018 12:09, Vignesh R wrote: >>> On 19/11/18 12:49 PM, Tero Kristo wrote: >>>> On 17/11/2018 18:05, Nishanth Menon wrote: >>>>> On 11:31-20181113, Vignesh R wrote: >>>>>> The dt-bindings header for TI K3 AM6 SoCs define a set of macros for >>>>> >>> [...] >>>>> >>>>> Thanks for reducing the combinations down to the minimum needed. We can >>>>> worry about the DS and isolation bits when we have a real user for >>>>> them. >>>>> >>>>> Acked-by: Nishanth Menon <nm@ti.com> >>>>> >>>>> Tero: v4.21-rc1 perhaps ? >>>>> >>>> >>>> Yeah, looks fine, queueing up for 4.21. >>>> >>> >>> Thank you all for the review! >>> >>> Tero, >>> >>> Is there a branch with these patches that I can use as base for my next >>> set of DT patches? >> >> Don't have a branch for these atm, but I can create one if you need it. > > Yes, that would be great. Thanks! > Pushed 4.20-rc1-am65x-queue into my public tree. -Tero -- Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki ^ permalink raw reply [flat|nested] 50+ messages in thread
* [PATCH v2 1/4] dt-bindings: pinctrl: k3: Introduce pinmux definitions @ 2018-11-23 10:21 ` Tero Kristo 0 siblings, 0 replies; 50+ messages in thread From: Tero Kristo @ 2018-11-23 10:21 UTC (permalink / raw) To: linux-arm-kernel On 20/11/2018 12:44, Vignesh R wrote: > On 20/11/18 4:07 PM, Tero Kristo wrote: >> On 20/11/2018 12:09, Vignesh R wrote: >>> On 19/11/18 12:49 PM, Tero Kristo wrote: >>>> On 17/11/2018 18:05, Nishanth Menon wrote: >>>>> On 11:31-20181113, Vignesh R wrote: >>>>>> The dt-bindings header for TI K3 AM6 SoCs define a set of macros for >>>>> >>> [...] >>>>> >>>>> Thanks for reducing the combinations down to the minimum needed. We can >>>>> worry about the DS and isolation bits when we have a real user for >>>>> them. >>>>> >>>>> Acked-by: Nishanth Menon <nm@ti.com> >>>>> >>>>> Tero: v4.21-rc1 perhaps ? >>>>> >>>> >>>> Yeah, looks fine, queueing up for 4.21. >>>> >>> >>> Thank you all for the review! >>> >>> Tero, >>> >>> Is there a branch with these patches that I can use as base for my next >>> set of DT patches? >> >> Don't have a branch for these atm, but I can create one if you need it. > > Yes, that would be great. Thanks! > Pushed 4.20-rc1-am65x-queue into my public tree. -Tero -- Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki ^ permalink raw reply [flat|nested] 50+ messages in thread
* Re: [PATCH v2 1/4] dt-bindings: pinctrl: k3: Introduce pinmux definitions @ 2018-11-23 10:21 ` Tero Kristo 0 siblings, 0 replies; 50+ messages in thread From: Tero Kristo @ 2018-11-23 10:21 UTC (permalink / raw) To: Vignesh R, Nishanth Menon Cc: Mark Rutland, devicetree, Tony Lindgren, Linus Walleij, linux-kernel, Rob Herring, linux-omap, linux-arm-kernel On 20/11/2018 12:44, Vignesh R wrote: > On 20/11/18 4:07 PM, Tero Kristo wrote: >> On 20/11/2018 12:09, Vignesh R wrote: >>> On 19/11/18 12:49 PM, Tero Kristo wrote: >>>> On 17/11/2018 18:05, Nishanth Menon wrote: >>>>> On 11:31-20181113, Vignesh R wrote: >>>>>> The dt-bindings header for TI K3 AM6 SoCs define a set of macros for >>>>> >>> [...] >>>>> >>>>> Thanks for reducing the combinations down to the minimum needed. We can >>>>> worry about the DS and isolation bits when we have a real user for >>>>> them. >>>>> >>>>> Acked-by: Nishanth Menon <nm@ti.com> >>>>> >>>>> Tero: v4.21-rc1 perhaps ? >>>>> >>>> >>>> Yeah, looks fine, queueing up for 4.21. >>>> >>> >>> Thank you all for the review! >>> >>> Tero, >>> >>> Is there a branch with these patches that I can use as base for my next >>> set of DT patches? >> >> Don't have a branch for these atm, but I can create one if you need it. > > Yes, that would be great. Thanks! > Pushed 4.20-rc1-am65x-queue into my public tree. -Tero -- Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki ^ permalink raw reply [flat|nested] 50+ messages in thread
* Re: [PATCH v2 1/4] dt-bindings: pinctrl: k3: Introduce pinmux definitions 2018-11-23 10:21 ` Tero Kristo (?) @ 2018-11-23 15:07 ` Nishanth Menon -1 siblings, 0 replies; 50+ messages in thread From: Nishanth Menon @ 2018-11-23 15:07 UTC (permalink / raw) To: Tero Kristo Cc: Vignesh R, Rob Herring, Mark Rutland, linux-kernel, linux-arm-kernel, devicetree, linux-omap, Linus Walleij, Tony Lindgren On 12:21-20181123, Tero Kristo wrote: > > > > Is there a branch with these patches that I can use as base for my next > > > > set of DT patches? > > > > > > Don't have a branch for these atm, but I can create one if you need it. > > > > Yes, that would be great. Thanks! > > > > Pushed 4.20-rc1-am65x-queue into my public tree. I wonder if we can put up a next branch that is available in linux-next tree? I think it might be a little more convenient for many folks.. -- Regards, Nishanth Menon ^ permalink raw reply [flat|nested] 50+ messages in thread
* [PATCH v2 1/4] dt-bindings: pinctrl: k3: Introduce pinmux definitions @ 2018-11-23 15:07 ` Nishanth Menon 0 siblings, 0 replies; 50+ messages in thread From: Nishanth Menon @ 2018-11-23 15:07 UTC (permalink / raw) To: linux-arm-kernel On 12:21-20181123, Tero Kristo wrote: > > > > Is there a branch with these patches that I can use as base for my next > > > > set of DT patches? > > > > > > Don't have a branch for these atm, but I can create one if you need it. > > > > Yes, that would be great. Thanks! > > > > Pushed 4.20-rc1-am65x-queue into my public tree. I wonder if we can put up a next branch that is available in linux-next tree? I think it might be a little more convenient for many folks.. -- Regards, Nishanth Menon ^ permalink raw reply [flat|nested] 50+ messages in thread
* Re: [PATCH v2 1/4] dt-bindings: pinctrl: k3: Introduce pinmux definitions @ 2018-11-23 15:07 ` Nishanth Menon 0 siblings, 0 replies; 50+ messages in thread From: Nishanth Menon @ 2018-11-23 15:07 UTC (permalink / raw) To: Tero Kristo Cc: Vignesh R, Rob Herring, Mark Rutland, linux-kernel, linux-arm-kernel, devicetree, linux-omap, Linus Walleij, Tony Lindgren On 12:21-20181123, Tero Kristo wrote: > > > > Is there a branch with these patches that I can use as base for my next > > > > set of DT patches? > > > > > > Don't have a branch for these atm, but I can create one if you need it. > > > > Yes, that would be great. Thanks! > > > > Pushed 4.20-rc1-am65x-queue into my public tree. I wonder if we can put up a next branch that is available in linux-next tree? I think it might be a little more convenient for many folks.. -- Regards, Nishanth Menon ^ permalink raw reply [flat|nested] 50+ messages in thread
* Re: [PATCH v2 1/4] dt-bindings: pinctrl: k3: Introduce pinmux definitions 2018-11-13 6:01 ` Vignesh R @ 2018-11-17 16:08 ` Tony Lindgren -1 siblings, 0 replies; 50+ messages in thread From: Tony Lindgren @ 2018-11-17 16:08 UTC (permalink / raw) To: Vignesh R Cc: Tero Kristo, Rob Herring, Nishanth Menon, Mark Rutland, linux-kernel, linux-arm-kernel, devicetree, linux-omap, Linus Walleij * Vignesh R <vigneshr@ti.com> [181113 06:00]: > The dt-bindings header for TI K3 AM6 SoCs define a set of macros for > defining pinmux configs in human readable form, instead of raw-coded > hex values. Looks good to me now too thanks: Acked-by: Tony Lindgren <tony@atomide.com> ^ permalink raw reply [flat|nested] 50+ messages in thread
* [PATCH v2 1/4] dt-bindings: pinctrl: k3: Introduce pinmux definitions @ 2018-11-17 16:08 ` Tony Lindgren 0 siblings, 0 replies; 50+ messages in thread From: Tony Lindgren @ 2018-11-17 16:08 UTC (permalink / raw) To: linux-arm-kernel * Vignesh R <vigneshr@ti.com> [181113 06:00]: > The dt-bindings header for TI K3 AM6 SoCs define a set of macros for > defining pinmux configs in human readable form, instead of raw-coded > hex values. Looks good to me now too thanks: Acked-by: Tony Lindgren <tony@atomide.com> ^ permalink raw reply [flat|nested] 50+ messages in thread
* [PATCH v2 2/4] arm64: dts: ti: k3-am65: Add pinctrl regions 2018-11-13 6:01 ` Vignesh R (?) @ 2018-11-13 6:01 ` Vignesh R -1 siblings, 0 replies; 50+ messages in thread From: Vignesh R @ 2018-11-13 6:01 UTC (permalink / raw) To: Tero Kristo, Rob Herring Cc: Nishanth Menon, Mark Rutland, linux-kernel, linux-arm-kernel, devicetree, Vignesh R, linux-omap, Linus Walleij, Tony Lindgren From: Tero Kristo <t-kristo@ti.com> Add pinctrl regions for the main and wkup mmr. The range for main pinctrl region contains a gap at offset 0x2e4, and because of this, the pinctrl range is split into two sections. Signed-off-by: Tero Kristo <t-kristo@ti.com> Signed-off-by: Vignesh R <vigneshr@ti.com> --- arch/arm64/boot/dts/ti/k3-am65-main.dtsi | 16 ++++++++++++++++ arch/arm64/boot/dts/ti/k3-am65-wakeup.dtsi | 8 ++++++++ arch/arm64/boot/dts/ti/k3-am65.dtsi | 1 + 3 files changed, 25 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-am65-main.dtsi b/arch/arm64/boot/dts/ti/k3-am65-main.dtsi index adcd6341e40c..f7c2a60d5c80 100644 --- a/arch/arm64/boot/dts/ti/k3-am65-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am65-main.dtsi @@ -69,4 +69,20 @@ clock-frequency = <48000000>; current-speed = <115200>; }; + + main_pmx0: pinmux@11c000 { + compatible = "pinctrl-single"; + reg = <0x0 0x11c000 0x0 0x2e4>; + #pinctrl-cells = <1>; + pinctrl-single,register-width = <32>; + pinctrl-single,function-mask = <0xffffffff>; + }; + + main_pmx1: pinmux@11c2e8 { + compatible = "pinctrl-single"; + reg = <0x0 0x11c2e8 0x0 0x24>; + #pinctrl-cells = <1>; + pinctrl-single,register-width = <32>; + pinctrl-single,function-mask = <0xffffffff>; + }; }; diff --git a/arch/arm64/boot/dts/ti/k3-am65-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-am65-wakeup.dtsi index 8d7b47f9dfbf..19b46f40789b 100644 --- a/arch/arm64/boot/dts/ti/k3-am65-wakeup.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am65-wakeup.dtsi @@ -34,6 +34,14 @@ }; }; + wkup_pmx0: pinmux@4301c000 { + compatible = "pinctrl-single"; + reg = <0x4301c000 0x118>; + #pinctrl-cells = <1>; + pinctrl-single,register-width = <32>; + pinctrl-single,function-mask = <0xffffffff>; + }; + wkup_uart0: serial@42300000 { compatible = "ti,am654-uart"; reg = <0x42300000 0x100>; diff --git a/arch/arm64/boot/dts/ti/k3-am65.dtsi b/arch/arm64/boot/dts/ti/k3-am65.dtsi index 3d4bf369d030..6fdfc7815811 100644 --- a/arch/arm64/boot/dts/ti/k3-am65.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am65.dtsi @@ -8,6 +8,7 @@ #include <dt-bindings/gpio/gpio.h> #include <dt-bindings/interrupt-controller/irq.h> #include <dt-bindings/interrupt-controller/arm-gic.h> +#include <dt-bindings/pinctrl/k3.h> / { model = "Texas Instruments K3 AM654 SoC"; -- 2.19.1 ^ permalink raw reply related [flat|nested] 50+ messages in thread
* [PATCH v2 2/4] arm64: dts: ti: k3-am65: Add pinctrl regions @ 2018-11-13 6:01 ` Vignesh R 0 siblings, 0 replies; 50+ messages in thread From: Vignesh R @ 2018-11-13 6:01 UTC (permalink / raw) To: linux-arm-kernel From: Tero Kristo <t-kristo@ti.com> Add pinctrl regions for the main and wkup mmr. The range for main pinctrl region contains a gap at offset 0x2e4, and because of this, the pinctrl range is split into two sections. Signed-off-by: Tero Kristo <t-kristo@ti.com> Signed-off-by: Vignesh R <vigneshr@ti.com> --- arch/arm64/boot/dts/ti/k3-am65-main.dtsi | 16 ++++++++++++++++ arch/arm64/boot/dts/ti/k3-am65-wakeup.dtsi | 8 ++++++++ arch/arm64/boot/dts/ti/k3-am65.dtsi | 1 + 3 files changed, 25 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-am65-main.dtsi b/arch/arm64/boot/dts/ti/k3-am65-main.dtsi index adcd6341e40c..f7c2a60d5c80 100644 --- a/arch/arm64/boot/dts/ti/k3-am65-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am65-main.dtsi @@ -69,4 +69,20 @@ clock-frequency = <48000000>; current-speed = <115200>; }; + + main_pmx0: pinmux at 11c000 { + compatible = "pinctrl-single"; + reg = <0x0 0x11c000 0x0 0x2e4>; + #pinctrl-cells = <1>; + pinctrl-single,register-width = <32>; + pinctrl-single,function-mask = <0xffffffff>; + }; + + main_pmx1: pinmux at 11c2e8 { + compatible = "pinctrl-single"; + reg = <0x0 0x11c2e8 0x0 0x24>; + #pinctrl-cells = <1>; + pinctrl-single,register-width = <32>; + pinctrl-single,function-mask = <0xffffffff>; + }; }; diff --git a/arch/arm64/boot/dts/ti/k3-am65-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-am65-wakeup.dtsi index 8d7b47f9dfbf..19b46f40789b 100644 --- a/arch/arm64/boot/dts/ti/k3-am65-wakeup.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am65-wakeup.dtsi @@ -34,6 +34,14 @@ }; }; + wkup_pmx0: pinmux at 4301c000 { + compatible = "pinctrl-single"; + reg = <0x4301c000 0x118>; + #pinctrl-cells = <1>; + pinctrl-single,register-width = <32>; + pinctrl-single,function-mask = <0xffffffff>; + }; + wkup_uart0: serial at 42300000 { compatible = "ti,am654-uart"; reg = <0x42300000 0x100>; diff --git a/arch/arm64/boot/dts/ti/k3-am65.dtsi b/arch/arm64/boot/dts/ti/k3-am65.dtsi index 3d4bf369d030..6fdfc7815811 100644 --- a/arch/arm64/boot/dts/ti/k3-am65.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am65.dtsi @@ -8,6 +8,7 @@ #include <dt-bindings/gpio/gpio.h> #include <dt-bindings/interrupt-controller/irq.h> #include <dt-bindings/interrupt-controller/arm-gic.h> +#include <dt-bindings/pinctrl/k3.h> / { model = "Texas Instruments K3 AM654 SoC"; -- 2.19.1 ^ permalink raw reply related [flat|nested] 50+ messages in thread
* [PATCH v2 2/4] arm64: dts: ti: k3-am65: Add pinctrl regions @ 2018-11-13 6:01 ` Vignesh R 0 siblings, 0 replies; 50+ messages in thread From: Vignesh R @ 2018-11-13 6:01 UTC (permalink / raw) To: Tero Kristo, Rob Herring Cc: Nishanth Menon, Mark Rutland, linux-kernel, linux-arm-kernel, devicetree, Vignesh R, linux-omap, Linus Walleij, Tony Lindgren From: Tero Kristo <t-kristo@ti.com> Add pinctrl regions for the main and wkup mmr. The range for main pinctrl region contains a gap at offset 0x2e4, and because of this, the pinctrl range is split into two sections. Signed-off-by: Tero Kristo <t-kristo@ti.com> Signed-off-by: Vignesh R <vigneshr@ti.com> --- arch/arm64/boot/dts/ti/k3-am65-main.dtsi | 16 ++++++++++++++++ arch/arm64/boot/dts/ti/k3-am65-wakeup.dtsi | 8 ++++++++ arch/arm64/boot/dts/ti/k3-am65.dtsi | 1 + 3 files changed, 25 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-am65-main.dtsi b/arch/arm64/boot/dts/ti/k3-am65-main.dtsi index adcd6341e40c..f7c2a60d5c80 100644 --- a/arch/arm64/boot/dts/ti/k3-am65-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am65-main.dtsi @@ -69,4 +69,20 @@ clock-frequency = <48000000>; current-speed = <115200>; }; + + main_pmx0: pinmux@11c000 { + compatible = "pinctrl-single"; + reg = <0x0 0x11c000 0x0 0x2e4>; + #pinctrl-cells = <1>; + pinctrl-single,register-width = <32>; + pinctrl-single,function-mask = <0xffffffff>; + }; + + main_pmx1: pinmux@11c2e8 { + compatible = "pinctrl-single"; + reg = <0x0 0x11c2e8 0x0 0x24>; + #pinctrl-cells = <1>; + pinctrl-single,register-width = <32>; + pinctrl-single,function-mask = <0xffffffff>; + }; }; diff --git a/arch/arm64/boot/dts/ti/k3-am65-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-am65-wakeup.dtsi index 8d7b47f9dfbf..19b46f40789b 100644 --- a/arch/arm64/boot/dts/ti/k3-am65-wakeup.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am65-wakeup.dtsi @@ -34,6 +34,14 @@ }; }; + wkup_pmx0: pinmux@4301c000 { + compatible = "pinctrl-single"; + reg = <0x4301c000 0x118>; + #pinctrl-cells = <1>; + pinctrl-single,register-width = <32>; + pinctrl-single,function-mask = <0xffffffff>; + }; + wkup_uart0: serial@42300000 { compatible = "ti,am654-uart"; reg = <0x42300000 0x100>; diff --git a/arch/arm64/boot/dts/ti/k3-am65.dtsi b/arch/arm64/boot/dts/ti/k3-am65.dtsi index 3d4bf369d030..6fdfc7815811 100644 --- a/arch/arm64/boot/dts/ti/k3-am65.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am65.dtsi @@ -8,6 +8,7 @@ #include <dt-bindings/gpio/gpio.h> #include <dt-bindings/interrupt-controller/irq.h> #include <dt-bindings/interrupt-controller/arm-gic.h> +#include <dt-bindings/pinctrl/k3.h> / { model = "Texas Instruments K3 AM654 SoC"; -- 2.19.1 ^ permalink raw reply related [flat|nested] 50+ messages in thread
* [PATCH v2 3/4] arm64: dts: ti: am654-base-board: Add pinmux for main uart0 2018-11-13 6:01 ` Vignesh R (?) @ 2018-11-13 6:01 ` Vignesh R -1 siblings, 0 replies; 50+ messages in thread From: Vignesh R @ 2018-11-13 6:01 UTC (permalink / raw) To: Tero Kristo, Rob Herring Cc: Nishanth Menon, Mark Rutland, linux-kernel, linux-arm-kernel, devicetree, Vignesh R, linux-omap, Linus Walleij, Tony Lindgren Add pinmux for main uart0 that is serves as console on AM654 EVM Signed-off-by: Vignesh R <vigneshr@ti.com> --- arch/arm64/boot/dts/ti/k3-am654-base-board.dts | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-am654-base-board.dts b/arch/arm64/boot/dts/ti/k3-am654-base-board.dts index e146ac2ad781..cbf9d3dfeaa3 100644 --- a/arch/arm64/boot/dts/ti/k3-am654-base-board.dts +++ b/arch/arm64/boot/dts/ti/k3-am654-base-board.dts @@ -35,7 +35,23 @@ }; }; +&main_pmx0 { + main_uart0_pins_default: main-uart0-pins-default { + pinctrl-single,pins = < + AM65X_IOPAD(0x01e4, PIN_INPUT, 0) /* (AF11) UART0_RXD */ + AM65X_IOPAD(0x01e8, PIN_OUTPUT, 0) /* (AE11) UART0_TXD */ + AM65X_IOPAD(0x01ec, PIN_INPUT, 0) /* (AG11) UART0_CTSn */ + AM65X_IOPAD(0x01f0, PIN_OUTPUT, 0) /* (AD11) UART0_RTSn */ + >; + }; +}; + &wkup_uart0 { /* Wakeup UART is used by System firmware */ status = "disabled"; }; + +&main_uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&main_uart0_pins_default>; +}; -- 2.19.1 ^ permalink raw reply related [flat|nested] 50+ messages in thread
* [PATCH v2 3/4] arm64: dts: ti: am654-base-board: Add pinmux for main uart0 @ 2018-11-13 6:01 ` Vignesh R 0 siblings, 0 replies; 50+ messages in thread From: Vignesh R @ 2018-11-13 6:01 UTC (permalink / raw) To: linux-arm-kernel Add pinmux for main uart0 that is serves as console on AM654 EVM Signed-off-by: Vignesh R <vigneshr@ti.com> --- arch/arm64/boot/dts/ti/k3-am654-base-board.dts | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-am654-base-board.dts b/arch/arm64/boot/dts/ti/k3-am654-base-board.dts index e146ac2ad781..cbf9d3dfeaa3 100644 --- a/arch/arm64/boot/dts/ti/k3-am654-base-board.dts +++ b/arch/arm64/boot/dts/ti/k3-am654-base-board.dts @@ -35,7 +35,23 @@ }; }; +&main_pmx0 { + main_uart0_pins_default: main-uart0-pins-default { + pinctrl-single,pins = < + AM65X_IOPAD(0x01e4, PIN_INPUT, 0) /* (AF11) UART0_RXD */ + AM65X_IOPAD(0x01e8, PIN_OUTPUT, 0) /* (AE11) UART0_TXD */ + AM65X_IOPAD(0x01ec, PIN_INPUT, 0) /* (AG11) UART0_CTSn */ + AM65X_IOPAD(0x01f0, PIN_OUTPUT, 0) /* (AD11) UART0_RTSn */ + >; + }; +}; + &wkup_uart0 { /* Wakeup UART is used by System firmware */ status = "disabled"; }; + +&main_uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&main_uart0_pins_default>; +}; -- 2.19.1 ^ permalink raw reply related [flat|nested] 50+ messages in thread
* [PATCH v2 3/4] arm64: dts: ti: am654-base-board: Add pinmux for main uart0 @ 2018-11-13 6:01 ` Vignesh R 0 siblings, 0 replies; 50+ messages in thread From: Vignesh R @ 2018-11-13 6:01 UTC (permalink / raw) To: Tero Kristo, Rob Herring Cc: Nishanth Menon, Mark Rutland, linux-kernel, linux-arm-kernel, devicetree, Vignesh R, linux-omap, Linus Walleij, Tony Lindgren Add pinmux for main uart0 that is serves as console on AM654 EVM Signed-off-by: Vignesh R <vigneshr@ti.com> --- arch/arm64/boot/dts/ti/k3-am654-base-board.dts | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-am654-base-board.dts b/arch/arm64/boot/dts/ti/k3-am654-base-board.dts index e146ac2ad781..cbf9d3dfeaa3 100644 --- a/arch/arm64/boot/dts/ti/k3-am654-base-board.dts +++ b/arch/arm64/boot/dts/ti/k3-am654-base-board.dts @@ -35,7 +35,23 @@ }; }; +&main_pmx0 { + main_uart0_pins_default: main-uart0-pins-default { + pinctrl-single,pins = < + AM65X_IOPAD(0x01e4, PIN_INPUT, 0) /* (AF11) UART0_RXD */ + AM65X_IOPAD(0x01e8, PIN_OUTPUT, 0) /* (AE11) UART0_TXD */ + AM65X_IOPAD(0x01ec, PIN_INPUT, 0) /* (AG11) UART0_CTSn */ + AM65X_IOPAD(0x01f0, PIN_OUTPUT, 0) /* (AD11) UART0_RTSn */ + >; + }; +}; + &wkup_uart0 { /* Wakeup UART is used by System firmware */ status = "disabled"; }; + +&main_uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&main_uart0_pins_default>; +}; -- 2.19.1 ^ permalink raw reply related [flat|nested] 50+ messages in thread
* [PATCH v2 4/4] arm64: dts: ti: k3-am654-base-board: Add I2C nodes 2018-11-13 6:01 ` Vignesh R (?) @ 2018-11-13 6:01 ` Vignesh R -1 siblings, 0 replies; 50+ messages in thread From: Vignesh R @ 2018-11-13 6:01 UTC (permalink / raw) To: Tero Kristo, Rob Herring Cc: Nishanth Menon, Mark Rutland, linux-kernel, linux-arm-kernel, devicetree, Vignesh R, linux-omap, Linus Walleij, Tony Lindgren Add DT entries for I2C instances present in AM654 SoC. Signed-off-by: Vignesh R <vigneshr@ti.com> --- arch/arm64/boot/dts/ti/k3-am65-main.dtsi | 44 ++++++++++++ arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi | 11 +++ arch/arm64/boot/dts/ti/k3-am65-wakeup.dtsi | 11 +++ arch/arm64/boot/dts/ti/k3-am65.dtsi | 6 ++ .../arm64/boot/dts/ti/k3-am654-base-board.dts | 70 +++++++++++++++++++ 5 files changed, 142 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-am65-main.dtsi b/arch/arm64/boot/dts/ti/k3-am65-main.dtsi index f7c2a60d5c80..916434839603 100644 --- a/arch/arm64/boot/dts/ti/k3-am65-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am65-main.dtsi @@ -85,4 +85,48 @@ pinctrl-single,register-width = <32>; pinctrl-single,function-mask = <0xffffffff>; }; + + main_i2c0: i2c@2000000 { + compatible = "ti,am654-i2c", "ti,omap4-i2c"; + reg = <0x0 0x2000000 0x0 0x100>; + interrupts = <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>; + #address-cells = <1>; + #size-cells = <0>; + clock-names = "fck"; + clocks = <&k3_clks 110 1>; + power-domains = <&k3_pds 110>; + }; + + main_i2c1: i2c@2010000 { + compatible = "ti,am654-i2c", "ti,omap4-i2c"; + reg = <0x0 0x2010000 0x0 0x100>; + interrupts = <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>; + #address-cells = <1>; + #size-cells = <0>; + clock-names = "fck"; + clocks = <&k3_clks 111 1>; + power-domains = <&k3_pds 111>; + }; + + main_i2c2: i2c@2020000 { + compatible = "ti,am654-i2c", "ti,omap4-i2c"; + reg = <0x0 0x2020000 0x0 0x100>; + interrupts = <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>; + #address-cells = <1>; + #size-cells = <0>; + clock-names = "fck"; + clocks = <&k3_clks 112 1>; + power-domains = <&k3_pds 112>; + }; + + main_i2c3: i2c@2030000 { + compatible = "ti,am654-i2c", "ti,omap4-i2c"; + reg = <0x0 0x2030000 0x0 0x100>; + interrupts = <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>; + #address-cells = <1>; + #size-cells = <0>; + clock-names = "fck"; + clocks = <&k3_clks 113 1>; + power-domains = <&k3_pds 113>; + }; }; diff --git a/arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi b/arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi index 8c611d16df44..1fd027748e1f 100644 --- a/arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi @@ -15,4 +15,15 @@ clock-frequency = <96000000>; current-speed = <115200>; }; + + mcu_i2c0: i2c@40b00000 { + compatible = "ti,am654-i2c", "ti,omap4-i2c"; + reg = <0x0 0x40b00000 0x0 0x100>; + interrupts = <GIC_SPI 564 IRQ_TYPE_LEVEL_HIGH>; + #address-cells = <1>; + #size-cells = <0>; + clock-names = "fck"; + clocks = <&k3_clks 114 1>; + power-domains = <&k3_pds 114>; + }; }; diff --git a/arch/arm64/boot/dts/ti/k3-am65-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-am65-wakeup.dtsi index 19b46f40789b..9e8467ce7ad8 100644 --- a/arch/arm64/boot/dts/ti/k3-am65-wakeup.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am65-wakeup.dtsi @@ -51,4 +51,15 @@ clock-frequency = <48000000>; current-speed = <115200>; }; + + wkup_i2c0: i2c@42120000 { + compatible = "ti,am654-i2c", "ti,omap4-i2c"; + reg = <0x42120000 0x100>; + interrupts = <GIC_SPI 696 IRQ_TYPE_LEVEL_HIGH>; + #address-cells = <1>; + #size-cells = <0>; + clock-names = "fck"; + clocks = <&k3_clks 115 1>; + power-domains = <&k3_pds 115>; + }; }; diff --git a/arch/arm64/boot/dts/ti/k3-am65.dtsi b/arch/arm64/boot/dts/ti/k3-am65.dtsi index 6fdfc7815811..50f4be2047a9 100644 --- a/arch/arm64/boot/dts/ti/k3-am65.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am65.dtsi @@ -23,6 +23,12 @@ serial2 = &main_uart0; serial3 = &main_uart1; serial4 = &main_uart2; + i2c0 = &wkup_i2c0; + i2c1 = &mcu_i2c0; + i2c2 = &main_i2c0; + i2c3 = &main_i2c1; + i2c4 = &main_i2c2; + i2c5 = &main_i2c3; }; chosen { }; diff --git a/arch/arm64/boot/dts/ti/k3-am654-base-board.dts b/arch/arm64/boot/dts/ti/k3-am654-base-board.dts index cbf9d3dfeaa3..bd5a0069191d 100644 --- a/arch/arm64/boot/dts/ti/k3-am654-base-board.dts +++ b/arch/arm64/boot/dts/ti/k3-am654-base-board.dts @@ -35,6 +35,15 @@ }; }; +&wkup_pmx0 { + wkup_i2c0_pins_default: wkup-i2c0-pins-default { + pinctrl-single,pins = < + AM65X_WKUP_IOPAD(0x00e0, PIN_INPUT, 0) /* (AC7) WKUP_I2C0_SCL */ + AM65X_WKUP_IOPAD(0x00e4, PIN_INPUT, 0) /* (AD6) WKUP_I2C0_SDA */ + >; + }; +}; + &main_pmx0 { main_uart0_pins_default: main-uart0-pins-default { pinctrl-single,pins = < @@ -44,6 +53,29 @@ AM65X_IOPAD(0x01f0, PIN_OUTPUT, 0) /* (AD11) UART0_RTSn */ >; }; + + main_i2c2_pins_default: main-i2c2-pins-default { + pinctrl-single,pins = < + AM65X_IOPAD(0x0074, PIN_INPUT, 5) /* (T27) GPMC0_CSn3.I2C2_SCL */ + AM65X_IOPAD(0x0070, PIN_INPUT, 5) /* (R25) GPMC0_CSn2.I2C2_SDA */ + >; + }; +}; + +&main_pmx1 { + main_i2c0_pins_default: main-i2c0-pins-default { + pinctrl-single,pins = < + AM65X_IOPAD(0x0000, PIN_INPUT, 0) /* (D20) I2C0_SCL */ + AM65X_IOPAD(0x0004, PIN_INPUT, 0) /* (C21) I2C0_SDA */ + >; + }; + + main_i2c1_pins_default: main-i2c1-pins-default { + pinctrl-single,pins = < + AM65X_IOPAD(0x0008, PIN_INPUT, 0) /* (B21) I2C1_SCL */ + AM65X_IOPAD(0x000c, PIN_INPUT, 0) /* (E21) I2C1_SDA */ + >; + }; }; &wkup_uart0 { @@ -55,3 +87,41 @@ pinctrl-names = "default"; pinctrl-0 = <&main_uart0_pins_default>; }; + +&wkup_i2c0 { + pinctrl-names = "default"; + pinctrl-0 = <&wkup_i2c0_pins_default>; + clock-frequency = <400000>; + + pca9554: gpio@39 { + compatible = "nxp,pca9554"; + reg = <0x39>; + gpio-controller; + #gpio-cells = <2>; + }; +}; + +&main_i2c0 { + pinctrl-names = "default"; + pinctrl-0 = <&main_i2c0_pins_default>; + clock-frequency = <400000>; + + pca9555: gpio@21 { + compatible = "nxp,pca9555"; + reg = <0x21>; + gpio-controller; + #gpio-cells = <2>; + }; +}; + +&main_i2c1 { + pinctrl-names = "default"; + pinctrl-0 = <&main_i2c1_pins_default>; + clock-frequency = <400000>; +}; + +&main_i2c2 { + pinctrl-names = "default"; + pinctrl-0 = <&main_i2c2_pins_default>; + clock-frequency = <400000>; +}; -- 2.19.1 ^ permalink raw reply related [flat|nested] 50+ messages in thread
* [PATCH v2 4/4] arm64: dts: ti: k3-am654-base-board: Add I2C nodes @ 2018-11-13 6:01 ` Vignesh R 0 siblings, 0 replies; 50+ messages in thread From: Vignesh R @ 2018-11-13 6:01 UTC (permalink / raw) To: linux-arm-kernel Add DT entries for I2C instances present in AM654 SoC. Signed-off-by: Vignesh R <vigneshr@ti.com> --- arch/arm64/boot/dts/ti/k3-am65-main.dtsi | 44 ++++++++++++ arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi | 11 +++ arch/arm64/boot/dts/ti/k3-am65-wakeup.dtsi | 11 +++ arch/arm64/boot/dts/ti/k3-am65.dtsi | 6 ++ .../arm64/boot/dts/ti/k3-am654-base-board.dts | 70 +++++++++++++++++++ 5 files changed, 142 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-am65-main.dtsi b/arch/arm64/boot/dts/ti/k3-am65-main.dtsi index f7c2a60d5c80..916434839603 100644 --- a/arch/arm64/boot/dts/ti/k3-am65-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am65-main.dtsi @@ -85,4 +85,48 @@ pinctrl-single,register-width = <32>; pinctrl-single,function-mask = <0xffffffff>; }; + + main_i2c0: i2c at 2000000 { + compatible = "ti,am654-i2c", "ti,omap4-i2c"; + reg = <0x0 0x2000000 0x0 0x100>; + interrupts = <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>; + #address-cells = <1>; + #size-cells = <0>; + clock-names = "fck"; + clocks = <&k3_clks 110 1>; + power-domains = <&k3_pds 110>; + }; + + main_i2c1: i2c at 2010000 { + compatible = "ti,am654-i2c", "ti,omap4-i2c"; + reg = <0x0 0x2010000 0x0 0x100>; + interrupts = <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>; + #address-cells = <1>; + #size-cells = <0>; + clock-names = "fck"; + clocks = <&k3_clks 111 1>; + power-domains = <&k3_pds 111>; + }; + + main_i2c2: i2c at 2020000 { + compatible = "ti,am654-i2c", "ti,omap4-i2c"; + reg = <0x0 0x2020000 0x0 0x100>; + interrupts = <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>; + #address-cells = <1>; + #size-cells = <0>; + clock-names = "fck"; + clocks = <&k3_clks 112 1>; + power-domains = <&k3_pds 112>; + }; + + main_i2c3: i2c at 2030000 { + compatible = "ti,am654-i2c", "ti,omap4-i2c"; + reg = <0x0 0x2030000 0x0 0x100>; + interrupts = <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>; + #address-cells = <1>; + #size-cells = <0>; + clock-names = "fck"; + clocks = <&k3_clks 113 1>; + power-domains = <&k3_pds 113>; + }; }; diff --git a/arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi b/arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi index 8c611d16df44..1fd027748e1f 100644 --- a/arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi @@ -15,4 +15,15 @@ clock-frequency = <96000000>; current-speed = <115200>; }; + + mcu_i2c0: i2c at 40b00000 { + compatible = "ti,am654-i2c", "ti,omap4-i2c"; + reg = <0x0 0x40b00000 0x0 0x100>; + interrupts = <GIC_SPI 564 IRQ_TYPE_LEVEL_HIGH>; + #address-cells = <1>; + #size-cells = <0>; + clock-names = "fck"; + clocks = <&k3_clks 114 1>; + power-domains = <&k3_pds 114>; + }; }; diff --git a/arch/arm64/boot/dts/ti/k3-am65-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-am65-wakeup.dtsi index 19b46f40789b..9e8467ce7ad8 100644 --- a/arch/arm64/boot/dts/ti/k3-am65-wakeup.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am65-wakeup.dtsi @@ -51,4 +51,15 @@ clock-frequency = <48000000>; current-speed = <115200>; }; + + wkup_i2c0: i2c at 42120000 { + compatible = "ti,am654-i2c", "ti,omap4-i2c"; + reg = <0x42120000 0x100>; + interrupts = <GIC_SPI 696 IRQ_TYPE_LEVEL_HIGH>; + #address-cells = <1>; + #size-cells = <0>; + clock-names = "fck"; + clocks = <&k3_clks 115 1>; + power-domains = <&k3_pds 115>; + }; }; diff --git a/arch/arm64/boot/dts/ti/k3-am65.dtsi b/arch/arm64/boot/dts/ti/k3-am65.dtsi index 6fdfc7815811..50f4be2047a9 100644 --- a/arch/arm64/boot/dts/ti/k3-am65.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am65.dtsi @@ -23,6 +23,12 @@ serial2 = &main_uart0; serial3 = &main_uart1; serial4 = &main_uart2; + i2c0 = &wkup_i2c0; + i2c1 = &mcu_i2c0; + i2c2 = &main_i2c0; + i2c3 = &main_i2c1; + i2c4 = &main_i2c2; + i2c5 = &main_i2c3; }; chosen { }; diff --git a/arch/arm64/boot/dts/ti/k3-am654-base-board.dts b/arch/arm64/boot/dts/ti/k3-am654-base-board.dts index cbf9d3dfeaa3..bd5a0069191d 100644 --- a/arch/arm64/boot/dts/ti/k3-am654-base-board.dts +++ b/arch/arm64/boot/dts/ti/k3-am654-base-board.dts @@ -35,6 +35,15 @@ }; }; +&wkup_pmx0 { + wkup_i2c0_pins_default: wkup-i2c0-pins-default { + pinctrl-single,pins = < + AM65X_WKUP_IOPAD(0x00e0, PIN_INPUT, 0) /* (AC7) WKUP_I2C0_SCL */ + AM65X_WKUP_IOPAD(0x00e4, PIN_INPUT, 0) /* (AD6) WKUP_I2C0_SDA */ + >; + }; +}; + &main_pmx0 { main_uart0_pins_default: main-uart0-pins-default { pinctrl-single,pins = < @@ -44,6 +53,29 @@ AM65X_IOPAD(0x01f0, PIN_OUTPUT, 0) /* (AD11) UART0_RTSn */ >; }; + + main_i2c2_pins_default: main-i2c2-pins-default { + pinctrl-single,pins = < + AM65X_IOPAD(0x0074, PIN_INPUT, 5) /* (T27) GPMC0_CSn3.I2C2_SCL */ + AM65X_IOPAD(0x0070, PIN_INPUT, 5) /* (R25) GPMC0_CSn2.I2C2_SDA */ + >; + }; +}; + +&main_pmx1 { + main_i2c0_pins_default: main-i2c0-pins-default { + pinctrl-single,pins = < + AM65X_IOPAD(0x0000, PIN_INPUT, 0) /* (D20) I2C0_SCL */ + AM65X_IOPAD(0x0004, PIN_INPUT, 0) /* (C21) I2C0_SDA */ + >; + }; + + main_i2c1_pins_default: main-i2c1-pins-default { + pinctrl-single,pins = < + AM65X_IOPAD(0x0008, PIN_INPUT, 0) /* (B21) I2C1_SCL */ + AM65X_IOPAD(0x000c, PIN_INPUT, 0) /* (E21) I2C1_SDA */ + >; + }; }; &wkup_uart0 { @@ -55,3 +87,41 @@ pinctrl-names = "default"; pinctrl-0 = <&main_uart0_pins_default>; }; + +&wkup_i2c0 { + pinctrl-names = "default"; + pinctrl-0 = <&wkup_i2c0_pins_default>; + clock-frequency = <400000>; + + pca9554: gpio at 39 { + compatible = "nxp,pca9554"; + reg = <0x39>; + gpio-controller; + #gpio-cells = <2>; + }; +}; + +&main_i2c0 { + pinctrl-names = "default"; + pinctrl-0 = <&main_i2c0_pins_default>; + clock-frequency = <400000>; + + pca9555: gpio at 21 { + compatible = "nxp,pca9555"; + reg = <0x21>; + gpio-controller; + #gpio-cells = <2>; + }; +}; + +&main_i2c1 { + pinctrl-names = "default"; + pinctrl-0 = <&main_i2c1_pins_default>; + clock-frequency = <400000>; +}; + +&main_i2c2 { + pinctrl-names = "default"; + pinctrl-0 = <&main_i2c2_pins_default>; + clock-frequency = <400000>; +}; -- 2.19.1 ^ permalink raw reply related [flat|nested] 50+ messages in thread
* [PATCH v2 4/4] arm64: dts: ti: k3-am654-base-board: Add I2C nodes @ 2018-11-13 6:01 ` Vignesh R 0 siblings, 0 replies; 50+ messages in thread From: Vignesh R @ 2018-11-13 6:01 UTC (permalink / raw) To: Tero Kristo, Rob Herring Cc: Nishanth Menon, Mark Rutland, linux-kernel, linux-arm-kernel, devicetree, Vignesh R, linux-omap, Linus Walleij, Tony Lindgren Add DT entries for I2C instances present in AM654 SoC. Signed-off-by: Vignesh R <vigneshr@ti.com> --- arch/arm64/boot/dts/ti/k3-am65-main.dtsi | 44 ++++++++++++ arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi | 11 +++ arch/arm64/boot/dts/ti/k3-am65-wakeup.dtsi | 11 +++ arch/arm64/boot/dts/ti/k3-am65.dtsi | 6 ++ .../arm64/boot/dts/ti/k3-am654-base-board.dts | 70 +++++++++++++++++++ 5 files changed, 142 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-am65-main.dtsi b/arch/arm64/boot/dts/ti/k3-am65-main.dtsi index f7c2a60d5c80..916434839603 100644 --- a/arch/arm64/boot/dts/ti/k3-am65-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am65-main.dtsi @@ -85,4 +85,48 @@ pinctrl-single,register-width = <32>; pinctrl-single,function-mask = <0xffffffff>; }; + + main_i2c0: i2c@2000000 { + compatible = "ti,am654-i2c", "ti,omap4-i2c"; + reg = <0x0 0x2000000 0x0 0x100>; + interrupts = <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>; + #address-cells = <1>; + #size-cells = <0>; + clock-names = "fck"; + clocks = <&k3_clks 110 1>; + power-domains = <&k3_pds 110>; + }; + + main_i2c1: i2c@2010000 { + compatible = "ti,am654-i2c", "ti,omap4-i2c"; + reg = <0x0 0x2010000 0x0 0x100>; + interrupts = <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>; + #address-cells = <1>; + #size-cells = <0>; + clock-names = "fck"; + clocks = <&k3_clks 111 1>; + power-domains = <&k3_pds 111>; + }; + + main_i2c2: i2c@2020000 { + compatible = "ti,am654-i2c", "ti,omap4-i2c"; + reg = <0x0 0x2020000 0x0 0x100>; + interrupts = <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>; + #address-cells = <1>; + #size-cells = <0>; + clock-names = "fck"; + clocks = <&k3_clks 112 1>; + power-domains = <&k3_pds 112>; + }; + + main_i2c3: i2c@2030000 { + compatible = "ti,am654-i2c", "ti,omap4-i2c"; + reg = <0x0 0x2030000 0x0 0x100>; + interrupts = <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>; + #address-cells = <1>; + #size-cells = <0>; + clock-names = "fck"; + clocks = <&k3_clks 113 1>; + power-domains = <&k3_pds 113>; + }; }; diff --git a/arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi b/arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi index 8c611d16df44..1fd027748e1f 100644 --- a/arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi @@ -15,4 +15,15 @@ clock-frequency = <96000000>; current-speed = <115200>; }; + + mcu_i2c0: i2c@40b00000 { + compatible = "ti,am654-i2c", "ti,omap4-i2c"; + reg = <0x0 0x40b00000 0x0 0x100>; + interrupts = <GIC_SPI 564 IRQ_TYPE_LEVEL_HIGH>; + #address-cells = <1>; + #size-cells = <0>; + clock-names = "fck"; + clocks = <&k3_clks 114 1>; + power-domains = <&k3_pds 114>; + }; }; diff --git a/arch/arm64/boot/dts/ti/k3-am65-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-am65-wakeup.dtsi index 19b46f40789b..9e8467ce7ad8 100644 --- a/arch/arm64/boot/dts/ti/k3-am65-wakeup.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am65-wakeup.dtsi @@ -51,4 +51,15 @@ clock-frequency = <48000000>; current-speed = <115200>; }; + + wkup_i2c0: i2c@42120000 { + compatible = "ti,am654-i2c", "ti,omap4-i2c"; + reg = <0x42120000 0x100>; + interrupts = <GIC_SPI 696 IRQ_TYPE_LEVEL_HIGH>; + #address-cells = <1>; + #size-cells = <0>; + clock-names = "fck"; + clocks = <&k3_clks 115 1>; + power-domains = <&k3_pds 115>; + }; }; diff --git a/arch/arm64/boot/dts/ti/k3-am65.dtsi b/arch/arm64/boot/dts/ti/k3-am65.dtsi index 6fdfc7815811..50f4be2047a9 100644 --- a/arch/arm64/boot/dts/ti/k3-am65.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am65.dtsi @@ -23,6 +23,12 @@ serial2 = &main_uart0; serial3 = &main_uart1; serial4 = &main_uart2; + i2c0 = &wkup_i2c0; + i2c1 = &mcu_i2c0; + i2c2 = &main_i2c0; + i2c3 = &main_i2c1; + i2c4 = &main_i2c2; + i2c5 = &main_i2c3; }; chosen { }; diff --git a/arch/arm64/boot/dts/ti/k3-am654-base-board.dts b/arch/arm64/boot/dts/ti/k3-am654-base-board.dts index cbf9d3dfeaa3..bd5a0069191d 100644 --- a/arch/arm64/boot/dts/ti/k3-am654-base-board.dts +++ b/arch/arm64/boot/dts/ti/k3-am654-base-board.dts @@ -35,6 +35,15 @@ }; }; +&wkup_pmx0 { + wkup_i2c0_pins_default: wkup-i2c0-pins-default { + pinctrl-single,pins = < + AM65X_WKUP_IOPAD(0x00e0, PIN_INPUT, 0) /* (AC7) WKUP_I2C0_SCL */ + AM65X_WKUP_IOPAD(0x00e4, PIN_INPUT, 0) /* (AD6) WKUP_I2C0_SDA */ + >; + }; +}; + &main_pmx0 { main_uart0_pins_default: main-uart0-pins-default { pinctrl-single,pins = < @@ -44,6 +53,29 @@ AM65X_IOPAD(0x01f0, PIN_OUTPUT, 0) /* (AD11) UART0_RTSn */ >; }; + + main_i2c2_pins_default: main-i2c2-pins-default { + pinctrl-single,pins = < + AM65X_IOPAD(0x0074, PIN_INPUT, 5) /* (T27) GPMC0_CSn3.I2C2_SCL */ + AM65X_IOPAD(0x0070, PIN_INPUT, 5) /* (R25) GPMC0_CSn2.I2C2_SDA */ + >; + }; +}; + +&main_pmx1 { + main_i2c0_pins_default: main-i2c0-pins-default { + pinctrl-single,pins = < + AM65X_IOPAD(0x0000, PIN_INPUT, 0) /* (D20) I2C0_SCL */ + AM65X_IOPAD(0x0004, PIN_INPUT, 0) /* (C21) I2C0_SDA */ + >; + }; + + main_i2c1_pins_default: main-i2c1-pins-default { + pinctrl-single,pins = < + AM65X_IOPAD(0x0008, PIN_INPUT, 0) /* (B21) I2C1_SCL */ + AM65X_IOPAD(0x000c, PIN_INPUT, 0) /* (E21) I2C1_SDA */ + >; + }; }; &wkup_uart0 { @@ -55,3 +87,41 @@ pinctrl-names = "default"; pinctrl-0 = <&main_uart0_pins_default>; }; + +&wkup_i2c0 { + pinctrl-names = "default"; + pinctrl-0 = <&wkup_i2c0_pins_default>; + clock-frequency = <400000>; + + pca9554: gpio@39 { + compatible = "nxp,pca9554"; + reg = <0x39>; + gpio-controller; + #gpio-cells = <2>; + }; +}; + +&main_i2c0 { + pinctrl-names = "default"; + pinctrl-0 = <&main_i2c0_pins_default>; + clock-frequency = <400000>; + + pca9555: gpio@21 { + compatible = "nxp,pca9555"; + reg = <0x21>; + gpio-controller; + #gpio-cells = <2>; + }; +}; + +&main_i2c1 { + pinctrl-names = "default"; + pinctrl-0 = <&main_i2c1_pins_default>; + clock-frequency = <400000>; +}; + +&main_i2c2 { + pinctrl-names = "default"; + pinctrl-0 = <&main_i2c2_pins_default>; + clock-frequency = <400000>; +}; -- 2.19.1 ^ permalink raw reply related [flat|nested] 50+ messages in thread
* Re: [PATCH v2 4/4] arm64: dts: ti: k3-am654-base-board: Add I2C nodes 2018-11-13 6:01 ` Vignesh R (?) @ 2018-11-17 16:09 ` Nishanth Menon -1 siblings, 0 replies; 50+ messages in thread From: Nishanth Menon @ 2018-11-17 16:09 UTC (permalink / raw) To: Vignesh R Cc: Tero Kristo, Rob Herring, Mark Rutland, linux-kernel, linux-arm-kernel, devicetree, linux-omap, Linus Walleij, Tony Lindgren On 11:31-20181113, Vignesh R wrote: > Add DT entries for I2C instances present in AM654 SoC. > I2C does'nt really belong to a series introducing pinmux ;)... but yeah, I get the dependency of pinmux. > Signed-off-by: Vignesh R <vigneshr@ti.com> > --- > arch/arm64/boot/dts/ti/k3-am65-main.dtsi | 44 ++++++++++++ > arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi | 11 +++ > arch/arm64/boot/dts/ti/k3-am65-wakeup.dtsi | 11 +++ > arch/arm64/boot/dts/ti/k3-am65.dtsi | 6 ++ > .../arm64/boot/dts/ti/k3-am654-base-board.dts | 70 +++++++++++++++++++ > 5 files changed, 142 insertions(+) > > diff --git a/arch/arm64/boot/dts/ti/k3-am65-main.dtsi b/arch/arm64/boot/dts/ti/k3-am65-main.dtsi > index f7c2a60d5c80..916434839603 100644 > --- a/arch/arm64/boot/dts/ti/k3-am65-main.dtsi > +++ b/arch/arm64/boot/dts/ti/k3-am65-main.dtsi > @@ -85,4 +85,48 @@ > pinctrl-single,register-width = <32>; > pinctrl-single,function-mask = <0xffffffff>; > }; > + > + main_i2c0: i2c@2000000 { > + compatible = "ti,am654-i2c", "ti,omap4-i2c"; > + reg = <0x0 0x2000000 0x0 0x100>; > + interrupts = <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>; > + #address-cells = <1>; > + #size-cells = <0>; > + clock-names = "fck"; > + clocks = <&k3_clks 110 1>; > + power-domains = <&k3_pds 110>; > + }; > + > + main_i2c1: i2c@2010000 { > + compatible = "ti,am654-i2c", "ti,omap4-i2c"; > + reg = <0x0 0x2010000 0x0 0x100>; > + interrupts = <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>; > + #address-cells = <1>; > + #size-cells = <0>; > + clock-names = "fck"; > + clocks = <&k3_clks 111 1>; > + power-domains = <&k3_pds 111>; > + }; > + > + main_i2c2: i2c@2020000 { > + compatible = "ti,am654-i2c", "ti,omap4-i2c"; > + reg = <0x0 0x2020000 0x0 0x100>; > + interrupts = <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>; > + #address-cells = <1>; > + #size-cells = <0>; > + clock-names = "fck"; > + clocks = <&k3_clks 112 1>; > + power-domains = <&k3_pds 112>; > + }; > + > + main_i2c3: i2c@2030000 { > + compatible = "ti,am654-i2c", "ti,omap4-i2c"; > + reg = <0x0 0x2030000 0x0 0x100>; > + interrupts = <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>; > + #address-cells = <1>; > + #size-cells = <0>; > + clock-names = "fck"; > + clocks = <&k3_clks 113 1>; > + power-domains = <&k3_pds 113>; > + }; > }; > diff --git a/arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi b/arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi > index 8c611d16df44..1fd027748e1f 100644 > --- a/arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi > +++ b/arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi > @@ -15,4 +15,15 @@ > clock-frequency = <96000000>; > current-speed = <115200>; > }; > + > + mcu_i2c0: i2c@40b00000 { > + compatible = "ti,am654-i2c", "ti,omap4-i2c"; > + reg = <0x0 0x40b00000 0x0 0x100>; > + interrupts = <GIC_SPI 564 IRQ_TYPE_LEVEL_HIGH>; > + #address-cells = <1>; > + #size-cells = <0>; > + clock-names = "fck"; > + clocks = <&k3_clks 114 1>; > + power-domains = <&k3_pds 114>; > + }; > }; > diff --git a/arch/arm64/boot/dts/ti/k3-am65-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-am65-wakeup.dtsi > index 19b46f40789b..9e8467ce7ad8 100644 > --- a/arch/arm64/boot/dts/ti/k3-am65-wakeup.dtsi > +++ b/arch/arm64/boot/dts/ti/k3-am65-wakeup.dtsi > @@ -51,4 +51,15 @@ > clock-frequency = <48000000>; > current-speed = <115200>; > }; > + > + wkup_i2c0: i2c@42120000 { > + compatible = "ti,am654-i2c", "ti,omap4-i2c"; > + reg = <0x42120000 0x100>; > + interrupts = <GIC_SPI 696 IRQ_TYPE_LEVEL_HIGH>; > + #address-cells = <1>; > + #size-cells = <0>; > + clock-names = "fck"; > + clocks = <&k3_clks 115 1>; > + power-domains = <&k3_pds 115>; > + }; > }; > diff --git a/arch/arm64/boot/dts/ti/k3-am65.dtsi b/arch/arm64/boot/dts/ti/k3-am65.dtsi > index 6fdfc7815811..50f4be2047a9 100644 > --- a/arch/arm64/boot/dts/ti/k3-am65.dtsi > +++ b/arch/arm64/boot/dts/ti/k3-am65.dtsi > @@ -23,6 +23,12 @@ > serial2 = &main_uart0; > serial3 = &main_uart1; > serial4 = &main_uart2; > + i2c0 = &wkup_i2c0; > + i2c1 = &mcu_i2c0; > + i2c2 = &main_i2c0; > + i2c3 = &main_i2c1; > + i2c4 = &main_i2c2; > + i2c5 = &main_i2c3; > }; > > chosen { }; > diff --git a/arch/arm64/boot/dts/ti/k3-am654-base-board.dts b/arch/arm64/boot/dts/ti/k3-am654-base-board.dts > index cbf9d3dfeaa3..bd5a0069191d 100644 > --- a/arch/arm64/boot/dts/ti/k3-am654-base-board.dts > +++ b/arch/arm64/boot/dts/ti/k3-am654-base-board.dts > @@ -35,6 +35,15 @@ > }; > }; > > +&wkup_pmx0 { > + wkup_i2c0_pins_default: wkup-i2c0-pins-default { > + pinctrl-single,pins = < > + AM65X_WKUP_IOPAD(0x00e0, PIN_INPUT, 0) /* (AC7) WKUP_I2C0_SCL */ > + AM65X_WKUP_IOPAD(0x00e4, PIN_INPUT, 0) /* (AD6) WKUP_I2C0_SDA */ > + >; > + }; > +}; > + > &main_pmx0 { > main_uart0_pins_default: main-uart0-pins-default { > pinctrl-single,pins = < > @@ -44,6 +53,29 @@ > AM65X_IOPAD(0x01f0, PIN_OUTPUT, 0) /* (AD11) UART0_RTSn */ > >; > }; > + > + main_i2c2_pins_default: main-i2c2-pins-default { > + pinctrl-single,pins = < > + AM65X_IOPAD(0x0074, PIN_INPUT, 5) /* (T27) GPMC0_CSn3.I2C2_SCL */ > + AM65X_IOPAD(0x0070, PIN_INPUT, 5) /* (R25) GPMC0_CSn2.I2C2_SDA */ > + >; > + }; > +}; > + > +&main_pmx1 { > + main_i2c0_pins_default: main-i2c0-pins-default { > + pinctrl-single,pins = < > + AM65X_IOPAD(0x0000, PIN_INPUT, 0) /* (D20) I2C0_SCL */ > + AM65X_IOPAD(0x0004, PIN_INPUT, 0) /* (C21) I2C0_SDA */ > + >; > + }; > + > + main_i2c1_pins_default: main-i2c1-pins-default { > + pinctrl-single,pins = < > + AM65X_IOPAD(0x0008, PIN_INPUT, 0) /* (B21) I2C1_SCL */ > + AM65X_IOPAD(0x000c, PIN_INPUT, 0) /* (E21) I2C1_SDA */ > + >; > + }; > }; > > &wkup_uart0 { > @@ -55,3 +87,41 @@ > pinctrl-names = "default"; > pinctrl-0 = <&main_uart0_pins_default>; > }; > + > +&wkup_i2c0 { > + pinctrl-names = "default"; > + pinctrl-0 = <&wkup_i2c0_pins_default>; > + clock-frequency = <400000>; > + > + pca9554: gpio@39 { > + compatible = "nxp,pca9554"; > + reg = <0x39>; > + gpio-controller; > + #gpio-cells = <2>; Do make sure that defconfig has the GPIO expander built as modules at the very least. > + }; > +}; > + > +&main_i2c0 { > + pinctrl-names = "default"; > + pinctrl-0 = <&main_i2c0_pins_default>; > + clock-frequency = <400000>; > + > + pca9555: gpio@21 { > + compatible = "nxp,pca9555"; > + reg = <0x21>; > + gpio-controller; > + #gpio-cells = <2>; > + }; > +}; > + > +&main_i2c1 { > + pinctrl-names = "default"; > + pinctrl-0 = <&main_i2c1_pins_default>; > + clock-frequency = <400000>; > +}; > + > +&main_i2c2 { > + pinctrl-names = "default"; > + pinctrl-0 = <&main_i2c2_pins_default>; > + clock-frequency = <400000>; > +}; > -- > 2.19.1 > Acked-by: Nishanth Menon <nm@ti.com> -- Regards, Nishanth Menon ^ permalink raw reply [flat|nested] 50+ messages in thread
* [PATCH v2 4/4] arm64: dts: ti: k3-am654-base-board: Add I2C nodes @ 2018-11-17 16:09 ` Nishanth Menon 0 siblings, 0 replies; 50+ messages in thread From: Nishanth Menon @ 2018-11-17 16:09 UTC (permalink / raw) To: linux-arm-kernel On 11:31-20181113, Vignesh R wrote: > Add DT entries for I2C instances present in AM654 SoC. > I2C does'nt really belong to a series introducing pinmux ;)... but yeah, I get the dependency of pinmux. > Signed-off-by: Vignesh R <vigneshr@ti.com> > --- > arch/arm64/boot/dts/ti/k3-am65-main.dtsi | 44 ++++++++++++ > arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi | 11 +++ > arch/arm64/boot/dts/ti/k3-am65-wakeup.dtsi | 11 +++ > arch/arm64/boot/dts/ti/k3-am65.dtsi | 6 ++ > .../arm64/boot/dts/ti/k3-am654-base-board.dts | 70 +++++++++++++++++++ > 5 files changed, 142 insertions(+) > > diff --git a/arch/arm64/boot/dts/ti/k3-am65-main.dtsi b/arch/arm64/boot/dts/ti/k3-am65-main.dtsi > index f7c2a60d5c80..916434839603 100644 > --- a/arch/arm64/boot/dts/ti/k3-am65-main.dtsi > +++ b/arch/arm64/boot/dts/ti/k3-am65-main.dtsi > @@ -85,4 +85,48 @@ > pinctrl-single,register-width = <32>; > pinctrl-single,function-mask = <0xffffffff>; > }; > + > + main_i2c0: i2c at 2000000 { > + compatible = "ti,am654-i2c", "ti,omap4-i2c"; > + reg = <0x0 0x2000000 0x0 0x100>; > + interrupts = <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>; > + #address-cells = <1>; > + #size-cells = <0>; > + clock-names = "fck"; > + clocks = <&k3_clks 110 1>; > + power-domains = <&k3_pds 110>; > + }; > + > + main_i2c1: i2c at 2010000 { > + compatible = "ti,am654-i2c", "ti,omap4-i2c"; > + reg = <0x0 0x2010000 0x0 0x100>; > + interrupts = <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>; > + #address-cells = <1>; > + #size-cells = <0>; > + clock-names = "fck"; > + clocks = <&k3_clks 111 1>; > + power-domains = <&k3_pds 111>; > + }; > + > + main_i2c2: i2c at 2020000 { > + compatible = "ti,am654-i2c", "ti,omap4-i2c"; > + reg = <0x0 0x2020000 0x0 0x100>; > + interrupts = <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>; > + #address-cells = <1>; > + #size-cells = <0>; > + clock-names = "fck"; > + clocks = <&k3_clks 112 1>; > + power-domains = <&k3_pds 112>; > + }; > + > + main_i2c3: i2c at 2030000 { > + compatible = "ti,am654-i2c", "ti,omap4-i2c"; > + reg = <0x0 0x2030000 0x0 0x100>; > + interrupts = <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>; > + #address-cells = <1>; > + #size-cells = <0>; > + clock-names = "fck"; > + clocks = <&k3_clks 113 1>; > + power-domains = <&k3_pds 113>; > + }; > }; > diff --git a/arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi b/arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi > index 8c611d16df44..1fd027748e1f 100644 > --- a/arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi > +++ b/arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi > @@ -15,4 +15,15 @@ > clock-frequency = <96000000>; > current-speed = <115200>; > }; > + > + mcu_i2c0: i2c at 40b00000 { > + compatible = "ti,am654-i2c", "ti,omap4-i2c"; > + reg = <0x0 0x40b00000 0x0 0x100>; > + interrupts = <GIC_SPI 564 IRQ_TYPE_LEVEL_HIGH>; > + #address-cells = <1>; > + #size-cells = <0>; > + clock-names = "fck"; > + clocks = <&k3_clks 114 1>; > + power-domains = <&k3_pds 114>; > + }; > }; > diff --git a/arch/arm64/boot/dts/ti/k3-am65-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-am65-wakeup.dtsi > index 19b46f40789b..9e8467ce7ad8 100644 > --- a/arch/arm64/boot/dts/ti/k3-am65-wakeup.dtsi > +++ b/arch/arm64/boot/dts/ti/k3-am65-wakeup.dtsi > @@ -51,4 +51,15 @@ > clock-frequency = <48000000>; > current-speed = <115200>; > }; > + > + wkup_i2c0: i2c at 42120000 { > + compatible = "ti,am654-i2c", "ti,omap4-i2c"; > + reg = <0x42120000 0x100>; > + interrupts = <GIC_SPI 696 IRQ_TYPE_LEVEL_HIGH>; > + #address-cells = <1>; > + #size-cells = <0>; > + clock-names = "fck"; > + clocks = <&k3_clks 115 1>; > + power-domains = <&k3_pds 115>; > + }; > }; > diff --git a/arch/arm64/boot/dts/ti/k3-am65.dtsi b/arch/arm64/boot/dts/ti/k3-am65.dtsi > index 6fdfc7815811..50f4be2047a9 100644 > --- a/arch/arm64/boot/dts/ti/k3-am65.dtsi > +++ b/arch/arm64/boot/dts/ti/k3-am65.dtsi > @@ -23,6 +23,12 @@ > serial2 = &main_uart0; > serial3 = &main_uart1; > serial4 = &main_uart2; > + i2c0 = &wkup_i2c0; > + i2c1 = &mcu_i2c0; > + i2c2 = &main_i2c0; > + i2c3 = &main_i2c1; > + i2c4 = &main_i2c2; > + i2c5 = &main_i2c3; > }; > > chosen { }; > diff --git a/arch/arm64/boot/dts/ti/k3-am654-base-board.dts b/arch/arm64/boot/dts/ti/k3-am654-base-board.dts > index cbf9d3dfeaa3..bd5a0069191d 100644 > --- a/arch/arm64/boot/dts/ti/k3-am654-base-board.dts > +++ b/arch/arm64/boot/dts/ti/k3-am654-base-board.dts > @@ -35,6 +35,15 @@ > }; > }; > > +&wkup_pmx0 { > + wkup_i2c0_pins_default: wkup-i2c0-pins-default { > + pinctrl-single,pins = < > + AM65X_WKUP_IOPAD(0x00e0, PIN_INPUT, 0) /* (AC7) WKUP_I2C0_SCL */ > + AM65X_WKUP_IOPAD(0x00e4, PIN_INPUT, 0) /* (AD6) WKUP_I2C0_SDA */ > + >; > + }; > +}; > + > &main_pmx0 { > main_uart0_pins_default: main-uart0-pins-default { > pinctrl-single,pins = < > @@ -44,6 +53,29 @@ > AM65X_IOPAD(0x01f0, PIN_OUTPUT, 0) /* (AD11) UART0_RTSn */ > >; > }; > + > + main_i2c2_pins_default: main-i2c2-pins-default { > + pinctrl-single,pins = < > + AM65X_IOPAD(0x0074, PIN_INPUT, 5) /* (T27) GPMC0_CSn3.I2C2_SCL */ > + AM65X_IOPAD(0x0070, PIN_INPUT, 5) /* (R25) GPMC0_CSn2.I2C2_SDA */ > + >; > + }; > +}; > + > +&main_pmx1 { > + main_i2c0_pins_default: main-i2c0-pins-default { > + pinctrl-single,pins = < > + AM65X_IOPAD(0x0000, PIN_INPUT, 0) /* (D20) I2C0_SCL */ > + AM65X_IOPAD(0x0004, PIN_INPUT, 0) /* (C21) I2C0_SDA */ > + >; > + }; > + > + main_i2c1_pins_default: main-i2c1-pins-default { > + pinctrl-single,pins = < > + AM65X_IOPAD(0x0008, PIN_INPUT, 0) /* (B21) I2C1_SCL */ > + AM65X_IOPAD(0x000c, PIN_INPUT, 0) /* (E21) I2C1_SDA */ > + >; > + }; > }; > > &wkup_uart0 { > @@ -55,3 +87,41 @@ > pinctrl-names = "default"; > pinctrl-0 = <&main_uart0_pins_default>; > }; > + > +&wkup_i2c0 { > + pinctrl-names = "default"; > + pinctrl-0 = <&wkup_i2c0_pins_default>; > + clock-frequency = <400000>; > + > + pca9554: gpio at 39 { > + compatible = "nxp,pca9554"; > + reg = <0x39>; > + gpio-controller; > + #gpio-cells = <2>; Do make sure that defconfig has the GPIO expander built as modules at the very least. > + }; > +}; > + > +&main_i2c0 { > + pinctrl-names = "default"; > + pinctrl-0 = <&main_i2c0_pins_default>; > + clock-frequency = <400000>; > + > + pca9555: gpio at 21 { > + compatible = "nxp,pca9555"; > + reg = <0x21>; > + gpio-controller; > + #gpio-cells = <2>; > + }; > +}; > + > +&main_i2c1 { > + pinctrl-names = "default"; > + pinctrl-0 = <&main_i2c1_pins_default>; > + clock-frequency = <400000>; > +}; > + > +&main_i2c2 { > + pinctrl-names = "default"; > + pinctrl-0 = <&main_i2c2_pins_default>; > + clock-frequency = <400000>; > +}; > -- > 2.19.1 > Acked-by: Nishanth Menon <nm@ti.com> -- Regards, Nishanth Menon ^ permalink raw reply [flat|nested] 50+ messages in thread
* Re: [PATCH v2 4/4] arm64: dts: ti: k3-am654-base-board: Add I2C nodes @ 2018-11-17 16:09 ` Nishanth Menon 0 siblings, 0 replies; 50+ messages in thread From: Nishanth Menon @ 2018-11-17 16:09 UTC (permalink / raw) To: Vignesh R Cc: Tero Kristo, Rob Herring, Mark Rutland, linux-kernel, linux-arm-kernel, devicetree, linux-omap, Linus Walleij, Tony Lindgren On 11:31-20181113, Vignesh R wrote: > Add DT entries for I2C instances present in AM654 SoC. > I2C does'nt really belong to a series introducing pinmux ;)... but yeah, I get the dependency of pinmux. > Signed-off-by: Vignesh R <vigneshr@ti.com> > --- > arch/arm64/boot/dts/ti/k3-am65-main.dtsi | 44 ++++++++++++ > arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi | 11 +++ > arch/arm64/boot/dts/ti/k3-am65-wakeup.dtsi | 11 +++ > arch/arm64/boot/dts/ti/k3-am65.dtsi | 6 ++ > .../arm64/boot/dts/ti/k3-am654-base-board.dts | 70 +++++++++++++++++++ > 5 files changed, 142 insertions(+) > > diff --git a/arch/arm64/boot/dts/ti/k3-am65-main.dtsi b/arch/arm64/boot/dts/ti/k3-am65-main.dtsi > index f7c2a60d5c80..916434839603 100644 > --- a/arch/arm64/boot/dts/ti/k3-am65-main.dtsi > +++ b/arch/arm64/boot/dts/ti/k3-am65-main.dtsi > @@ -85,4 +85,48 @@ > pinctrl-single,register-width = <32>; > pinctrl-single,function-mask = <0xffffffff>; > }; > + > + main_i2c0: i2c@2000000 { > + compatible = "ti,am654-i2c", "ti,omap4-i2c"; > + reg = <0x0 0x2000000 0x0 0x100>; > + interrupts = <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>; > + #address-cells = <1>; > + #size-cells = <0>; > + clock-names = "fck"; > + clocks = <&k3_clks 110 1>; > + power-domains = <&k3_pds 110>; > + }; > + > + main_i2c1: i2c@2010000 { > + compatible = "ti,am654-i2c", "ti,omap4-i2c"; > + reg = <0x0 0x2010000 0x0 0x100>; > + interrupts = <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>; > + #address-cells = <1>; > + #size-cells = <0>; > + clock-names = "fck"; > + clocks = <&k3_clks 111 1>; > + power-domains = <&k3_pds 111>; > + }; > + > + main_i2c2: i2c@2020000 { > + compatible = "ti,am654-i2c", "ti,omap4-i2c"; > + reg = <0x0 0x2020000 0x0 0x100>; > + interrupts = <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>; > + #address-cells = <1>; > + #size-cells = <0>; > + clock-names = "fck"; > + clocks = <&k3_clks 112 1>; > + power-domains = <&k3_pds 112>; > + }; > + > + main_i2c3: i2c@2030000 { > + compatible = "ti,am654-i2c", "ti,omap4-i2c"; > + reg = <0x0 0x2030000 0x0 0x100>; > + interrupts = <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>; > + #address-cells = <1>; > + #size-cells = <0>; > + clock-names = "fck"; > + clocks = <&k3_clks 113 1>; > + power-domains = <&k3_pds 113>; > + }; > }; > diff --git a/arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi b/arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi > index 8c611d16df44..1fd027748e1f 100644 > --- a/arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi > +++ b/arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi > @@ -15,4 +15,15 @@ > clock-frequency = <96000000>; > current-speed = <115200>; > }; > + > + mcu_i2c0: i2c@40b00000 { > + compatible = "ti,am654-i2c", "ti,omap4-i2c"; > + reg = <0x0 0x40b00000 0x0 0x100>; > + interrupts = <GIC_SPI 564 IRQ_TYPE_LEVEL_HIGH>; > + #address-cells = <1>; > + #size-cells = <0>; > + clock-names = "fck"; > + clocks = <&k3_clks 114 1>; > + power-domains = <&k3_pds 114>; > + }; > }; > diff --git a/arch/arm64/boot/dts/ti/k3-am65-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-am65-wakeup.dtsi > index 19b46f40789b..9e8467ce7ad8 100644 > --- a/arch/arm64/boot/dts/ti/k3-am65-wakeup.dtsi > +++ b/arch/arm64/boot/dts/ti/k3-am65-wakeup.dtsi > @@ -51,4 +51,15 @@ > clock-frequency = <48000000>; > current-speed = <115200>; > }; > + > + wkup_i2c0: i2c@42120000 { > + compatible = "ti,am654-i2c", "ti,omap4-i2c"; > + reg = <0x42120000 0x100>; > + interrupts = <GIC_SPI 696 IRQ_TYPE_LEVEL_HIGH>; > + #address-cells = <1>; > + #size-cells = <0>; > + clock-names = "fck"; > + clocks = <&k3_clks 115 1>; > + power-domains = <&k3_pds 115>; > + }; > }; > diff --git a/arch/arm64/boot/dts/ti/k3-am65.dtsi b/arch/arm64/boot/dts/ti/k3-am65.dtsi > index 6fdfc7815811..50f4be2047a9 100644 > --- a/arch/arm64/boot/dts/ti/k3-am65.dtsi > +++ b/arch/arm64/boot/dts/ti/k3-am65.dtsi > @@ -23,6 +23,12 @@ > serial2 = &main_uart0; > serial3 = &main_uart1; > serial4 = &main_uart2; > + i2c0 = &wkup_i2c0; > + i2c1 = &mcu_i2c0; > + i2c2 = &main_i2c0; > + i2c3 = &main_i2c1; > + i2c4 = &main_i2c2; > + i2c5 = &main_i2c3; > }; > > chosen { }; > diff --git a/arch/arm64/boot/dts/ti/k3-am654-base-board.dts b/arch/arm64/boot/dts/ti/k3-am654-base-board.dts > index cbf9d3dfeaa3..bd5a0069191d 100644 > --- a/arch/arm64/boot/dts/ti/k3-am654-base-board.dts > +++ b/arch/arm64/boot/dts/ti/k3-am654-base-board.dts > @@ -35,6 +35,15 @@ > }; > }; > > +&wkup_pmx0 { > + wkup_i2c0_pins_default: wkup-i2c0-pins-default { > + pinctrl-single,pins = < > + AM65X_WKUP_IOPAD(0x00e0, PIN_INPUT, 0) /* (AC7) WKUP_I2C0_SCL */ > + AM65X_WKUP_IOPAD(0x00e4, PIN_INPUT, 0) /* (AD6) WKUP_I2C0_SDA */ > + >; > + }; > +}; > + > &main_pmx0 { > main_uart0_pins_default: main-uart0-pins-default { > pinctrl-single,pins = < > @@ -44,6 +53,29 @@ > AM65X_IOPAD(0x01f0, PIN_OUTPUT, 0) /* (AD11) UART0_RTSn */ > >; > }; > + > + main_i2c2_pins_default: main-i2c2-pins-default { > + pinctrl-single,pins = < > + AM65X_IOPAD(0x0074, PIN_INPUT, 5) /* (T27) GPMC0_CSn3.I2C2_SCL */ > + AM65X_IOPAD(0x0070, PIN_INPUT, 5) /* (R25) GPMC0_CSn2.I2C2_SDA */ > + >; > + }; > +}; > + > +&main_pmx1 { > + main_i2c0_pins_default: main-i2c0-pins-default { > + pinctrl-single,pins = < > + AM65X_IOPAD(0x0000, PIN_INPUT, 0) /* (D20) I2C0_SCL */ > + AM65X_IOPAD(0x0004, PIN_INPUT, 0) /* (C21) I2C0_SDA */ > + >; > + }; > + > + main_i2c1_pins_default: main-i2c1-pins-default { > + pinctrl-single,pins = < > + AM65X_IOPAD(0x0008, PIN_INPUT, 0) /* (B21) I2C1_SCL */ > + AM65X_IOPAD(0x000c, PIN_INPUT, 0) /* (E21) I2C1_SDA */ > + >; > + }; > }; > > &wkup_uart0 { > @@ -55,3 +87,41 @@ > pinctrl-names = "default"; > pinctrl-0 = <&main_uart0_pins_default>; > }; > + > +&wkup_i2c0 { > + pinctrl-names = "default"; > + pinctrl-0 = <&wkup_i2c0_pins_default>; > + clock-frequency = <400000>; > + > + pca9554: gpio@39 { > + compatible = "nxp,pca9554"; > + reg = <0x39>; > + gpio-controller; > + #gpio-cells = <2>; Do make sure that defconfig has the GPIO expander built as modules at the very least. > + }; > +}; > + > +&main_i2c0 { > + pinctrl-names = "default"; > + pinctrl-0 = <&main_i2c0_pins_default>; > + clock-frequency = <400000>; > + > + pca9555: gpio@21 { > + compatible = "nxp,pca9555"; > + reg = <0x21>; > + gpio-controller; > + #gpio-cells = <2>; > + }; > +}; > + > +&main_i2c1 { > + pinctrl-names = "default"; > + pinctrl-0 = <&main_i2c1_pins_default>; > + clock-frequency = <400000>; > +}; > + > +&main_i2c2 { > + pinctrl-names = "default"; > + pinctrl-0 = <&main_i2c2_pins_default>; > + clock-frequency = <400000>; > +}; > -- > 2.19.1 > Acked-by: Nishanth Menon <nm@ti.com> -- Regards, Nishanth Menon ^ permalink raw reply [flat|nested] 50+ messages in thread
* Re: [PATCH v2 0/4] AM654: Add pinmux support 2018-11-13 6:01 ` Vignesh R (?) @ 2018-11-17 16:10 ` Nishanth Menon -1 siblings, 0 replies; 50+ messages in thread From: Nishanth Menon @ 2018-11-17 16:10 UTC (permalink / raw) To: Vignesh R Cc: Tero Kristo, Rob Herring, Mark Rutland, linux-kernel, linux-arm-kernel, devicetree, linux-omap, Linus Walleij, Tony Lindgren On 11:31-20181113, Vignesh R wrote: > Add pinmux definitions and pinctrl regions for AM654 SoCs > and enable uart and i2c. > > v2: > Add only minimum needed macros in dt-bindings include file > New patches to illustrate pinmux using uart and i2c > > > Tero Kristo (1): > arm64: dts: ti: k3-am65: Add pinctrl regions > > Vignesh R (3): > dt-bindings: pinctrl: k3: Introduce pinmux definitions > arm64: dts: ti: am654-base-board: Add pinmux for main uart0 > arm64: dts: ti: k3-am654-base-board: Add I2C nodes > > MAINTAINERS | 1 + > arch/arm64/boot/dts/ti/k3-am65-main.dtsi | 60 +++++++++++++ > arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi | 11 +++ > arch/arm64/boot/dts/ti/k3-am65-wakeup.dtsi | 19 ++++ > arch/arm64/boot/dts/ti/k3-am65.dtsi | 7 ++ > .../arm64/boot/dts/ti/k3-am654-base-board.dts | 86 +++++++++++++++++++ > include/dt-bindings/pinctrl/k3.h | 35 ++++++++ > 7 files changed, 219 insertions(+) > create mode 100644 include/dt-bindings/pinctrl/k3.h The last patch was a bit sneaky ;)... but there is nothing controversial in it.. Series: Acked-by: Nishanth Menon <nm@ti.com> -- Regards, Nishanth Menon ^ permalink raw reply [flat|nested] 50+ messages in thread
* [PATCH v2 0/4] AM654: Add pinmux support @ 2018-11-17 16:10 ` Nishanth Menon 0 siblings, 0 replies; 50+ messages in thread From: Nishanth Menon @ 2018-11-17 16:10 UTC (permalink / raw) To: linux-arm-kernel On 11:31-20181113, Vignesh R wrote: > Add pinmux definitions and pinctrl regions for AM654 SoCs > and enable uart and i2c. > > v2: > Add only minimum needed macros in dt-bindings include file > New patches to illustrate pinmux using uart and i2c > > > Tero Kristo (1): > arm64: dts: ti: k3-am65: Add pinctrl regions > > Vignesh R (3): > dt-bindings: pinctrl: k3: Introduce pinmux definitions > arm64: dts: ti: am654-base-board: Add pinmux for main uart0 > arm64: dts: ti: k3-am654-base-board: Add I2C nodes > > MAINTAINERS | 1 + > arch/arm64/boot/dts/ti/k3-am65-main.dtsi | 60 +++++++++++++ > arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi | 11 +++ > arch/arm64/boot/dts/ti/k3-am65-wakeup.dtsi | 19 ++++ > arch/arm64/boot/dts/ti/k3-am65.dtsi | 7 ++ > .../arm64/boot/dts/ti/k3-am654-base-board.dts | 86 +++++++++++++++++++ > include/dt-bindings/pinctrl/k3.h | 35 ++++++++ > 7 files changed, 219 insertions(+) > create mode 100644 include/dt-bindings/pinctrl/k3.h The last patch was a bit sneaky ;)... but there is nothing controversial in it.. Series: Acked-by: Nishanth Menon <nm@ti.com> -- Regards, Nishanth Menon ^ permalink raw reply [flat|nested] 50+ messages in thread
* Re: [PATCH v2 0/4] AM654: Add pinmux support @ 2018-11-17 16:10 ` Nishanth Menon 0 siblings, 0 replies; 50+ messages in thread From: Nishanth Menon @ 2018-11-17 16:10 UTC (permalink / raw) To: Vignesh R Cc: Tero Kristo, Rob Herring, Mark Rutland, linux-kernel, linux-arm-kernel, devicetree, linux-omap, Linus Walleij, Tony Lindgren On 11:31-20181113, Vignesh R wrote: > Add pinmux definitions and pinctrl regions for AM654 SoCs > and enable uart and i2c. > > v2: > Add only minimum needed macros in dt-bindings include file > New patches to illustrate pinmux using uart and i2c > > > Tero Kristo (1): > arm64: dts: ti: k3-am65: Add pinctrl regions > > Vignesh R (3): > dt-bindings: pinctrl: k3: Introduce pinmux definitions > arm64: dts: ti: am654-base-board: Add pinmux for main uart0 > arm64: dts: ti: k3-am654-base-board: Add I2C nodes > > MAINTAINERS | 1 + > arch/arm64/boot/dts/ti/k3-am65-main.dtsi | 60 +++++++++++++ > arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi | 11 +++ > arch/arm64/boot/dts/ti/k3-am65-wakeup.dtsi | 19 ++++ > arch/arm64/boot/dts/ti/k3-am65.dtsi | 7 ++ > .../arm64/boot/dts/ti/k3-am654-base-board.dts | 86 +++++++++++++++++++ > include/dt-bindings/pinctrl/k3.h | 35 ++++++++ > 7 files changed, 219 insertions(+) > create mode 100644 include/dt-bindings/pinctrl/k3.h The last patch was a bit sneaky ;)... but there is nothing controversial in it.. Series: Acked-by: Nishanth Menon <nm@ti.com> -- Regards, Nishanth Menon ^ permalink raw reply [flat|nested] 50+ messages in thread
end of thread, other threads:[~2018-11-23 15:08 UTC | newest] Thread overview: 50+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2018-11-13 6:01 [PATCH v2 0/4] AM654: Add pinmux support Vignesh R 2018-11-13 6:01 ` Vignesh R 2018-11-13 6:01 ` Vignesh R 2018-11-13 6:01 ` [PATCH v2 1/4] dt-bindings: pinctrl: k3: Introduce pinmux definitions Vignesh R 2018-11-13 6:01 ` Vignesh R 2018-11-13 6:01 ` Vignesh R 2018-11-17 12:27 ` Linus Walleij 2018-11-17 12:27 ` Linus Walleij 2018-11-17 12:27 ` Linus Walleij 2018-11-17 15:43 ` Rob Herring 2018-11-17 15:43 ` Rob Herring 2018-11-17 15:43 ` Rob Herring 2018-11-17 16:05 ` Nishanth Menon 2018-11-17 16:05 ` Nishanth Menon 2018-11-17 16:05 ` Nishanth Menon 2018-11-19 7:19 ` Tero Kristo 2018-11-19 7:19 ` Tero Kristo 2018-11-19 7:19 ` Tero Kristo 2018-11-20 10:09 ` Vignesh R 2018-11-20 10:09 ` Vignesh R 2018-11-20 10:09 ` Vignesh R 2018-11-20 10:37 ` Tero Kristo 2018-11-20 10:37 ` Tero Kristo 2018-11-20 10:37 ` Tero Kristo 2018-11-20 10:44 ` Vignesh R 2018-11-20 10:44 ` Vignesh R 2018-11-20 10:44 ` Vignesh R 2018-11-23 10:21 ` Tero Kristo 2018-11-23 10:21 ` Tero Kristo 2018-11-23 10:21 ` Tero Kristo 2018-11-23 15:07 ` Nishanth Menon 2018-11-23 15:07 ` Nishanth Menon 2018-11-23 15:07 ` Nishanth Menon 2018-11-17 16:08 ` Tony Lindgren 2018-11-17 16:08 ` Tony Lindgren 2018-11-13 6:01 ` [PATCH v2 2/4] arm64: dts: ti: k3-am65: Add pinctrl regions Vignesh R 2018-11-13 6:01 ` Vignesh R 2018-11-13 6:01 ` Vignesh R 2018-11-13 6:01 ` [PATCH v2 3/4] arm64: dts: ti: am654-base-board: Add pinmux for main uart0 Vignesh R 2018-11-13 6:01 ` Vignesh R 2018-11-13 6:01 ` Vignesh R 2018-11-13 6:01 ` [PATCH v2 4/4] arm64: dts: ti: k3-am654-base-board: Add I2C nodes Vignesh R 2018-11-13 6:01 ` Vignesh R 2018-11-13 6:01 ` Vignesh R 2018-11-17 16:09 ` Nishanth Menon 2018-11-17 16:09 ` Nishanth Menon 2018-11-17 16:09 ` Nishanth Menon 2018-11-17 16:10 ` [PATCH v2 0/4] AM654: Add pinmux support Nishanth Menon 2018-11-17 16:10 ` Nishanth Menon 2018-11-17 16:10 ` Nishanth Menon
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