* [Qemu-devel] [PATCH V6 0/5] add pvpanic mmio support
@ 2018-11-12 11:42 Peng Hao
2018-11-12 11:42 ` [Qemu-devel] [PATCH V6 1/6] hw/misc/pvpanic: Build the pvpanic device in $(common-obj) Peng Hao
` (5 more replies)
0 siblings, 6 replies; 13+ messages in thread
From: Peng Hao @ 2018-11-12 11:42 UTC (permalink / raw)
To: peter.maydell, drjones, philmd; +Cc: qemu-devel, qemu-arm, Peng Hao
The first patches are simple cleanups:
- patch 1 move the pvpanic device with the 'ocmmon objects' so we compile
it once for the x86/arm/aarch64 archs,
- patch 2 simply renames ISA fields/definitions to generic ones.
Then instead of add/use the MMIO pvpanic device in the virt machine in an
unique patch, I split it in two distinct patches:
- patch 3 uses Peng Hao's work, but add the MMIO interface to the existing
device (no logical change).
- patch 4 is Peng Hao's work in the virt machine (no logical change).
- patch 5 add pvpanic device in acpi table in virt machine
v2 from Peng Hao is:
https://lists.gnu.org/archive/html/qemu-devel/2018-10/msg03433.html
v3 --> v4
patch 1,2 no modification.
patch 3, add TYPE_PANIC_MMIO for distinguishing different bus device,
virt + isa_pvpanic will abnormally terminate virtual machine.
patch 4, "pvpanic,mmio" --> "qemu,pvpanic-mmio".
patch 5, newly added.
v4 --> v5
patch 1,2 no modification.
patch 3 delete PvpanicCommonState structure.
patch 4 VIRT_PVPANIC_MMIO --> VIRT_PVPANIC
correct VIRT_PVPANIC's overlap start address
patch 5 no modification.
v5 --> v6
add document.
the kernel part of the series:
https://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc.git/log/?h=char-misc-testing
misc/pvpanic: remove a redundant comma
misc/pvpanic: convert to SPDX license tags
misc/pvpanic: change header file sort style
misc/pvpanic: remove unnecessary header file
misc/pvpanic : break dependency on ACPI
misc/pvpanic : grouping ACPI related stuff
misc/pvpanic: add support to get pvpanic device info FDT
dt-bindings: misc/pvpanic: add document for pvpanic-mmio
misc/pvpanic: add MMIO support
misc/pvpanic: simplify the code using acpi_dev_resource_io
pvpanic: move pvpanic to misc as common driver
Philippe Mathieu-Daudé (2):
hw/misc/pvpanic: Build the pvpanic device in $(common-obj)
hw/misc/pvpanic: Cosmetic renaming
Peng Hao (3):
hw/misc/pvpanic: Add the MMIO interface
hw/arm/virt: Use the pvpanic device
hw/arm/virt: add pvpanic device in virt acpi table
pvpanic : update pvpanic document
default-configs/aarch64-softmmu.mak | 1 +
hw/arm/virt-acpi-build.c | 16 ++++++++
hw/arm/virt.c | 21 ++++++++++
hw/misc/Makefile.objs | 2 +-
hw/misc/pvpanic.c | 78 ++++++++++++++++++++++++++++++-------
include/hw/arm/virt.h | 1 +
include/hw/misc/pvpanic.h | 2 +
docs/specs/pvpanic.txt | 13 ++++++++++++-
8 files changed, 118 insertions(+), 17 deletions(-)
--
1.8.3.1
^ permalink raw reply [flat|nested] 13+ messages in thread
* [Qemu-devel] [PATCH V6 1/6] hw/misc/pvpanic: Build the pvpanic device in $(common-obj)
2018-11-12 11:42 [Qemu-devel] [PATCH V6 0/5] add pvpanic mmio support Peng Hao
@ 2018-11-12 11:42 ` Peng Hao
2018-11-12 11:42 ` [Qemu-devel] [PATCH V6 2/6] hw/misc/pvpanic: Cosmetic renaming Peng Hao
` (4 subsequent siblings)
5 siblings, 0 replies; 13+ messages in thread
From: Peng Hao @ 2018-11-12 11:42 UTC (permalink / raw)
To: peter.maydell, drjones, philmd; +Cc: qemu-devel, qemu-arm
From: Philippe Mathieu-Daudé <philmd@redhat.com>
The 'pvpanic' ISA device can be use by any machine with an ISA bus.
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
---
hw/misc/Makefile.objs | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/misc/Makefile.objs b/hw/misc/Makefile.objs
index 6d50b03..24997d6 100644
--- a/hw/misc/Makefile.objs
+++ b/hw/misc/Makefile.objs
@@ -8,6 +8,7 @@ common-obj-$(CONFIG_ISA_TESTDEV) += pc-testdev.o
common-obj-$(CONFIG_PCI_TESTDEV) += pci-testdev.o
common-obj-$(CONFIG_EDU) += edu.o
common-obj-$(CONFIG_PCA9552) += pca9552.o
+common-obj-$(CONFIG_PVPANIC) += pvpanic.o
common-obj-y += unimp.o
common-obj-$(CONFIG_FW_CFG_DMA) += vmcoreinfo.o
@@ -70,7 +71,6 @@ obj-$(CONFIG_IOTKIT_SECCTL) += iotkit-secctl.o
obj-$(CONFIG_IOTKIT_SYSCTL) += iotkit-sysctl.o
obj-$(CONFIG_IOTKIT_SYSINFO) += iotkit-sysinfo.o
-obj-$(CONFIG_PVPANIC) += pvpanic.o
obj-$(CONFIG_HYPERV_TESTDEV) += hyperv_testdev.o
obj-$(CONFIG_AUX) += auxbus.o
obj-$(CONFIG_ASPEED_SOC) += aspeed_scu.o aspeed_sdmc.o
--
1.8.3.1
^ permalink raw reply related [flat|nested] 13+ messages in thread
* [Qemu-devel] [PATCH V6 2/6] hw/misc/pvpanic: Cosmetic renaming
2018-11-12 11:42 [Qemu-devel] [PATCH V6 0/5] add pvpanic mmio support Peng Hao
2018-11-12 11:42 ` [Qemu-devel] [PATCH V6 1/6] hw/misc/pvpanic: Build the pvpanic device in $(common-obj) Peng Hao
@ 2018-11-12 11:42 ` Peng Hao
2018-11-12 11:42 ` [Qemu-devel] [PATCH V6 3/6] hw/misc/pvpanic: Add the MMIO interface Peng Hao
` (3 subsequent siblings)
5 siblings, 0 replies; 13+ messages in thread
From: Peng Hao @ 2018-11-12 11:42 UTC (permalink / raw)
To: peter.maydell, drjones, philmd; +Cc: qemu-devel, qemu-arm
From: Philippe Mathieu-Daudé <philmd@redhat.com>
To ease the MMIO device addition in the next patch, rename:
- ISA_PVPANIC_DEVICE -> PVPANIC (this just returns a generic Object),
- ISADevice parent_obj -> isadev,
- MemoryRegion io -> mr.
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
---
hw/misc/pvpanic.c | 16 +++++++++-------
1 file changed, 9 insertions(+), 7 deletions(-)
diff --git a/hw/misc/pvpanic.c b/hw/misc/pvpanic.c
index 9d8961b..dd3aef2 100644
--- a/hw/misc/pvpanic.c
+++ b/hw/misc/pvpanic.c
@@ -25,7 +25,7 @@
/* The pv event value */
#define PVPANIC_PANICKED (1 << PVPANIC_F_PANICKED)
-#define ISA_PVPANIC_DEVICE(obj) \
+#define PVPANIC(obj) \
OBJECT_CHECK(PVPanicState, (obj), TYPE_PVPANIC)
static void handle_event(int event)
@@ -46,9 +46,11 @@ static void handle_event(int event)
#include "hw/isa/isa.h"
typedef struct PVPanicState {
- ISADevice parent_obj;
+ /* private */
+ ISADevice isadev;
- MemoryRegion io;
+ /* public */
+ MemoryRegion mr;
uint16_t ioport;
} PVPanicState;
@@ -75,15 +77,15 @@ static const MemoryRegionOps pvpanic_ops = {
static void pvpanic_isa_initfn(Object *obj)
{
- PVPanicState *s = ISA_PVPANIC_DEVICE(obj);
+ PVPanicState *s = PVPANIC(obj);
- memory_region_init_io(&s->io, OBJECT(s), &pvpanic_ops, s, "pvpanic", 1);
+ memory_region_init_io(&s->mr, OBJECT(s), &pvpanic_ops, s, "pvpanic", 1);
}
static void pvpanic_isa_realizefn(DeviceState *dev, Error **errp)
{
ISADevice *d = ISA_DEVICE(dev);
- PVPanicState *s = ISA_PVPANIC_DEVICE(dev);
+ PVPanicState *s = PVPANIC(dev);
FWCfgState *fw_cfg = fw_cfg_find();
uint16_t *pvpanic_port;
@@ -96,7 +98,7 @@ static void pvpanic_isa_realizefn(DeviceState *dev, Error **errp)
fw_cfg_add_file(fw_cfg, "etc/pvpanic-port", pvpanic_port,
sizeof(*pvpanic_port));
- isa_register_ioport(d, &s->io, s->ioport);
+ isa_register_ioport(d, &s->mr, s->ioport);
}
static Property pvpanic_isa_properties[] = {
--
1.8.3.1
^ permalink raw reply related [flat|nested] 13+ messages in thread
* [Qemu-devel] [PATCH V6 3/6] hw/misc/pvpanic: Add the MMIO interface
2018-11-12 11:42 [Qemu-devel] [PATCH V6 0/5] add pvpanic mmio support Peng Hao
2018-11-12 11:42 ` [Qemu-devel] [PATCH V6 1/6] hw/misc/pvpanic: Build the pvpanic device in $(common-obj) Peng Hao
2018-11-12 11:42 ` [Qemu-devel] [PATCH V6 2/6] hw/misc/pvpanic: Cosmetic renaming Peng Hao
@ 2018-11-12 11:42 ` Peng Hao
2018-11-12 11:42 ` [Qemu-devel] [PATCH V6 4/6] hw/arm/virt: Use the pvpanic device Peng Hao
` (2 subsequent siblings)
5 siblings, 0 replies; 13+ messages in thread
From: Peng Hao @ 2018-11-12 11:42 UTC (permalink / raw)
To: peter.maydell, drjones, philmd; +Cc: qemu-devel, qemu-arm, Peng Hao
Add pvpanic new type "TYPE_PVPANIC_MMIO"
Signed-off-by: Peng Hao <peng.hao2@zte.com.cn>
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
---
hw/misc/pvpanic.c | 81 +++++++++++++++++++++++++++++++++++++----------
include/hw/misc/pvpanic.h | 1 +
2 files changed, 65 insertions(+), 17 deletions(-)
diff --git a/hw/misc/pvpanic.c b/hw/misc/pvpanic.c
index dd3aef2..5d0fbc6 100644
--- a/hw/misc/pvpanic.c
+++ b/hw/misc/pvpanic.c
@@ -2,10 +2,12 @@
* QEMU simulated pvpanic device.
*
* Copyright Fujitsu, Corp. 2013
+ * Copyright (c) 2018 ZTE Ltd.
*
* Authors:
* Wen Congyang <wency@cn.fujitsu.com>
* Hu Tao <hutao@cn.fujitsu.com>
+ * Peng Hao <peng.hao2@zte.com.cn>
*
* This work is licensed under the terms of the GNU GPL, version 2 or later.
* See the COPYING file in the top-level directory.
@@ -25,9 +27,6 @@
/* The pv event value */
#define PVPANIC_PANICKED (1 << PVPANIC_F_PANICKED)
-#define PVPANIC(obj) \
- OBJECT_CHECK(PVPanicState, (obj), TYPE_PVPANIC)
-
static void handle_event(int event)
{
static bool logged;
@@ -45,30 +44,50 @@ static void handle_event(int event)
#include "hw/isa/isa.h"
-typedef struct PVPanicState {
- /* private */
- ISADevice isadev;
+/* PVPanicISAState for ISA device and
+ * use ioport.
+ */
+typedef struct PVPanicISAState {
+ /* private */
+ ISADevice isadev;
+ uint16_t ioport;
/* public */
MemoryRegion mr;
- uint16_t ioport;
-} PVPanicState;
+} PVPanicISAState;
+
+/* PVPanicMMIOState for sysbus device and
+ * use mmio.
+ */
+typedef struct PVPanicMMIOState {
+ /* private */
+ SysBusDevice busdev;
+
+ /* public */
+ MemoryRegion mr;
+} PVPanicMMIOState;
+
+#define PVPANIC_ISA(obj) \
+ OBJECT_CHECK(PVPanicISAState, (obj), TYPE_PVPANIC)
+
+#define PVPANIC_MMIO(obj) \
+ OBJECT_CHECK(PVPanicMMIOState, (obj), TYPE_PVPANIC_MMIO)
/* return supported events on read */
-static uint64_t pvpanic_ioport_read(void *opaque, hwaddr addr, unsigned size)
+static uint64_t pvpanic_read(void *opaque, hwaddr addr, unsigned size)
{
return PVPANIC_PANICKED;
}
-static void pvpanic_ioport_write(void *opaque, hwaddr addr, uint64_t val,
+static void pvpanic_write(void *opaque, hwaddr addr, uint64_t val,
unsigned size)
{
handle_event(val);
}
static const MemoryRegionOps pvpanic_ops = {
- .read = pvpanic_ioport_read,
- .write = pvpanic_ioport_write,
+ .read = pvpanic_read,
+ .write = pvpanic_write,
.impl = {
.min_access_size = 1,
.max_access_size = 1,
@@ -77,15 +96,16 @@ static const MemoryRegionOps pvpanic_ops = {
static void pvpanic_isa_initfn(Object *obj)
{
- PVPanicState *s = PVPANIC(obj);
+ PVPanicISAState *s = PVPANIC_ISA(obj);
- memory_region_init_io(&s->mr, OBJECT(s), &pvpanic_ops, s, "pvpanic", 1);
+ memory_region_init_io(&s->mr, OBJECT(s), &pvpanic_ops, s,
+ TYPE_PVPANIC, 1);
}
static void pvpanic_isa_realizefn(DeviceState *dev, Error **errp)
{
ISADevice *d = ISA_DEVICE(dev);
- PVPanicState *s = PVPANIC(dev);
+ PVPanicISAState *s = PVPANIC_ISA(dev);
FWCfgState *fw_cfg = fw_cfg_find();
uint16_t *pvpanic_port;
@@ -102,7 +122,7 @@ static void pvpanic_isa_realizefn(DeviceState *dev, Error **errp)
}
static Property pvpanic_isa_properties[] = {
- DEFINE_PROP_UINT16(PVPANIC_IOPORT_PROP, PVPanicState, ioport, 0x505),
+ DEFINE_PROP_UINT16(PVPANIC_IOPORT_PROP, PVPanicISAState, ioport, 0x505),
DEFINE_PROP_END_OF_LIST(),
};
@@ -118,14 +138,41 @@ static void pvpanic_isa_class_init(ObjectClass *klass, void *data)
static TypeInfo pvpanic_isa_info = {
.name = TYPE_PVPANIC,
.parent = TYPE_ISA_DEVICE,
- .instance_size = sizeof(PVPanicState),
+ .instance_size = sizeof(PVPanicISAState),
.instance_init = pvpanic_isa_initfn,
.class_init = pvpanic_isa_class_init,
};
+
+static void pvpanic_mmio_initfn(Object *obj)
+{
+ PVPanicMMIOState *s = PVPANIC_MMIO(obj);
+ SysBusDevice *sbd = SYS_BUS_DEVICE(obj);
+
+ memory_region_init_io(&s->mr, OBJECT(s), &pvpanic_ops, s,
+ TYPE_PVPANIC_MMIO, 2);
+ sysbus_init_mmio(sbd, &s->mr);
+}
+
+static void pvpanic_mmio_class_init(ObjectClass *klass, void *data)
+{
+ DeviceClass *dc = DEVICE_CLASS(klass);
+
+ set_bit(DEVICE_CATEGORY_MISC, dc->categories);
+}
+
+static TypeInfo pvpanic_mmio_info = {
+ .name = TYPE_PVPANIC_MMIO,
+ .parent = TYPE_SYS_BUS_DEVICE,
+ .instance_size = sizeof(PVPanicMMIOState),
+ .instance_init = pvpanic_mmio_initfn,
+ .class_init = pvpanic_mmio_class_init,
+};
+
static void pvpanic_register_types(void)
{
type_register_static(&pvpanic_isa_info);
+ type_register_static(&pvpanic_mmio_info);
}
type_init(pvpanic_register_types)
diff --git a/include/hw/misc/pvpanic.h b/include/hw/misc/pvpanic.h
index 1ee071a..19c0fbb 100644
--- a/include/hw/misc/pvpanic.h
+++ b/include/hw/misc/pvpanic.h
@@ -17,6 +17,7 @@
#define TYPE_PVPANIC "pvpanic"
#define PVPANIC_IOPORT_PROP "ioport"
+#define TYPE_PVPANIC_MMIO "pvpanic-mmio"
static inline uint16_t pvpanic_port(void)
{
--
1.8.3.1
^ permalink raw reply related [flat|nested] 13+ messages in thread
* [Qemu-devel] [PATCH V6 4/6] hw/arm/virt: Use the pvpanic device
2018-11-12 11:42 [Qemu-devel] [PATCH V6 0/5] add pvpanic mmio support Peng Hao
` (2 preceding siblings ...)
2018-11-12 11:42 ` [Qemu-devel] [PATCH V6 3/6] hw/misc/pvpanic: Add the MMIO interface Peng Hao
@ 2018-11-12 11:42 ` Peng Hao
2018-11-12 11:42 ` [Qemu-devel] [PATCH V6 5/6] hw/arm/virt: add pvpanic device in virt acpi table Peng Hao
2018-11-12 11:42 ` [Qemu-devel] [PATCH V6 6/6] pvpanic : update pvpanic document Peng Hao
5 siblings, 0 replies; 13+ messages in thread
From: Peng Hao @ 2018-11-12 11:42 UTC (permalink / raw)
To: peter.maydell, drjones, philmd; +Cc: qemu-devel, qemu-arm, Peng Hao
Add pvpanic device in arm virt machine.
Signed-off-by: Peng Hao <peng.hao2@zte.com.cn>
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
---
default-configs/arm-softmmu.mak | 1 +
hw/arm/virt.c | 21 +++++++++++++++++++++
include/hw/arm/virt.h | 1 +
3 files changed, 23 insertions(+)
diff --git a/default-configs/arm-softmmu.mak b/default-configs/arm-softmmu.mak
index 2420491..50345df 100644
--- a/default-configs/arm-softmmu.mak
+++ b/default-configs/arm-softmmu.mak
@@ -159,3 +159,4 @@ CONFIG_PCI_DESIGNWARE=y
CONFIG_STRONGARM=y
CONFIG_HIGHBANK=y
CONFIG_MUSICPAL=y
+CONFIG_PVPANIC=y
diff --git a/hw/arm/virt.c b/hw/arm/virt.c
index 9f67782..c4f29c8 100644
--- a/hw/arm/virt.c
+++ b/hw/arm/virt.c
@@ -59,6 +59,7 @@
#include "qapi/visitor.h"
#include "standard-headers/linux/input.h"
#include "hw/arm/smmuv3.h"
+#include "hw/misc/pvpanic.h"
#define DEFINE_VIRT_MACHINE_LATEST(major, minor, latest) \
static void virt_##major##_##minor##_class_init(ObjectClass *oc, \
@@ -143,6 +144,7 @@ static const MemMapEntry a15memmap[] = {
[VIRT_GPIO] = { 0x09030000, 0x00001000 },
[VIRT_SECURE_UART] = { 0x09040000, 0x00001000 },
[VIRT_SMMU] = { 0x09050000, 0x00020000 },
+ [VIRT_PVPANIC] = { 0x09070000, 0x00000002 },
[VIRT_MMIO] = { 0x0a000000, 0x00000200 },
/* ...repeating for a total of NUM_VIRTIO_TRANSPORTS, each of that size */
[VIRT_PLATFORM_BUS] = { 0x0c000000, 0x02000000 },
@@ -190,6 +192,23 @@ static bool cpu_type_valid(const char *cpu)
return false;
}
+static void create_pvpanic_device(const VirtMachineState *vms)
+{
+ char *nodename;
+ hwaddr base = vms->memmap[VIRT_PVPANIC].base;
+ hwaddr size = vms->memmap[VIRT_PVPANIC].size;
+
+ sysbus_create_simple(TYPE_PVPANIC_MMIO, base, NULL);
+
+ nodename = g_strdup_printf("/pvpanic-mmio@%" PRIx64, base);
+ qemu_fdt_add_subnode(vms->fdt, nodename);
+ qemu_fdt_setprop_string(vms->fdt, nodename,
+ "compatible", "qemu,pvpanic-mmio");
+ qemu_fdt_setprop_sized_cells(vms->fdt, nodename, "reg",
+ 2, base, 2, size);
+ g_free(nodename);
+}
+
static void create_fdt(VirtMachineState *vms)
{
void *fdt = create_device_tree(&vms->fdt_size);
@@ -1531,6 +1550,8 @@ static void machvirt_init(MachineState *machine)
create_flash(vms, sysmem, secure_sysmem ? secure_sysmem : sysmem);
+ create_pvpanic_device(vms);
+
create_gic(vms, pic);
fdt_add_pmu_nodes(vms);
diff --git a/include/hw/arm/virt.h b/include/hw/arm/virt.h
index 4cc57a7..937c124 100644
--- a/include/hw/arm/virt.h
+++ b/include/hw/arm/virt.h
@@ -66,6 +66,7 @@ enum {
VIRT_GIC_REDIST,
VIRT_GIC_REDIST2,
VIRT_SMMU,
+ VIRT_PVPANIC,
VIRT_UART,
VIRT_MMIO,
VIRT_RTC,
--
1.8.3.1
^ permalink raw reply related [flat|nested] 13+ messages in thread
* [Qemu-devel] [PATCH V6 5/6] hw/arm/virt: add pvpanic device in virt acpi table
2018-11-12 11:42 [Qemu-devel] [PATCH V6 0/5] add pvpanic mmio support Peng Hao
` (3 preceding siblings ...)
2018-11-12 11:42 ` [Qemu-devel] [PATCH V6 4/6] hw/arm/virt: Use the pvpanic device Peng Hao
@ 2018-11-12 11:42 ` Peng Hao
2018-11-15 14:10 ` Andrew Jones
2018-11-12 11:42 ` [Qemu-devel] [PATCH V6 6/6] pvpanic : update pvpanic document Peng Hao
5 siblings, 1 reply; 13+ messages in thread
From: Peng Hao @ 2018-11-12 11:42 UTC (permalink / raw)
To: peter.maydell, drjones, philmd; +Cc: qemu-devel, qemu-arm, Peng Hao
add pvpanic device in virt acpi table, so when kenrel command line uses
acpi=force, kernel can get info from acpi table in aarch64.
Signed-off-by: Peng Hao <peng.hao2@zte.com.cn>
---
hw/arm/virt-acpi-build.c | 16 ++++++++++++++++
1 file changed, 16 insertions(+)
diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c
index 5785fb6..d126cee 100644
--- a/hw/arm/virt-acpi-build.c
+++ b/hw/arm/virt-acpi-build.c
@@ -61,6 +61,21 @@ static void acpi_dsdt_add_cpus(Aml *scope, int smp_cpus)
}
}
+static void acpi_dsdt_add_pvpanic(Aml *scope, const MemMapEntry *pvpanic_memmap)
+{
+ Aml *dev = aml_device("PANC");
+ aml_append(dev, aml_name_decl("_HID", aml_string("QEMU0001")));
+ aml_append(dev, aml_name_decl("_UID", aml_int(0)));
+
+ Aml *crs = aml_resource_template();
+ aml_append(crs, aml_memory32_fixed(pvpanic_memmap->base,
+ pvpanic_memmap->size, AML_READ_WRITE));
+
+ aml_append(dev, aml_name_decl("_CRS", crs));
+
+ aml_append(scope, dev);
+}
+
static void acpi_dsdt_add_uart(Aml *scope, const MemMapEntry *uart_memmap,
uint32_t uart_irq)
{
@@ -770,6 +785,7 @@ build_dsdt(GArray *table_data, BIOSLinker *linker, VirtMachineState *vms)
acpi_dsdt_add_cpus(scope, vms->smp_cpus);
acpi_dsdt_add_uart(scope, &memmap[VIRT_UART],
(irqmap[VIRT_UART] + ARM_SPI_BASE));
+ acpi_dsdt_add_pvpanic(scope, &memmap[VIRT_PVPANIC]);
acpi_dsdt_add_flash(scope, &memmap[VIRT_FLASH]);
acpi_dsdt_add_fw_cfg(scope, &memmap[VIRT_FW_CFG]);
acpi_dsdt_add_virtio(scope, &memmap[VIRT_MMIO],
--
1.8.3.1
^ permalink raw reply related [flat|nested] 13+ messages in thread
* [Qemu-devel] [PATCH V6 6/6] pvpanic : update pvpanic document
2018-11-12 11:42 [Qemu-devel] [PATCH V6 0/5] add pvpanic mmio support Peng Hao
` (4 preceding siblings ...)
2018-11-12 11:42 ` [Qemu-devel] [PATCH V6 5/6] hw/arm/virt: add pvpanic device in virt acpi table Peng Hao
@ 2018-11-12 11:42 ` Peng Hao
2018-11-15 14:25 ` Andrew Jones
5 siblings, 1 reply; 13+ messages in thread
From: Peng Hao @ 2018-11-12 11:42 UTC (permalink / raw)
To: peter.maydell, drjones, philmd; +Cc: qemu-devel, qemu-arm, Peng Hao
Add mmio support info in docs/specs/pvpanic.txt.
Signed-off-by: Peng Hao <peng.hao2@zte.com.cn>
---
docs/specs/pvpanic.txt | 13 ++++++++++++-
1 file changed, 12 insertions(+), 1 deletion(-)
diff --git a/docs/specs/pvpanic.txt b/docs/specs/pvpanic.txt
index c7bbacc..5d8e9dc 100644
--- a/docs/specs/pvpanic.txt
+++ b/docs/specs/pvpanic.txt
@@ -1,7 +1,7 @@
PVPANIC DEVICE
==============
-pvpanic device is a simulated ISA device, through which a guest panic
+pvpanic device is a simulated device, through which a guest panic
event is sent to qemu, and a QMP event is generated. This allows
management apps (e.g. libvirt) to be notified and respond to the event.
@@ -9,6 +9,10 @@ The management app has the option of waiting for GUEST_PANICKED events,
and/or polling for guest-panicked RunState, to learn when the pvpanic
device has fired a panic event.
+When pvpanic device is implemented as a ISA device, it supports IOPORT
+mode. If pvpanic device supports MMIO mode, it will be implemented as
+a SYSBUS device.
+
ISA Interface
-------------
@@ -19,6 +23,13 @@ Software should set only bits both itself and the device recognize.
Currently, only bit 0 is recognized, setting it indicates a guest panic
has happened.
+SYSBUS Interface
+--------------
+
+It is basically the same as ISA interface except that it uses MMIO. Pvpanic exposes
+a address space region 0x09060000--0x09060001 in arm virt machine.
+Currently only the first byte is used.
+
ACPI Interface
--------------
--
1.8.3.1
^ permalink raw reply related [flat|nested] 13+ messages in thread
* Re: [Qemu-devel] [PATCH V6 5/6] hw/arm/virt: add pvpanic device in virt acpi table
2018-11-12 11:42 ` [Qemu-devel] [PATCH V6 5/6] hw/arm/virt: add pvpanic device in virt acpi table Peng Hao
@ 2018-11-15 14:10 ` Andrew Jones
2018-11-16 1:45 ` [Qemu-devel] [PATCH V6 5/6] hw/arm/virt: add pvpanic device invirt " peng.hao2
0 siblings, 1 reply; 13+ messages in thread
From: Andrew Jones @ 2018-11-15 14:10 UTC (permalink / raw)
To: Peng Hao; +Cc: peter.maydell, philmd, qemu-arm, qemu-devel
On Mon, Nov 12, 2018 at 07:42:19PM +0800, Peng Hao wrote:
> add pvpanic device in virt acpi table, so when kenrel command line uses
> acpi=force, kernel can get info from acpi table in aarch64.
>
> Signed-off-by: Peng Hao <peng.hao2@zte.com.cn>
> ---
> hw/arm/virt-acpi-build.c | 16 ++++++++++++++++
> 1 file changed, 16 insertions(+)
>
> diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c
> index 5785fb6..d126cee 100644
> --- a/hw/arm/virt-acpi-build.c
> +++ b/hw/arm/virt-acpi-build.c
> @@ -61,6 +61,21 @@ static void acpi_dsdt_add_cpus(Aml *scope, int smp_cpus)
> }
> }
>
> +static void acpi_dsdt_add_pvpanic(Aml *scope, const MemMapEntry *pvpanic_memmap)
> +{
> + Aml *dev = aml_device("PANC");
Shouldn't this be "PEVT" ("panic event"), like it is for x86?
> + aml_append(dev, aml_name_decl("_HID", aml_string("QEMU0001")));
> + aml_append(dev, aml_name_decl("_UID", aml_int(0)));
Why add _UID? Also, I see x86 had some issues with not having _STA and
then having a _STA without the UI flag. It now has _STA=0xf
(PRESENT|ENABLED|UI|FUNCTIONING). I'm not saying we need to do that to,
but I'd like to know if it was considered and decided we don't need to.
> +
> + Aml *crs = aml_resource_template();
> + aml_append(crs, aml_memory32_fixed(pvpanic_memmap->base,
> + pvpanic_memmap->size, AML_READ_WRITE));
> +
> + aml_append(dev, aml_name_decl("_CRS", crs));
> +
> + aml_append(scope, dev);
> +}
> +
> static void acpi_dsdt_add_uart(Aml *scope, const MemMapEntry *uart_memmap,
> uint32_t uart_irq)
> {
> @@ -770,6 +785,7 @@ build_dsdt(GArray *table_data, BIOSLinker *linker, VirtMachineState *vms)
> acpi_dsdt_add_cpus(scope, vms->smp_cpus);
> acpi_dsdt_add_uart(scope, &memmap[VIRT_UART],
> (irqmap[VIRT_UART] + ARM_SPI_BASE));
> + acpi_dsdt_add_pvpanic(scope, &memmap[VIRT_PVPANIC]);
> acpi_dsdt_add_flash(scope, &memmap[VIRT_FLASH]);
> acpi_dsdt_add_fw_cfg(scope, &memmap[VIRT_FW_CFG]);
> acpi_dsdt_add_virtio(scope, &memmap[VIRT_MMIO],
> --
> 1.8.3.1
>
>
Thanks,
drew
^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [Qemu-devel] [PATCH V6 6/6] pvpanic : update pvpanic document
2018-11-12 11:42 ` [Qemu-devel] [PATCH V6 6/6] pvpanic : update pvpanic document Peng Hao
@ 2018-11-15 14:25 ` Andrew Jones
2018-11-16 1:52 ` peng.hao2
0 siblings, 1 reply; 13+ messages in thread
From: Andrew Jones @ 2018-11-15 14:25 UTC (permalink / raw)
To: Peng Hao; +Cc: peter.maydell, philmd, qemu-arm, qemu-devel
On Mon, Nov 12, 2018 at 07:42:20PM +0800, Peng Hao wrote:
> Add mmio support info in docs/specs/pvpanic.txt.
>
> Signed-off-by: Peng Hao <peng.hao2@zte.com.cn>
> ---
> docs/specs/pvpanic.txt | 13 ++++++++++++-
> 1 file changed, 12 insertions(+), 1 deletion(-)
>
> diff --git a/docs/specs/pvpanic.txt b/docs/specs/pvpanic.txt
> index c7bbacc..5d8e9dc 100644
> --- a/docs/specs/pvpanic.txt
> +++ b/docs/specs/pvpanic.txt
> @@ -1,7 +1,7 @@
> PVPANIC DEVICE
> ==============
>
> -pvpanic device is a simulated ISA device, through which a guest panic
> +pvpanic device is a simulated device, through which a guest panic
> event is sent to qemu, and a QMP event is generated. This allows
> management apps (e.g. libvirt) to be notified and respond to the event.
>
> @@ -9,6 +9,10 @@ The management app has the option of waiting for GUEST_PANICKED events,
> and/or polling for guest-panicked RunState, to learn when the pvpanic
> device has fired a panic event.
>
> +When pvpanic device is implemented as a ISA device, it supports IOPORT
^the ^an
> +mode. If pvpanic device supports MMIO mode, it will be implemented as
When the pvpanic device needs to use MMIO mode, ...
> +a SYSBUS device.
> +
> ISA Interface
> -------------
>
> @@ -19,6 +23,13 @@ Software should set only bits both itself and the device recognize.
> Currently, only bit 0 is recognized, setting it indicates a guest panic
> has happened.
>
> +SYSBUS Interface
> +--------------
> +
> +It is basically the same as ISA interface except that it uses MMIO.
The SYSBUS interface is similar to the ISA interface...
> Pvpanic exposes
> +a address space region 0x09060000--0x09060001 in arm virt machine.
> +Currently only the first byte is used.
> +
I would drop the above lines. They're not correct anyway. The region is
9070000-9070001 (inclusive).
> ACPI Interface
> --------------
>
> --
> 1.8.3.1
>
>
Thanks,
drew
^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [Qemu-devel] [PATCH V6 5/6] hw/arm/virt: add pvpanic device invirt acpi table
2018-11-15 14:10 ` Andrew Jones
@ 2018-11-16 1:45 ` peng.hao2
2018-11-16 9:07 ` Andrew Jones
0 siblings, 1 reply; 13+ messages in thread
From: peng.hao2 @ 2018-11-16 1:45 UTC (permalink / raw)
To: drjones; +Cc: peter.maydell, philmd, qemu-arm, qemu-devel
>> add pvpanic device in virt acpi table, so when kenrel command line uses
>> acpi=force, kernel can get info from acpi table in aarch64.
[...]
>>
>> +static void acpi_dsdt_add_pvpanic(Aml *scope, const MemMapEntry *pvpanic_memmap)
>> +{
>> + Aml *dev = aml_device("PANC");
>
>Shouldn't this be "PEVT" ("panic event"), like it is for x86?
>
yeah, I will change it.
>> + aml_append(dev, aml_name_decl("_HID", aml_string("QEMU0001")));
>> + aml_append(dev, aml_name_decl("_UID", aml_int(0)));
>
>Why add _UID? Also, I see x86 had some issues with not having _STA and
>then having a _STA without the UI flag. It now has _STA=0xf
>(PRESENT|ENABLED|UI|FUNCTIONING). I'm not saying we need to do that to,
>but I'd like to know if it was considered and decided we don't need to.
>
The way the kernel code processes _STA is that if _STA is not found, the default
setting is (PRESENT|ENABLED|UI|FUNCTIONING). So I think it is not necessary
to add it. It is only parsed in the pvpanic driver.
for _UID, I think it is used for device index. I just fill it with 0 because there is
only one pvpanic device.
by the way, How to get the value of ACPI conveniently? how dou you get the
value of _STA?
Thanks.
>> +
>> + Aml *crs = aml_resource_template();
>> + aml_append(crs, aml_memory32_fixed(pvpanic_memmap->base,
>> + pvpanic_memmap->size, AML_READ_WRITE));
>> +
>> + aml_append(dev, aml_name_decl("_CRS", crs));
>> +
>> + aml_append(scope, dev);
>> +}
>> +
>> static void acpi_dsdt_add_uart(Aml *scope, const MemMapEntry *uart_memmap,
>> uint32_t uart_irq)
>> {
>> @@ -770,6 +785,7 @@ build_dsdt(GArray *table_data, BIOSLinker *linker, VirtMachineState *vms)
>> acpi_dsdt_add_cpus(scope, vms->smp_cpus);
>> acpi_dsdt_add_uart(scope, &memmap[VIRT_UART],
>> (irqmap[VIRT_UART] + ARM_SPI_BASE));
>> + acpi_dsdt_add_pvpanic(scope, &memmap[VIRT_PVPANIC]);
>> acpi_dsdt_add_flash(scope, &memmap[VIRT_FLASH]);
>> acpi_dsdt_add_fw_cfg(scope, &memmap[VIRT_FW_CFG]);
>> acpi_dsdt_add_virtio(scope, &memmap[VIRT_MMIO],
>> --
>> 1.8.3.1
>>
>>
>
>Thanks,
>drew
^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [Qemu-devel] [PATCH V6 6/6] pvpanic : update pvpanic document
2018-11-15 14:25 ` Andrew Jones
@ 2018-11-16 1:52 ` peng.hao2
0 siblings, 0 replies; 13+ messages in thread
From: peng.hao2 @ 2018-11-16 1:52 UTC (permalink / raw)
To: drjones; +Cc: peter.maydell, philmd, qemu-arm, qemu-devel
> Add mmio support info in docs/specs/pvpanic.txt.
>>
>> Signed-off-by: Peng Hao <peng.hao2@zte.com.cn>
>> ---
>> docs/specs/pvpanic.txt | 13 ++++++++++++-
>> 1 file changed, 12 insertions(+), 1 deletion(-)
>>
>> diff --git a/docs/specs/pvpanic.txt b/docs/specs/pvpanic.txt
>> index c7bbacc..5d8e9dc 100644
>> --- a/docs/specs/pvpanic.txt
>> +++ b/docs/specs/pvpanic.txt
>> @@ -1,7 +1,7 @@
>> PVPANIC DEVICE
>> ==============
>>
>> -pvpanic device is a simulated ISA device, through which a guest panic
>> +pvpanic device is a simulated device, through which a guest panic
>> event is sent to qemu, and a QMP event is generated. This allows
>> management apps (e.g. libvirt) to be notified and respond to the event.
>>
>> @@ -9,6 +9,10 @@ The management app has the option of waiting for GUEST_PANICKED events,
>> and/or polling for guest-panicked RunState, to learn when the pvpanic
>> device has fired a panic event.
>>
>> +When pvpanic device is implemented as a ISA device, it supports IOPORT
>^the ^an
>> +mode. If pvpanic device supports MMIO mode, it will be implemented as
>
>When the pvpanic device needs to use MMIO mode, ...
>
I will add "Some architectures do not support ioport, just like arm."
>> +a SYSBUS device.
>> +
>> ISA Interface
>> -------------
>>
>> @@ -19,6 +23,13 @@ Software should set only bits both itself and the device recognize.
>> Currently, only bit 0 is recognized, setting it indicates a guest panic
>> has happened.
>>
>> +SYSBUS Interface
>> +--------------
>> +
>> +It is basically the same as ISA interface except that it uses MMIO.
>
>The SYSBUS interface is similar to the ISA interface...
>
I will change it.
>> Pvpanic exposes
>> +a address space region 0x09060000--0x09060001 in arm virt machine.
>> +Currently only the first byte is used.
>> +
>
>I would drop the above lines. They're not correct anyway. The region is
>9070000-9070001 (inclusive).
sorry,I wrote a wrong address span.
>
>> ACPI Interface
>> --------------
>>
>> --
>> 1.8.3.1
>>
>>
>
>Thanks,
>drew
^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [Qemu-devel] [PATCH V6 5/6] hw/arm/virt: add pvpanic device invirt acpi table
2018-11-16 1:45 ` [Qemu-devel] [PATCH V6 5/6] hw/arm/virt: add pvpanic device invirt " peng.hao2
@ 2018-11-16 9:07 ` Andrew Jones
2018-11-16 9:21 ` [Qemu-devel] [PATCH V6 5/6] hw/arm/virt: add pvpanic deviceinvirt " peng.hao2
0 siblings, 1 reply; 13+ messages in thread
From: Andrew Jones @ 2018-11-16 9:07 UTC (permalink / raw)
To: peng.hao2; +Cc: peter.maydell, qemu-arm, philmd, qemu-devel
On Fri, Nov 16, 2018 at 09:45:42AM +0800, peng.hao2@zte.com.cn wrote:
> >> add pvpanic device in virt acpi table, so when kenrel command line uses
> >> acpi=force, kernel can get info from acpi table in aarch64.
>
> [...]
>
> >>
> >> +static void acpi_dsdt_add_pvpanic(Aml *scope, const MemMapEntry *pvpanic_memmap)
> >> +{
> >> + Aml *dev = aml_device("PANC");
> >
> >Shouldn't this be "PEVT" ("panic event"), like it is for x86?
> >
> yeah, I will change it.
> >> + aml_append(dev, aml_name_decl("_HID", aml_string("QEMU0001")));
> >> + aml_append(dev, aml_name_decl("_UID", aml_int(0)));
> >
> >Why add _UID? Also, I see x86 had some issues with not having _STA and
> >then having a _STA without the UI flag. It now has _STA=0xf
> >(PRESENT|ENABLED|UI|FUNCTIONING). I'm not saying we need to do that to,
> >but I'd like to know if it was considered and decided we don't need to.
> >
> The way the kernel code processes _STA is that if _STA is not found, the default
> setting is (PRESENT|ENABLED|UI|FUNCTIONING). So I think it is not necessary
> to add it. It is only parsed in the pvpanic driver.
Good enough for me.
> for _UID, I think it is used for device index. I just fill it with 0 because there is
> only one pvpanic device.
OK, but I'm still not sure it's necessary.
>
> by the way, How to get the value of ACPI conveniently? how dou you get the
> value of _STA?
Not sure what you mean here. From where do you want to check the value?
If you mean from guest userspace, then there's nothing convenient that I
know of. You'll have to disassemble the tables you extract from sysfs,
afaik.
Thanks,
drew
>
> Thanks.
> >> +
> >> + Aml *crs = aml_resource_template();
> >> + aml_append(crs, aml_memory32_fixed(pvpanic_memmap->base,
> >> + pvpanic_memmap->size, AML_READ_WRITE));
> >> +
> >> + aml_append(dev, aml_name_decl("_CRS", crs));
> >> +
> >> + aml_append(scope, dev);
> >> +}
> >> +
> >> static void acpi_dsdt_add_uart(Aml *scope, const MemMapEntry *uart_memmap,
> >> uint32_t uart_irq)
> >> {
> >> @@ -770,6 +785,7 @@ build_dsdt(GArray *table_data, BIOSLinker *linker, VirtMachineState *vms)
> >> acpi_dsdt_add_cpus(scope, vms->smp_cpus);
> >> acpi_dsdt_add_uart(scope, &memmap[VIRT_UART],
> >> (irqmap[VIRT_UART] + ARM_SPI_BASE));
> >> + acpi_dsdt_add_pvpanic(scope, &memmap[VIRT_PVPANIC]);
> >> acpi_dsdt_add_flash(scope, &memmap[VIRT_FLASH]);
> >> acpi_dsdt_add_fw_cfg(scope, &memmap[VIRT_FW_CFG]);
> >> acpi_dsdt_add_virtio(scope, &memmap[VIRT_MMIO],
> >> --
> >> 1.8.3.1
> >>
> >>
> >
> >Thanks,
> >drew
^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [Qemu-devel] [PATCH V6 5/6] hw/arm/virt: add pvpanic deviceinvirt acpi table
2018-11-16 9:07 ` Andrew Jones
@ 2018-11-16 9:21 ` peng.hao2
0 siblings, 0 replies; 13+ messages in thread
From: peng.hao2 @ 2018-11-16 9:21 UTC (permalink / raw)
To: drjones; +Cc: peter.maydell, qemu-arm, philmd, qemu-devel
>> >> add pvpanic device in virt acpi table, so when kenrel command line uses
>> >> acpi=force, kernel can get info from acpi table in aarch64.
>>
>> [...]
>>
>> >>
>> >> +static void acpi_dsdt_add_pvpanic(Aml *scope, const MemMapEntry *pvpanic_memmap)
>> >> +{
>> >> + Aml *dev = aml_device("PANC");
>> >
>> >Shouldn't this be "PEVT" ("panic event"), like it is for x86?
>> >
>> yeah, I will change it.
>> >> + aml_append(dev, aml_name_decl("_HID", aml_string("QEMU0001")));
>> >> + aml_append(dev, aml_name_decl("_UID", aml_int(0)));
>> >
>> >Why add _UID? Also, I see x86 had some issues with not having _STA and
>> >then having a _STA without the UI flag. It now has _STA=0xf
>> >(PRESENT|ENABLED|UI|FUNCTIONING). I'm not saying we need to do that to,
>> >but I'd like to know if it was considered and decided we don't need to.
>> >
>> The way the kernel code processes _STA is that if _STA is not found, the default
>> setting is (PRESENT|ENABLED|UI|FUNCTIONING). So I think it is not necessary
>> to add it. It is only parsed in the pvpanic driver.
>
>Good enough for me.
>
>> for _UID, I think it is used for device index. I just fill it with 0 because there is
>> only one pvpanic device.
>
>OK, but I'm still not sure it's necessary.
>
you can see other devices in virt-acpi-build.c. _UID is used for device index.
>>
>> by the way, How to get the value of ACPI conveniently? how dou you get the
>> value of _STA?
>
>Not sure what you mean here. From where do you want to check the value?
>If you mean from guest userspace, then there's nothing convenient that I
>know of. You'll have to disassemble the tables you extract from sysfs,
>afaik.
>
yeah ,I just want to know this.
thanks
>Thanks,
>drew
>
> Thanks.
> >> +
> >> + Aml *crs = aml_resource_template();
> >> + aml_append(crs, aml_memory32_fixed(pvpanic_memmap->base,
> >> + pvpanic_memmap->size, AML_READ_WRITE));
> >> +
> >> + aml_append(dev, aml_name_decl("_CRS", crs));
> >> +
> >> + aml_append(scope, dev);
> >> +}
> >> +
> >> static void acpi_dsdt_add_uart(Aml *scope, const MemMapEntry *uart_memmap,
> >> uint32_t uart_irq)
> >> {
> >> @@ -770,6 +785,7 @@ build_dsdt(GArray *table_data, BIOSLinker *linker, VirtMachineState *vms)
> >> acpi_dsdt_add_cpus(scope, vms->smp_cpus);
> >> acpi_dsdt_add_uart(scope, &memmap[VIRT_UART],
> >> (irqmap[VIRT_UART] + ARM_SPI_BASE));
> >> + acpi_dsdt_add_pvpanic(scope, &memmap[VIRT_PVPANIC]);
> >> acpi_dsdt_add_flash(scope, &memmap[VIRT_FLASH]);
> >> acpi_dsdt_add_fw_cfg(scope, &memmap[VIRT_FW_CFG]);
> >> acpi_dsdt_add_virtio(scope, &memmap[VIRT_MMIO],
> >> --
> >> 1.8.3.1
> >>
> >>
> >
> >Thanks,
> >drew
^ permalink raw reply [flat|nested] 13+ messages in thread
end of thread, other threads:[~2018-11-16 9:22 UTC | newest]
Thread overview: 13+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2018-11-12 11:42 [Qemu-devel] [PATCH V6 0/5] add pvpanic mmio support Peng Hao
2018-11-12 11:42 ` [Qemu-devel] [PATCH V6 1/6] hw/misc/pvpanic: Build the pvpanic device in $(common-obj) Peng Hao
2018-11-12 11:42 ` [Qemu-devel] [PATCH V6 2/6] hw/misc/pvpanic: Cosmetic renaming Peng Hao
2018-11-12 11:42 ` [Qemu-devel] [PATCH V6 3/6] hw/misc/pvpanic: Add the MMIO interface Peng Hao
2018-11-12 11:42 ` [Qemu-devel] [PATCH V6 4/6] hw/arm/virt: Use the pvpanic device Peng Hao
2018-11-12 11:42 ` [Qemu-devel] [PATCH V6 5/6] hw/arm/virt: add pvpanic device in virt acpi table Peng Hao
2018-11-15 14:10 ` Andrew Jones
2018-11-16 1:45 ` [Qemu-devel] [PATCH V6 5/6] hw/arm/virt: add pvpanic device invirt " peng.hao2
2018-11-16 9:07 ` Andrew Jones
2018-11-16 9:21 ` [Qemu-devel] [PATCH V6 5/6] hw/arm/virt: add pvpanic deviceinvirt " peng.hao2
2018-11-12 11:42 ` [Qemu-devel] [PATCH V6 6/6] pvpanic : update pvpanic document Peng Hao
2018-11-15 14:25 ` Andrew Jones
2018-11-16 1:52 ` peng.hao2
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