From: "Z.q. Hou" <zhiqiang.hou@nxp.com> To: "linux-pci@vger.kernel.org" <linux-pci@vger.kernel.org>, "linux-arm-kernel@lists.infradead.org" <linux-arm-kernel@lists.infradead.org>, "devicetree@vger.kernel.org" <devicetree@vger.kernel.org>, "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>, "bhelgaas@google.com" <bhelgaas@google.com>, "robh+dt@kernel.org" <robh+dt@kernel.org>, "mark.rutland@arm.com" <mark.rutland@arm.com>, "l.subrahmanya@mobiveil.co.in" <l.subrahmanya@mobiveil.co.in>, "shawnguo@kernel.org" <shawnguo@kernel.org>, Leo Li <leoyang.li@nxp.com>, "lorenzo.pieralisi@arm.com" <lorenzo.pieralisi@arm.com>, "catalin.marinas@arm.com" <catalin.marinas@arm.com>, "will.deacon@arm.com" <will.deacon@arm.com> Cc: Mingkai Hu <mingkai.hu@nxp.com>, "M.h. Lian" <minghuan.lian@nxp.com>, Xiaowei Bao <xiaowei.bao@nxp.com>, "Z.q. Hou" <zhiqiang.hou@nxp.com> Subject: [PATCHv2 08/25] PCI: mobiveil: use the 1st inbound window for MEM inbound transactions Date: Tue, 20 Nov 2018 09:26:25 +0000 [thread overview] Message-ID: <20181120092615.11680-9-Zhiqiang.Hou@nxp.com> (raw) In-Reply-To: <20181120092615.11680-1-Zhiqiang.Hou@nxp.com> From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> The inbound windows have different register set with outbound windows. This patch change the MEM inbound window to the first one. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> --- V2: - no change drivers/pci/controller/pcie-mobiveil.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/pci/controller/pcie-mobiveil.c b/drivers/pci/controller/pcie-mobiveil.c index df71c11b4810..e88afc792a5c 100644 --- a/drivers/pci/controller/pcie-mobiveil.c +++ b/drivers/pci/controller/pcie-mobiveil.c @@ -616,7 +616,7 @@ static int mobiveil_host_init(struct mobiveil_pcie *pcie) CFG_WINDOW_TYPE, resource_size(pcie->ob_io_res)); /* memory inbound translation window */ - program_ib_windows(pcie, WIN_NUM_1, 0, MEM_WINDOW_TYPE, IB_WIN_SIZE); + program_ib_windows(pcie, WIN_NUM_0, 0, MEM_WINDOW_TYPE, IB_WIN_SIZE); /* Get the I/O and memory ranges from DT */ resource_list_for_each_entry(win, &pcie->resources) { -- 2.17.1
WARNING: multiple messages have this Message-ID (diff)
From: zhiqiang.hou@nxp.com (Z.q. Hou) To: linux-arm-kernel@lists.infradead.org Subject: [PATCHv2 08/25] PCI: mobiveil: use the 1st inbound window for MEM inbound transactions Date: Tue, 20 Nov 2018 09:26:25 +0000 [thread overview] Message-ID: <20181120092615.11680-9-Zhiqiang.Hou@nxp.com> (raw) In-Reply-To: <20181120092615.11680-1-Zhiqiang.Hou@nxp.com> From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> The inbound windows have different register set with outbound windows. This patch change the MEM inbound window to the first one. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> --- V2: - no change drivers/pci/controller/pcie-mobiveil.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/pci/controller/pcie-mobiveil.c b/drivers/pci/controller/pcie-mobiveil.c index df71c11b4810..e88afc792a5c 100644 --- a/drivers/pci/controller/pcie-mobiveil.c +++ b/drivers/pci/controller/pcie-mobiveil.c @@ -616,7 +616,7 @@ static int mobiveil_host_init(struct mobiveil_pcie *pcie) CFG_WINDOW_TYPE, resource_size(pcie->ob_io_res)); /* memory inbound translation window */ - program_ib_windows(pcie, WIN_NUM_1, 0, MEM_WINDOW_TYPE, IB_WIN_SIZE); + program_ib_windows(pcie, WIN_NUM_0, 0, MEM_WINDOW_TYPE, IB_WIN_SIZE); /* Get the I/O and memory ranges from DT */ resource_list_for_each_entry(win, &pcie->resources) { -- 2.17.1
next prev parent reply other threads:[~2018-11-20 9:26 UTC|newest] Thread overview: 167+ messages / expand[flat|nested] mbox.gz Atom feed top 2018-11-20 9:25 [PATCHv2 00/25] PCI: refactor Mobiveil driver and add PCIe Gen4 driver for NXP Layerscape SoCs Z.q. Hou 2018-11-20 9:25 ` Z.q. Hou 2018-11-20 9:25 ` Z.q. Hou 2018-11-20 9:25 ` [PATCHv2 01/25] PCI: mobiveil: uniform the register accessors Z.q. Hou 2018-11-20 9:25 ` Z.q. Hou 2018-11-20 9:25 ` Z.q. Hou 2018-11-20 10:17 ` M.h. Lian 2018-11-20 10:17 ` M.h. Lian 2018-11-20 10:17 ` M.h. Lian 2018-11-20 9:25 ` [PATCHv2 02/25] PCI: mobiveil: format the code without function change Z.q. Hou 2018-11-20 9:25 ` Z.q. Hou 2018-11-20 9:25 ` Z.q. Hou 2018-11-20 10:17 ` M.h. Lian 2018-11-20 10:17 ` M.h. Lian 2018-11-20 10:17 ` M.h. Lian 2018-11-20 9:25 ` [PATCHv2 03/25] PCI: mobiveil: correct the returned error number Z.q. Hou 2018-11-20 9:25 ` Z.q. Hou 2018-11-20 9:25 ` Z.q. Hou 2018-11-20 10:31 ` M.h. Lian 2018-11-20 10:31 ` M.h. Lian 2018-11-20 10:31 ` M.h. Lian 2018-11-20 9:26 ` [PATCHv2 04/25] PCI: mobiveil: remove flag MSI_FLAG_MULTI_PCI_MSI Z.q. Hou 2018-11-20 9:26 ` Z.q. Hou 2018-11-20 9:26 ` Z.q. Hou 2018-11-20 10:33 ` M.h. Lian 2018-11-20 10:33 ` M.h. Lian 2018-11-20 10:33 ` M.h. Lian 2018-11-20 9:26 ` [PATCHv2 05/25] PCI: mobiveil: correct PCI base address in MEM/IO outbound windows Z.q. Hou 2018-11-20 9:26 ` Z.q. Hou 2018-11-20 9:26 ` Z.q. Hou 2018-11-20 10:34 ` M.h. Lian 2018-11-20 10:34 ` M.h. Lian 2018-11-20 10:34 ` M.h. Lian 2018-11-20 9:26 ` [PATCHv2 06/25] PCI: mobiveil: replace the resource list iteration function Z.q. Hou 2018-11-20 9:26 ` Z.q. Hou 2018-11-20 9:26 ` Z.q. Hou 2018-11-20 10:35 ` M.h. Lian 2018-11-20 10:35 ` M.h. Lian 2018-11-20 10:35 ` M.h. Lian 2018-11-20 9:26 ` [PATCHv2 07/25] PCI: mobiveil: use WIN_NUM_0 explicitly for CFG outbound window Z.q. Hou 2018-11-20 9:26 ` Z.q. Hou 2018-11-20 9:26 ` Z.q. Hou 2018-11-20 10:35 ` M.h. Lian 2018-11-20 10:35 ` M.h. Lian 2018-11-20 10:35 ` M.h. Lian 2018-11-20 9:26 ` Z.q. Hou [this message] 2018-11-20 9:26 ` [PATCHv2 08/25] PCI: mobiveil: use the 1st inbound window for MEM inbound transactions Z.q. Hou 2018-11-20 9:26 ` Z.q. Hou 2018-11-20 10:59 ` M.h. Lian 2018-11-20 10:59 ` M.h. Lian 2018-11-20 10:59 ` M.h. Lian 2018-11-20 9:26 ` [PATCHv2 09/25] PCI: mobiveil: correct inbound/outbound window setup routines Z.q. Hou 2018-11-20 9:26 ` Z.q. Hou 2018-11-20 9:26 ` Z.q. Hou 2018-11-20 11:00 ` M.h. Lian 2018-11-20 11:00 ` M.h. Lian 2018-11-20 11:00 ` M.h. Lian 2018-11-20 11:00 ` M.h. Lian 2018-11-20 11:00 ` M.h. Lian 2018-11-20 11:00 ` M.h. Lian 2018-11-20 9:26 ` [PATCHv2 10/25] PCI: mobiveil: fix the INTx process error Z.q. Hou 2018-11-20 9:26 ` Z.q. Hou 2018-11-20 9:26 ` Z.q. Hou 2018-11-20 11:00 ` M.h. Lian 2018-11-20 11:00 ` M.h. Lian 2018-11-20 11:00 ` M.h. Lian 2018-11-20 9:26 ` [PATCHv2 11/25] PCI: mobiveil: only fix up the Class Code field Z.q. Hou 2018-11-20 9:26 ` Z.q. Hou 2018-11-20 9:26 ` Z.q. Hou 2018-11-20 11:01 ` M.h. Lian 2018-11-20 11:01 ` M.h. Lian 2018-11-20 11:01 ` M.h. Lian 2018-11-20 9:26 ` [PATCHv2 12/25] PCI: mobiveil: move out the link up waiting from mobiveil_host_init Z.q. Hou 2018-11-20 9:26 ` Z.q. Hou 2018-11-20 9:26 ` Z.q. Hou 2018-11-20 11:01 ` M.h. Lian 2018-11-20 11:01 ` M.h. Lian 2018-11-20 11:01 ` M.h. Lian 2018-11-20 9:26 ` [PATCHv2 13/25] PCI: mobiveil: move irq chained handler setup out of DT parse Z.q. Hou 2018-11-20 9:26 ` Z.q. Hou 2018-11-20 9:26 ` Z.q. Hou 2018-11-20 11:12 ` M.h. Lian 2018-11-20 11:12 ` M.h. Lian 2018-11-20 11:12 ` M.h. Lian 2018-11-20 9:27 ` [PATCHv2 14/25] PCI: mobiveil: initialize Primary/Secondary/Subordinate bus number Z.q. Hou 2018-11-20 9:27 ` Z.q. Hou 2018-11-20 9:27 ` Z.q. Hou 2018-11-20 11:13 ` M.h. Lian 2018-11-20 11:13 ` M.h. Lian 2018-11-20 11:13 ` M.h. Lian 2018-11-20 11:24 ` M.h. Lian 2018-11-20 11:24 ` M.h. Lian 2018-11-20 11:24 ` M.h. Lian 2018-11-20 9:27 ` [PATCHv2 15/25] dt-bindings: pci: mobiveil: change gpio_slave and apb_csr to optional Z.q. Hou 2018-11-20 9:27 ` Z.q. Hou 2018-11-20 9:27 ` Z.q. Hou 2018-11-20 11:25 ` M.h. Lian 2018-11-20 11:25 ` M.h. Lian 2018-11-20 11:25 ` M.h. Lian 2018-11-20 9:27 ` [PATCHv2 16/25] PCI: mobiveil: refactor Mobiveil PCIe Host Bridge IP driver Z.q. Hou 2018-11-20 9:27 ` Z.q. Hou 2018-11-20 9:27 ` Z.q. Hou 2018-11-20 11:25 ` M.h. Lian 2018-11-20 11:25 ` M.h. Lian 2018-11-20 11:25 ` M.h. Lian 2018-11-20 9:27 ` [PATCHv2 17/25] PCI: mobiveil: fix the checking of valid device Z.q. Hou 2018-11-20 9:27 ` Z.q. Hou 2018-11-20 9:27 ` Z.q. Hou 2018-11-20 11:26 ` M.h. Lian 2018-11-20 11:26 ` M.h. Lian 2018-11-20 11:26 ` M.h. Lian 2018-11-20 9:27 ` [PATCHv2 18/25] PCI: mobiveil: continue to initialize the host upon no PCIe link Z.q. Hou 2018-11-20 9:27 ` Z.q. Hou 2018-11-20 9:27 ` Z.q. Hou 2018-11-20 11:26 ` M.h. Lian 2018-11-20 11:26 ` M.h. Lian 2018-11-20 11:26 ` M.h. Lian 2018-11-20 9:27 ` [PATCHv2 19/25] PCI: mobiveil: disabled IB and OB windows set by bootloader Z.q. Hou 2018-11-20 9:27 ` Z.q. Hou 2018-11-20 9:27 ` Z.q. Hou 2018-11-20 11:26 ` M.h. Lian 2018-11-20 11:26 ` M.h. Lian 2018-11-20 11:26 ` M.h. Lian 2018-11-20 9:27 ` [PATCHv2 20/25] PCI: mobiveil: add Byte and Half-Word width register accessors Z.q. Hou 2018-11-20 9:27 ` Z.q. Hou 2018-11-20 9:27 ` Z.q. Hou 2018-11-20 11:27 ` M.h. Lian 2018-11-20 11:27 ` M.h. Lian 2018-11-20 11:27 ` M.h. Lian 2018-11-20 9:27 ` [PATCHv2 21/25] PCI: mobiveil: make mobiveil_host_init can be used to re-init host Z.q. Hou 2018-11-20 9:27 ` Z.q. Hou 2018-11-20 9:27 ` Z.q. Hou 2018-11-20 11:30 ` M.h. Lian 2018-11-20 11:30 ` M.h. Lian 2018-11-20 11:30 ` M.h. Lian 2018-11-20 9:27 ` [PATCHv2 22/25] dt-bindings: pci: Add NXP Layerscape SoCs PCIe Gen4 controller Z.q. Hou 2018-11-20 9:27 ` Z.q. Hou 2018-11-20 9:27 ` Z.q. Hou 2018-11-20 11:31 ` M.h. Lian 2018-11-20 11:31 ` M.h. Lian 2018-11-20 11:31 ` M.h. Lian 2018-12-05 22:38 ` Rob Herring 2018-12-05 22:38 ` Rob Herring 2018-12-05 22:38 ` Rob Herring 2018-12-05 22:40 ` Rob Herring 2018-12-05 22:40 ` Rob Herring 2018-12-05 22:40 ` Rob Herring 2018-12-11 9:50 ` Z.q. Hou 2018-12-11 9:50 ` Z.q. Hou 2018-11-20 9:27 ` [PATCHv2 23/25] PCI: mobiveil: add PCIe Gen4 RC driver for NXP Layerscape SoCs Z.q. Hou 2018-11-20 9:27 ` Z.q. Hou 2018-11-20 9:27 ` Z.q. Hou 2018-11-20 11:32 ` M.h. Lian 2018-11-20 11:32 ` M.h. Lian 2018-11-20 11:32 ` M.h. Lian 2018-11-20 9:28 ` [PATCHv2 24/25] arm64: dts: freescale: lx2160a: add pcie DT nodes Z.q. Hou 2018-11-20 9:28 ` Z.q. Hou 2018-11-20 9:28 ` Z.q. Hou 2018-11-20 11:32 ` M.h. Lian 2018-11-20 11:32 ` M.h. Lian 2018-11-20 11:32 ` M.h. Lian 2018-11-20 9:28 ` [PATCHv2 25/25] arm64: defconfig: Enable CONFIG_PCI_LAYERSCAPE_GEN4 Z.q. Hou 2018-11-20 9:28 ` Z.q. Hou 2018-11-20 9:28 ` Z.q. Hou 2018-11-20 11:33 ` M.h. Lian 2018-11-20 11:33 ` M.h. Lian 2018-11-20 11:33 ` M.h. Lian
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