[PATCH v4 1/9] drm/i915: Disable PSR in Apple panels

[PATCH v4 1/9] drm/i915: Disable PSR in Apple panels

[José Roberto de Souza]

i915 yet don't support PSR in Apple panels, so lets keep it disabled
while we work on that.

v2: Renamed DP_DPCD_QUIRK_PSR_NOT_CURRENTLY_SUPPORTED to
DP_DPCD_QUIRK_NO_PSR (Ville)

v3:
Adding documentation to DP_DPCD_QUIRK_NO_PSR(Dhinakaran and Jani)
Fixed typo in comment of the new quirk entry(Jani)

Fixes: 598c6cfe0690 (drm/i915/psr: Enable PSR1 on gen-9+ HW)
Cc: Jani Nikula <jani.nikula@intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Cc: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Reviewed-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
---
 drivers/gpu/drm/drm_dp_helper.c  | 2 ++
 drivers/gpu/drm/i915/intel_psr.c | 6 ++++++
 include/drm/drm_dp_helper.h      | 7 +++++++
 3 files changed, 15 insertions(+)

diff --git a/drivers/gpu/drm/drm_dp_helper.c b/drivers/gpu/drm/drm_dp_helper.c
index 2d6c491a0542..516e82d0ed50 100644
--- a/drivers/gpu/drm/drm_dp_helper.c
+++ b/drivers/gpu/drm/drm_dp_helper.c
@@ -1273,6 +1273,8 @@ static const struct dpcd_quirk dpcd_quirk_list[] = {
 	{ OUI(0x00, 0x22, 0xb9), DEVICE_ID_ANY, true, BIT(DP_DPCD_QUIRK_CONSTANT_N) },
 	/* LG LP140WF6-SPM1 eDP panel */
 	{ OUI(0x00, 0x22, 0xb9), DEVICE_ID('s', 'i', 'v', 'a', 'r', 'T'), false, BIT(DP_DPCD_QUIRK_CONSTANT_N) },
+	/* Apple panels need some additional handling to support PSR */
+	{ OUI(0x00, 0x10, 0xfa), DEVICE_ID_ANY, false, BIT(DP_DPCD_QUIRK_NO_PSR) }
 };
 
 #undef OUI
diff --git a/drivers/gpu/drm/i915/intel_psr.c b/drivers/gpu/drm/i915/intel_psr.c
index 419e56342523..f71970df9936 100644
--- a/drivers/gpu/drm/i915/intel_psr.c
+++ b/drivers/gpu/drm/i915/intel_psr.c
@@ -274,10 +274,16 @@ void intel_psr_init_dpcd(struct intel_dp *intel_dp)
 	DRM_DEBUG_KMS("eDP panel supports PSR version %x\n",
 		      intel_dp->psr_dpcd[0]);
 
+	if (drm_dp_has_quirk(&intel_dp->desc, DP_DPCD_QUIRK_NO_PSR)) {
+		DRM_DEBUG_KMS("PSR support not currently available for this panel\n");
+		return;
+	}
+
 	if (!(intel_dp->edp_dpcd[1] & DP_EDP_SET_POWER_CAP)) {
 		DRM_DEBUG_KMS("Panel lacks power state control, PSR cannot be enabled\n");
 		return;
 	}
+
 	dev_priv->psr.sink_support = true;
 	dev_priv->psr.sink_sync_latency =
 		intel_dp_get_sink_sync_latency(intel_dp);
diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h
index 5736c942c85b..c33e89c51d9f 100644
--- a/include/drm/drm_dp_helper.h
+++ b/include/drm/drm_dp_helper.h
@@ -1365,6 +1365,13 @@ enum drm_dp_quirk {
 	 * to 16 bits. So will give a constant value (0x8000) for compatability.
 	 */
 	DP_DPCD_QUIRK_CONSTANT_N,
+	/**
+	 * @DP_DPCD_QUIRK_NO_PSR
+	 *
+	 * The device does not support PSR even if reports that it supports or
+	 * driver still need to implement proper handling for such device.
+	 */
+	DP_DPCD_QUIRK_NO_PSR,
 };
 
 /**
-- 
2.19.2

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[PATCH v4 2/9] drm/i915/psr: Don't tell sink that main link will be active while is active PSR2

[José Roberto de Souza]

For PSR2 there is no register to tell HW to keep main link enabled
while PSR2 is active, so don't configure sink DPCD with a
misleading value.

v2: Moving the set of DP_PSR_CRC_VERIFICATION to the else block
of 'if (dev_priv->psr.psr2_enabled)' to another patch. (Rodrigo)

Cc: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
---
 drivers/gpu/drm/i915/intel_psr.c | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_psr.c b/drivers/gpu/drm/i915/intel_psr.c
index f71970df9936..90759f754952 100644
--- a/drivers/gpu/drm/i915/intel_psr.c
+++ b/drivers/gpu/drm/i915/intel_psr.c
@@ -395,10 +395,11 @@ static void intel_psr_enable_sink(struct intel_dp *intel_dp)
 		drm_dp_dpcd_writeb(&intel_dp->aux, DP_RECEIVER_ALPM_CONFIG,
 				   DP_ALPM_ENABLE);
 		dpcd_val |= DP_PSR_ENABLE_PSR2;
+	} else {
+		if (dev_priv->psr.link_standby)
+			dpcd_val |= DP_PSR_MAIN_LINK_ACTIVE;
 	}
 
-	if (dev_priv->psr.link_standby)
-		dpcd_val |= DP_PSR_MAIN_LINK_ACTIVE;
 	if (!dev_priv->psr.psr2_enabled && INTEL_GEN(dev_priv) >= 8)
 		dpcd_val |= DP_PSR_CRC_VERIFICATION;
 	drm_dp_dpcd_writeb(&intel_dp->aux, DP_PSR_EN_CFG, dpcd_val);
-- 
2.19.2

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[PATCH v4 3/9] drm/i915/psr: Set PSR CRC verification bit in sink inside PSR1 block

[José Roberto de Souza]

As we have a else block for the 'if (dev_priv->psr.psr2_enabled) {'
and this bit is only set for PSR1 move it to that block to make it
more easy to read.

Cc: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
---
 drivers/gpu/drm/i915/intel_psr.c | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_psr.c b/drivers/gpu/drm/i915/intel_psr.c
index 90759f754952..8342c33ede04 100644
--- a/drivers/gpu/drm/i915/intel_psr.c
+++ b/drivers/gpu/drm/i915/intel_psr.c
@@ -398,10 +398,11 @@ static void intel_psr_enable_sink(struct intel_dp *intel_dp)
 	} else {
 		if (dev_priv->psr.link_standby)
 			dpcd_val |= DP_PSR_MAIN_LINK_ACTIVE;
+
+		if (INTEL_GEN(dev_priv) >= 8)
+			dpcd_val |= DP_PSR_CRC_VERIFICATION;
 	}
 
-	if (!dev_priv->psr.psr2_enabled && INTEL_GEN(dev_priv) >= 8)
-		dpcd_val |= DP_PSR_CRC_VERIFICATION;
 	drm_dp_dpcd_writeb(&intel_dp->aux, DP_PSR_EN_CFG, dpcd_val);
 
 	drm_dp_dpcd_writeb(&intel_dp->aux, DP_SET_POWER, DP_SET_POWER_D0);
-- 
2.19.2

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[PATCH v4 4/9] drm/i915/psr: Enable sink to trigger a interruption on PSR2 CRC mismatch

[José Roberto de Souza]

eDP spec states 2 different bits to enable sink to trigger a
interruption when there is a CRC mismatch.
DP_PSR_CRC_VERIFICATION is for PSR only and
DP_PSR_IRQ_HPD_WITH_CRC_ERRORS is for PSR2 only.

Cc: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Reviewed-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
---
 drivers/gpu/drm/i915/intel_psr.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/intel_psr.c b/drivers/gpu/drm/i915/intel_psr.c
index 8342c33ede04..e463bef3c804 100644
--- a/drivers/gpu/drm/i915/intel_psr.c
+++ b/drivers/gpu/drm/i915/intel_psr.c
@@ -394,7 +394,7 @@ static void intel_psr_enable_sink(struct intel_dp *intel_dp)
 	if (dev_priv->psr.psr2_enabled) {
 		drm_dp_dpcd_writeb(&intel_dp->aux, DP_RECEIVER_ALPM_CONFIG,
 				   DP_ALPM_ENABLE);
-		dpcd_val |= DP_PSR_ENABLE_PSR2;
+		dpcd_val |= DP_PSR_ENABLE_PSR2 | DP_PSR_IRQ_HPD_WITH_CRC_ERRORS;
 	} else {
 		if (dev_priv->psr.link_standby)
 			dpcd_val |= DP_PSR_MAIN_LINK_ACTIVE;
-- 
2.19.2

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[PATCH v4 5/9] drm/i915/icl: Do not change reserved registers related to PSR2

[José Roberto de Souza]

For ICL the bit 12 of CHICKEN_TRANS is reserved so we should not
touch it and as by default VSC_DATA_SEL_SOFTWARE_CONTROL is already
unset in gen10 + GLK we can just drop it and fix for both gens.

Cc: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
---
 drivers/gpu/drm/i915/intel_psr.c | 11 ++++-------
 1 file changed, 4 insertions(+), 7 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_psr.c b/drivers/gpu/drm/i915/intel_psr.c
index e463bef3c804..b513a15d60e1 100644
--- a/drivers/gpu/drm/i915/intel_psr.c
+++ b/drivers/gpu/drm/i915/intel_psr.c
@@ -649,17 +649,14 @@ static void intel_psr_enable_source(struct intel_dp *intel_dp,
 	if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv))
 		hsw_psr_setup_aux(intel_dp);
 
-	if (dev_priv->psr.psr2_enabled) {
+	if (dev_priv->psr.psr2_enabled && (IS_GEN9(dev_priv) &&
+					   !IS_GEMINILAKE(dev_priv))) {
 		i915_reg_t reg = gen9_chicken_trans_reg(dev_priv,
 							cpu_transcoder);
 		u32 chicken = I915_READ(reg);
 
-		if (IS_GEN9(dev_priv) && !IS_GEMINILAKE(dev_priv))
-			chicken |= (PSR2_VSC_ENABLE_PROG_HEADER
-				   | PSR2_ADD_VERTICAL_LINE_COUNT);
-
-		else
-			chicken &= ~VSC_DATA_SEL_SOFTWARE_CONTROL;
+		chicken |= PSR2_VSC_ENABLE_PROG_HEADER |
+			   PSR2_ADD_VERTICAL_LINE_COUNT;
 		I915_WRITE(reg, chicken);
 	}
 
-- 
2.19.2

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[PATCH v4 6/9] drm/i915: Remove old PSR2 FIXME about frontbuffer tracking

[José Roberto de Souza]

Our frontbuffer tracking improved over the years + the WA #0884
helped us keep PSR2 enabled while triggering screen updates when
necessary so this FIXME is not valid anymore.

Acked-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
---
 drivers/gpu/drm/i915/intel_psr.c | 3 ---
 1 file changed, 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_psr.c b/drivers/gpu/drm/i915/intel_psr.c
index b513a15d60e1..11b038ba96ec 100644
--- a/drivers/gpu/drm/i915/intel_psr.c
+++ b/drivers/gpu/drm/i915/intel_psr.c
@@ -476,9 +476,6 @@ static void hsw_activate_psr2(struct intel_dp *intel_dp)
 	idle_frames = max(idle_frames, dev_priv->psr.sink_sync_latency + 1);
 	val = idle_frames << EDP_PSR2_IDLE_FRAME_SHIFT;
 
-	/* FIXME: selective update is probably totally broken because it doesn't
-	 * mesh at all with our frontbuffer tracking. And the hw alone isn't
-	 * good enough. */
 	val |= EDP_PSR2_ENABLE | EDP_SU_TRACK_ENABLE;
 	if (INTEL_GEN(dev_priv) >= 10 || IS_GEMINILAKE(dev_priv))
 		val |= EDP_Y_COORDINATE_ENABLE;
-- 
2.19.2

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[PATCH v4 7/9] drm: Add the PSR SU granularity registers offsets

[José Roberto de Souza]

Source is required to comply to sink SU granularity when
DP_PSR2_SU_GRANULARITY_REQUIRED is set in DP_PSR_CAPS,
so adding the registers offsets.

v2: Also adding DP_PSR2_SU_Y_GRANULARITY(Rodrigo)

Cc: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
---
 include/drm/drm_dp_helper.h | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h
index c33e89c51d9f..18cfde45b8ed 100644
--- a/include/drm/drm_dp_helper.h
+++ b/include/drm/drm_dp_helper.h
@@ -314,6 +314,10 @@
 # define DP_PSR_SETUP_TIME_SHIFT            1
 # define DP_PSR2_SU_Y_COORDINATE_REQUIRED   (1 << 4)  /* eDP 1.4a */
 # define DP_PSR2_SU_GRANULARITY_REQUIRED    (1 << 5)  /* eDP 1.4b */
+
+#define DP_PSR2_SU_X_GRANULARITY	    0x072 /* eDP 1.4b */
+#define DP_PSR2_SU_Y_GRANULARITY	    0x074 /* eDP 1.4b */
+
 /*
  * 0x80-0x8f describe downstream port capabilities, but there are two layouts
  * based on whether DP_DETAILED_CAP_INFO_AVAILABLE was set.  If it was not,
-- 
2.19.2

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[PATCH v4 8/9] drm/i915/psr: Check if resolution is supported by default SU granularity

[José Roberto de Souza]

Selective updates have a default granularity requirements as stated
by eDP spec(PSR2 SELECTIVE UPDATE X GRANULARITY CAPABILITY register
definition), so check if HW can match those requirements before
enabling PSR2.

v3:
- Changes in the comments and commit message(Dhinakaran)
- Printing the hdisplay that do not match with default granularity

Cc: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
---
 drivers/gpu/drm/i915/intel_psr.c | 11 +++++++++++
 1 file changed, 11 insertions(+)

diff --git a/drivers/gpu/drm/i915/intel_psr.c b/drivers/gpu/drm/i915/intel_psr.c
index 11b038ba96ec..298c3145212d 100644
--- a/drivers/gpu/drm/i915/intel_psr.c
+++ b/drivers/gpu/drm/i915/intel_psr.c
@@ -536,6 +536,17 @@ static bool intel_psr2_config_valid(struct intel_dp *intel_dp,
 		return false;
 	}
 
+	/*
+	 * HW sends SU blocks of size four scan lines, which means the starting
+	 * X coordinate and Y granularity requirements will always be met. We
+	 * only need to validate the SU block width is a multiple of 4.
+	 */
+	if (crtc_hdisplay % 4) {
+		DRM_DEBUG_KMS("PSR2 not enabled, hdisplay(%d) not multiple of 4\n",
+			      crtc_hdisplay);
+		return false;
+	}
+
 	return true;
 }
 
-- 
2.19.2

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[PATCH v4 9/9] drm/i915/psr: Check if source supports sink specific SU granularity

[José Roberto de Souza]

According to eDP spec, sink can required specific selective update
granularity that source must comply.
Here caching the value if required and checking if source supports
it.

v3:
- Returning the default granularity in case DPCD read fails(Dhinakaran)
- Changed DPCD error message level(Dhinakaran)

v4:
- Setting granularity to defaul when granularity read is equal to
0(Dhinakaran)

Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Cc: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
---
 drivers/gpu/drm/i915/i915_drv.h  |  1 +
 drivers/gpu/drm/i915/intel_psr.c | 34 +++++++++++++++++++++++++++++---
 2 files changed, 32 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 12b8476b09a2..81618af7a5d7 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -508,6 +508,7 @@ struct i915_psr {
 	ktime_t last_exit;
 	bool sink_not_reliable;
 	bool irq_aux_error;
+	u16 su_x_granularity;
 };
 
 enum intel_pch {
diff --git a/drivers/gpu/drm/i915/intel_psr.c b/drivers/gpu/drm/i915/intel_psr.c
index 298c3145212d..cb04d806f456 100644
--- a/drivers/gpu/drm/i915/intel_psr.c
+++ b/drivers/gpu/drm/i915/intel_psr.c
@@ -261,6 +261,32 @@ static u8 intel_dp_get_sink_sync_latency(struct intel_dp *intel_dp)
 	return val;
 }
 
+static u16 intel_dp_get_su_x_granulartiy(struct intel_dp *intel_dp)
+{
+	u16 val;
+	ssize_t r;
+
+	/*
+	 * Returning the default X granularity if granularity not required or
+	 * if DPCD read fails
+	 */
+	if (!(intel_dp->psr_dpcd[1] & DP_PSR2_SU_GRANULARITY_REQUIRED))
+		return 4;
+
+	r = drm_dp_dpcd_read(&intel_dp->aux, DP_PSR2_SU_X_GRANULARITY, &val, 2);
+	if (r != 2)
+		DRM_DEBUG_KMS("Unable to read DP_PSR2_SU_X_GRANULARITY\n");
+
+	/*
+	 * Spec says that if the value read is 0 the default granularity should
+	 * be used instead.
+	 */
+	if (r != 2 || val == 0)
+		val = 4;
+
+	return val;
+}
+
 void intel_psr_init_dpcd(struct intel_dp *intel_dp)
 {
 	struct drm_i915_private *dev_priv =
@@ -315,6 +341,8 @@ void intel_psr_init_dpcd(struct intel_dp *intel_dp)
 		if (dev_priv->psr.sink_psr2_support) {
 			dev_priv->psr.colorimetry_support =
 				intel_dp_get_colorimetry_status(intel_dp);
+			dev_priv->psr.su_x_granularity =
+				intel_dp_get_su_x_granulartiy(intel_dp);
 		}
 	}
 }
@@ -541,9 +569,9 @@ static bool intel_psr2_config_valid(struct intel_dp *intel_dp,
 	 * X coordinate and Y granularity requirements will always be met. We
 	 * only need to validate the SU block width is a multiple of 4.
 	 */
-	if (crtc_hdisplay % 4) {
-		DRM_DEBUG_KMS("PSR2 not enabled, hdisplay(%d) not multiple of 4\n",
-			      crtc_hdisplay);
+	if (crtc_hdisplay % dev_priv->psr.su_x_granularity) {
+		DRM_DEBUG_KMS("PSR2 not enabled, hdisplay(%d) not multiple of %d\n",
+			      crtc_hdisplay, dev_priv->psr.su_x_granularity);
 		return false;
 	}
 
-- 
2.19.2

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✗ Fi.CI.SPARSE: warning for series starting with [v4,1/9] drm/i915: Disable PSR in Apple panels

[Patchwork]

== Series Details ==

Series: series starting with [v4,1/9] drm/i915: Disable PSR in Apple panels
URL   : https://patchwork.freedesktop.org/series/53448/
State : warning

== Summary ==

$ dim sparse origin/drm-tip
Sparse version: v0.5.2
Commit: drm/i915: Disable PSR in Apple panels
Okay!

Commit: drm/i915/psr: Don't tell sink that main link will be active while is active PSR2
Okay!

Commit: drm/i915/psr: Set PSR CRC verification bit in sink inside PSR1 block
Okay!

Commit: drm/i915/psr: Enable sink to trigger a interruption on PSR2 CRC mismatch
Okay!

Commit: drm/i915/icl: Do not change reserved registers related to PSR2
Okay!

Commit: drm/i915: Remove old PSR2 FIXME about frontbuffer tracking
-O:drivers/gpu/drm/i915/intel_psr.c:476:23: warning: expression using sizeof(void)
-O:drivers/gpu/drm/i915/intel_psr.c:476:23: warning: expression using sizeof(void)
+drivers/gpu/drm/i915/intel_psr.c:476:23: warning: expression using sizeof(void)
+drivers/gpu/drm/i915/intel_psr.c:476:23: warning: expression using sizeof(void)

Commit: drm: Add the PSR SU granularity registers offsets
Okay!

Commit: drm/i915/psr: Check if resolution is supported by default SU granularity
Okay!

Commit: drm/i915/psr: Check if source supports sink specific SU granularity
-drivers/gpu/drm/i915/selftests/../i915_drv.h:3573:16: warning: expression using sizeof(void)
+drivers/gpu/drm/i915/selftests/../i915_drv.h:3574:16: warning: expression using sizeof(void)

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✓ Fi.CI.BAT: success for series starting with [v4,1/9] drm/i915: Disable PSR in Apple panels

[Patchwork]

== Series Details ==

Series: series starting with [v4,1/9] drm/i915: Disable PSR in Apple panels
URL   : https://patchwork.freedesktop.org/series/53448/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_5250 -> Patchwork_11004
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  External URL: https://patchwork.freedesktop.org/api/1.0/series/53448/revisions/1/mbox/

Known issues
------------

  Here are the changes found in Patchwork_11004 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@gem_ctx_create@basic-files:
    - fi-bsw-n3050:       PASS -> FAIL [fdo#108656]

  * igt@gem_exec_suspend@basic-s4-devices:
    - fi-ivb-3520m:       PASS -> FAIL [fdo#108880]

  
#### Possible fixes ####

  * igt@gem_mmap_gtt@basic-small-copy-xy:
    - fi-glk-dsi:         INCOMPLETE [fdo#103359] / [k.org#198133] -> PASS

  
  [fdo#103359]: https://bugs.freedesktop.org/show_bug.cgi?id=103359
  [fdo#108656]: https://bugs.freedesktop.org/show_bug.cgi?id=108656
  [fdo#108880]: https://bugs.freedesktop.org/show_bug.cgi?id=108880
  [k.org#198133]: https://bugzilla.kernel.org/show_bug.cgi?id=198133


Participating hosts (47 -> 42)
------------------------------

  Missing    (5): fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-ctg-p8600 


Build changes
-------------

    * Linux: CI_DRM_5250 -> Patchwork_11004

  CI_DRM_5250: 1e4e49c57969d1b53dea913c92e1d23ec23aee31 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_4736: 285ebfb3b7adc56586031afa5150c4e5ad40c229 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_11004: d067bd608588524c0a9f30ad59def19ab00d9a6c @ git://anongit.freedesktop.org/gfx-ci/linux


== Linux commits ==

d067bd608588 drm/i915/psr: Check if source supports sink specific SU granularity
6a74c94c45cc drm/i915/psr: Check if resolution is supported by default SU granularity
96e7dee92d90 drm: Add the PSR SU granularity registers offsets
4db7636639ab drm/i915: Remove old PSR2 FIXME about frontbuffer tracking
0face939f221 drm/i915/icl: Do not change reserved registers related to PSR2
2f37f7255939 drm/i915/psr: Enable sink to trigger a interruption on PSR2 CRC mismatch
d7cddacbdafd drm/i915/psr: Set PSR CRC verification bit in sink inside PSR1 block
b99b5e1aef92 drm/i915/psr: Don't tell sink that main link will be active while is active PSR2
1e498626169e drm/i915: Disable PSR in Apple panels

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_11004/
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

✓ Fi.CI.IGT: success for series starting with [v4,1/9] drm/i915: Disable PSR in Apple panels

[Patchwork]

== Series Details ==

Series: series starting with [v4,1/9] drm/i915: Disable PSR in Apple panels
URL   : https://patchwork.freedesktop.org/series/53448/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_5250_full -> Patchwork_11004_full
====================================================

Summary
-------

  **WARNING**

  Minor unknown changes coming with Patchwork_11004_full need to be verified
  manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_11004_full, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in Patchwork_11004_full:

### IGT changes ###

#### Warnings ####

  * igt@pm_rc6_residency@rc6-accuracy:
    - shard-snb:          PASS -> SKIP

  
Known issues
------------

  Here are the changes found in Patchwork_11004_full that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@gem_exec_schedule@pi-ringfull-vebox:
    - shard-apl:          NOTRUN -> FAIL [fdo#103158]

  * igt@gem_ppgtt@blt-vs-render-ctxn:
    - shard-kbl:          PASS -> INCOMPLETE [fdo#103665] / [fdo#106023] / [fdo#106887]

  * igt@kms_busy@extended-modeset-hang-newfb-with-reset-render-c:
    - shard-hsw:          PASS -> DMESG-WARN [fdo#107956]

  * igt@kms_busy@extended-pageflip-modeset-hang-oldfb-render-a:
    - shard-glk:          PASS -> DMESG-WARN [fdo#107956]

  * igt@kms_busy@extended-pageflip-modeset-hang-oldfb-render-c:
    - shard-skl:          NOTRUN -> DMESG-WARN [fdo#107956]

  * igt@kms_cursor_crc@cursor-128x128-offscreen:
    - shard-skl:          PASS -> FAIL [fdo#103232]

  * igt@kms_cursor_crc@cursor-256x85-random:
    - shard-glk:          PASS -> FAIL [fdo#103232] +1

  * igt@kms_cursor_crc@cursor-64x64-onscreen:
    - shard-apl:          PASS -> FAIL [fdo#103232]

  * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-onoff:
    - shard-apl:          PASS -> FAIL [fdo#103167]

  * igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-draw-mmap-cpu:
    - shard-glk:          PASS -> FAIL [fdo#103167] +1

  * igt@kms_frontbuffer_tracking@fbcpsr-stridechange:
    - shard-skl:          NOTRUN -> FAIL [fdo#105683]

  * igt@kms_plane@pixel-format-pipe-a-planes:
    - shard-skl:          NOTRUN -> DMESG-WARN [fdo#106885]

  * igt@kms_plane@plane-position-covered-pipe-b-planes:
    - shard-glk:          PASS -> FAIL [fdo#103166] +1

  * igt@kms_plane_alpha_blend@pipe-a-alpha-basic:
    - shard-skl:          NOTRUN -> FAIL [fdo#107815] / [fdo#108145]

  * igt@kms_plane_alpha_blend@pipe-a-alpha-transparant-fb:
    - shard-skl:          NOTRUN -> FAIL [fdo#108145] +2

  * igt@kms_plane_alpha_blend@pipe-a-constant-alpha-max:
    - shard-apl:          NOTRUN -> FAIL [fdo#108145]

  * igt@kms_plane_alpha_blend@pipe-c-coverage-7efc:
    - shard-skl:          PASS -> FAIL [fdo#107815]

  * igt@kms_properties@connector-properties-atomic:
    - shard-skl:          NOTRUN -> FAIL [fdo#108642]

  * igt@pm_backlight@fade_with_suspend:
    - shard-skl:          NOTRUN -> FAIL [fdo#107847]

  * igt@pm_rpm@cursor:
    - shard-skl:          PASS -> INCOMPLETE [fdo#107807] +1

  
#### Possible fixes ####

  * igt@gem_eio@reset-stress:
    - shard-glk:          FAIL [fdo#107799] -> PASS

  * igt@gem_exec_schedule@preempt-queue-chain-render:
    - shard-apl:          INCOMPLETE [fdo#103927] -> PASS

  * igt@gem_ppgtt@blt-vs-render-ctx0:
    - shard-skl:          TIMEOUT [fdo#108039] -> PASS

  * igt@kms_busy@extended-pageflip-hang-newfb-render-a:
    - shard-glk:          DMESG-WARN [fdo#107956] -> PASS

  * igt@kms_color@pipe-c-legacy-gamma:
    - shard-apl:          FAIL [fdo#104782] -> PASS

  * igt@kms_cursor_crc@cursor-64x64-suspend:
    - shard-skl:          INCOMPLETE [fdo#104108] -> PASS +1

  * igt@kms_cursor_legacy@2x-long-flip-vs-cursor-legacy:
    - shard-glk:          FAIL [fdo#104873] -> PASS

  * igt@kms_draw_crc@draw-method-xrgb2101010-mmap-cpu-untiled:
    - shard-skl:          FAIL [fdo#103184] -> PASS

  * igt@kms_flip@2x-flip-vs-expired-vblank:
    - shard-hsw:          FAIL [fdo#102887] -> PASS

  * igt@kms_flip@flip-vs-expired-vblank:
    - shard-skl:          FAIL [fdo#105363] -> PASS

  * igt@kms_flip@nonexisting-fb-interruptible:
    - {shard-iclb}:       DMESG-WARN -> PASS

  * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-blt:
    - shard-glk:          FAIL [fdo#103167] -> PASS +5

  * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-mmap-gtt:
    - shard-apl:          FAIL [fdo#103167] -> PASS +2

  * igt@kms_plane@plane-position-covered-pipe-b-planes:
    - shard-apl:          FAIL [fdo#103166] -> PASS

  * igt@pm_rpm@cursor-dpms:
    - shard-skl:          INCOMPLETE [fdo#107807] -> PASS

  * igt@pm_rpm@gem-execbuf-stress-extra-wait:
    - shard-skl:          INCOMPLETE [fdo#107803] / [fdo#107807] -> PASS

  * igt@pm_rpm@reg-read-ioctl:
    - {shard-iclb}:       DMESG-WARN [fdo#107724] -> PASS

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#102887]: https://bugs.freedesktop.org/show_bug.cgi?id=102887
  [fdo#103158]: https://bugs.freedesktop.org/show_bug.cgi?id=103158
  [fdo#103166]: https://bugs.freedesktop.org/show_bug.cgi?id=103166
  [fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167
  [fdo#103184]: https://bugs.freedesktop.org/show_bug.cgi?id=103184
  [fdo#103232]: https://bugs.freedesktop.org/show_bug.cgi?id=103232
  [fdo#103665]: https://bugs.freedesktop.org/show_bug.cgi?id=103665
  [fdo#103927]: https://bugs.freedesktop.org/show_bug.cgi?id=103927
  [fdo#104108]: https://bugs.freedesktop.org/show_bug.cgi?id=104108
  [fdo#104782]: https://bugs.freedesktop.org/show_bug.cgi?id=104782
  [fdo#104873]: https://bugs.freedesktop.org/show_bug.cgi?id=104873
  [fdo#105363]: https://bugs.freedesktop.org/show_bug.cgi?id=105363
  [fdo#105683]: https://bugs.freedesktop.org/show_bug.cgi?id=105683
  [fdo#106023]: https://bugs.freedesktop.org/show_bug.cgi?id=106023
  [fdo#106885]: https://bugs.freedesktop.org/show_bug.cgi?id=106885
  [fdo#106887]: https://bugs.freedesktop.org/show_bug.cgi?id=106887
  [fdo#107724]: https://bugs.freedesktop.org/show_bug.cgi?id=107724
  [fdo#107799]: https://bugs.freedesktop.org/show_bug.cgi?id=107799
  [fdo#107803]: https://bugs.freedesktop.org/show_bug.cgi?id=107803
  [fdo#107807]: https://bugs.freedesktop.org/show_bug.cgi?id=107807
  [fdo#107815]: https://bugs.freedesktop.org/show_bug.cgi?id=107815
  [fdo#107847]: https://bugs.freedesktop.org/show_bug.cgi?id=107847
  [fdo#107956]: https://bugs.freedesktop.org/show_bug.cgi?id=107956
  [fdo#108039]: https://bugs.freedesktop.org/show_bug.cgi?id=108039
  [fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145
  [fdo#108642]: https://bugs.freedesktop.org/show_bug.cgi?id=108642


Participating hosts (7 -> 7)
------------------------------

  No changes in participating hosts


Build changes
-------------

    * Linux: CI_DRM_5250 -> Patchwork_11004

  CI_DRM_5250: 1e4e49c57969d1b53dea913c92e1d23ec23aee31 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_4736: 285ebfb3b7adc56586031afa5150c4e5ad40c229 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_11004: d067bd608588524c0a9f30ad59def19ab00d9a6c @ git://anongit.freedesktop.org/gfx-ci/linux
  piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_11004/
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

Re: [PATCH v4 9/9] drm/i915/psr: Check if source supports sink specific SU granularity

[Dhinakaran Pandiyan]

On Mon, 2018-12-03 at 16:34 -0800, José Roberto de Souza wrote:
> According to eDP spec, sink can required specific selective update
> granularity that source must comply.
> Here caching the value if required and checking if source supports
> it.
> 
> v3:
> - Returning the default granularity in case DPCD read
> fails(Dhinakaran)
> - Changed DPCD error message level(Dhinakaran)
> 
> v4:
> - Setting granularity to defaul when granularity read is equal to
> 0(Dhinakaran)
> 
> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
> Cc: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
> Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
> ---
>  drivers/gpu/drm/i915/i915_drv.h  |  1 +
>  drivers/gpu/drm/i915/intel_psr.c | 34 +++++++++++++++++++++++++++++-
> --
>  2 files changed, 32 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_drv.h
> b/drivers/gpu/drm/i915/i915_drv.h
> index 12b8476b09a2..81618af7a5d7 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -508,6 +508,7 @@ struct i915_psr {
>  	ktime_t last_exit;
>  	bool sink_not_reliable;
>  	bool irq_aux_error;
> +	u16 su_x_granularity;
>  };
>  
>  enum intel_pch {
> diff --git a/drivers/gpu/drm/i915/intel_psr.c
> b/drivers/gpu/drm/i915/intel_psr.c
> index 298c3145212d..cb04d806f456 100644
> --- a/drivers/gpu/drm/i915/intel_psr.c
> +++ b/drivers/gpu/drm/i915/intel_psr.c
> @@ -261,6 +261,32 @@ static u8 intel_dp_get_sink_sync_latency(struct
> intel_dp *intel_dp)
>  	return val;
>  }
>  
> +static u16 intel_dp_get_su_x_granulartiy(struct intel_dp *intel_dp)
> +{
> +	u16 val;
> +	ssize_t r;
> +
> +	/*
> +	 * Returning the default X granularity if granularity not
> required or
> +	 * if DPCD read fails
> +	 */
> +	if (!(intel_dp->psr_dpcd[1] & DP_PSR2_SU_GRANULARITY_REQUIRED))
> +		return 4;
> +
> +	r = drm_dp_dpcd_read(&intel_dp->aux, DP_PSR2_SU_X_GRANULARITY,
> &val, 2);
> +	if (r != 2)
> +		DRM_DEBUG_KMS("Unable to read
> DP_PSR2_SU_X_GRANULARITY\n");
> +
> +	/*
> +	 * Spec says that if the value read is 0 the default
> granularity should
> +	 * be used instead.
> +	 */
> +	if (r != 2 || val == 0)
> +		val = 4;
> +
> +	return val;
> +}
> +
>  void intel_psr_init_dpcd(struct intel_dp *intel_dp)
>  {
>  	struct drm_i915_private *dev_priv =
> @@ -315,6 +341,8 @@ void intel_psr_init_dpcd(struct intel_dp
> *intel_dp)
>  		if (dev_priv->psr.sink_psr2_support) {
>  			dev_priv->psr.colorimetry_support =
>  				intel_dp_get_colorimetry_status(intel_d
> p);
> +			dev_priv->psr.su_x_granularity =
> +				intel_dp_get_su_x_granulartiy(intel_dp)
> ;
>  		}
>  	}
>  }
> @@ -541,9 +569,9 @@ static bool intel_psr2_config_valid(struct
> intel_dp *intel_dp,
>  	 * X coordinate and Y granularity requirements will always be
> met. We
>  	 * only need to validate the SU block width is a multiple of 4.
This comment added in the previous patch is now outdated :) The patch
looks good otherwise,
Reviewed-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>

>  	 */
> -	if (crtc_hdisplay % 4) {
> -		DRM_DEBUG_KMS("PSR2 not enabled, hdisplay(%d) not
> multiple of 4\n",
> -			      crtc_hdisplay);
> +	if (crtc_hdisplay % dev_priv->psr.su_x_granularity) {
> +		DRM_DEBUG_KMS("PSR2 not enabled, hdisplay(%d) not
> multiple of %d\n",
> +			      crtc_hdisplay, dev_priv-
> >psr.su_x_granularity);
>  		return false;
>  	}
>  

_______________________________________________
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https://lists.freedesktop.org/mailman/listinfo/intel-gfx

Re: [PATCH v4 9/9] drm/i915/psr: Check if source supports sink specific SU granularity

[Souza, Jose]

[-- Attachment #1.1: Type: text/plain, Size: 3977 bytes --]

On Tue, 2018-12-04 at 12:02 -0800, Dhinakaran Pandiyan wrote:
> On Mon, 2018-12-03 at 16:34 -0800, José Roberto de Souza wrote:
> > According to eDP spec, sink can required specific selective update
> > granularity that source must comply.
> > Here caching the value if required and checking if source supports
> > it.
> > 
> > v3:
> > - Returning the default granularity in case DPCD read
> > fails(Dhinakaran)
> > - Changed DPCD error message level(Dhinakaran)
> > 
> > v4:
> > - Setting granularity to defaul when granularity read is equal to
> > 0(Dhinakaran)
> > 
> > Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
> > Cc: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
> > Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
> > ---
> >  drivers/gpu/drm/i915/i915_drv.h  |  1 +
> >  drivers/gpu/drm/i915/intel_psr.c | 34
> > +++++++++++++++++++++++++++++-
> > --
> >  2 files changed, 32 insertions(+), 3 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/i915_drv.h
> > b/drivers/gpu/drm/i915/i915_drv.h
> > index 12b8476b09a2..81618af7a5d7 100644
> > --- a/drivers/gpu/drm/i915/i915_drv.h
> > +++ b/drivers/gpu/drm/i915/i915_drv.h
> > @@ -508,6 +508,7 @@ struct i915_psr {
> >  	ktime_t last_exit;
> >  	bool sink_not_reliable;
> >  	bool irq_aux_error;
> > +	u16 su_x_granularity;
> >  };
> >  
> >  enum intel_pch {
> > diff --git a/drivers/gpu/drm/i915/intel_psr.c
> > b/drivers/gpu/drm/i915/intel_psr.c
> > index 298c3145212d..cb04d806f456 100644
> > --- a/drivers/gpu/drm/i915/intel_psr.c
> > +++ b/drivers/gpu/drm/i915/intel_psr.c
> > @@ -261,6 +261,32 @@ static u8
> > intel_dp_get_sink_sync_latency(struct
> > intel_dp *intel_dp)
> >  	return val;
> >  }
> >  
> > +static u16 intel_dp_get_su_x_granulartiy(struct intel_dp
> > *intel_dp)
> > +{
> > +	u16 val;
> > +	ssize_t r;
> > +
> > +	/*
> > +	 * Returning the default X granularity if granularity not
> > required or
> > +	 * if DPCD read fails
> > +	 */
> > +	if (!(intel_dp->psr_dpcd[1] & DP_PSR2_SU_GRANULARITY_REQUIRED))
> > +		return 4;
> > +
> > +	r = drm_dp_dpcd_read(&intel_dp->aux, DP_PSR2_SU_X_GRANULARITY,
> > &val, 2);
> > +	if (r != 2)
> > +		DRM_DEBUG_KMS("Unable to read
> > DP_PSR2_SU_X_GRANULARITY\n");
> > +
> > +	/*
> > +	 * Spec says that if the value read is 0 the default
> > granularity should
> > +	 * be used instead.
> > +	 */
> > +	if (r != 2 || val == 0)
> > +		val = 4;
> > +
> > +	return val;
> > +}
> > +
> >  void intel_psr_init_dpcd(struct intel_dp *intel_dp)
> >  {
> >  	struct drm_i915_private *dev_priv =
> > @@ -315,6 +341,8 @@ void intel_psr_init_dpcd(struct intel_dp
> > *intel_dp)
> >  		if (dev_priv->psr.sink_psr2_support) {
> >  			dev_priv->psr.colorimetry_support =
> >  				intel_dp_get_colorimetry_status(intel_d
> > p);
> > +			dev_priv->psr.su_x_granularity =
> > +				intel_dp_get_su_x_granulartiy(intel_dp)
> > ;
> >  		}
> >  	}
> >  }
> > @@ -541,9 +569,9 @@ static bool intel_psr2_config_valid(struct
> > intel_dp *intel_dp,
> >  	 * X coordinate and Y granularity requirements will always be
> > met. We
> >  	 * only need to validate the SU block width is a multiple of 4.
> This comment added in the previous patch is now outdated :) The patch
> looks good otherwise,

Good catch, thanks. I will update to:

-only need to validate the SU block width is a multiple of 4.
+only need to validate the SU block width is a multiple of x
granularity.

> Reviewed-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
> 
> >  	 */
> > -	if (crtc_hdisplay % 4) {
> > -		DRM_DEBUG_KMS("PSR2 not enabled, hdisplay(%d) not
> > multiple of 4\n",
> > -			      crtc_hdisplay);
> > +	if (crtc_hdisplay % dev_priv->psr.su_x_granularity) {
> > +		DRM_DEBUG_KMS("PSR2 not enabled, hdisplay(%d) not
> > multiple of %d\n",
> > +			      crtc_hdisplay, dev_priv-
> > > psr.su_x_granularity);
> >  		return false;
> >  	}
> >  

[-- Attachment #1.2: This is a digitally signed message part --]
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[-- Attachment #2: Type: text/plain, Size: 160 bytes --]

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Re: ✓ Fi.CI.IGT: success for series starting with [v4,1/9] drm/i915: Disable PSR in Apple panels

[Souza, Jose]

[-- Attachment #1.1: Type: text/plain, Size: 8524 bytes --]

Patches merged to drm-intel-next-queued, thanks for the reviews DK and
Rodrigo.

On Tue, 2018-12-04 at 03:05 +0000, Patchwork wrote:
> == Series Details ==
> 
> Series: series starting with [v4,1/9] drm/i915: Disable PSR in Apple
> panels
> URL   : https://patchwork.freedesktop.org/series/53448/
> State : success
> 
> == Summary ==
> 
> CI Bug Log - changes from CI_DRM_5250_full -> Patchwork_11004_full
> ====================================================
> 
> Summary
> -------
> 
>   **WARNING**
> 
>   Minor unknown changes coming with Patchwork_11004_full need to be
> verified
>   manually.
>   
>   If you think the reported changes have nothing to do with the
> changes
>   introduced in Patchwork_11004_full, please notify your bug team to
> allow them
>   to document this new failure mode, which will reduce false
> positives in CI.
> 
>   
> 
> Possible new issues
> -------------------
> 
>   Here are the unknown changes that may have been introduced in
> Patchwork_11004_full:
> 
> ### IGT changes ###
> 
> #### Warnings ####
> 
>   * igt@pm_rc6_residency@rc6-accuracy:
>     - shard-snb:          PASS -> SKIP
> 
>   
> Known issues
> ------------
> 
>   Here are the changes found in Patchwork_11004_full that come from
> known issues:
> 
> ### IGT changes ###
> 
> #### Issues hit ####
> 
>   * igt@gem_exec_schedule@pi-ringfull-vebox:
>     - shard-apl:          NOTRUN -> FAIL [fdo#103158]
> 
>   * igt@gem_ppgtt@blt-vs-render-ctxn:
>     - shard-kbl:          PASS -> INCOMPLETE [fdo#103665] /
> [fdo#106023] / [fdo#106887]
> 
>   * igt@kms_busy@extended-modeset-hang-newfb-with-reset-render-c:
>     - shard-hsw:          PASS -> DMESG-WARN [fdo#107956]
> 
>   * igt@kms_busy@extended-pageflip-modeset-hang-oldfb-render-a:
>     - shard-glk:          PASS -> DMESG-WARN [fdo#107956]
> 
>   * igt@kms_busy@extended-pageflip-modeset-hang-oldfb-render-c:
>     - shard-skl:          NOTRUN -> DMESG-WARN [fdo#107956]
> 
>   * igt@kms_cursor_crc@cursor-128x128-offscreen:
>     - shard-skl:          PASS -> FAIL [fdo#103232]
> 
>   * igt@kms_cursor_crc@cursor-256x85-random:
>     - shard-glk:          PASS -> FAIL [fdo#103232] +1
> 
>   * igt@kms_cursor_crc@cursor-64x64-onscreen:
>     - shard-apl:          PASS -> FAIL [fdo#103232]
> 
>   * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-onoff:
>     - shard-apl:          PASS -> FAIL [fdo#103167]
> 
>   * igt@kms
> _frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-draw-mmap-cpu:
>     - shard-glk:          PASS -> FAIL [fdo#103167] +1
> 
>   * igt@kms_frontbuffer_tracking@fbcpsr-stridechange:
>     - shard-skl:          NOTRUN -> FAIL [fdo#105683]
> 
>   * igt@kms_plane@pixel-format-pipe-a-planes:
>     - shard-skl:          NOTRUN -> DMESG-WARN [fdo#106885]
> 
>   * igt@kms_plane@plane-position-covered-pipe-b-planes:
>     - shard-glk:          PASS -> FAIL [fdo#103166] +1
> 
>   * igt@kms_plane_alpha_blend@pipe-a-alpha-basic:
>     - shard-skl:          NOTRUN -> FAIL [fdo#107815] / [fdo#108145]
> 
>   * igt@kms_plane_alpha_blend@pipe-a-alpha-transparant-fb:
>     - shard-skl:          NOTRUN -> FAIL [fdo#108145] +2
> 
>   * igt@kms_plane_alpha_blend@pipe-a-constant-alpha-max:
>     - shard-apl:          NOTRUN -> FAIL [fdo#108145]
> 
>   * igt@kms_plane_alpha_blend@pipe-c-coverage-7efc:
>     - shard-skl:          PASS -> FAIL [fdo#107815]
> 
>   * igt@kms_properties@connector-properties-atomic:
>     - shard-skl:          NOTRUN -> FAIL [fdo#108642]
> 
>   * igt@pm_backlight@fade_with_suspend:
>     - shard-skl:          NOTRUN -> FAIL [fdo#107847]
> 
>   * igt@pm_rpm@cursor:
>     - shard-skl:          PASS -> INCOMPLETE [fdo#107807] +1
> 
>   
> #### Possible fixes ####
> 
>   * igt@gem_eio@reset-stress:
>     - shard-glk:          FAIL [fdo#107799] -> PASS
> 
>   * igt@gem_exec_schedule@preempt-queue-chain-render:
>     - shard-apl:          INCOMPLETE [fdo#103927] -> PASS
> 
>   * igt@gem_ppgtt@blt-vs-render-ctx0:
>     - shard-skl:          TIMEOUT [fdo#108039] -> PASS
> 
>   * igt@kms_busy@extended-pageflip-hang-newfb-render-a:
>     - shard-glk:          DMESG-WARN [fdo#107956] -> PASS
> 
>   * igt@kms_color@pipe-c-legacy-gamma:
>     - shard-apl:          FAIL [fdo#104782] -> PASS
> 
>   * igt@kms_cursor_crc@cursor-64x64-suspend:
>     - shard-skl:          INCOMPLETE [fdo#104108] -> PASS +1
> 
>   * igt@kms_cursor_legacy@2x-long-flip-vs-cursor-legacy:
>     - shard-glk:          FAIL [fdo#104873] -> PASS
> 
>   * igt@kms_draw_crc@draw-method-xrgb2101010-mmap-cpu-untiled:
>     - shard-skl:          FAIL [fdo#103184] -> PASS
> 
>   * igt@kms_flip@2x-flip-vs-expired-vblank:
>     - shard-hsw:          FAIL [fdo#102887] -> PASS
> 
>   * igt@kms_flip@flip-vs-expired-vblank:
>     - shard-skl:          FAIL [fdo#105363] -> PASS
> 
>   * igt@kms_flip@nonexisting-fb-interruptible:
>     - {shard-iclb}:       DMESG-WARN -> PASS
> 
>   * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-blt:
>     - shard-glk:          FAIL [fdo#103167] -> PASS +5
> 
>   * igt@kms
> _frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-mmap-gtt:
>     - shard-apl:          FAIL [fdo#103167] -> PASS +2
> 
>   * igt@kms_plane@plane-position-covered-pipe-b-planes:
>     - shard-apl:          FAIL [fdo#103166] -> PASS
> 
>   * igt@pm_rpm@cursor-dpms:
>     - shard-skl:          INCOMPLETE [fdo#107807] -> PASS
> 
>   * igt@pm_rpm@gem-execbuf-stress-extra-wait:
>     - shard-skl:          INCOMPLETE [fdo#107803] / [fdo#107807] ->
> PASS
> 
>   * igt@pm_rpm@reg-read-ioctl:
>     - {shard-iclb}:       DMESG-WARN [fdo#107724] -> PASS
> 
>   
>   {name}: This element is suppressed. This means it is ignored when
> computing
>           the status of the difference (SUCCESS, WARNING, or
> FAILURE).
> 
>   [fdo#102887]: https://bugs.freedesktop.org/show_bug.cgi?id=102887
>   [fdo#103158]: https://bugs.freedesktop.org/show_bug.cgi?id=103158
>   [fdo#103166]: https://bugs.freedesktop.org/show_bug.cgi?id=103166
>   [fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167
>   [fdo#103184]: https://bugs.freedesktop.org/show_bug.cgi?id=103184
>   [fdo#103232]: https://bugs.freedesktop.org/show_bug.cgi?id=103232
>   [fdo#103665]: https://bugs.freedesktop.org/show_bug.cgi?id=103665
>   [fdo#103927]: https://bugs.freedesktop.org/show_bug.cgi?id=103927
>   [fdo#104108]: https://bugs.freedesktop.org/show_bug.cgi?id=104108
>   [fdo#104782]: https://bugs.freedesktop.org/show_bug.cgi?id=104782
>   [fdo#104873]: https://bugs.freedesktop.org/show_bug.cgi?id=104873
>   [fdo#105363]: https://bugs.freedesktop.org/show_bug.cgi?id=105363
>   [fdo#105683]: https://bugs.freedesktop.org/show_bug.cgi?id=105683
>   [fdo#106023]: https://bugs.freedesktop.org/show_bug.cgi?id=106023
>   [fdo#106885]: https://bugs.freedesktop.org/show_bug.cgi?id=106885
>   [fdo#106887]: https://bugs.freedesktop.org/show_bug.cgi?id=106887
>   [fdo#107724]: https://bugs.freedesktop.org/show_bug.cgi?id=107724
>   [fdo#107799]: https://bugs.freedesktop.org/show_bug.cgi?id=107799
>   [fdo#107803]: https://bugs.freedesktop.org/show_bug.cgi?id=107803
>   [fdo#107807]: https://bugs.freedesktop.org/show_bug.cgi?id=107807
>   [fdo#107815]: https://bugs.freedesktop.org/show_bug.cgi?id=107815
>   [fdo#107847]: https://bugs.freedesktop.org/show_bug.cgi?id=107847
>   [fdo#107956]: https://bugs.freedesktop.org/show_bug.cgi?id=107956
>   [fdo#108039]: https://bugs.freedesktop.org/show_bug.cgi?id=108039
>   [fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145
>   [fdo#108642]: https://bugs.freedesktop.org/show_bug.cgi?id=108642
> 
> 
> Participating hosts (7 -> 7)
> ------------------------------
> 
>   No changes in participating hosts
> 
> 
> Build changes
> -------------
> 
>     * Linux: CI_DRM_5250 -> Patchwork_11004
> 
>   CI_DRM_5250: 1e4e49c57969d1b53dea913c92e1d23ec23aee31 @
> git://anongit.freedesktop.org/gfx-ci/linux
>   IGT_4736: 285ebfb3b7adc56586031afa5150c4e5ad40c229 @
> git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
>   Patchwork_11004: d067bd608588524c0a9f30ad59def19ab00d9a6c @
> git://anongit.freedesktop.org/gfx-ci/linux
>   piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @
> git://anongit.freedesktop.org/piglit
> 
> == Logs ==
> 
> For more details see: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_11004/

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