* [PATCH 0/4] imx7 sbc board support extensions
@ 2018-12-04 11:07 ` Hans Ole Hatzel
0 siblings, 0 replies; 28+ messages in thread
From: Hans Ole Hatzel @ 2018-12-04 11:07 UTC (permalink / raw)
To: linux-arm-kernel, ilya, devicetree, linux-imx, fabio.estevam, shawnguo
Cc: Hans Ole Hatzel
The following patch series contains a number of extensions and fixes to
the board support for the imx7 sbc.
Hans Ole Hatzel (4):
ARM: dts: imx7d: cl-som-imx7: fix pinctrl for i2c2
ARM: dts: imx7d: cl-som-imx7: WiLink8 WLAN support
ARM: dts: imx7d: sbc imx7: add uart2
ARM: dts: imx7d: sbc imx7: add uart5
arch/arm/boot/dts/imx7d-cl-som-imx7.dts | 100 +++++++++++++++++++++++-
arch/arm/boot/dts/imx7d-sbc-imx7.dts | 8 ++
2 files changed, 106 insertions(+), 2 deletions(-)
--
2.19.2
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^ permalink raw reply [flat|nested] 28+ messages in thread
* [PATCH 1/4] ARM: dts: imx7d: cl-som-imx7: fix pinctrl for i2c2
2018-12-04 11:07 ` Hans Ole Hatzel
@ 2018-12-04 11:07 ` Hans Ole Hatzel
-1 siblings, 0 replies; 28+ messages in thread
From: Hans Ole Hatzel @ 2018-12-04 11:07 UTC (permalink / raw)
To: linux-arm-kernel, ilya, devicetree, linux-imx, fabio.estevam, shawnguo
Cc: Julian Scheel, Hans Ole Hatzel
On cl-som-imx7 the I2C2 port is wired to GPIO1 6/7 pads, change the
pinctrl to reflect this. Also disable the internal pull-up, as the
board has appropriate external pull ups in place.
This fixes initialization of all peripherals on the i2c2 bus,
particularly pmic and gpio expander.
Signed-off-by: Hans Ole Hatzel <hohatzel@jusst.de>
Signed-off-by: Julian Scheel <jscheel@jusst.de>
---
arch/arm/boot/dts/imx7d-cl-som-imx7.dts | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/imx7d-cl-som-imx7.dts b/arch/arm/boot/dts/imx7d-cl-som-imx7.dts
index 8bf365d28cac..11bd713b540f 100644
--- a/arch/arm/boot/dts/imx7d-cl-som-imx7.dts
+++ b/arch/arm/boot/dts/imx7d-cl-som-imx7.dts
@@ -249,8 +249,8 @@
pinctrl_i2c2: i2c2grp {
fsl,pins = <
- MX7D_PAD_I2C2_SDA__I2C2_SDA 0x4000007f
- MX7D_PAD_I2C2_SCL__I2C2_SCL 0x4000007f
+ MX7D_PAD_LPSR_GPIO1_IO07__I2C2_SDA 0x4000000f
+ MX7D_PAD_LPSR_GPIO1_IO06__I2C2_SCL 0x4000000f
>;
};
--
2.19.2
^ permalink raw reply related [flat|nested] 28+ messages in thread* [PATCH 1/4] ARM: dts: imx7d: cl-som-imx7: fix pinctrl for i2c2
@ 2018-12-04 11:07 ` Hans Ole Hatzel
0 siblings, 0 replies; 28+ messages in thread
From: Hans Ole Hatzel @ 2018-12-04 11:07 UTC (permalink / raw)
To: linux-arm-kernel, ilya, devicetree, linux-imx, fabio.estevam, shawnguo
Cc: Julian Scheel, Hans Ole Hatzel
On cl-som-imx7 the I2C2 port is wired to GPIO1 6/7 pads, change the
pinctrl to reflect this. Also disable the internal pull-up, as the
board has appropriate external pull ups in place.
This fixes initialization of all peripherals on the i2c2 bus,
particularly pmic and gpio expander.
Signed-off-by: Hans Ole Hatzel <hohatzel@jusst.de>
Signed-off-by: Julian Scheel <jscheel@jusst.de>
---
arch/arm/boot/dts/imx7d-cl-som-imx7.dts | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/imx7d-cl-som-imx7.dts b/arch/arm/boot/dts/imx7d-cl-som-imx7.dts
index 8bf365d28cac..11bd713b540f 100644
--- a/arch/arm/boot/dts/imx7d-cl-som-imx7.dts
+++ b/arch/arm/boot/dts/imx7d-cl-som-imx7.dts
@@ -249,8 +249,8 @@
pinctrl_i2c2: i2c2grp {
fsl,pins = <
- MX7D_PAD_I2C2_SDA__I2C2_SDA 0x4000007f
- MX7D_PAD_I2C2_SCL__I2C2_SCL 0x4000007f
+ MX7D_PAD_LPSR_GPIO1_IO07__I2C2_SDA 0x4000000f
+ MX7D_PAD_LPSR_GPIO1_IO06__I2C2_SCL 0x4000000f
>;
};
--
2.19.2
_______________________________________________
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linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 28+ messages in thread
* [PATCH 2/4] ARM: dts: imx7d: cl-som-imx7: WiLink8 WLAN support
2018-12-04 11:07 ` Hans Ole Hatzel
@ 2018-12-04 11:07 ` Hans Ole Hatzel
-1 siblings, 0 replies; 28+ messages in thread
From: Hans Ole Hatzel @ 2018-12-04 11:07 UTC (permalink / raw)
To: linux-arm-kernel, ilya, devicetree, linux-imx, fabio.estevam, shawnguo
Cc: Julian Scheel, Hans Ole Hatzel
Add support for WiLink8 module which is connected via USDHC 2.
Signed-off-by: Hans Ole Hatzel <hohatzel@jusst.de>
Signed-off-by: Julian Scheel <jscheel@jusst.de>
---
arch/arm/boot/dts/imx7d-cl-som-imx7.dts | 64 +++++++++++++++++++++++++
1 file changed, 64 insertions(+)
diff --git a/arch/arm/boot/dts/imx7d-cl-som-imx7.dts b/arch/arm/boot/dts/imx7d-cl-som-imx7.dts
index 11bd713b540f..e77e0cc7de39 100644
--- a/arch/arm/boot/dts/imx7d-cl-som-imx7.dts
+++ b/arch/arm/boot/dts/imx7d-cl-som-imx7.dts
@@ -30,6 +30,28 @@
gpio = <&gpio1 5 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
+
+ rf_pwr_en_reg: regulator-rf-pwr-en {
+ compatible = "regulator-fixed";
+ regulator-name = "rf-pwr-en-regulator";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ gpio = <&pca9555 9 GPIO_ACTIVE_HIGH>;
+ startup-delay-us = <70000>;
+ enable-active-high;
+ regulator-always-on;
+ };
+
+ wlan_en_reg: regulator-wlan-en {
+ compatible = "regulator-fixed";
+ regulator-name = "wlan-en-regulator";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ gpio = <&pca9555 0 GPIO_ACTIVE_HIGH>;
+ /* WLAN card specific delay */
+ startup-delay-us = <70000>;
+ enable-active-high;
+ };
};
&cpu0 {
@@ -199,6 +221,28 @@
status = "okay";
};
+&usdhc2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usdhc2>;
+ cd-gpios = <>;
+ wp-gpios = <>;
+ no-1-8-v;
+ keep-power-in-suspend;
+ enable-sdio-wakeup;
+ vmmc-supply = <&wlan_en_reg>;
+ non-removable;
+ cap-power-off-card;
+ status = "okay";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ wlcore: wlcore@0 {
+ compatible = "ti,wl1835";
+ reg = <2>;
+ interrupt-parent = <&gpio1>;
+ interrupts = <15 IRQ_TYPE_LEVEL_HIGH>;
+ };
+};
+
&usdhc3 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usdhc3>;
@@ -211,6 +255,15 @@
};
&iomuxc {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_hog>;
+
+ pinctrl_hog: hoggrp {
+ fsl,pins = <
+ MX7D_PAD_GPIO1_IO15__GPIO1_IO15 0x34 /* WLAN IRQ */
+ >;
+ };
+
pinctrl_enet1: enet1grp {
fsl,pins = <
MX7D_PAD_SD2_CD_B__ENET1_MDIO 0x30
@@ -261,6 +314,17 @@
>;
};
+ pinctrl_usdhc2: usdhc2grp {
+ fsl,pins = <
+ MX7D_PAD_SD2_CMD__SD2_CMD 0x59
+ MX7D_PAD_SD2_CLK__SD2_CLK 0x19
+ MX7D_PAD_SD2_DATA0__SD2_DATA0 0x59
+ MX7D_PAD_SD2_DATA1__SD2_DATA1 0x59
+ MX7D_PAD_SD2_DATA2__SD2_DATA2 0x59
+ MX7D_PAD_SD2_DATA3__SD2_DATA3 0x59
+ >;
+ };
+
pinctrl_usdhc3: usdhc3grp {
fsl,pins = <
MX7D_PAD_SD3_CMD__SD3_CMD 0x59
--
2.19.2
^ permalink raw reply related [flat|nested] 28+ messages in thread* [PATCH 2/4] ARM: dts: imx7d: cl-som-imx7: WiLink8 WLAN support
@ 2018-12-04 11:07 ` Hans Ole Hatzel
0 siblings, 0 replies; 28+ messages in thread
From: Hans Ole Hatzel @ 2018-12-04 11:07 UTC (permalink / raw)
To: linux-arm-kernel, ilya, devicetree, linux-imx, fabio.estevam, shawnguo
Cc: Julian Scheel, Hans Ole Hatzel
Add support for WiLink8 module which is connected via USDHC 2.
Signed-off-by: Hans Ole Hatzel <hohatzel@jusst.de>
Signed-off-by: Julian Scheel <jscheel@jusst.de>
---
arch/arm/boot/dts/imx7d-cl-som-imx7.dts | 64 +++++++++++++++++++++++++
1 file changed, 64 insertions(+)
diff --git a/arch/arm/boot/dts/imx7d-cl-som-imx7.dts b/arch/arm/boot/dts/imx7d-cl-som-imx7.dts
index 11bd713b540f..e77e0cc7de39 100644
--- a/arch/arm/boot/dts/imx7d-cl-som-imx7.dts
+++ b/arch/arm/boot/dts/imx7d-cl-som-imx7.dts
@@ -30,6 +30,28 @@
gpio = <&gpio1 5 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
+
+ rf_pwr_en_reg: regulator-rf-pwr-en {
+ compatible = "regulator-fixed";
+ regulator-name = "rf-pwr-en-regulator";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ gpio = <&pca9555 9 GPIO_ACTIVE_HIGH>;
+ startup-delay-us = <70000>;
+ enable-active-high;
+ regulator-always-on;
+ };
+
+ wlan_en_reg: regulator-wlan-en {
+ compatible = "regulator-fixed";
+ regulator-name = "wlan-en-regulator";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ gpio = <&pca9555 0 GPIO_ACTIVE_HIGH>;
+ /* WLAN card specific delay */
+ startup-delay-us = <70000>;
+ enable-active-high;
+ };
};
&cpu0 {
@@ -199,6 +221,28 @@
status = "okay";
};
+&usdhc2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usdhc2>;
+ cd-gpios = <>;
+ wp-gpios = <>;
+ no-1-8-v;
+ keep-power-in-suspend;
+ enable-sdio-wakeup;
+ vmmc-supply = <&wlan_en_reg>;
+ non-removable;
+ cap-power-off-card;
+ status = "okay";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ wlcore: wlcore@0 {
+ compatible = "ti,wl1835";
+ reg = <2>;
+ interrupt-parent = <&gpio1>;
+ interrupts = <15 IRQ_TYPE_LEVEL_HIGH>;
+ };
+};
+
&usdhc3 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usdhc3>;
@@ -211,6 +255,15 @@
};
&iomuxc {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_hog>;
+
+ pinctrl_hog: hoggrp {
+ fsl,pins = <
+ MX7D_PAD_GPIO1_IO15__GPIO1_IO15 0x34 /* WLAN IRQ */
+ >;
+ };
+
pinctrl_enet1: enet1grp {
fsl,pins = <
MX7D_PAD_SD2_CD_B__ENET1_MDIO 0x30
@@ -261,6 +314,17 @@
>;
};
+ pinctrl_usdhc2: usdhc2grp {
+ fsl,pins = <
+ MX7D_PAD_SD2_CMD__SD2_CMD 0x59
+ MX7D_PAD_SD2_CLK__SD2_CLK 0x19
+ MX7D_PAD_SD2_DATA0__SD2_DATA0 0x59
+ MX7D_PAD_SD2_DATA1__SD2_DATA1 0x59
+ MX7D_PAD_SD2_DATA2__SD2_DATA2 0x59
+ MX7D_PAD_SD2_DATA3__SD2_DATA3 0x59
+ >;
+ };
+
pinctrl_usdhc3: usdhc3grp {
fsl,pins = <
MX7D_PAD_SD3_CMD__SD3_CMD 0x59
--
2.19.2
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 28+ messages in thread* Re: [PATCH 2/4] ARM: dts: imx7d: cl-som-imx7: WiLink8 WLAN support
2018-12-04 11:07 ` Hans Ole Hatzel
@ 2018-12-06 3:11 ` Shawn Guo
-1 siblings, 0 replies; 28+ messages in thread
From: Shawn Guo @ 2018-12-06 3:11 UTC (permalink / raw)
To: Hans Ole Hatzel
Cc: devicetree, Julian Scheel, linux-arm-kernel, fabio.estevam, ilya,
linux-imx
On Tue, Dec 04, 2018 at 12:07:39PM +0100, Hans Ole Hatzel wrote:
> Add support for WiLink8 module which is connected via USDHC 2.
>
> Signed-off-by: Hans Ole Hatzel <hohatzel@jusst.de>
> Signed-off-by: Julian Scheel <jscheel@jusst.de>
> ---
> arch/arm/boot/dts/imx7d-cl-som-imx7.dts | 64 +++++++++++++++++++++++++
> 1 file changed, 64 insertions(+)
>
> diff --git a/arch/arm/boot/dts/imx7d-cl-som-imx7.dts b/arch/arm/boot/dts/imx7d-cl-som-imx7.dts
> index 11bd713b540f..e77e0cc7de39 100644
> --- a/arch/arm/boot/dts/imx7d-cl-som-imx7.dts
> +++ b/arch/arm/boot/dts/imx7d-cl-som-imx7.dts
> @@ -30,6 +30,28 @@
> gpio = <&gpio1 5 GPIO_ACTIVE_HIGH>;
> enable-active-high;
> };
> +
> + rf_pwr_en_reg: regulator-rf-pwr-en {
> + compatible = "regulator-fixed";
> + regulator-name = "rf-pwr-en-regulator";
I think "rf-pwr-en" is good enough.
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> + gpio = <&pca9555 9 GPIO_ACTIVE_HIGH>;
> + startup-delay-us = <70000>;
> + enable-active-high;
> + regulator-always-on;
> + };
> +
> + wlan_en_reg: regulator-wlan-en {
> + compatible = "regulator-fixed";
> + regulator-name = "wlan-en-regulator";
"wlan-en"
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> + gpio = <&pca9555 0 GPIO_ACTIVE_HIGH>;
> + /* WLAN card specific delay */
> + startup-delay-us = <70000>;
> + enable-active-high;
> + };
> };
>
> &cpu0 {
> @@ -199,6 +221,28 @@
> status = "okay";
> };
>
> +&usdhc2 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_usdhc2>;
> + cd-gpios = <>;
> + wp-gpios = <>;
What do these mean?
> + no-1-8-v;
> + keep-power-in-suspend;
> + enable-sdio-wakeup;
The property is deprecated. Use "wakeup-source" instead.
> + vmmc-supply = <&wlan_en_reg>;
> + non-removable;
> + cap-power-off-card;
> + status = "okay";
Put 'status' at bottom of property list.
> + #address-cells = <1>;
> + #size-cells = <0>;
Have a newline between properties and child node.
> + wlcore: wlcore@0 {
> + compatible = "ti,wl1835";
> + reg = <2>;
The 'reg' property should match unit-address in node name.
Shawn
> + interrupt-parent = <&gpio1>;
> + interrupts = <15 IRQ_TYPE_LEVEL_HIGH>;
> + };
> +};
> +
> &usdhc3 {
> pinctrl-names = "default";
> pinctrl-0 = <&pinctrl_usdhc3>;
> @@ -211,6 +255,15 @@
> };
>
> &iomuxc {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_hog>;
> +
> + pinctrl_hog: hoggrp {
> + fsl,pins = <
> + MX7D_PAD_GPIO1_IO15__GPIO1_IO15 0x34 /* WLAN IRQ */
> + >;
> + };
> +
> pinctrl_enet1: enet1grp {
> fsl,pins = <
> MX7D_PAD_SD2_CD_B__ENET1_MDIO 0x30
> @@ -261,6 +314,17 @@
> >;
> };
>
> + pinctrl_usdhc2: usdhc2grp {
> + fsl,pins = <
> + MX7D_PAD_SD2_CMD__SD2_CMD 0x59
> + MX7D_PAD_SD2_CLK__SD2_CLK 0x19
> + MX7D_PAD_SD2_DATA0__SD2_DATA0 0x59
> + MX7D_PAD_SD2_DATA1__SD2_DATA1 0x59
> + MX7D_PAD_SD2_DATA2__SD2_DATA2 0x59
> + MX7D_PAD_SD2_DATA3__SD2_DATA3 0x59
> + >;
> + };
> +
> pinctrl_usdhc3: usdhc3grp {
> fsl,pins = <
> MX7D_PAD_SD3_CMD__SD3_CMD 0x59
> --
> 2.19.2
>
>
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 28+ messages in thread* Re: [PATCH 2/4] ARM: dts: imx7d: cl-som-imx7: WiLink8 WLAN support
@ 2018-12-06 3:11 ` Shawn Guo
0 siblings, 0 replies; 28+ messages in thread
From: Shawn Guo @ 2018-12-06 3:11 UTC (permalink / raw)
To: Hans Ole Hatzel
Cc: devicetree, Julian Scheel, linux-arm-kernel, fabio.estevam, ilya,
linux-imx
On Tue, Dec 04, 2018 at 12:07:39PM +0100, Hans Ole Hatzel wrote:
> Add support for WiLink8 module which is connected via USDHC 2.
>
> Signed-off-by: Hans Ole Hatzel <hohatzel@jusst.de>
> Signed-off-by: Julian Scheel <jscheel@jusst.de>
> ---
> arch/arm/boot/dts/imx7d-cl-som-imx7.dts | 64 +++++++++++++++++++++++++
> 1 file changed, 64 insertions(+)
>
> diff --git a/arch/arm/boot/dts/imx7d-cl-som-imx7.dts b/arch/arm/boot/dts/imx7d-cl-som-imx7.dts
> index 11bd713b540f..e77e0cc7de39 100644
> --- a/arch/arm/boot/dts/imx7d-cl-som-imx7.dts
> +++ b/arch/arm/boot/dts/imx7d-cl-som-imx7.dts
> @@ -30,6 +30,28 @@
> gpio = <&gpio1 5 GPIO_ACTIVE_HIGH>;
> enable-active-high;
> };
> +
> + rf_pwr_en_reg: regulator-rf-pwr-en {
> + compatible = "regulator-fixed";
> + regulator-name = "rf-pwr-en-regulator";
I think "rf-pwr-en" is good enough.
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> + gpio = <&pca9555 9 GPIO_ACTIVE_HIGH>;
> + startup-delay-us = <70000>;
> + enable-active-high;
> + regulator-always-on;
> + };
> +
> + wlan_en_reg: regulator-wlan-en {
> + compatible = "regulator-fixed";
> + regulator-name = "wlan-en-regulator";
"wlan-en"
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> + gpio = <&pca9555 0 GPIO_ACTIVE_HIGH>;
> + /* WLAN card specific delay */
> + startup-delay-us = <70000>;
> + enable-active-high;
> + };
> };
>
> &cpu0 {
> @@ -199,6 +221,28 @@
> status = "okay";
> };
>
> +&usdhc2 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_usdhc2>;
> + cd-gpios = <>;
> + wp-gpios = <>;
What do these mean?
> + no-1-8-v;
> + keep-power-in-suspend;
> + enable-sdio-wakeup;
The property is deprecated. Use "wakeup-source" instead.
> + vmmc-supply = <&wlan_en_reg>;
> + non-removable;
> + cap-power-off-card;
> + status = "okay";
Put 'status' at bottom of property list.
> + #address-cells = <1>;
> + #size-cells = <0>;
Have a newline between properties and child node.
> + wlcore: wlcore@0 {
> + compatible = "ti,wl1835";
> + reg = <2>;
The 'reg' property should match unit-address in node name.
Shawn
> + interrupt-parent = <&gpio1>;
> + interrupts = <15 IRQ_TYPE_LEVEL_HIGH>;
> + };
> +};
> +
> &usdhc3 {
> pinctrl-names = "default";
> pinctrl-0 = <&pinctrl_usdhc3>;
> @@ -211,6 +255,15 @@
> };
>
> &iomuxc {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_hog>;
> +
> + pinctrl_hog: hoggrp {
> + fsl,pins = <
> + MX7D_PAD_GPIO1_IO15__GPIO1_IO15 0x34 /* WLAN IRQ */
> + >;
> + };
> +
> pinctrl_enet1: enet1grp {
> fsl,pins = <
> MX7D_PAD_SD2_CD_B__ENET1_MDIO 0x30
> @@ -261,6 +314,17 @@
> >;
> };
>
> + pinctrl_usdhc2: usdhc2grp {
> + fsl,pins = <
> + MX7D_PAD_SD2_CMD__SD2_CMD 0x59
> + MX7D_PAD_SD2_CLK__SD2_CLK 0x19
> + MX7D_PAD_SD2_DATA0__SD2_DATA0 0x59
> + MX7D_PAD_SD2_DATA1__SD2_DATA1 0x59
> + MX7D_PAD_SD2_DATA2__SD2_DATA2 0x59
> + MX7D_PAD_SD2_DATA3__SD2_DATA3 0x59
> + >;
> + };
> +
> pinctrl_usdhc3: usdhc3grp {
> fsl,pins = <
> MX7D_PAD_SD3_CMD__SD3_CMD 0x59
> --
> 2.19.2
>
>
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 28+ messages in thread
* [PATCH 3/4] ARM: dts: imx7d: sbc imx7: add uart2
2018-12-04 11:07 ` Hans Ole Hatzel
@ 2018-12-04 11:07 ` Hans Ole Hatzel
-1 siblings, 0 replies; 28+ messages in thread
From: Hans Ole Hatzel @ 2018-12-04 11:07 UTC (permalink / raw)
To: linux-arm-kernel, ilya, devicetree, linux-imx, fabio.estevam, shawnguo
Cc: Julian Scheel, Hans Ole Hatzel
Adds uart2 connections as used on the sbc. This uart is connected via
the soc's pins 3 (TX) and 5 (RX). On the sbc it is pinned out on P4
using pins 31 (RX) and 33 (TX).
Signed-off-by: Hans Ole Hatzel <hohatzel@jusst.de>
Signed-off-by: Julian Scheel <jscheel@jusst.de>
---
arch/arm/boot/dts/imx7d-cl-som-imx7.dts | 16 ++++++++++++++++
arch/arm/boot/dts/imx7d-sbc-imx7.dts | 4 ++++
2 files changed, 20 insertions(+)
diff --git a/arch/arm/boot/dts/imx7d-cl-som-imx7.dts b/arch/arm/boot/dts/imx7d-cl-som-imx7.dts
index e77e0cc7de39..6c2c844dc052 100644
--- a/arch/arm/boot/dts/imx7d-cl-som-imx7.dts
+++ b/arch/arm/boot/dts/imx7d-cl-som-imx7.dts
@@ -214,6 +214,15 @@
status = "okay";
};
+&uart2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart2>;
+ assigned-clocks = <&clks IMX7D_UART2_ROOT_SRC>;
+ assigned-clock-parents = <&clks IMX7D_PLL_SYS_MAIN_240M_CLK>;
+ status = "disabled";
+ fsl;
+};
+
&usbotg1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usbotg1>;
@@ -314,6 +323,13 @@
>;
};
+ pinctrl_uart2: uart2grp {
+ fsl,pins = <
+ MX7D_PAD_LCD_ENABLE__UART2_DCE_TX 0x79
+ MX7D_PAD_LCD_CLK__UART2_DCE_RX 0x79
+ >;
+ };
+
pinctrl_usdhc2: usdhc2grp {
fsl,pins = <
MX7D_PAD_SD2_CMD__SD2_CMD 0x59
diff --git a/arch/arm/boot/dts/imx7d-sbc-imx7.dts b/arch/arm/boot/dts/imx7d-sbc-imx7.dts
index f8a868552707..74904127fbc6 100644
--- a/arch/arm/boot/dts/imx7d-sbc-imx7.dts
+++ b/arch/arm/boot/dts/imx7d-sbc-imx7.dts
@@ -26,6 +26,10 @@
status = "okay";
};
+&uart2 {
+ status = "okay";
+};
+
&iomuxc {
pinctrl_usdhc1: usdhc1grp {
fsl,pins = <
--
2.19.2
^ permalink raw reply related [flat|nested] 28+ messages in thread* [PATCH 3/4] ARM: dts: imx7d: sbc imx7: add uart2
@ 2018-12-04 11:07 ` Hans Ole Hatzel
0 siblings, 0 replies; 28+ messages in thread
From: Hans Ole Hatzel @ 2018-12-04 11:07 UTC (permalink / raw)
To: linux-arm-kernel, ilya, devicetree, linux-imx, fabio.estevam, shawnguo
Cc: Julian Scheel, Hans Ole Hatzel
Adds uart2 connections as used on the sbc. This uart is connected via
the soc's pins 3 (TX) and 5 (RX). On the sbc it is pinned out on P4
using pins 31 (RX) and 33 (TX).
Signed-off-by: Hans Ole Hatzel <hohatzel@jusst.de>
Signed-off-by: Julian Scheel <jscheel@jusst.de>
---
arch/arm/boot/dts/imx7d-cl-som-imx7.dts | 16 ++++++++++++++++
arch/arm/boot/dts/imx7d-sbc-imx7.dts | 4 ++++
2 files changed, 20 insertions(+)
diff --git a/arch/arm/boot/dts/imx7d-cl-som-imx7.dts b/arch/arm/boot/dts/imx7d-cl-som-imx7.dts
index e77e0cc7de39..6c2c844dc052 100644
--- a/arch/arm/boot/dts/imx7d-cl-som-imx7.dts
+++ b/arch/arm/boot/dts/imx7d-cl-som-imx7.dts
@@ -214,6 +214,15 @@
status = "okay";
};
+&uart2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart2>;
+ assigned-clocks = <&clks IMX7D_UART2_ROOT_SRC>;
+ assigned-clock-parents = <&clks IMX7D_PLL_SYS_MAIN_240M_CLK>;
+ status = "disabled";
+ fsl;
+};
+
&usbotg1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usbotg1>;
@@ -314,6 +323,13 @@
>;
};
+ pinctrl_uart2: uart2grp {
+ fsl,pins = <
+ MX7D_PAD_LCD_ENABLE__UART2_DCE_TX 0x79
+ MX7D_PAD_LCD_CLK__UART2_DCE_RX 0x79
+ >;
+ };
+
pinctrl_usdhc2: usdhc2grp {
fsl,pins = <
MX7D_PAD_SD2_CMD__SD2_CMD 0x59
diff --git a/arch/arm/boot/dts/imx7d-sbc-imx7.dts b/arch/arm/boot/dts/imx7d-sbc-imx7.dts
index f8a868552707..74904127fbc6 100644
--- a/arch/arm/boot/dts/imx7d-sbc-imx7.dts
+++ b/arch/arm/boot/dts/imx7d-sbc-imx7.dts
@@ -26,6 +26,10 @@
status = "okay";
};
+&uart2 {
+ status = "okay";
+};
+
&iomuxc {
pinctrl_usdhc1: usdhc1grp {
fsl,pins = <
--
2.19.2
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 28+ messages in thread* Re: [PATCH 3/4] ARM: dts: imx7d: sbc imx7: add uart2
2018-12-04 11:07 ` Hans Ole Hatzel
@ 2018-12-06 3:13 ` Shawn Guo
-1 siblings, 0 replies; 28+ messages in thread
From: Shawn Guo @ 2018-12-06 3:13 UTC (permalink / raw)
To: Hans Ole Hatzel
Cc: devicetree, Julian Scheel, linux-arm-kernel, fabio.estevam, ilya,
linux-imx
On Tue, Dec 04, 2018 at 12:07:40PM +0100, Hans Ole Hatzel wrote:
> Adds uart2 connections as used on the sbc. This uart is connected via
> the soc's pins 3 (TX) and 5 (RX). On the sbc it is pinned out on P4
> using pins 31 (RX) and 33 (TX).
>
> Signed-off-by: Hans Ole Hatzel <hohatzel@jusst.de>
> Signed-off-by: Julian Scheel <jscheel@jusst.de>
> ---
> arch/arm/boot/dts/imx7d-cl-som-imx7.dts | 16 ++++++++++++++++
> arch/arm/boot/dts/imx7d-sbc-imx7.dts | 4 ++++
> 2 files changed, 20 insertions(+)
>
> diff --git a/arch/arm/boot/dts/imx7d-cl-som-imx7.dts b/arch/arm/boot/dts/imx7d-cl-som-imx7.dts
> index e77e0cc7de39..6c2c844dc052 100644
> --- a/arch/arm/boot/dts/imx7d-cl-som-imx7.dts
> +++ b/arch/arm/boot/dts/imx7d-cl-som-imx7.dts
> @@ -214,6 +214,15 @@
> status = "okay";
> };
>
> +&uart2 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_uart2>;
> + assigned-clocks = <&clks IMX7D_UART2_ROOT_SRC>;
> + assigned-clock-parents = <&clks IMX7D_PLL_SYS_MAIN_240M_CLK>;
> + status = "disabled";
> + fsl;
What is this?
Shawn
> +};
> +
> &usbotg1 {
> pinctrl-names = "default";
> pinctrl-0 = <&pinctrl_usbotg1>;
> @@ -314,6 +323,13 @@
> >;
> };
>
> + pinctrl_uart2: uart2grp {
> + fsl,pins = <
> + MX7D_PAD_LCD_ENABLE__UART2_DCE_TX 0x79
> + MX7D_PAD_LCD_CLK__UART2_DCE_RX 0x79
> + >;
> + };
> +
> pinctrl_usdhc2: usdhc2grp {
> fsl,pins = <
> MX7D_PAD_SD2_CMD__SD2_CMD 0x59
> diff --git a/arch/arm/boot/dts/imx7d-sbc-imx7.dts b/arch/arm/boot/dts/imx7d-sbc-imx7.dts
> index f8a868552707..74904127fbc6 100644
> --- a/arch/arm/boot/dts/imx7d-sbc-imx7.dts
> +++ b/arch/arm/boot/dts/imx7d-sbc-imx7.dts
> @@ -26,6 +26,10 @@
> status = "okay";
> };
>
> +&uart2 {
> + status = "okay";
> +};
> +
> &iomuxc {
> pinctrl_usdhc1: usdhc1grp {
> fsl,pins = <
> --
> 2.19.2
>
>
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 28+ messages in thread* Re: [PATCH 3/4] ARM: dts: imx7d: sbc imx7: add uart2
@ 2018-12-06 3:13 ` Shawn Guo
0 siblings, 0 replies; 28+ messages in thread
From: Shawn Guo @ 2018-12-06 3:13 UTC (permalink / raw)
To: Hans Ole Hatzel
Cc: devicetree, Julian Scheel, linux-arm-kernel, fabio.estevam, ilya,
linux-imx
On Tue, Dec 04, 2018 at 12:07:40PM +0100, Hans Ole Hatzel wrote:
> Adds uart2 connections as used on the sbc. This uart is connected via
> the soc's pins 3 (TX) and 5 (RX). On the sbc it is pinned out on P4
> using pins 31 (RX) and 33 (TX).
>
> Signed-off-by: Hans Ole Hatzel <hohatzel@jusst.de>
> Signed-off-by: Julian Scheel <jscheel@jusst.de>
> ---
> arch/arm/boot/dts/imx7d-cl-som-imx7.dts | 16 ++++++++++++++++
> arch/arm/boot/dts/imx7d-sbc-imx7.dts | 4 ++++
> 2 files changed, 20 insertions(+)
>
> diff --git a/arch/arm/boot/dts/imx7d-cl-som-imx7.dts b/arch/arm/boot/dts/imx7d-cl-som-imx7.dts
> index e77e0cc7de39..6c2c844dc052 100644
> --- a/arch/arm/boot/dts/imx7d-cl-som-imx7.dts
> +++ b/arch/arm/boot/dts/imx7d-cl-som-imx7.dts
> @@ -214,6 +214,15 @@
> status = "okay";
> };
>
> +&uart2 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_uart2>;
> + assigned-clocks = <&clks IMX7D_UART2_ROOT_SRC>;
> + assigned-clock-parents = <&clks IMX7D_PLL_SYS_MAIN_240M_CLK>;
> + status = "disabled";
> + fsl;
What is this?
Shawn
> +};
> +
> &usbotg1 {
> pinctrl-names = "default";
> pinctrl-0 = <&pinctrl_usbotg1>;
> @@ -314,6 +323,13 @@
> >;
> };
>
> + pinctrl_uart2: uart2grp {
> + fsl,pins = <
> + MX7D_PAD_LCD_ENABLE__UART2_DCE_TX 0x79
> + MX7D_PAD_LCD_CLK__UART2_DCE_RX 0x79
> + >;
> + };
> +
> pinctrl_usdhc2: usdhc2grp {
> fsl,pins = <
> MX7D_PAD_SD2_CMD__SD2_CMD 0x59
> diff --git a/arch/arm/boot/dts/imx7d-sbc-imx7.dts b/arch/arm/boot/dts/imx7d-sbc-imx7.dts
> index f8a868552707..74904127fbc6 100644
> --- a/arch/arm/boot/dts/imx7d-sbc-imx7.dts
> +++ b/arch/arm/boot/dts/imx7d-sbc-imx7.dts
> @@ -26,6 +26,10 @@
> status = "okay";
> };
>
> +&uart2 {
> + status = "okay";
> +};
> +
> &iomuxc {
> pinctrl_usdhc1: usdhc1grp {
> fsl,pins = <
> --
> 2.19.2
>
>
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 28+ messages in thread
* [PATCH 4/4] ARM: dts: imx7d: sbc imx7: add uart5
2018-12-04 11:07 ` Hans Ole Hatzel
@ 2018-12-04 11:07 ` Hans Ole Hatzel
-1 siblings, 0 replies; 28+ messages in thread
From: Hans Ole Hatzel @ 2018-12-04 11:07 UTC (permalink / raw)
To: linux-arm-kernel, ilya, devicetree, linux-imx, fabio.estevam, shawnguo
Cc: Julian Scheel, Hans Ole Hatzel
Adds uart5 connections as used on the sbc.
In the sbc's reference material this is known as uart1, it does however
connect to the som as uart5. This uart is connected via the soc's
pins 11 (TX) and 13 (RX). On the sbc it is pinned out on P5
using pins 15 (TX) and 17 (RX).
Signed-off-by: Hans Ole Hatzel <hohatzel@jusst.de>
Signed-off-by: Julian Scheel <jscheel@jusst.de>
---
arch/arm/boot/dts/imx7d-cl-som-imx7.dts | 16 ++++++++++++++++
arch/arm/boot/dts/imx7d-sbc-imx7.dts | 4 ++++
2 files changed, 20 insertions(+)
diff --git a/arch/arm/boot/dts/imx7d-cl-som-imx7.dts b/arch/arm/boot/dts/imx7d-cl-som-imx7.dts
index 6c2c844dc052..f7c002093c67 100644
--- a/arch/arm/boot/dts/imx7d-cl-som-imx7.dts
+++ b/arch/arm/boot/dts/imx7d-cl-som-imx7.dts
@@ -223,6 +223,15 @@
fsl;
};
+&uart5 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart5>;
+ assigned-clocks = <&clks IMX7D_UART5_ROOT_SRC>;
+ assigned-clock-parents = <&clks IMX7D_PLL_SYS_MAIN_240M_CLK>;
+ status = "okay";
+ fsl;
+};
+
&usbotg1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usbotg1>;
@@ -330,6 +339,13 @@
>;
};
+ pinctrl_uart5: uart5grp {
+ fsl,pins = <
+ MX7D_PAD_I2C4_SCL__UART5_DCE_RX 0x79
+ MX7D_PAD_I2C4_SDA__UART5_DCE_TX 0x79
+ >;
+ };
+
pinctrl_usdhc2: usdhc2grp {
fsl,pins = <
MX7D_PAD_SD2_CMD__SD2_CMD 0x59
diff --git a/arch/arm/boot/dts/imx7d-sbc-imx7.dts b/arch/arm/boot/dts/imx7d-sbc-imx7.dts
index 74904127fbc6..d23d62aceb82 100644
--- a/arch/arm/boot/dts/imx7d-sbc-imx7.dts
+++ b/arch/arm/boot/dts/imx7d-sbc-imx7.dts
@@ -30,6 +30,10 @@
status = "okay";
};
+&uart5 {
+ status = "okay";
+};
+
&iomuxc {
pinctrl_usdhc1: usdhc1grp {
fsl,pins = <
--
2.19.2
^ permalink raw reply related [flat|nested] 28+ messages in thread* [PATCH 4/4] ARM: dts: imx7d: sbc imx7: add uart5
@ 2018-12-04 11:07 ` Hans Ole Hatzel
0 siblings, 0 replies; 28+ messages in thread
From: Hans Ole Hatzel @ 2018-12-04 11:07 UTC (permalink / raw)
To: linux-arm-kernel, ilya, devicetree, linux-imx, fabio.estevam, shawnguo
Cc: Julian Scheel, Hans Ole Hatzel
Adds uart5 connections as used on the sbc.
In the sbc's reference material this is known as uart1, it does however
connect to the som as uart5. This uart is connected via the soc's
pins 11 (TX) and 13 (RX). On the sbc it is pinned out on P5
using pins 15 (TX) and 17 (RX).
Signed-off-by: Hans Ole Hatzel <hohatzel@jusst.de>
Signed-off-by: Julian Scheel <jscheel@jusst.de>
---
arch/arm/boot/dts/imx7d-cl-som-imx7.dts | 16 ++++++++++++++++
arch/arm/boot/dts/imx7d-sbc-imx7.dts | 4 ++++
2 files changed, 20 insertions(+)
diff --git a/arch/arm/boot/dts/imx7d-cl-som-imx7.dts b/arch/arm/boot/dts/imx7d-cl-som-imx7.dts
index 6c2c844dc052..f7c002093c67 100644
--- a/arch/arm/boot/dts/imx7d-cl-som-imx7.dts
+++ b/arch/arm/boot/dts/imx7d-cl-som-imx7.dts
@@ -223,6 +223,15 @@
fsl;
};
+&uart5 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart5>;
+ assigned-clocks = <&clks IMX7D_UART5_ROOT_SRC>;
+ assigned-clock-parents = <&clks IMX7D_PLL_SYS_MAIN_240M_CLK>;
+ status = "okay";
+ fsl;
+};
+
&usbotg1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usbotg1>;
@@ -330,6 +339,13 @@
>;
};
+ pinctrl_uart5: uart5grp {
+ fsl,pins = <
+ MX7D_PAD_I2C4_SCL__UART5_DCE_RX 0x79
+ MX7D_PAD_I2C4_SDA__UART5_DCE_TX 0x79
+ >;
+ };
+
pinctrl_usdhc2: usdhc2grp {
fsl,pins = <
MX7D_PAD_SD2_CMD__SD2_CMD 0x59
diff --git a/arch/arm/boot/dts/imx7d-sbc-imx7.dts b/arch/arm/boot/dts/imx7d-sbc-imx7.dts
index 74904127fbc6..d23d62aceb82 100644
--- a/arch/arm/boot/dts/imx7d-sbc-imx7.dts
+++ b/arch/arm/boot/dts/imx7d-sbc-imx7.dts
@@ -30,6 +30,10 @@
status = "okay";
};
+&uart5 {
+ status = "okay";
+};
+
&iomuxc {
pinctrl_usdhc1: usdhc1grp {
fsl,pins = <
--
2.19.2
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 28+ messages in thread* Re: [PATCH 4/4] ARM: dts: imx7d: sbc imx7: add uart5
2018-12-04 11:07 ` Hans Ole Hatzel
@ 2018-12-06 3:15 ` Shawn Guo
-1 siblings, 0 replies; 28+ messages in thread
From: Shawn Guo @ 2018-12-06 3:15 UTC (permalink / raw)
To: Hans Ole Hatzel
Cc: devicetree, Julian Scheel, linux-arm-kernel, fabio.estevam, ilya,
linux-imx
On Tue, Dec 04, 2018 at 12:07:41PM +0100, Hans Ole Hatzel wrote:
> Adds uart5 connections as used on the sbc.
> In the sbc's reference material this is known as uart1, it does however
> connect to the som as uart5. This uart is connected via the soc's
> pins 11 (TX) and 13 (RX). On the sbc it is pinned out on P5
> using pins 15 (TX) and 17 (RX).
>
> Signed-off-by: Hans Ole Hatzel <hohatzel@jusst.de>
> Signed-off-by: Julian Scheel <jscheel@jusst.de>
> ---
> arch/arm/boot/dts/imx7d-cl-som-imx7.dts | 16 ++++++++++++++++
> arch/arm/boot/dts/imx7d-sbc-imx7.dts | 4 ++++
> 2 files changed, 20 insertions(+)
>
> diff --git a/arch/arm/boot/dts/imx7d-cl-som-imx7.dts b/arch/arm/boot/dts/imx7d-cl-som-imx7.dts
> index 6c2c844dc052..f7c002093c67 100644
> --- a/arch/arm/boot/dts/imx7d-cl-som-imx7.dts
> +++ b/arch/arm/boot/dts/imx7d-cl-som-imx7.dts
> @@ -223,6 +223,15 @@
> fsl;
> };
>
> +&uart5 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_uart5>;
> + assigned-clocks = <&clks IMX7D_UART5_ROOT_SRC>;
> + assigned-clock-parents = <&clks IMX7D_PLL_SYS_MAIN_240M_CLK>;
Can we have some comments in the commit log on why we have to use this
particular clock source?
Shawn
> + status = "okay";
> + fsl;
> +};
> +
> &usbotg1 {
> pinctrl-names = "default";
> pinctrl-0 = <&pinctrl_usbotg1>;
> @@ -330,6 +339,13 @@
> >;
> };
>
> + pinctrl_uart5: uart5grp {
> + fsl,pins = <
> + MX7D_PAD_I2C4_SCL__UART5_DCE_RX 0x79
> + MX7D_PAD_I2C4_SDA__UART5_DCE_TX 0x79
> + >;
> + };
> +
> pinctrl_usdhc2: usdhc2grp {
> fsl,pins = <
> MX7D_PAD_SD2_CMD__SD2_CMD 0x59
> diff --git a/arch/arm/boot/dts/imx7d-sbc-imx7.dts b/arch/arm/boot/dts/imx7d-sbc-imx7.dts
> index 74904127fbc6..d23d62aceb82 100644
> --- a/arch/arm/boot/dts/imx7d-sbc-imx7.dts
> +++ b/arch/arm/boot/dts/imx7d-sbc-imx7.dts
> @@ -30,6 +30,10 @@
> status = "okay";
> };
>
> +&uart5 {
> + status = "okay";
> +};
> +
> &iomuxc {
> pinctrl_usdhc1: usdhc1grp {
> fsl,pins = <
> --
> 2.19.2
>
>
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 28+ messages in thread* Re: [PATCH 4/4] ARM: dts: imx7d: sbc imx7: add uart5
@ 2018-12-06 3:15 ` Shawn Guo
0 siblings, 0 replies; 28+ messages in thread
From: Shawn Guo @ 2018-12-06 3:15 UTC (permalink / raw)
To: Hans Ole Hatzel
Cc: devicetree, Julian Scheel, linux-arm-kernel, fabio.estevam, ilya,
linux-imx
On Tue, Dec 04, 2018 at 12:07:41PM +0100, Hans Ole Hatzel wrote:
> Adds uart5 connections as used on the sbc.
> In the sbc's reference material this is known as uart1, it does however
> connect to the som as uart5. This uart is connected via the soc's
> pins 11 (TX) and 13 (RX). On the sbc it is pinned out on P5
> using pins 15 (TX) and 17 (RX).
>
> Signed-off-by: Hans Ole Hatzel <hohatzel@jusst.de>
> Signed-off-by: Julian Scheel <jscheel@jusst.de>
> ---
> arch/arm/boot/dts/imx7d-cl-som-imx7.dts | 16 ++++++++++++++++
> arch/arm/boot/dts/imx7d-sbc-imx7.dts | 4 ++++
> 2 files changed, 20 insertions(+)
>
> diff --git a/arch/arm/boot/dts/imx7d-cl-som-imx7.dts b/arch/arm/boot/dts/imx7d-cl-som-imx7.dts
> index 6c2c844dc052..f7c002093c67 100644
> --- a/arch/arm/boot/dts/imx7d-cl-som-imx7.dts
> +++ b/arch/arm/boot/dts/imx7d-cl-som-imx7.dts
> @@ -223,6 +223,15 @@
> fsl;
> };
>
> +&uart5 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_uart5>;
> + assigned-clocks = <&clks IMX7D_UART5_ROOT_SRC>;
> + assigned-clock-parents = <&clks IMX7D_PLL_SYS_MAIN_240M_CLK>;
Can we have some comments in the commit log on why we have to use this
particular clock source?
Shawn
> + status = "okay";
> + fsl;
> +};
> +
> &usbotg1 {
> pinctrl-names = "default";
> pinctrl-0 = <&pinctrl_usbotg1>;
> @@ -330,6 +339,13 @@
> >;
> };
>
> + pinctrl_uart5: uart5grp {
> + fsl,pins = <
> + MX7D_PAD_I2C4_SCL__UART5_DCE_RX 0x79
> + MX7D_PAD_I2C4_SDA__UART5_DCE_TX 0x79
> + >;
> + };
> +
> pinctrl_usdhc2: usdhc2grp {
> fsl,pins = <
> MX7D_PAD_SD2_CMD__SD2_CMD 0x59
> diff --git a/arch/arm/boot/dts/imx7d-sbc-imx7.dts b/arch/arm/boot/dts/imx7d-sbc-imx7.dts
> index 74904127fbc6..d23d62aceb82 100644
> --- a/arch/arm/boot/dts/imx7d-sbc-imx7.dts
> +++ b/arch/arm/boot/dts/imx7d-sbc-imx7.dts
> @@ -30,6 +30,10 @@
> status = "okay";
> };
>
> +&uart5 {
> + status = "okay";
> +};
> +
> &iomuxc {
> pinctrl_usdhc1: usdhc1grp {
> fsl,pins = <
> --
> 2.19.2
>
>
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 28+ messages in thread* Re: [PATCH 4/4] ARM: dts: imx7d: sbc imx7: add uart5
2018-12-06 3:15 ` Shawn Guo
@ 2018-12-10 10:51 ` Hans Ole Hatzel
-1 siblings, 0 replies; 28+ messages in thread
From: Hans Ole Hatzel @ 2018-12-10 10:51 UTC (permalink / raw)
To: Shawn Guo
Cc: fabio.estevam, devicetree, Julian Scheel, linux-imx, linux-arm-kernel
On 12/6/18 4:15 AM, Shawn Guo wrote:
> On Tue, Dec 04, 2018 at 12:07:41PM +0100, Hans Ole Hatzel wrote:
>> Adds uart5 connections as used on the sbc.
>> In the sbc's reference material this is known as uart1, it does however
>> connect to the som as uart5. This uart is connected via the soc's
>> pins 11 (TX) and 13 (RX). On the sbc it is pinned out on P5
>> using pins 15 (TX) and 17 (RX).
>>
>> Signed-off-by: Hans Ole Hatzel <hohatzel@jusst.de>
>> Signed-off-by: Julian Scheel <jscheel@jusst.de>
>> ---
>> arch/arm/boot/dts/imx7d-cl-som-imx7.dts | 16 ++++++++++++++++
>> arch/arm/boot/dts/imx7d-sbc-imx7.dts | 4 ++++
>> 2 files changed, 20 insertions(+)
>>
>> diff --git a/arch/arm/boot/dts/imx7d-cl-som-imx7.dts b/arch/arm/boot/dts/imx7d-cl-som-imx7.dts
>> index 6c2c844dc052..f7c002093c67 100644
>> --- a/arch/arm/boot/dts/imx7d-cl-som-imx7.dts
>> +++ b/arch/arm/boot/dts/imx7d-cl-som-imx7.dts
>> @@ -223,6 +223,15 @@
>> fsl;
>> };
>>
>> +&uart5 {
>> + pinctrl-names = "default";
>> + pinctrl-0 = <&pinctrl_uart5>;
>> + assigned-clocks = <&clks IMX7D_UART5_ROOT_SRC>;
>> + assigned-clock-parents = <&clks IMX7D_PLL_SYS_MAIN_240M_CLK>;
>
> Can we have some comments in the commit log on why we have to use this
> particular clock source?
>
> Shawn
>
imx7d-pico.dts does this the same way. Is that good enough of a reason?
If so, should it be included in the commit message?
Hans
>> + status = "okay";
>> + fsl;
>> +};
>> +
>> &usbotg1 {
>> pinctrl-names = "default";
>> pinctrl-0 = <&pinctrl_usbotg1>;
>> @@ -330,6 +339,13 @@
>> >;
>> };
>>
>> + pinctrl_uart5: uart5grp {
>> + fsl,pins = <
>> + MX7D_PAD_I2C4_SCL__UART5_DCE_RX 0x79
>> + MX7D_PAD_I2C4_SDA__UART5_DCE_TX 0x79
>> + >;
>> + };
>> +
>> pinctrl_usdhc2: usdhc2grp {
>> fsl,pins = <
>> MX7D_PAD_SD2_CMD__SD2_CMD 0x59
>> diff --git a/arch/arm/boot/dts/imx7d-sbc-imx7.dts b/arch/arm/boot/dts/imx7d-sbc-imx7.dts
>> index 74904127fbc6..d23d62aceb82 100644
>> --- a/arch/arm/boot/dts/imx7d-sbc-imx7.dts
>> +++ b/arch/arm/boot/dts/imx7d-sbc-imx7.dts
>> @@ -30,6 +30,10 @@
>> status = "okay";
>> };
>>
>> +&uart5 {
>> + status = "okay";
>> +};
>> +
>> &iomuxc {
>> pinctrl_usdhc1: usdhc1grp {
>> fsl,pins = <
>> --
>> 2.19.2
>>
>>
>> _______________________________________________
>> linux-arm-kernel mailing list
>> linux-arm-kernel@lists.infradead.org
>> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 28+ messages in thread* Re: [PATCH 4/4] ARM: dts: imx7d: sbc imx7: add uart5
@ 2018-12-10 10:51 ` Hans Ole Hatzel
0 siblings, 0 replies; 28+ messages in thread
From: Hans Ole Hatzel @ 2018-12-10 10:51 UTC (permalink / raw)
To: Shawn Guo
Cc: fabio.estevam, devicetree, Julian Scheel, linux-imx, linux-arm-kernel
On 12/6/18 4:15 AM, Shawn Guo wrote:
> On Tue, Dec 04, 2018 at 12:07:41PM +0100, Hans Ole Hatzel wrote:
>> Adds uart5 connections as used on the sbc.
>> In the sbc's reference material this is known as uart1, it does however
>> connect to the som as uart5. This uart is connected via the soc's
>> pins 11 (TX) and 13 (RX). On the sbc it is pinned out on P5
>> using pins 15 (TX) and 17 (RX).
>>
>> Signed-off-by: Hans Ole Hatzel <hohatzel@jusst.de>
>> Signed-off-by: Julian Scheel <jscheel@jusst.de>
>> ---
>> arch/arm/boot/dts/imx7d-cl-som-imx7.dts | 16 ++++++++++++++++
>> arch/arm/boot/dts/imx7d-sbc-imx7.dts | 4 ++++
>> 2 files changed, 20 insertions(+)
>>
>> diff --git a/arch/arm/boot/dts/imx7d-cl-som-imx7.dts b/arch/arm/boot/dts/imx7d-cl-som-imx7.dts
>> index 6c2c844dc052..f7c002093c67 100644
>> --- a/arch/arm/boot/dts/imx7d-cl-som-imx7.dts
>> +++ b/arch/arm/boot/dts/imx7d-cl-som-imx7.dts
>> @@ -223,6 +223,15 @@
>> fsl;
>> };
>>
>> +&uart5 {
>> + pinctrl-names = "default";
>> + pinctrl-0 = <&pinctrl_uart5>;
>> + assigned-clocks = <&clks IMX7D_UART5_ROOT_SRC>;
>> + assigned-clock-parents = <&clks IMX7D_PLL_SYS_MAIN_240M_CLK>;
>
> Can we have some comments in the commit log on why we have to use this
> particular clock source?
>
> Shawn
>
imx7d-pico.dts does this the same way. Is that good enough of a reason?
If so, should it be included in the commit message?
Hans
>> + status = "okay";
>> + fsl;
>> +};
>> +
>> &usbotg1 {
>> pinctrl-names = "default";
>> pinctrl-0 = <&pinctrl_usbotg1>;
>> @@ -330,6 +339,13 @@
>> >;
>> };
>>
>> + pinctrl_uart5: uart5grp {
>> + fsl,pins = <
>> + MX7D_PAD_I2C4_SCL__UART5_DCE_RX 0x79
>> + MX7D_PAD_I2C4_SDA__UART5_DCE_TX 0x79
>> + >;
>> + };
>> +
>> pinctrl_usdhc2: usdhc2grp {
>> fsl,pins = <
>> MX7D_PAD_SD2_CMD__SD2_CMD 0x59
>> diff --git a/arch/arm/boot/dts/imx7d-sbc-imx7.dts b/arch/arm/boot/dts/imx7d-sbc-imx7.dts
>> index 74904127fbc6..d23d62aceb82 100644
>> --- a/arch/arm/boot/dts/imx7d-sbc-imx7.dts
>> +++ b/arch/arm/boot/dts/imx7d-sbc-imx7.dts
>> @@ -30,6 +30,10 @@
>> status = "okay";
>> };
>>
>> +&uart5 {
>> + status = "okay";
>> +};
>> +
>> &iomuxc {
>> pinctrl_usdhc1: usdhc1grp {
>> fsl,pins = <
>> --
>> 2.19.2
>>
>>
>> _______________________________________________
>> linux-arm-kernel mailing list
>> linux-arm-kernel@lists.infradead.org
>> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 28+ messages in thread* Re: [PATCH 4/4] ARM: dts: imx7d: sbc imx7: add uart5
2018-12-10 10:51 ` Hans Ole Hatzel
@ 2018-12-10 11:43 ` Fabio Estevam
-1 siblings, 0 replies; 28+ messages in thread
From: Fabio Estevam @ 2018-12-10 11:43 UTC (permalink / raw)
To: hohatzel
Cc: open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
jscheel, NXP Linux Team, Fabio Estevam, Shawn Guo,
moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE
Hi Hans,
On Mon, Dec 10, 2018 at 8:52 AM Hans Ole Hatzel <hohatzel@jusst.de> wrote:
> imx7d-pico.dts does this the same way. Is that good enough of a reason?
> If so, should it be included in the commit message?
The UART clock parent initialization has been removed from the imx7d
clock driver since commit (in linux-next):
commit ea662d2f804ad13c3c92c75c7dc1abad30e31c31
Author: Anson Huang <anson.huang@nxp.com>
Date: Fri Oct 19 01:05:36 2018 +0000
clk: imx7d: remove UART1 clock setting
There are clock assignments in all i.MX7D dtb files for UART1,
below is the example in imx7d-sdb.dts, so setting UART1 clock
in clock driver is NOT necessary, actually, module clocks setting
should be done in module driver.
&uart1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart1>;
assigned-clocks = <&clks IMX7D_UART1_ROOT_SRC>;
assigned-clock-parents = <&clks IMX7D_PLL_SYS_MAIN_240M_CLK>;
status = "okay";
};
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
So the UART clock parent should be set in the device tree.
^ permalink raw reply [flat|nested] 28+ messages in thread* Re: [PATCH 4/4] ARM: dts: imx7d: sbc imx7: add uart5
@ 2018-12-10 11:43 ` Fabio Estevam
0 siblings, 0 replies; 28+ messages in thread
From: Fabio Estevam @ 2018-12-10 11:43 UTC (permalink / raw)
To: hohatzel
Cc: open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
jscheel, NXP Linux Team, Fabio Estevam, Shawn Guo,
moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE
Hi Hans,
On Mon, Dec 10, 2018 at 8:52 AM Hans Ole Hatzel <hohatzel@jusst.de> wrote:
> imx7d-pico.dts does this the same way. Is that good enough of a reason?
> If so, should it be included in the commit message?
The UART clock parent initialization has been removed from the imx7d
clock driver since commit (in linux-next):
commit ea662d2f804ad13c3c92c75c7dc1abad30e31c31
Author: Anson Huang <anson.huang@nxp.com>
Date: Fri Oct 19 01:05:36 2018 +0000
clk: imx7d: remove UART1 clock setting
There are clock assignments in all i.MX7D dtb files for UART1,
below is the example in imx7d-sdb.dts, so setting UART1 clock
in clock driver is NOT necessary, actually, module clocks setting
should be done in module driver.
&uart1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart1>;
assigned-clocks = <&clks IMX7D_UART1_ROOT_SRC>;
assigned-clock-parents = <&clks IMX7D_PLL_SYS_MAIN_240M_CLK>;
status = "okay";
};
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
So the UART clock parent should be set in the device tree.
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 28+ messages in thread* Re: [PATCH 4/4] ARM: dts: imx7d: sbc imx7: add uart5
2018-12-10 11:43 ` Fabio Estevam
@ 2018-12-11 2:06 ` Shawn Guo
-1 siblings, 0 replies; 28+ messages in thread
From: Shawn Guo @ 2018-12-11 2:06 UTC (permalink / raw)
To: Fabio Estevam
Cc: open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
jscheel, NXP Linux Team, Fabio Estevam, hohatzel,
moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE
On Mon, Dec 10, 2018 at 09:43:12AM -0200, Fabio Estevam wrote:
> Hi Hans,
>
> On Mon, Dec 10, 2018 at 8:52 AM Hans Ole Hatzel <hohatzel@jusst.de> wrote:
>
> > imx7d-pico.dts does this the same way. Is that good enough of a reason?
> > If so, should it be included in the commit message?
>
> The UART clock parent initialization has been removed from the imx7d
> clock driver since commit (in linux-next):
>
> commit ea662d2f804ad13c3c92c75c7dc1abad30e31c31
> Author: Anson Huang <anson.huang@nxp.com>
> Date: Fri Oct 19 01:05:36 2018 +0000
>
> clk: imx7d: remove UART1 clock setting
>
> There are clock assignments in all i.MX7D dtb files for UART1,
> below is the example in imx7d-sdb.dts, so setting UART1 clock
> in clock driver is NOT necessary, actually, module clocks setting
> should be done in module driver.
>
> &uart1 {
> pinctrl-names = "default";
> pinctrl-0 = <&pinctrl_uart1>;
> assigned-clocks = <&clks IMX7D_UART1_ROOT_SRC>;
> assigned-clock-parents = <&clks IMX7D_PLL_SYS_MAIN_240M_CLK>;
> status = "okay";
> };
>
> Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
>
> So the UART clock parent should be set in the device tree.
Okay, but would it be better to set the default parent clock in soc
level of dtsi, since the configuration doesn't seem to be board
specific?
Shawn
^ permalink raw reply [flat|nested] 28+ messages in thread* Re: [PATCH 4/4] ARM: dts: imx7d: sbc imx7: add uart5
@ 2018-12-11 2:06 ` Shawn Guo
0 siblings, 0 replies; 28+ messages in thread
From: Shawn Guo @ 2018-12-11 2:06 UTC (permalink / raw)
To: Fabio Estevam
Cc: open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
jscheel, NXP Linux Team, Fabio Estevam, hohatzel,
moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE
On Mon, Dec 10, 2018 at 09:43:12AM -0200, Fabio Estevam wrote:
> Hi Hans,
>
> On Mon, Dec 10, 2018 at 8:52 AM Hans Ole Hatzel <hohatzel@jusst.de> wrote:
>
> > imx7d-pico.dts does this the same way. Is that good enough of a reason?
> > If so, should it be included in the commit message?
>
> The UART clock parent initialization has been removed from the imx7d
> clock driver since commit (in linux-next):
>
> commit ea662d2f804ad13c3c92c75c7dc1abad30e31c31
> Author: Anson Huang <anson.huang@nxp.com>
> Date: Fri Oct 19 01:05:36 2018 +0000
>
> clk: imx7d: remove UART1 clock setting
>
> There are clock assignments in all i.MX7D dtb files for UART1,
> below is the example in imx7d-sdb.dts, so setting UART1 clock
> in clock driver is NOT necessary, actually, module clocks setting
> should be done in module driver.
>
> &uart1 {
> pinctrl-names = "default";
> pinctrl-0 = <&pinctrl_uart1>;
> assigned-clocks = <&clks IMX7D_UART1_ROOT_SRC>;
> assigned-clock-parents = <&clks IMX7D_PLL_SYS_MAIN_240M_CLK>;
> status = "okay";
> };
>
> Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
>
> So the UART clock parent should be set in the device tree.
Okay, but would it be better to set the default parent clock in soc
level of dtsi, since the configuration doesn't seem to be board
specific?
Shawn
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 28+ messages in thread* Re: [PATCH 4/4] ARM: dts: imx7d: sbc imx7: add uart5
2018-12-11 2:06 ` Shawn Guo
@ 2018-12-11 2:35 ` Fabio Estevam
-1 siblings, 0 replies; 28+ messages in thread
From: Fabio Estevam @ 2018-12-11 2:35 UTC (permalink / raw)
To: Shawn Guo
Cc: open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
jscheel, NXP Linux Team, Fabio Estevam, hohatzel,
moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE
Hi Shawn,
On Tue, Dec 11, 2018 at 12:07 AM Shawn Guo <shawnguo@kernel.org> wrote:
> Okay, but would it be better to set the default parent clock in soc
> level of dtsi, since the configuration doesn't seem to be board
> specific?
Yes, I think this is a good idea.
^ permalink raw reply [flat|nested] 28+ messages in thread
* Re: [PATCH 4/4] ARM: dts: imx7d: sbc imx7: add uart5
@ 2018-12-11 2:35 ` Fabio Estevam
0 siblings, 0 replies; 28+ messages in thread
From: Fabio Estevam @ 2018-12-11 2:35 UTC (permalink / raw)
To: Shawn Guo
Cc: open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
jscheel, NXP Linux Team, Fabio Estevam, hohatzel,
moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE
Hi Shawn,
On Tue, Dec 11, 2018 at 12:07 AM Shawn Guo <shawnguo@kernel.org> wrote:
> Okay, but would it be better to set the default parent clock in soc
> level of dtsi, since the configuration doesn't seem to be board
> specific?
Yes, I think this is a good idea.
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 28+ messages in thread
* Re: [PATCH 0/4] imx7 sbc board support extensions
2018-12-04 11:07 ` Hans Ole Hatzel
@ 2018-12-06 3:01 ` Shawn Guo
-1 siblings, 0 replies; 28+ messages in thread
From: Shawn Guo @ 2018-12-06 3:01 UTC (permalink / raw)
To: Hans Ole Hatzel
Cc: fabio.estevam, devicetree, ilya, linux-arm-kernel, linux-imx
On Tue, Dec 04, 2018 at 12:07:37PM +0100, Hans Ole Hatzel wrote:
> The following patch series contains a number of extensions and fixes to
> the board support for the imx7 sbc.
>
> Hans Ole Hatzel (4):
> ARM: dts: imx7d: cl-som-imx7: fix pinctrl for i2c2
> ARM: dts: imx7d: cl-som-imx7: WiLink8 WLAN support
> ARM: dts: imx7d: sbc imx7: add uart2
> ARM: dts: imx7d: sbc imx7: add uart5
I would suggest the subject and prefix like below.
ARM: dts: imx7d-cl-som: fix pinctrl for i2c2
ARM: dts: imx7d-cl-som: add WiLink8 WLAN support
ARM: dts: imx7d-sbc: add uart2 device support
ARM: dts: imx7d-sbc: add uart5 device support
Shawn
>
> arch/arm/boot/dts/imx7d-cl-som-imx7.dts | 100 +++++++++++++++++++++++-
> arch/arm/boot/dts/imx7d-sbc-imx7.dts | 8 ++
> 2 files changed, 106 insertions(+), 2 deletions(-)
>
> --
> 2.19.2
>
>
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 28+ messages in thread
* Re: [PATCH 0/4] imx7 sbc board support extensions
@ 2018-12-06 3:01 ` Shawn Guo
0 siblings, 0 replies; 28+ messages in thread
From: Shawn Guo @ 2018-12-06 3:01 UTC (permalink / raw)
To: Hans Ole Hatzel
Cc: fabio.estevam, devicetree, ilya, linux-arm-kernel, linux-imx
On Tue, Dec 04, 2018 at 12:07:37PM +0100, Hans Ole Hatzel wrote:
> The following patch series contains a number of extensions and fixes to
> the board support for the imx7 sbc.
>
> Hans Ole Hatzel (4):
> ARM: dts: imx7d: cl-som-imx7: fix pinctrl for i2c2
> ARM: dts: imx7d: cl-som-imx7: WiLink8 WLAN support
> ARM: dts: imx7d: sbc imx7: add uart2
> ARM: dts: imx7d: sbc imx7: add uart5
I would suggest the subject and prefix like below.
ARM: dts: imx7d-cl-som: fix pinctrl for i2c2
ARM: dts: imx7d-cl-som: add WiLink8 WLAN support
ARM: dts: imx7d-sbc: add uart2 device support
ARM: dts: imx7d-sbc: add uart5 device support
Shawn
>
> arch/arm/boot/dts/imx7d-cl-som-imx7.dts | 100 +++++++++++++++++++++++-
> arch/arm/boot/dts/imx7d-sbc-imx7.dts | 8 ++
> 2 files changed, 106 insertions(+), 2 deletions(-)
>
> --
> 2.19.2
>
>
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 28+ messages in thread
* Re: [PATCH 0/4] imx7 sbc board support extensions
2018-12-04 11:07 ` Hans Ole Hatzel
@ 2018-12-06 4:36 ` Shawn Guo
-1 siblings, 0 replies; 28+ messages in thread
From: Shawn Guo @ 2018-12-06 4:36 UTC (permalink / raw)
To: Hans Ole Hatzel; +Cc: fabio.estevam, devicetree, linux-imx, linux-arm-kernel
The address <ilya@compulab.co.il> bounces. Please drop it if you send
new versions.
Shawn
On Tue, Dec 04, 2018 at 12:07:37PM +0100, Hans Ole Hatzel wrote:
> The following patch series contains a number of extensions and fixes to
> the board support for the imx7 sbc.
>
> Hans Ole Hatzel (4):
> ARM: dts: imx7d: cl-som-imx7: fix pinctrl for i2c2
> ARM: dts: imx7d: cl-som-imx7: WiLink8 WLAN support
> ARM: dts: imx7d: sbc imx7: add uart2
> ARM: dts: imx7d: sbc imx7: add uart5
>
> arch/arm/boot/dts/imx7d-cl-som-imx7.dts | 100 +++++++++++++++++++++++-
> arch/arm/boot/dts/imx7d-sbc-imx7.dts | 8 ++
> 2 files changed, 106 insertions(+), 2 deletions(-)
>
> --
> 2.19.2
>
>
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 28+ messages in thread
* Re: [PATCH 0/4] imx7 sbc board support extensions
@ 2018-12-06 4:36 ` Shawn Guo
0 siblings, 0 replies; 28+ messages in thread
From: Shawn Guo @ 2018-12-06 4:36 UTC (permalink / raw)
To: Hans Ole Hatzel; +Cc: fabio.estevam, devicetree, linux-imx, linux-arm-kernel
The address <ilya@compulab.co.il> bounces. Please drop it if you send
new versions.
Shawn
On Tue, Dec 04, 2018 at 12:07:37PM +0100, Hans Ole Hatzel wrote:
> The following patch series contains a number of extensions and fixes to
> the board support for the imx7 sbc.
>
> Hans Ole Hatzel (4):
> ARM: dts: imx7d: cl-som-imx7: fix pinctrl for i2c2
> ARM: dts: imx7d: cl-som-imx7: WiLink8 WLAN support
> ARM: dts: imx7d: sbc imx7: add uart2
> ARM: dts: imx7d: sbc imx7: add uart5
>
> arch/arm/boot/dts/imx7d-cl-som-imx7.dts | 100 +++++++++++++++++++++++-
> arch/arm/boot/dts/imx7d-sbc-imx7.dts | 8 ++
> 2 files changed, 106 insertions(+), 2 deletions(-)
>
> --
> 2.19.2
>
>
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 28+ messages in thread