[U-Boot] [PATCH 1/3] ARM: rcar_gen3: fix protection area access error at Cortex-A53

[U-Boot] [PATCH 1/3] ARM: rcar_gen3: fix protection area access error at Cortex-A53

[Marek Vasut]

From: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>

This patch fixes the problem that "main memory domain AXI secure
access protection error" occurs when booting Cortex-A53. Exclude
the area (0x43f00000 to 0x47DFFFFF) set by DBSC from the map area.

Signed-off-by: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
---
 arch/arm/mach-rmobile/memmap-gen3.c | 8 +++++++-
 1 file changed, 7 insertions(+), 1 deletion(-)

diff --git a/arch/arm/mach-rmobile/memmap-gen3.c b/arch/arm/mach-rmobile/memmap-gen3.c
index 7e29ccc351..0429a2ac51 100644
--- a/arch/arm/mach-rmobile/memmap-gen3.c
+++ b/arch/arm/mach-rmobile/memmap-gen3.c
@@ -21,7 +21,13 @@ static struct mm_region gen3_mem_map[GEN3_NR_REGIONS] = {
 	}, {
 		.virt = 0x40000000UL,
 		.phys = 0x40000000UL,
-		.size = 0x80000000UL,
+		.size = 0x03F00000UL,
+		.attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
+			 PTE_BLOCK_INNER_SHARE
+	}, {
+		.virt = 0x47E00000UL,
+		.phys = 0x47E00000UL,
+		.size = 0x78200000UL,
 		.attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
 			 PTE_BLOCK_INNER_SHARE
 	}, {
-- 
2.18.0

[U-Boot] [PATCH 2/3] ARM: rcar_gen3: fix protection area access error

[Marek Vasut]

From: Takeshi Kihara <takeshi.kihara.df@renesas.com>

This patch fixes the problem that "main memory domain AXI secure access
protection error" occurs. Exclude the area (0x43f00000 to 0x47DFFFFF)
set by DBSC from the map area.

Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
Signed-off-by: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
---
 arch/arm/mach-rmobile/memmap-gen3.c | 12 ++++++++++--
 1 file changed, 10 insertions(+), 2 deletions(-)

diff --git a/arch/arm/mach-rmobile/memmap-gen3.c b/arch/arm/mach-rmobile/memmap-gen3.c
index 0429a2ac51..3c0f3548cb 100644
--- a/arch/arm/mach-rmobile/memmap-gen3.c
+++ b/arch/arm/mach-rmobile/memmap-gen3.c
@@ -82,8 +82,16 @@ void enable_caches(void)
 
 		/* Mark memory reserved by ATF as cacheable too. */
 		if (start == 0x48000000) {
-			start = 0x40000000ULL;
-			size += 0x08000000ULL;
+			/* Unmark protection area (0x43F00000 to 0x47DFFFFF) */
+			gen3_mem_map[i].virt = 0x40000000ULL;
+			gen3_mem_map[i].phys = 0x40000000ULL;
+			gen3_mem_map[i].size = 0x03F00000ULL;
+			gen3_mem_map[i].attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
+						PTE_BLOCK_INNER_SHARE;
+			i++;
+
+			start = 0x47E00000ULL;
+			size += 0x00200000ULL;
 		}
 
 		gen3_mem_map[i].virt = start;
-- 
2.18.0

[U-Boot] [PATCH 3/3] ARM: rmobile: Fix to enable icache early in Gen3

[Marek Vasut]

From: Takeshi Kihara <takeshi.kihara.df@renesas.com>

This patch fixes the problem that u-boot will not start unless icache is
enabled early.

Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
Signed-off-by: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
---
 arch/arm/mach-rmobile/cpu_info.c    | 4 ++--
 arch/arm/mach-rmobile/memmap-gen3.c | 4 +++-
 2 files changed, 5 insertions(+), 3 deletions(-)

diff --git a/arch/arm/mach-rmobile/cpu_info.c b/arch/arm/mach-rmobile/cpu_info.c
index 65a9ca8c01..aa5be52dfd 100644
--- a/arch/arm/mach-rmobile/cpu_info.c
+++ b/arch/arm/mach-rmobile/cpu_info.c
@@ -7,8 +7,6 @@
 #include <asm/io.h>
 #include <linux/ctype.h>
 
-/* R-Car Gen3 caches are enabled in memmap-gen3.c */
-#ifndef CONFIG_RCAR_GEN3
 #ifdef CONFIG_ARCH_CPU_INIT
 int arch_cpu_init(void)
 {
@@ -17,6 +15,8 @@ int arch_cpu_init(void)
 }
 #endif
 
+/* R-Car Gen3 D-cache is enabled in memmap-gen3.c */
+#ifndef CONFIG_RCAR_GEN3
 #ifndef CONFIG_SYS_DCACHE_OFF
 void enable_caches(void)
 {
diff --git a/arch/arm/mach-rmobile/memmap-gen3.c b/arch/arm/mach-rmobile/memmap-gen3.c
index 3c0f3548cb..1a9eb72bb9 100644
--- a/arch/arm/mach-rmobile/memmap-gen3.c
+++ b/arch/arm/mach-rmobile/memmap-gen3.c
@@ -140,6 +140,8 @@ void enable_caches(void)
 		gen3_mem_map[i].attrs = 0;
 	}
 
-	icache_enable();
+	if (!icache_status())
+		icache_enable();
+
 	dcache_enable();
 }
-- 
2.18.0