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* Re: kvm: RDTSCP on AMD
@ 2018-12-10 18:13 Borislav Petkov
  2018-12-10 18:37 ` Eduardo Habkost
  0 siblings, 1 reply; 26+ messages in thread
From: Borislav Petkov @ 2018-12-10 18:13 UTC (permalink / raw)
  To: Paolo Bonzini
  Cc: Eduardo Habkost, Jörg Rödel, Andre Przywara, kvm ML,
	lkml, Tom Lendacky

Reviving an old thread here.

On Wed, Jul 06, 2016 at 11:27:16PM +0200, Paolo Bonzini wrote:
> On 06/07/2016 19:34, Eduardo Habkost wrote:
> >> > Nothing is needed in the kernel actually.  You can skip the intercept
> >> > by running the guest with MSR_TSC_AUX set to the guest's expected value.
> >> >  Which KVM does, except that it's botched so I need to apply the
> >> > patch in https://lkml.org/lkml/2016/4/13/802.
> > Do you mean -cpu Opteron_G*,+rdtscp will be buggy on Linux v4.5?
> > (v4.5 reports rdtscp as supported in GET_SUPPORTED_CPUID)
> > 
> > Can we do something to make QEMU detect the buggy kernel before
> > allowing rdtscp to be enabled, or should we just tell people to
> > upgrade their kernel?
> 
> We usually just tell people to use the latest stable kernel.
> 
> Adding new CPU models is not a big deal, in fact it's almost easier than
> getting compat properties right. :)

Ok, can we finally revert

  33b5e8c03ae7 ("target-i386: Disable rdtscp on Opteron_G* CPU models")

in the qemu tree?

Three years should be enough by now for

  46896c73c1a4 ("KVM: svm: add support for RDTSCP")

to have percolated downstream.

Btw, its commit message talks about Linux not using RDTSCP but that will
change soon. :-)

Oh, and the EPYC qemu CPU model has CPUID_EXT2_RDTSCP and works just
fine when patching in RDTSCP:

[    0.543197] apply_alternatives: feat: 3*32+18, old: (read_tsc+0x0/0x10 (ffffffff8101d1c0) len: 5), repl: (ffffffff824e6d33, len: 5), pad: 3
[    0.544448] ffffffff8101d1c0: old_insn: 0f 31 90 90 90
[    0.545023] ffffffff824e6d33: rpl_insn: 0f ae e8 0f 31
[    0.545598] ffffffff8101d1c0: final_insn: 0f ae e8 0f 31
[    0.546193] apply_alternatives: feat: 1*32+27, old: (read_tsc+0x0/0x10 (ffffffff8101d1c0) len: 5), repl: (ffffffff824e6d38, len: 3), pad: 3
[    0.547195] ffffffff8101d1c0: old_insn: 0f ae e8 0f 31
[    0.547775] ffffffff824e6d38: rpl_insn: 0f 01 f9
[    0.548307] ffffffff8101d1c0: final_insn: 0f 01 f9 66 90

That final_insn which gets patched to by the alternatives is

ffffffff8101d1c0:       0f 01 f9                rdtscp
ffffffff8101d1c3:       66 90                   xchg %ax,%ax

Thx.

-- 
Regards/Gruss,
    Boris.

Good mailing practices for 400: avoid top-posting and trim the reply.

^ permalink raw reply	[flat|nested] 26+ messages in thread
* kvm: RDTSCP on AMD
@ 2016-07-06 12:44 Borislav Petkov
  2016-07-06 13:01 ` Paolo Bonzini
  0 siblings, 1 reply; 26+ messages in thread
From: Borislav Petkov @ 2016-07-06 12:44 UTC (permalink / raw)
  To: Paolo Bonzini, Eduardo Habkost
  Cc: Jörg Rödel, Andre Przywara, kvm ML, lkml

Hi guys,

how about this below to enable RDTSCP emulation on AMD? IOW, I'm staring
at

  33b5e8c03ae7 ("target-i386: Disable rdtscp on Opteron_G* CPU models")

in the qemu repo.

It seems to work here, RDTSCP in the guest gives me node and cpu as
vsyscall_set_cpu() in the guest kernel has set them.

Thoughts?

(Below is the simple qemu diff reenabling RDTSCP)

---
diff --git a/arch/x86/kvm/svm.c b/arch/x86/kvm/svm.c
index 16ef31b87452..5a238f5402f5 100644
--- a/arch/x86/kvm/svm.c
+++ b/arch/x86/kvm/svm.c
@@ -1131,6 +1131,7 @@ static void init_vmcb(struct vcpu_svm *svm)
 	set_intercept(svm, INTERCEPT_STGI);
 	set_intercept(svm, INTERCEPT_CLGI);
 	set_intercept(svm, INTERCEPT_SKINIT);
+	set_intercept(svm, INTERCEPT_RDTSCP);
 	set_intercept(svm, INTERCEPT_WBINVD);
 	set_intercept(svm, INTERCEPT_MONITOR);
 	set_intercept(svm, INTERCEPT_MWAIT);
@@ -3009,6 +3010,20 @@ static int skinit_interception(struct vcpu_svm *svm)
 	return 1;
 }
 
+static int rdtscp_interception(struct vcpu_svm *svm)
+{
+	u64 tsc;
+
+	tsc = kvm_scale_tsc(&svm->vcpu, rdtsc()) + svm->vmcb->control.tsc_offset;
+
+	kvm_register_write(&svm->vcpu, VCPU_REGS_RAX, tsc & 0xffffffff);
+	kvm_register_write(&svm->vcpu, VCPU_REGS_RDX, tsc >> 32);
+	kvm_register_write(&svm->vcpu, VCPU_REGS_RCX, svm->tsc_aux);
+
+	skip_emulated_instruction(&svm->vcpu);
+	return 1;
+}
+
 static int wbinvd_interception(struct vcpu_svm *svm)
 {
 	kvm_emulate_wbinvd(&svm->vcpu);
@@ -3919,6 +3935,7 @@ static int (*const svm_exit_handlers[])(struct vcpu_svm *svm) = {
 	[SVM_EXIT_STGI]				= stgi_interception,
 	[SVM_EXIT_CLGI]				= clgi_interception,
 	[SVM_EXIT_SKINIT]			= skinit_interception,
+	[SVM_EXIT_RDTSCP]			= rdtscp_interception,
 	[SVM_EXIT_WBINVD]                       = wbinvd_interception,
 	[SVM_EXIT_MONITOR]			= monitor_interception,
 	[SVM_EXIT_MWAIT]			= mwait_interception,
---

qemu diff:

---
diff --git a/target-i386/cpu.c b/target-i386/cpu.c
index 3bd3cfc3ad16..aa6d0d027d00 100644
--- a/target-i386/cpu.c
+++ b/target-i386/cpu.c
@@ -1332,9 +1332,8 @@ static X86CPUDefinition builtin_x86_defs[] = {
             CPUID_DE | CPUID_FP87,
         .features[FEAT_1_ECX] =
             CPUID_EXT_CX16 | CPUID_EXT_SSE3,
-        /* Missing: CPUID_EXT2_RDTSCP */
         .features[FEAT_8000_0001_EDX] =
-            CPUID_EXT2_LM | CPUID_EXT2_FXSR |
+            CPUID_EXT2_LM | CPUID_EXT2_FXSR | CPUID_EXT2_RDTSCP |
             CPUID_EXT2_MMX | CPUID_EXT2_NX | CPUID_EXT2_PSE36 |
             CPUID_EXT2_PAT | CPUID_EXT2_CMOV | CPUID_EXT2_MCA |
             CPUID_EXT2_PGE | CPUID_EXT2_MTRR | CPUID_EXT2_SYSCALL |
@@ -1362,9 +1361,8 @@ static X86CPUDefinition builtin_x86_defs[] = {
         .features[FEAT_1_ECX] =
             CPUID_EXT_POPCNT | CPUID_EXT_CX16 | CPUID_EXT_MONITOR |
             CPUID_EXT_SSE3,
-        /* Missing: CPUID_EXT2_RDTSCP */
         .features[FEAT_8000_0001_EDX] =
-            CPUID_EXT2_LM | CPUID_EXT2_FXSR |
+            CPUID_EXT2_LM | CPUID_EXT2_FXSR | CPUID_EXT2_RDTSCP |
             CPUID_EXT2_MMX | CPUID_EXT2_NX | CPUID_EXT2_PSE36 |
             CPUID_EXT2_PAT | CPUID_EXT2_CMOV | CPUID_EXT2_MCA |
             CPUID_EXT2_PGE | CPUID_EXT2_MTRR | CPUID_EXT2_SYSCALL |
@@ -1395,9 +1393,8 @@ static X86CPUDefinition builtin_x86_defs[] = {
             CPUID_EXT_POPCNT | CPUID_EXT_SSE42 | CPUID_EXT_SSE41 |
             CPUID_EXT_CX16 | CPUID_EXT_SSSE3 | CPUID_EXT_PCLMULQDQ |
             CPUID_EXT_SSE3,
-        /* Missing: CPUID_EXT2_RDTSCP */
         .features[FEAT_8000_0001_EDX] =
-            CPUID_EXT2_LM |
+            CPUID_EXT2_LM | CPUID_EXT2_RDTSCP |
             CPUID_EXT2_PDPE1GB | CPUID_EXT2_FXSR | CPUID_EXT2_MMX |
             CPUID_EXT2_NX | CPUID_EXT2_PSE36 | CPUID_EXT2_PAT |
             CPUID_EXT2_CMOV | CPUID_EXT2_MCA | CPUID_EXT2_PGE |
@@ -1431,9 +1428,8 @@ static X86CPUDefinition builtin_x86_defs[] = {
             CPUID_EXT_AES | CPUID_EXT_POPCNT | CPUID_EXT_SSE42 |
             CPUID_EXT_SSE41 | CPUID_EXT_CX16 | CPUID_EXT_FMA |
             CPUID_EXT_SSSE3 | CPUID_EXT_PCLMULQDQ | CPUID_EXT_SSE3,
-        /* Missing: CPUID_EXT2_RDTSCP */
         .features[FEAT_8000_0001_EDX] =
-            CPUID_EXT2_LM |
+            CPUID_EXT2_LM | CPUID_EXT2_RDTSCP |
             CPUID_EXT2_PDPE1GB | CPUID_EXT2_FXSR | CPUID_EXT2_MMX |
             CPUID_EXT2_NX | CPUID_EXT2_PSE36 | CPUID_EXT2_PAT |
             CPUID_EXT2_CMOV | CPUID_EXT2_MCA | CPUID_EXT2_PGE |




-- 
Regards/Gruss,
    Boris.

ECO tip #101: Trim your mails when you reply.

^ permalink raw reply related	[flat|nested] 26+ messages in thread
end of thread, other threads:[~2018-12-20 12:10 UTC | newest]

Thread overview: 26+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2018-12-10 18:13 kvm: RDTSCP on AMD Borislav Petkov
2018-12-10 18:37 ` Eduardo Habkost
2018-12-10 18:41   ` Borislav Petkov
2018-12-10 19:06     ` Eduardo Habkost
2018-12-10 19:42       ` Borislav Petkov
2018-12-10 20:08         ` Eduardo Habkost
2018-12-10 20:39           ` Borislav Petkov
2018-12-11 10:38           ` Daniel P. Berrangé
2018-12-11 11:55             ` Eduardo Habkost
2018-12-11 14:35               ` Daniel P. Berrangé
2018-12-11 15:23               ` Paolo Bonzini
2018-12-11 15:30                 ` Daniel P. Berrangé
2018-12-11 16:14                   ` [PATCH] target-i386: Reenable RDTSCP support on Opteron_G[345] CPU models Borislav Petkov
2018-12-11 16:14                     ` [Qemu-devel] " Borislav Petkov
2018-12-12 19:52                     ` Eduardo Habkost
2018-12-12 19:52                       ` [Qemu-devel] " Eduardo Habkost
2018-12-12 20:08                       ` [PATCH -v2] target-i386: Reenable RDTSCP support on Opteron_G[345] CPU models " Borislav Petkov
2018-12-12 20:08                         ` [Qemu-devel] " Borislav Petkov
2018-12-20 12:10                         ` Eduardo Habkost
2018-12-20 12:10                           ` [Qemu-devel] " Eduardo Habkost
2018-12-10 19:47     ` kvm: RDTSCP on AMD Eduardo Habkost
2018-12-10 20:16       ` Borislav Petkov
  -- strict thread matches above, loose matches on Subject: below --
2016-07-06 12:44 Borislav Petkov
2016-07-06 13:01 ` Paolo Bonzini
2016-07-06 17:34   ` Eduardo Habkost
2016-07-06 21:27     ` Paolo Bonzini

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