All of lore.kernel.org
 help / color / mirror / Atom feed
From: dwesterg@gmail.com
To: dinguyen@kernel.org, robh+dt@kernel.org, mark.rutland@arm.com,
	devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
	thor.thayer@intel.com
Cc: Dalon Westergreen <dalon.westergreen@linux.intel.com>
Subject: [PATCH 2/3] ARM: dts: arria10: Add stmmac ptp_ref clock
Date: Thu, 13 Dec 2018 15:03:01 -0800	[thread overview]
Message-ID: <20181213230302.11034-2-dalon.westergreen@linux.intel.com> (raw)
In-Reply-To: <20181213230302.11034-1-dalon.westergreen@linux.intel.com>

From: Dalon Westergreen <dalon.westergreen@linux.intel.com>

Add the default stmmac ptp_ref clock for arria10.  The stmmac
driver defaults the ptp_ref clock to the main stmmac clock
if the ptp_ref clock is not set in the devicetree.  This is inappropriate
for the arria10 device.  The default ptp_ref clock is peri_emac_ptp_clk.

Signed-off-by: Dalon Westergreen <dalon.westergreen@linux.intel.com>
---
 arch/arm/boot/dts/socfpga_arria10.dtsi | 12 ++++++------
 1 file changed, 6 insertions(+), 6 deletions(-)

diff --git a/arch/arm/boot/dts/socfpga_arria10.dtsi b/arch/arm/boot/dts/socfpga_arria10.dtsi
index 0017bac7f96c..6591def7b225 100644
--- a/arch/arm/boot/dts/socfpga_arria10.dtsi
+++ b/arch/arm/boot/dts/socfpga_arria10.dtsi
@@ -426,8 +426,8 @@
 			snps,perfect-filter-entries = <128>;
 			tx-fifo-depth = <4096>;
 			rx-fifo-depth = <16384>;
-			clocks = <&l4_mp_clk>;
-			clock-names = "stmmaceth";
+			clocks = <&l4_mp_clk>, <&peri_emac_ptp_clk>;
+			clock-names = "stmmaceth", "ptp_ref";
 			resets = <&rst EMAC0_RESET>;
 			reset-names = "stmmaceth";
 			snps,axi-config = <&socfpga_axi_setup>;
@@ -446,8 +446,8 @@
 			snps,perfect-filter-entries = <128>;
 			tx-fifo-depth = <4096>;
 			rx-fifo-depth = <16384>;
-			clocks = <&l4_mp_clk>;
-			clock-names = "stmmaceth";
+			clocks = <&l4_mp_clk>, <&peri_emac_ptp_clk>;
+			clock-names = "stmmaceth", "ptp_ref";
 			resets = <&rst EMAC1_RESET>;
 			reset-names = "stmmaceth";
 			snps,axi-config = <&socfpga_axi_setup>;
@@ -466,8 +466,8 @@
 			snps,perfect-filter-entries = <128>;
 			tx-fifo-depth = <4096>;
 			rx-fifo-depth = <16384>;
-			clocks = <&l4_mp_clk>;
-			clock-names = "stmmaceth";
+			clocks = <&l4_mp_clk>, <&peri_emac_ptp_clk>;
+			clock-names = "stmmaceth", "ptp_ref";
 			snps,axi-config = <&socfpga_axi_setup>;
 			status = "disabled";
 		};
-- 
2.19.2


  reply	other threads:[~2018-12-13 23:03 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-12-13 23:03 [PATCH 1/3] ARM: dts: cyclone5: Add stmmac ptp_ref clock dwesterg
2018-12-13 23:03 ` dwesterg [this message]
2018-12-13 23:03 ` [PATCH 3/3] ARM64: dts: stratix10: " dwesterg
2019-05-15 16:20 [PATCH 1/3] ARM: dts: cyclone5: " Dalon Westergreen
2019-05-15 16:20 ` [PATCH 2/3] ARM: dts: arria10: " Dalon Westergreen
2019-05-20 16:10   ` Thor Thayer

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20181213230302.11034-2-dalon.westergreen@linux.intel.com \
    --to=dwesterg@gmail.com \
    --cc=dalon.westergreen@linux.intel.com \
    --cc=devicetree@vger.kernel.org \
    --cc=dinguyen@kernel.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=mark.rutland@arm.com \
    --cc=robh+dt@kernel.org \
    --cc=thor.thayer@intel.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.