* [RESEND PATCH v2 1/3] arm64: dts: fsl: use a generic node name for m25p80 flashes
@ 2018-12-18 16:07 ` Alexandre Belloni
0 siblings, 0 replies; 12+ messages in thread
From: Alexandre Belloni @ 2018-12-18 16:07 UTC (permalink / raw)
To: Shawn Guo
Cc: Fabio Estevam, Alexandre Belloni, linux-kernel, linux-arm-kernel
Use a generic node name for the m25p80 flashes on ls1043 and ls1046 boards.
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
---
arch/arm64/boot/dts/freescale/fsl-ls1043a-qds.dts | 2 +-
arch/arm64/boot/dts/freescale/fsl-ls1046a-qds.dts | 2 +-
arch/arm64/boot/dts/freescale/fsl-ls1046a-rdb.dts | 4 ++--
3 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1043a-qds.dts b/arch/arm64/boot/dts/freescale/fsl-ls1043a-qds.dts
index dff3d648172e..8468e652a262 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1043a-qds.dts
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1043a-qds.dts
@@ -138,7 +138,7 @@
bus-num = <0>;
status = "okay";
- qflash0: s25fl128s@0 {
+ qflash0: flash@0 {
compatible = "spansion,m25p80";
#address-cells = <1>;
#size-cells = <1>;
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1046a-qds.dts b/arch/arm64/boot/dts/freescale/fsl-ls1046a-qds.dts
index e58a8ca1386c..51a518b64053 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1046a-qds.dts
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a-qds.dts
@@ -167,7 +167,7 @@
bus-num = <0>;
status = "okay";
- qflash0: s25fl128s@0 {
+ qflash0: flash@0 {
compatible = "spansion,m25p80";
#address-cells = <1>;
#size-cells = <1>;
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1046a-rdb.dts b/arch/arm64/boot/dts/freescale/fsl-ls1046a-rdb.dts
index a59b48203688..1e3d570412d2 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1046a-rdb.dts
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a-rdb.dts
@@ -103,7 +103,7 @@
bus-num = <0>;
status = "okay";
- qflash0: s25fs512s@0 {
+ qflash0: flash@0 {
compatible = "spansion,m25p80";
#address-cells = <1>;
#size-cells = <1>;
@@ -111,7 +111,7 @@
reg = <0>;
};
- qflash1: s25fs512s@1 {
+ qflash1: flash@1 {
compatible = "spansion,m25p80";
#address-cells = <1>;
#size-cells = <1>;
--
2.20.0
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 12+ messages in thread* [RESEND PATCH v2] MAINTAINERS: Add a maintainer for MSCC MIPS SoCs
2018-12-18 16:07 ` Alexandre Belloni
@ 2018-12-18 16:07 ` Alexandre Belloni
-1 siblings, 0 replies; 12+ messages in thread
From: Alexandre Belloni @ 2018-12-18 16:07 UTC (permalink / raw)
To: Shawn Guo
Cc: Fabio Estevam, linux-arm-kernel, linux-kernel, Alexandre Belloni
Microsemi has been bought by Microchip and Microchip is supporting those
SoCs.
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
---
MAINTAINERS | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/MAINTAINERS b/MAINTAINERS
index f4855974f325..50223cba6ddb 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -9801,8 +9801,9 @@ F: drivers/dma/at_xdmac.c
MICROSEMI MIPS SOCS
M: Alexandre Belloni <alexandre.belloni@bootlin.com>
+M: Microchip Linux Driver Support <UNGLinuxDriver@microchip.com>
L: linux-mips@linux-mips.org
-S: Maintained
+S: Supported
F: arch/mips/generic/board-ocelot.c
F: arch/mips/configs/generic/board-ocelot.config
F: arch/mips/boot/dts/mscc/
--
2.20.0
^ permalink raw reply related [flat|nested] 12+ messages in thread
* [RESEND PATCH v2] MAINTAINERS: Add a maintainer for MSCC MIPS SoCs
@ 2018-12-18 16:07 ` Alexandre Belloni
0 siblings, 0 replies; 12+ messages in thread
From: Alexandre Belloni @ 2018-12-18 16:07 UTC (permalink / raw)
To: Shawn Guo
Cc: Fabio Estevam, Alexandre Belloni, linux-kernel, linux-arm-kernel
Microsemi has been bought by Microchip and Microchip is supporting those
SoCs.
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
---
MAINTAINERS | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/MAINTAINERS b/MAINTAINERS
index f4855974f325..50223cba6ddb 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -9801,8 +9801,9 @@ F: drivers/dma/at_xdmac.c
MICROSEMI MIPS SOCS
M: Alexandre Belloni <alexandre.belloni@bootlin.com>
+M: Microchip Linux Driver Support <UNGLinuxDriver@microchip.com>
L: linux-mips@linux-mips.org
-S: Maintained
+S: Supported
F: arch/mips/generic/board-ocelot.c
F: arch/mips/configs/generic/board-ocelot.config
F: arch/mips/boot/dts/mscc/
--
2.20.0
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 12+ messages in thread
* Re: [RESEND PATCH v2] MAINTAINERS: Add a maintainer for MSCC MIPS SoCs
2018-12-18 16:07 ` Alexandre Belloni
@ 2018-12-18 16:09 ` Alexandre Belloni
-1 siblings, 0 replies; 12+ messages in thread
From: Alexandre Belloni @ 2018-12-18 16:09 UTC (permalink / raw)
To: Shawn Guo; +Cc: Fabio Estevam, linux-arm-kernel, linux-kernel
Please ignore this, it was meant for the MIPS maintainers.
On 18/12/2018 17:07:47+0100, Alexandre Belloni wrote:
> Microsemi has been bought by Microchip and Microchip is supporting those
> SoCs.
>
> Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
> ---
> MAINTAINERS | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/MAINTAINERS b/MAINTAINERS
> index f4855974f325..50223cba6ddb 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -9801,8 +9801,9 @@ F: drivers/dma/at_xdmac.c
>
> MICROSEMI MIPS SOCS
> M: Alexandre Belloni <alexandre.belloni@bootlin.com>
> +M: Microchip Linux Driver Support <UNGLinuxDriver@microchip.com>
> L: linux-mips@linux-mips.org
> -S: Maintained
> +S: Supported
> F: arch/mips/generic/board-ocelot.c
> F: arch/mips/configs/generic/board-ocelot.config
> F: arch/mips/boot/dts/mscc/
> --
> 2.20.0
>
--
Alexandre Belloni, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [RESEND PATCH v2] MAINTAINERS: Add a maintainer for MSCC MIPS SoCs
@ 2018-12-18 16:09 ` Alexandre Belloni
0 siblings, 0 replies; 12+ messages in thread
From: Alexandre Belloni @ 2018-12-18 16:09 UTC (permalink / raw)
To: Shawn Guo; +Cc: Fabio Estevam, linux-kernel, linux-arm-kernel
Please ignore this, it was meant for the MIPS maintainers.
On 18/12/2018 17:07:47+0100, Alexandre Belloni wrote:
> Microsemi has been bought by Microchip and Microchip is supporting those
> SoCs.
>
> Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
> ---
> MAINTAINERS | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/MAINTAINERS b/MAINTAINERS
> index f4855974f325..50223cba6ddb 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -9801,8 +9801,9 @@ F: drivers/dma/at_xdmac.c
>
> MICROSEMI MIPS SOCS
> M: Alexandre Belloni <alexandre.belloni@bootlin.com>
> +M: Microchip Linux Driver Support <UNGLinuxDriver@microchip.com>
> L: linux-mips@linux-mips.org
> -S: Maintained
> +S: Supported
> F: arch/mips/generic/board-ocelot.c
> F: arch/mips/configs/generic/board-ocelot.config
> F: arch/mips/boot/dts/mscc/
> --
> 2.20.0
>
--
Alexandre Belloni, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 12+ messages in thread
* [RESEND PATCH v2 2/3] arm64: dts: fsl: ls1046a: disable the flash controller by default
2018-12-18 16:07 ` Alexandre Belloni
@ 2018-12-18 16:07 ` Alexandre Belloni
-1 siblings, 0 replies; 12+ messages in thread
From: Alexandre Belloni @ 2018-12-18 16:07 UTC (permalink / raw)
To: Shawn Guo
Cc: Fabio Estevam, linux-arm-kernel, linux-kernel, Alexandre Belloni
Set the Integrated Flash Controller status to disabled so each board has
the option to enable it. All the existing users have status = "okay" so
there is no functional change.
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
---
arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
index 51cbd50012d6..90dc3b616ea7 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
@@ -200,6 +200,7 @@
compatible = "fsl,ifc", "simple-bus";
reg = <0x0 0x1530000 0x0 0x10000>;
interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
+ status = "disabled";
};
qspi: spi@1550000 {
--
2.20.0
^ permalink raw reply related [flat|nested] 12+ messages in thread* [RESEND PATCH v2 2/3] arm64: dts: fsl: ls1046a: disable the flash controller by default
@ 2018-12-18 16:07 ` Alexandre Belloni
0 siblings, 0 replies; 12+ messages in thread
From: Alexandre Belloni @ 2018-12-18 16:07 UTC (permalink / raw)
To: Shawn Guo
Cc: Fabio Estevam, Alexandre Belloni, linux-kernel, linux-arm-kernel
Set the Integrated Flash Controller status to disabled so each board has
the option to enable it. All the existing users have status = "okay" so
there is no functional change.
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
---
arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
index 51cbd50012d6..90dc3b616ea7 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
@@ -200,6 +200,7 @@
compatible = "fsl,ifc", "simple-bus";
reg = <0x0 0x1530000 0x0 0x10000>;
interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
+ status = "disabled";
};
qspi: spi@1550000 {
--
2.20.0
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 12+ messages in thread
* [PATCH 3/3] arm64: dts: fsl: ls1046a: disable uarts by default
2018-12-18 16:07 ` Alexandre Belloni
@ 2018-12-18 16:07 ` Alexandre Belloni
-1 siblings, 0 replies; 12+ messages in thread
From: Alexandre Belloni @ 2018-12-18 16:07 UTC (permalink / raw)
To: Shawn Guo
Cc: Fabio Estevam, linux-arm-kernel, linux-kernel, Alexandre Belloni
Disable the UARTs by defaultto avoid registering unused UARTs. This
effectively change the number of registered UARTS for the RDB and QDS from
4 to 2 but this seems the right thing to do.
It is especially useful when connecting other 8250 uart on PCIe for example
as the default maximum number of 8250 UARTs that can be registered is 4.
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
---
arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
index 90dc3b616ea7..4caf4df1c7b1 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
@@ -423,6 +423,7 @@
reg = <0x00 0x21c0500 0x0 0x100>;
interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clockgen 4 1>;
+ status = "disabled";
};
duart1: serial@21c0600 {
@@ -430,6 +431,7 @@
reg = <0x00 0x21c0600 0x0 0x100>;
interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clockgen 4 1>;
+ status = "disabled";
};
duart2: serial@21d0500 {
@@ -437,6 +439,7 @@
reg = <0x0 0x21d0500 0x0 0x100>;
interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clockgen 4 1>;
+ status = "disabled";
};
duart3: serial@21d0600 {
@@ -444,6 +447,7 @@
reg = <0x0 0x21d0600 0x0 0x100>;
interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clockgen 4 1>;
+ status = "disabled";
};
gpio0: gpio@2300000 {
--
2.20.0
^ permalink raw reply related [flat|nested] 12+ messages in thread* [PATCH 3/3] arm64: dts: fsl: ls1046a: disable uarts by default
@ 2018-12-18 16:07 ` Alexandre Belloni
0 siblings, 0 replies; 12+ messages in thread
From: Alexandre Belloni @ 2018-12-18 16:07 UTC (permalink / raw)
To: Shawn Guo
Cc: Fabio Estevam, Alexandre Belloni, linux-kernel, linux-arm-kernel
Disable the UARTs by defaultto avoid registering unused UARTs. This
effectively change the number of registered UARTS for the RDB and QDS from
4 to 2 but this seems the right thing to do.
It is especially useful when connecting other 8250 uart on PCIe for example
as the default maximum number of 8250 UARTs that can be registered is 4.
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
---
arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
index 90dc3b616ea7..4caf4df1c7b1 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
@@ -423,6 +423,7 @@
reg = <0x00 0x21c0500 0x0 0x100>;
interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clockgen 4 1>;
+ status = "disabled";
};
duart1: serial@21c0600 {
@@ -430,6 +431,7 @@
reg = <0x00 0x21c0600 0x0 0x100>;
interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clockgen 4 1>;
+ status = "disabled";
};
duart2: serial@21d0500 {
@@ -437,6 +439,7 @@
reg = <0x0 0x21d0500 0x0 0x100>;
interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clockgen 4 1>;
+ status = "disabled";
};
duart3: serial@21d0600 {
@@ -444,6 +447,7 @@
reg = <0x0 0x21d0600 0x0 0x100>;
interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clockgen 4 1>;
+ status = "disabled";
};
gpio0: gpio@2300000 {
--
2.20.0
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 12+ messages in thread
* Re: [RESEND PATCH v2 1/3] arm64: dts: fsl: use a generic node name for m25p80 flashes
2018-12-18 16:07 ` Alexandre Belloni
@ 2019-01-11 9:14 ` Shawn Guo
-1 siblings, 0 replies; 12+ messages in thread
From: Shawn Guo @ 2019-01-11 9:14 UTC (permalink / raw)
To: Alexandre Belloni; +Cc: Fabio Estevam, linux-arm-kernel, linux-kernel
On Tue, Dec 18, 2018 at 05:07:46PM +0100, Alexandre Belloni wrote:
> Use a generic node name for the m25p80 flashes on ls1043 and ls1046 boards.
>
> Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Applied all (not MAINTAINERS patch), thanks.
^ permalink raw reply [flat|nested] 12+ messages in thread