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From: Palmer Dabbelt <palmer@sifive.com>
To: qemu-riscv@nongnu.org
Cc: qemu-devel@nongnu.org,
	Alistair Francis <Alistair.Francis@wdc.com>,
	Alistair Francis <alistair.francis@wdc.com>,
	Palmer Dabbelt <palmer@sifive.com>
Subject: [Qemu-devel] [PULL 02/14] hw/riscv/virt: Adjust memory layout spacing
Date: Fri, 21 Dec 2018 08:02:55 -0800	[thread overview]
Message-ID: <20181221160307.14819-3-palmer@sifive.com> (raw)
In-Reply-To: <20181221160307.14819-1-palmer@sifive.com>

From: Alistair Francis <Alistair.Francis@wdc.com>

Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Logan Gunthorpe <logang@deltatee.com>
Tested-by: Guenter Roeck <linux@roeck-us.net>
Tested-by: Andrea Bolognani <abologna@redhat.com>
Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
---
 hw/riscv/virt.c | 16 ++++++++--------
 1 file changed, 8 insertions(+), 8 deletions(-)

diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c
index 2b38f890702c..6b6fa39aaa38 100644
--- a/hw/riscv/virt.c
+++ b/hw/riscv/virt.c
@@ -47,14 +47,14 @@ static const struct MemmapEntry {
     hwaddr base;
     hwaddr size;
 } virt_memmap[] = {
-    [VIRT_DEBUG] =    {        0x0,      0x100 },
-    [VIRT_MROM] =     {     0x1000,    0x11000 },
-    [VIRT_TEST] =     {   0x100000,     0x1000 },
-    [VIRT_CLINT] =    {  0x2000000,    0x10000 },
-    [VIRT_PLIC] =     {  0xc000000,  0x4000000 },
-    [VIRT_UART0] =    { 0x10000000,      0x100 },
-    [VIRT_VIRTIO] =   { 0x10001000,     0x1000 },
-    [VIRT_DRAM] =     { 0x80000000,        0x0 },
+    [VIRT_DEBUG] =       {        0x0,         0x100 },
+    [VIRT_MROM] =        {     0x1000,       0x11000 },
+    [VIRT_TEST] =        {   0x100000,        0x1000 },
+    [VIRT_CLINT] =       {  0x2000000,       0x10000 },
+    [VIRT_PLIC] =        {  0xc000000,     0x4000000 },
+    [VIRT_UART0] =       { 0x10000000,         0x100 },
+    [VIRT_VIRTIO] =      { 0x10001000,        0x1000 },
+    [VIRT_DRAM] =        { 0x80000000,           0x0 },
 };
 
 static uint64_t load_kernel(const char *kernel_filename)
-- 
2.18.1

WARNING: multiple messages have this Message-ID (diff)
From: Palmer Dabbelt <palmer@sifive.com>
To: qemu-riscv@nongnu.org
Cc: qemu-devel@nongnu.org,
	Alistair Francis <Alistair.Francis@wdc.com>,
	Alistair Francis <alistair.francis@wdc.com>,
	Palmer Dabbelt <palmer@sifive.com>
Subject: [Qemu-riscv] [PULL 02/14] hw/riscv/virt: Adjust memory layout spacing
Date: Fri, 21 Dec 2018 08:02:55 -0800	[thread overview]
Message-ID: <20181221160307.14819-3-palmer@sifive.com> (raw)
In-Reply-To: <20181221160307.14819-1-palmer@sifive.com>

From: Alistair Francis <Alistair.Francis@wdc.com>

Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Logan Gunthorpe <logang@deltatee.com>
Tested-by: Guenter Roeck <linux@roeck-us.net>
Tested-by: Andrea Bolognani <abologna@redhat.com>
Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
---
 hw/riscv/virt.c | 16 ++++++++--------
 1 file changed, 8 insertions(+), 8 deletions(-)

diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c
index 2b38f890702c..6b6fa39aaa38 100644
--- a/hw/riscv/virt.c
+++ b/hw/riscv/virt.c
@@ -47,14 +47,14 @@ static const struct MemmapEntry {
     hwaddr base;
     hwaddr size;
 } virt_memmap[] = {
-    [VIRT_DEBUG] =    {        0x0,      0x100 },
-    [VIRT_MROM] =     {     0x1000,    0x11000 },
-    [VIRT_TEST] =     {   0x100000,     0x1000 },
-    [VIRT_CLINT] =    {  0x2000000,    0x10000 },
-    [VIRT_PLIC] =     {  0xc000000,  0x4000000 },
-    [VIRT_UART0] =    { 0x10000000,      0x100 },
-    [VIRT_VIRTIO] =   { 0x10001000,     0x1000 },
-    [VIRT_DRAM] =     { 0x80000000,        0x0 },
+    [VIRT_DEBUG] =       {        0x0,         0x100 },
+    [VIRT_MROM] =        {     0x1000,       0x11000 },
+    [VIRT_TEST] =        {   0x100000,        0x1000 },
+    [VIRT_CLINT] =       {  0x2000000,       0x10000 },
+    [VIRT_PLIC] =        {  0xc000000,     0x4000000 },
+    [VIRT_UART0] =       { 0x10000000,         0x100 },
+    [VIRT_VIRTIO] =      { 0x10001000,        0x1000 },
+    [VIRT_DRAM] =        { 0x80000000,           0x0 },
 };
 
 static uint64_t load_kernel(const char *kernel_filename)
-- 
2.18.1



  parent reply	other threads:[~2018-12-21 16:03 UTC|newest]

Thread overview: 31+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-12-21 16:02 [Qemu-devel] [PR RFC] RISC-V Changes for 3.2, Part 1 Palmer Dabbelt
2018-12-21 16:02 ` [Qemu-riscv] " Palmer Dabbelt
2018-12-21 16:02 ` [Qemu-devel] [PULL 01/14] hw/riscv/virt: Increase the number of interrupts Palmer Dabbelt
2018-12-21 16:02   ` [Qemu-riscv] " Palmer Dabbelt
2018-12-21 16:02 ` Palmer Dabbelt [this message]
2018-12-21 16:02   ` [Qemu-riscv] [PULL 02/14] hw/riscv/virt: Adjust memory layout spacing Palmer Dabbelt
2018-12-21 16:02 ` [Qemu-devel] [PULL 03/14] hw/riscv/virt: Connect the gpex PCIe Palmer Dabbelt
2018-12-21 16:02   ` [Qemu-riscv] " Palmer Dabbelt
2018-12-21 16:02 ` [Qemu-devel] [PULL 04/14] riscv: Enable VGA and PCIE_VGA Palmer Dabbelt
2018-12-21 16:02   ` [Qemu-riscv] " Palmer Dabbelt
2018-12-21 16:02 ` [Qemu-devel] [PULL 05/14] sifive_u: Add clock DT node for GEM ethernet Palmer Dabbelt
2018-12-21 16:02   ` [Qemu-riscv] " Palmer Dabbelt
2018-12-21 16:02 ` [Qemu-devel] [PULL 06/14] sifive_u: Set 'clock-frequency' DT property for SiFive UART Palmer Dabbelt
2018-12-21 16:02   ` [Qemu-riscv] " Palmer Dabbelt
2018-12-21 16:03 ` [Qemu-devel] [PULL 07/14] RISC-V: Add hartid and \n to interrupt logging Palmer Dabbelt
2018-12-21 16:03   ` [Qemu-riscv] " Palmer Dabbelt
2018-12-21 16:03 ` [Qemu-devel] [PULL 08/14] RISC-V: Fix CLINT timecmp low 32-bit writes Palmer Dabbelt
2018-12-21 16:03   ` [Qemu-riscv] " Palmer Dabbelt
2018-12-21 16:03 ` [Qemu-devel] [PULL 09/14] RISC-V: Fix PLIC pending bitfield reads Palmer Dabbelt
2018-12-21 16:03   ` [Qemu-riscv] " Palmer Dabbelt
2018-12-21 16:03 ` [Qemu-devel] [PULL 10/14] RISC-V: Enable second UART on sifive_e and sifive_u Palmer Dabbelt
2018-12-21 16:03   ` [Qemu-riscv] " Palmer Dabbelt
2018-12-21 16:03 ` [Qemu-devel] [PULL 11/14] sifive_uart: Implement interrupt pending register Palmer Dabbelt
2018-12-21 16:03   ` [Qemu-riscv] " Palmer Dabbelt
2018-12-21 16:03 ` [Qemu-devel] [PULL 12/14] target/riscv/pmp.c: Fix pmp_decode_napot() Palmer Dabbelt
2018-12-21 16:03   ` [Qemu-riscv] " Palmer Dabbelt
2018-12-21 16:03 ` [Qemu-devel] [PULL 13/14] riscv/cpu: use device_class_set_parent_realize Palmer Dabbelt
2018-12-21 16:03   ` [Qemu-riscv] " Palmer Dabbelt
2018-12-21 16:03 ` [Qemu-devel] [PULL 14/14] MAINTAINERS: Mark RISC-V as Supported Palmer Dabbelt
2018-12-21 16:03   ` [Qemu-riscv] " Palmer Dabbelt
2018-12-26 17:19 [Qemu-devel] [PULL] RISC-V Changes for 3.2, Part 1 Palmer Dabbelt
2018-12-26 17:19 ` [Qemu-devel] [PULL 02/14] hw/riscv/virt: Adjust memory layout spacing Palmer Dabbelt

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