* [stericsson:ux500-mcde 4/5] drivers/gpu/drm/mcde/mcde_drv.c:476:2: error: implicit declaration of function 'drm_dev_unref'
@ 2019-01-17 7:25 kbuild test robot
0 siblings, 0 replies; only message in thread
From: kbuild test robot @ 2019-01-17 7:25 UTC (permalink / raw)
To: Linus Walleij; +Cc: kbuild-all, linux-arm-kernel
[-- Attachment #1: Type: text/plain, Size: 9863 bytes --]
tree: https://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson.git ux500-mcde
head: a1691ef3e833e07a35d795dcecc2657ebec6c0d0
commit: e1b6bdaf3729650dc9ce589837dab17eb22444b8 [4/5] drm/mcde: Add new driver for ST-Ericsson MCDE
config: nds32-allyesconfig (attached as .config)
compiler: nds32le-linux-gcc (GCC) 6.4.0
reproduce:
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
git checkout e1b6bdaf3729650dc9ce589837dab17eb22444b8
# save the attached .config to linux build tree
GCC_VERSION=6.4.0 make.cross ARCH=nds32
All error/warnings (new ones prefixed by >>):
drivers/gpu/drm/mcde/mcde_drv.c: In function 'mcde_probe':
>> drivers/gpu/drm/mcde/mcde_drv.c:476:2: error: implicit declaration of function 'drm_dev_unref' [-Werror=implicit-function-declaration]
drm_dev_unref(drm);
^~~~~~~~~~~~~
cc1: some warnings being treated as errors
--
In file included from include/linux/platform_device.h:14:0,
from drivers/gpu/drm/mcde/mcde_dsi.c:2:
drivers/gpu/drm/mcde/mcde_dsi.c: In function 'mcde_dsi_host_transfer':
drivers/gpu/drm/mcde/mcde_dsi.c:571:4: warning: format '%lu' expects argument of type 'long unsigned int', but argument 4 has type 'size_t {aka unsigned int}' [-Wformat=]
"message to channel %d, %lu bytes",
^
include/linux/device.h:1380:22: note: in definition of macro 'dev_fmt'
#define dev_fmt(fmt) fmt
^~~
>> drivers/gpu/drm/mcde/mcde_dsi.c:570:2: note: in expansion of macro 'dev_info'
dev_info(d->dev,
^~~~~~~~
vim +/drm_dev_unref +476 drivers/gpu/drm/mcde/mcde_drv.c
256
257 static int mcde_probe(struct platform_device *pdev)
258 {
259 struct device *dev = &pdev->dev;
260 struct drm_device *drm;
261 struct mcde *mcde;
262 struct component_match *match;
263 struct resource *res;
264 u32 pid;
265 u32 val;
266 int irq;
267 int ret;
268 int i;
269
270 mcde = devm_kzalloc(dev, sizeof(*mcde), GFP_KERNEL);
271 if (!mcde)
272 return -ENOMEM;
273 mcde->dev = dev;
274
275 drm = drm_dev_alloc(&mcde_drm_driver, dev);
276 if (IS_ERR(drm))
277 return PTR_ERR(drm);
278 platform_set_drvdata(pdev, drm);
279 mcde->drm = drm;
280 /* Enable use of the TE signal and interrupt */
281 mcde->te_sync = true;
282 /* Enable continous updates: this is what Linux' framebuffer expects */
283 mcde->oneshot_mode = false;
284 drm->dev_private = mcde;
285
286 /* First obtain and turn on the main power */
287 mcde->epod = devm_regulator_get(dev, "epod");
288 if (IS_ERR(mcde->epod)) {
289 ret = PTR_ERR(mcde->epod);
290 dev_err(dev, "can't get EPOD regulator\n");
291 goto dev_unref;
292 }
293 ret = regulator_enable(mcde->epod);
294 if (ret) {
295 dev_err(dev, "can't enable EPOD regulator\n");
296 goto dev_unref;
297 }
298 mcde->vana = devm_regulator_get(dev, "vana");
299 if (IS_ERR(mcde->vana)) {
300 ret = PTR_ERR(mcde->vana);
301 dev_err(dev, "can't get VANA regulator\n");
302 goto regulator_epod_off;
303 }
304 ret = regulator_enable(mcde->vana);
305 if (ret) {
306 dev_err(dev, "can't enable VANA regulator\n");
307 goto regulator_epod_off;
308 }
309 /* Vendor code uses v-esram34 but we don't, yet */
310
311 /* Clock the silicon so we can access the registers */
312 mcde->mcde_clk = devm_clk_get(dev, "mcde");
313 if (IS_ERR(mcde->mcde_clk)) {
314 dev_err(dev, "unable to get MCDE main clock\n");
315 ret = PTR_ERR(mcde->mcde_clk);
316 goto regulator_off;
317 }
318 ret = clk_prepare_enable(mcde->mcde_clk);
319 if (ret) {
320 dev_err(dev, "failed to enable MCDE main clock\n");
321 goto regulator_off;
322 }
323 dev_info(dev, "MCDE clk rate %lu Hz\n", clk_get_rate(mcde->mcde_clk));
324
325 /* Also retrieve the additional clocks */
326 mcde->dsi0_clk = devm_clk_get(dev, "dsi0");
327 if (IS_ERR(mcde->dsi0_clk)) {
328 dev_err(dev, "unable to get DSI0 clock\n");
329 ret = PTR_ERR(mcde->dsi0_clk);
330 goto clk_disable;
331 }
332 mcde->dsi1_clk = devm_clk_get(dev, "dsi1");
333 if (IS_ERR(mcde->dsi1_clk)) {
334 dev_err(dev, "unable to get DSI1 clock\n");
335 ret = PTR_ERR(mcde->dsi1_clk);
336 goto clk_disable;
337 }
338 /*
339 * ES = Energy Save, or LP = Low Power clocks
340 * These clocks are also used for TV out.
341 */
342 mcde->dsi0es_clk = devm_clk_get(dev, "dsi0es");
343 if (IS_ERR(mcde->dsi0es_clk)) {
344 dev_err(dev, "unable to get DSI0ES clock\n");
345 ret = PTR_ERR(mcde->dsi0es_clk);
346 goto clk_disable;
347 }
348 mcde->dsi1es_clk = devm_clk_get(dev, "dsi1es");
349 if (IS_ERR(mcde->dsi1es_clk)) {
350 dev_err(dev, "unable to get DSI1ES clock\n");
351 ret = PTR_ERR(mcde->dsi1es_clk);
352 goto clk_disable;
353 }
354 mcde->dsi2es_clk = devm_clk_get(dev, "dsi2es");
355 if (IS_ERR(mcde->dsi2es_clk)) {
356 dev_err(dev, "unable to get DSI2ES clock\n");
357 ret = PTR_ERR(mcde->dsi2es_clk);
358 goto clk_disable;
359 }
360 mcde->lcd_clk = devm_clk_get(dev, "lcd");
361 if (IS_ERR(mcde->lcd_clk)) {
362 dev_err(dev, "unable to get LCD clock\n");
363 ret = PTR_ERR(mcde->lcd_clk);
364 goto clk_disable;
365 }
366 mcde->hdmi_clk = devm_clk_get(dev, "hdmi");
367 if (IS_ERR(mcde->hdmi_clk)) {
368 dev_err(dev, "unable to get HDMI clock\n");
369 ret = PTR_ERR(mcde->hdmi_clk);
370 goto clk_disable;
371 }
372
373 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
374 mcde->regs = devm_ioremap_resource(dev, res);
375 if (IS_ERR(mcde->regs)) {
376 dev_err(dev, "no MCDE regs\n");
377 ret = -EINVAL;
378 goto clk_disable;
379 }
380
381 irq = platform_get_irq(pdev, 0);
382 if (!irq) {
383 ret = -EINVAL;
384 goto clk_disable;
385 }
386
387 ret = devm_request_irq(dev, irq, mcde_irq, 0, "mcde", mcde);
388 if (ret) {
389 dev_err(dev, "failed to request irq %d\n", ret);
390 goto clk_disable;
391 }
392
393 /*
394 * Check hardware revision, we only support U8500v2 version
395 * as this was the only version used for mass market deployment,
396 * but surely you can add more versions if you have them and
397 * need them.
398 */
399 pid = readl(mcde->regs + MCDE_PID);
400 dev_info(dev, "found MCDE HW revision %d.%d (dev %d, metal fix %d)\n",
401 (pid & MCDE_PID_MAJOR_VERSION_MASK)
402 >> MCDE_PID_MAJOR_VERSION_SHIFT,
403 (pid & MCDE_PID_MINOR_VERSION_MASK)
404 >> MCDE_PID_MINOR_VERSION_SHIFT,
405 (pid & MCDE_PID_DEVELOPMENT_VERSION_MASK)
406 >> MCDE_PID_DEVELOPMENT_VERSION_SHIFT,
407 (pid & MCDE_PID_METALFIX_VERSION_MASK)
408 >> MCDE_PID_METALFIX_VERSION_SHIFT);
409 if (pid != 0x03000800) {
410 dev_err(dev, "unsupported hardware revision\n");
411 ret = -ENODEV;
412 goto clk_disable;
413 }
414
415 /* Set up the main control, watermark level at 7 */
416 val = 7 << MCDE_CONF0_IFIFOCTRLWTRMRKLVL_SHIFT;
417 /* 24 bits DPI: connect LSB Ch B to D[0:7] */
418 val |= 3 << MCDE_CONF0_OUTMUX0_SHIFT;
419 /* TV out: connect LSB Ch B to D[8:15] */
420 val |= 3 << MCDE_CONF0_OUTMUX1_SHIFT;
421 /* Don't care about this muxing */
422 val |= 0 << MCDE_CONF0_OUTMUX2_SHIFT;
423 /* 24 bits DPI: connect MID Ch B to D[24:31] */
424 val |= 4 << MCDE_CONF0_OUTMUX3_SHIFT;
425 /* 5: 24 bits DPI: connect MSB Ch B to D[32:39] */
426 val |= 5 << MCDE_CONF0_OUTMUX4_SHIFT;
427 /* Syncmux bits zero: DPI channel A and B on output pins A and B resp */
428 writel(val, mcde->regs + MCDE_CONF0);
429
430 /* Enable automatic clock gating */
431 val = readl(mcde->regs + MCDE_CR);
432 val |= MCDE_CR_MCDEEN | MCDE_CR_AUTOCLKG_EN;
433 writel(val, mcde->regs + MCDE_CR);
434
435 /* Clear any pending interrupts */
436 mcde_display_disable_irqs(mcde);
437 writel(0, mcde->regs + MCDE_IMSCERR);
438 writel(0xFFFFFFFF, mcde->regs + MCDE_RISERR);
439
440 /* Spawn child devices for the DSI ports */
441 devm_of_platform_populate(dev);
442
443 /* Create something that will match the subdrivers when we bind */
444 for (i = 0; i < ARRAY_SIZE(mcde_component_drivers); i++) {
445 struct device_driver *drv = &mcde_component_drivers[i]->driver;
446 struct device *p = NULL, *d;
447
448 while ((d = bus_find_device(&platform_bus_type, p, drv,
449 (void *)platform_bus_type.match))) {
450 put_device(p);
451 component_match_add(dev, &match, mcde_compare_dev, d);
452 p = d;
453 }
454 put_device(p);
455 }
456 if (IS_ERR(match)) {
457 dev_err(dev, "could not create component match\n");
458 ret = PTR_ERR(match);
459 goto clk_disable;
460 }
461 ret = component_master_add_with_match(&pdev->dev, &mcde_drm_comp_ops,
462 match);
463 if (ret) {
464 dev_err(dev, "faule to add component master\n");
465 goto clk_disable;
466 }
467 return 0;
468
469 clk_disable:
470 clk_disable_unprepare(mcde->mcde_clk);
471 regulator_off:
472 regulator_disable(mcde->vana);
473 regulator_epod_off:
474 regulator_disable(mcde->epod);
475 dev_unref:
> 476 drm_dev_unref(drm);
477 return ret;
478
---
0-DAY kernel test infrastructure Open Source Technology Center
https://lists.01.org/pipermail/kbuild-all Intel Corporation
[-- Attachment #2: .config.gz --]
[-- Type: application/gzip, Size: 49967 bytes --]
[-- Attachment #3: Type: text/plain, Size: 176 bytes --]
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] only message in thread
only message in thread, other threads:[~2019-01-17 16:04 UTC | newest]
Thread overview: (only message) (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2019-01-17 7:25 [stericsson:ux500-mcde 4/5] drivers/gpu/drm/mcde/mcde_drv.c:476:2: error: implicit declaration of function 'drm_dev_unref' kbuild test robot
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.