* [PATCH 0/3] dma: imx-sdma: add the sdma engine to the imx8mq
@ 2019-01-20 1:58 ` Angus Ainslie (Purism)
0 siblings, 0 replies; 14+ messages in thread
From: Angus Ainslie (Purism) @ 2019-01-20 1:58 UTC (permalink / raw)
To: angus
Cc: Vinod Koul, dmaengine, NXP Linux Team, Pengutronix Kernel Team,
linux-arm-kernel, linux-kernel
Add sdma support for the imx8mq
Angus Ainslie (Purism) (3):
dma: imx-sdma: fix NULL pointer de-reference
dma: imx-sdma: add clock ratio 1:1 check
imx8mq.dtsi: add the sdma nodes
.../devicetree/bindings/dma/fsl-imx-sdma.txt | 2 +-
arch/arm64/boot/dts/freescale/imx8mq.dtsi | 31 ++++++++++++++++
drivers/dma/imx-sdma.c | 37 +++++++++++++------
3 files changed, 57 insertions(+), 13 deletions(-)
--
2.17.1
^ permalink raw reply [flat|nested] 14+ messages in thread
* [PATCH 0/3] dma: imx-sdma: add the sdma engine to the imx8mq
@ 2019-01-20 1:58 ` Angus Ainslie (Purism)
0 siblings, 0 replies; 14+ messages in thread
From: Angus Ainslie (Purism) @ 2019-01-20 1:58 UTC (permalink / raw)
To: angus
Cc: linux-kernel, Vinod Koul, NXP Linux Team,
Pengutronix Kernel Team, dmaengine, linux-arm-kernel
Add sdma support for the imx8mq
Angus Ainslie (Purism) (3):
dma: imx-sdma: fix NULL pointer de-reference
dma: imx-sdma: add clock ratio 1:1 check
imx8mq.dtsi: add the sdma nodes
.../devicetree/bindings/dma/fsl-imx-sdma.txt | 2 +-
arch/arm64/boot/dts/freescale/imx8mq.dtsi | 31 ++++++++++++++++
drivers/dma/imx-sdma.c | 37 +++++++++++++------
3 files changed, 57 insertions(+), 13 deletions(-)
--
2.17.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 14+ messages in thread
* [1/3] dma: imx-sdma: fix NULL pointer de-reference
2019-01-20 1:58 ` Angus Ainslie (Purism)
(?)
@ 2019-01-20 1:58 ` Angus Ainslie (Purism)
-1 siblings, 0 replies; 14+ messages in thread
From: Angus Ainslie @ 2019-01-20 1:58 UTC (permalink / raw)
To: angus
Cc: Vinod Koul, dmaengine, NXP Linux Team, Pengutronix Kernel Team,
linux-arm-kernel, linux-kernel
On the imx8mq I get NULL pointer de-deference errors if the device
isn't passed in during allocation.
Signed-off-by: Angus Ainslie (Purism) <angus@akkea.ca>
---
drivers/dma/imx-sdma.c | 17 +++++++++--------
1 file changed, 9 insertions(+), 8 deletions(-)
diff --git a/drivers/dma/imx-sdma.c b/drivers/dma/imx-sdma.c
index 86708fb9bda1..064bc50d1e99 100644
--- a/drivers/dma/imx-sdma.c
+++ b/drivers/dma/imx-sdma.c
@@ -677,7 +677,7 @@ static int sdma_load_script(struct sdma_engine *sdma, void *buf, int size,
int ret;
unsigned long flags;
- buf_virt = dma_alloc_coherent(NULL, size, &buf_phys, GFP_KERNEL);
+ buf_virt = dma_alloc_coherent(sdma->dev, size, &buf_phys, GFP_KERNEL);
if (!buf_virt) {
return -ENOMEM;
}
@@ -696,7 +696,7 @@ static int sdma_load_script(struct sdma_engine *sdma, void *buf, int size,
spin_unlock_irqrestore(&sdma->channel_0_lock, flags);
- dma_free_coherent(NULL, size, buf_virt, buf_phys);
+ dma_free_coherent(sdma->dev, size, buf_virt, buf_phys);
return ret;
}
@@ -1182,8 +1182,8 @@ static int sdma_request_channel0(struct sdma_engine *sdma)
{
int ret = -EBUSY;
- sdma->bd0 = dma_alloc_coherent(NULL, PAGE_SIZE, &sdma->bd0_phys,
- GFP_NOWAIT);
+ sdma->bd0 = dma_zalloc_coherent(sdma->dev, PAGE_SIZE, &sdma->bd0_phys,
+ GFP_NOWAIT);
if (!sdma->bd0) {
ret = -ENOMEM;
goto out;
@@ -1205,8 +1205,8 @@ static int sdma_alloc_bd(struct sdma_desc *desc)
u32 bd_size = desc->num_bd * sizeof(struct sdma_buffer_descriptor);
int ret = 0;
- desc->bd = dma_alloc_coherent(NULL, bd_size, &desc->bd_phys,
- GFP_NOWAIT);
+ desc->bd = dma_zalloc_coherent(desc->sdmac->sdma->dev, bd_size,
+ &desc->bd_phys, GFP_NOWAIT);
if (!desc->bd) {
ret = -ENOMEM;
goto out;
@@ -1219,7 +1219,8 @@ static void sdma_free_bd(struct sdma_desc *desc)
{
u32 bd_size = desc->num_bd * sizeof(struct sdma_buffer_descriptor);
- dma_free_coherent(NULL, bd_size, desc->bd, desc->bd_phys);
+ dma_free_coherent(desc->sdmac->sdma->dev, bd_size, desc->bd,
+ desc->bd_phys);
}
static void sdma_desc_free(struct virt_dma_desc *vd)
@@ -1842,7 +1843,7 @@ static int sdma_init(struct sdma_engine *sdma)
/* Be sure SDMA has not started yet */
writel_relaxed(0, sdma->regs + SDMA_H_C0PTR);
- sdma->channel_control = dma_alloc_coherent(NULL,
+ sdma->channel_control = dma_alloc_coherent(sdma->dev,
MAX_DMA_CHANNELS * sizeof (struct sdma_channel_control) +
sizeof(struct sdma_context_data),
&ccb_phys, GFP_KERNEL);
^ permalink raw reply related [flat|nested] 14+ messages in thread
* [PATCH 1/3] dma: imx-sdma: fix NULL pointer de-reference
@ 2019-01-20 1:58 ` Angus Ainslie (Purism)
0 siblings, 0 replies; 14+ messages in thread
From: Angus Ainslie (Purism) @ 2019-01-20 1:58 UTC (permalink / raw)
To: angus
Cc: Vinod Koul, dmaengine, NXP Linux Team, Pengutronix Kernel Team,
linux-arm-kernel, linux-kernel
On the imx8mq I get NULL pointer de-deference errors if the device
isn't passed in during allocation.
Signed-off-by: Angus Ainslie (Purism) <angus@akkea.ca>
---
drivers/dma/imx-sdma.c | 17 +++++++++--------
1 file changed, 9 insertions(+), 8 deletions(-)
diff --git a/drivers/dma/imx-sdma.c b/drivers/dma/imx-sdma.c
index 86708fb9bda1..064bc50d1e99 100644
--- a/drivers/dma/imx-sdma.c
+++ b/drivers/dma/imx-sdma.c
@@ -677,7 +677,7 @@ static int sdma_load_script(struct sdma_engine *sdma, void *buf, int size,
int ret;
unsigned long flags;
- buf_virt = dma_alloc_coherent(NULL, size, &buf_phys, GFP_KERNEL);
+ buf_virt = dma_alloc_coherent(sdma->dev, size, &buf_phys, GFP_KERNEL);
if (!buf_virt) {
return -ENOMEM;
}
@@ -696,7 +696,7 @@ static int sdma_load_script(struct sdma_engine *sdma, void *buf, int size,
spin_unlock_irqrestore(&sdma->channel_0_lock, flags);
- dma_free_coherent(NULL, size, buf_virt, buf_phys);
+ dma_free_coherent(sdma->dev, size, buf_virt, buf_phys);
return ret;
}
@@ -1182,8 +1182,8 @@ static int sdma_request_channel0(struct sdma_engine *sdma)
{
int ret = -EBUSY;
- sdma->bd0 = dma_alloc_coherent(NULL, PAGE_SIZE, &sdma->bd0_phys,
- GFP_NOWAIT);
+ sdma->bd0 = dma_zalloc_coherent(sdma->dev, PAGE_SIZE, &sdma->bd0_phys,
+ GFP_NOWAIT);
if (!sdma->bd0) {
ret = -ENOMEM;
goto out;
@@ -1205,8 +1205,8 @@ static int sdma_alloc_bd(struct sdma_desc *desc)
u32 bd_size = desc->num_bd * sizeof(struct sdma_buffer_descriptor);
int ret = 0;
- desc->bd = dma_alloc_coherent(NULL, bd_size, &desc->bd_phys,
- GFP_NOWAIT);
+ desc->bd = dma_zalloc_coherent(desc->sdmac->sdma->dev, bd_size,
+ &desc->bd_phys, GFP_NOWAIT);
if (!desc->bd) {
ret = -ENOMEM;
goto out;
@@ -1219,7 +1219,8 @@ static void sdma_free_bd(struct sdma_desc *desc)
{
u32 bd_size = desc->num_bd * sizeof(struct sdma_buffer_descriptor);
- dma_free_coherent(NULL, bd_size, desc->bd, desc->bd_phys);
+ dma_free_coherent(desc->sdmac->sdma->dev, bd_size, desc->bd,
+ desc->bd_phys);
}
static void sdma_desc_free(struct virt_dma_desc *vd)
@@ -1842,7 +1843,7 @@ static int sdma_init(struct sdma_engine *sdma)
/* Be sure SDMA has not started yet */
writel_relaxed(0, sdma->regs + SDMA_H_C0PTR);
- sdma->channel_control = dma_alloc_coherent(NULL,
+ sdma->channel_control = dma_alloc_coherent(sdma->dev,
MAX_DMA_CHANNELS * sizeof (struct sdma_channel_control) +
sizeof(struct sdma_context_data),
&ccb_phys, GFP_KERNEL);
--
2.17.1
^ permalink raw reply related [flat|nested] 14+ messages in thread
* [PATCH 1/3] dma: imx-sdma: fix NULL pointer de-reference
@ 2019-01-20 1:58 ` Angus Ainslie (Purism)
0 siblings, 0 replies; 14+ messages in thread
From: Angus Ainslie (Purism) @ 2019-01-20 1:58 UTC (permalink / raw)
To: angus
Cc: linux-kernel, Vinod Koul, NXP Linux Team,
Pengutronix Kernel Team, dmaengine, linux-arm-kernel
On the imx8mq I get NULL pointer de-deference errors if the device
isn't passed in during allocation.
Signed-off-by: Angus Ainslie (Purism) <angus@akkea.ca>
---
drivers/dma/imx-sdma.c | 17 +++++++++--------
1 file changed, 9 insertions(+), 8 deletions(-)
diff --git a/drivers/dma/imx-sdma.c b/drivers/dma/imx-sdma.c
index 86708fb9bda1..064bc50d1e99 100644
--- a/drivers/dma/imx-sdma.c
+++ b/drivers/dma/imx-sdma.c
@@ -677,7 +677,7 @@ static int sdma_load_script(struct sdma_engine *sdma, void *buf, int size,
int ret;
unsigned long flags;
- buf_virt = dma_alloc_coherent(NULL, size, &buf_phys, GFP_KERNEL);
+ buf_virt = dma_alloc_coherent(sdma->dev, size, &buf_phys, GFP_KERNEL);
if (!buf_virt) {
return -ENOMEM;
}
@@ -696,7 +696,7 @@ static int sdma_load_script(struct sdma_engine *sdma, void *buf, int size,
spin_unlock_irqrestore(&sdma->channel_0_lock, flags);
- dma_free_coherent(NULL, size, buf_virt, buf_phys);
+ dma_free_coherent(sdma->dev, size, buf_virt, buf_phys);
return ret;
}
@@ -1182,8 +1182,8 @@ static int sdma_request_channel0(struct sdma_engine *sdma)
{
int ret = -EBUSY;
- sdma->bd0 = dma_alloc_coherent(NULL, PAGE_SIZE, &sdma->bd0_phys,
- GFP_NOWAIT);
+ sdma->bd0 = dma_zalloc_coherent(sdma->dev, PAGE_SIZE, &sdma->bd0_phys,
+ GFP_NOWAIT);
if (!sdma->bd0) {
ret = -ENOMEM;
goto out;
@@ -1205,8 +1205,8 @@ static int sdma_alloc_bd(struct sdma_desc *desc)
u32 bd_size = desc->num_bd * sizeof(struct sdma_buffer_descriptor);
int ret = 0;
- desc->bd = dma_alloc_coherent(NULL, bd_size, &desc->bd_phys,
- GFP_NOWAIT);
+ desc->bd = dma_zalloc_coherent(desc->sdmac->sdma->dev, bd_size,
+ &desc->bd_phys, GFP_NOWAIT);
if (!desc->bd) {
ret = -ENOMEM;
goto out;
@@ -1219,7 +1219,8 @@ static void sdma_free_bd(struct sdma_desc *desc)
{
u32 bd_size = desc->num_bd * sizeof(struct sdma_buffer_descriptor);
- dma_free_coherent(NULL, bd_size, desc->bd, desc->bd_phys);
+ dma_free_coherent(desc->sdmac->sdma->dev, bd_size, desc->bd,
+ desc->bd_phys);
}
static void sdma_desc_free(struct virt_dma_desc *vd)
@@ -1842,7 +1843,7 @@ static int sdma_init(struct sdma_engine *sdma)
/* Be sure SDMA has not started yet */
writel_relaxed(0, sdma->regs + SDMA_H_C0PTR);
- sdma->channel_control = dma_alloc_coherent(NULL,
+ sdma->channel_control = dma_alloc_coherent(sdma->dev,
MAX_DMA_CHANNELS * sizeof (struct sdma_channel_control) +
sizeof(struct sdma_context_data),
&ccb_phys, GFP_KERNEL);
--
2.17.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 14+ messages in thread
* [2/3] dma: imx-sdma: add clock ratio 1:1 check
2019-01-20 1:58 ` Angus Ainslie (Purism)
(?)
@ 2019-01-20 1:58 ` Angus Ainslie (Purism)
-1 siblings, 0 replies; 14+ messages in thread
From: Angus Ainslie @ 2019-01-20 1:58 UTC (permalink / raw)
To: angus
Cc: Vinod Koul, dmaengine, NXP Linux Team, Pengutronix Kernel Team,
linux-arm-kernel, linux-kernel
On i.mx8 mscale B0 chip, AHB/SDMA clock ratio 2:1 can't be supportted,
since SDMA clock ratio has to be increased to 250Mhz, AHB can't reach
to 500Mhz, so use 1:1 instead.
based on NXP commit MLK-16841-1
Signed-off-by: Angus Ainslie (Purism) <angus@akkea.ca>
---
.../devicetree/bindings/dma/fsl-imx-sdma.txt | 2 +-
drivers/dma/imx-sdma.c | 20 +++++++++++++++----
2 files changed, 17 insertions(+), 5 deletions(-)
diff --git a/Documentation/devicetree/bindings/dma/fsl-imx-sdma.txt b/Documentation/devicetree/bindings/dma/fsl-imx-sdma.txt
index 3c9a57a8443b..b3fbac401bd0 100644
--- a/Documentation/devicetree/bindings/dma/fsl-imx-sdma.txt
+++ b/Documentation/devicetree/bindings/dma/fsl-imx-sdma.txt
@@ -67,7 +67,7 @@ Optional properties:
reg is the GPR register offset.
shift is the bit position inside the GPR register.
val is the value of the bit (0 or 1).
-
+- fsl,ratio-1-1: AHB/SDMA core clock ration 1:1, 2:1 without this.
Examples:
sdma@83fb0000 {
diff --git a/drivers/dma/imx-sdma.c b/drivers/dma/imx-sdma.c
index 064bc50d1e99..616ffd6b301e 100644
--- a/drivers/dma/imx-sdma.c
+++ b/drivers/dma/imx-sdma.c
@@ -440,6 +440,8 @@ struct sdma_engine {
unsigned int irq;
dma_addr_t bd0_phys;
struct sdma_buffer_descriptor *bd0;
+ /* clock ratio for AHB:SDMA core. 1:1 is 1, 2:1 is 0*/
+ bool clk_ratio;
};
static int sdma_config_write(struct dma_chan *chan,
@@ -662,8 +664,14 @@ static int sdma_run_channel0(struct sdma_engine *sdma)
dev_err(sdma->dev, "Timeout waiting for CH0 ready\n");
/* Set bits of CONFIG register with dynamic context switching */
- if (readl(sdma->regs + SDMA_H_CONFIG) == 0)
- writel_relaxed(SDMA_H_CONFIG_CSM, sdma->regs + SDMA_H_CONFIG);
+ if (readl(sdma->regs + SDMA_H_CONFIG) == 0) {
+ if (sdma->clk_ratio)
+ reg = SDMA_H_CONFIG_CSM | SDMA_H_CONFIG_ACR;
+ else
+ reg = SDMA_H_CONFIG_CSM;
+
+ writel_relaxed(reg, sdma->regs + SDMA_H_CONFIG);
+ }
return ret;
}
@@ -1880,8 +1888,10 @@ static int sdma_init(struct sdma_engine *sdma)
writel_relaxed(0x4050, sdma->regs + SDMA_CHN0ADDR);
/* Set bits of CONFIG register but with static context switching */
- /* FIXME: Check whether to set ACR bit depending on clock ratios */
- writel_relaxed(0, sdma->regs + SDMA_H_CONFIG);
+ if (sdma->clk_ratio)
+ writel_relaxed(SDMA_H_CONFIG_ACR, sdma->regs + SDMA_H_CONFIG);
+ else
+ writel_relaxed(0, sdma->regs + SDMA_H_CONFIG);
writel_relaxed(ccb_phys, sdma->regs + SDMA_H_C0PTR);
@@ -1975,6 +1985,8 @@ static int sdma_probe(struct platform_device *pdev)
if (!sdma)
return -ENOMEM;
+ sdma->clk_ratio = of_property_read_bool(np, "fsl,ratio-1-1");
+
spin_lock_init(&sdma->channel_0_lock);
sdma->dev = &pdev->dev;
^ permalink raw reply related [flat|nested] 14+ messages in thread
* [PATCH 2/3] dma: imx-sdma: add clock ratio 1:1 check
@ 2019-01-20 1:58 ` Angus Ainslie (Purism)
0 siblings, 0 replies; 14+ messages in thread
From: Angus Ainslie (Purism) @ 2019-01-20 1:58 UTC (permalink / raw)
To: angus
Cc: Vinod Koul, dmaengine, NXP Linux Team, Pengutronix Kernel Team,
linux-arm-kernel, linux-kernel
On i.mx8 mscale B0 chip, AHB/SDMA clock ratio 2:1 can't be supportted,
since SDMA clock ratio has to be increased to 250Mhz, AHB can't reach
to 500Mhz, so use 1:1 instead.
based on NXP commit MLK-16841-1
Signed-off-by: Angus Ainslie (Purism) <angus@akkea.ca>
---
.../devicetree/bindings/dma/fsl-imx-sdma.txt | 2 +-
drivers/dma/imx-sdma.c | 20 +++++++++++++++----
2 files changed, 17 insertions(+), 5 deletions(-)
diff --git a/Documentation/devicetree/bindings/dma/fsl-imx-sdma.txt b/Documentation/devicetree/bindings/dma/fsl-imx-sdma.txt
index 3c9a57a8443b..b3fbac401bd0 100644
--- a/Documentation/devicetree/bindings/dma/fsl-imx-sdma.txt
+++ b/Documentation/devicetree/bindings/dma/fsl-imx-sdma.txt
@@ -67,7 +67,7 @@ Optional properties:
reg is the GPR register offset.
shift is the bit position inside the GPR register.
val is the value of the bit (0 or 1).
-
+- fsl,ratio-1-1: AHB/SDMA core clock ration 1:1, 2:1 without this.
Examples:
sdma@83fb0000 {
diff --git a/drivers/dma/imx-sdma.c b/drivers/dma/imx-sdma.c
index 064bc50d1e99..616ffd6b301e 100644
--- a/drivers/dma/imx-sdma.c
+++ b/drivers/dma/imx-sdma.c
@@ -440,6 +440,8 @@ struct sdma_engine {
unsigned int irq;
dma_addr_t bd0_phys;
struct sdma_buffer_descriptor *bd0;
+ /* clock ratio for AHB:SDMA core. 1:1 is 1, 2:1 is 0*/
+ bool clk_ratio;
};
static int sdma_config_write(struct dma_chan *chan,
@@ -662,8 +664,14 @@ static int sdma_run_channel0(struct sdma_engine *sdma)
dev_err(sdma->dev, "Timeout waiting for CH0 ready\n");
/* Set bits of CONFIG register with dynamic context switching */
- if (readl(sdma->regs + SDMA_H_CONFIG) == 0)
- writel_relaxed(SDMA_H_CONFIG_CSM, sdma->regs + SDMA_H_CONFIG);
+ if (readl(sdma->regs + SDMA_H_CONFIG) == 0) {
+ if (sdma->clk_ratio)
+ reg = SDMA_H_CONFIG_CSM | SDMA_H_CONFIG_ACR;
+ else
+ reg = SDMA_H_CONFIG_CSM;
+
+ writel_relaxed(reg, sdma->regs + SDMA_H_CONFIG);
+ }
return ret;
}
@@ -1880,8 +1888,10 @@ static int sdma_init(struct sdma_engine *sdma)
writel_relaxed(0x4050, sdma->regs + SDMA_CHN0ADDR);
/* Set bits of CONFIG register but with static context switching */
- /* FIXME: Check whether to set ACR bit depending on clock ratios */
- writel_relaxed(0, sdma->regs + SDMA_H_CONFIG);
+ if (sdma->clk_ratio)
+ writel_relaxed(SDMA_H_CONFIG_ACR, sdma->regs + SDMA_H_CONFIG);
+ else
+ writel_relaxed(0, sdma->regs + SDMA_H_CONFIG);
writel_relaxed(ccb_phys, sdma->regs + SDMA_H_C0PTR);
@@ -1975,6 +1985,8 @@ static int sdma_probe(struct platform_device *pdev)
if (!sdma)
return -ENOMEM;
+ sdma->clk_ratio = of_property_read_bool(np, "fsl,ratio-1-1");
+
spin_lock_init(&sdma->channel_0_lock);
sdma->dev = &pdev->dev;
--
2.17.1
^ permalink raw reply related [flat|nested] 14+ messages in thread
* [PATCH 2/3] dma: imx-sdma: add clock ratio 1:1 check
@ 2019-01-20 1:58 ` Angus Ainslie (Purism)
0 siblings, 0 replies; 14+ messages in thread
From: Angus Ainslie (Purism) @ 2019-01-20 1:58 UTC (permalink / raw)
To: angus
Cc: linux-kernel, Vinod Koul, NXP Linux Team,
Pengutronix Kernel Team, dmaengine, linux-arm-kernel
On i.mx8 mscale B0 chip, AHB/SDMA clock ratio 2:1 can't be supportted,
since SDMA clock ratio has to be increased to 250Mhz, AHB can't reach
to 500Mhz, so use 1:1 instead.
based on NXP commit MLK-16841-1
Signed-off-by: Angus Ainslie (Purism) <angus@akkea.ca>
---
.../devicetree/bindings/dma/fsl-imx-sdma.txt | 2 +-
drivers/dma/imx-sdma.c | 20 +++++++++++++++----
2 files changed, 17 insertions(+), 5 deletions(-)
diff --git a/Documentation/devicetree/bindings/dma/fsl-imx-sdma.txt b/Documentation/devicetree/bindings/dma/fsl-imx-sdma.txt
index 3c9a57a8443b..b3fbac401bd0 100644
--- a/Documentation/devicetree/bindings/dma/fsl-imx-sdma.txt
+++ b/Documentation/devicetree/bindings/dma/fsl-imx-sdma.txt
@@ -67,7 +67,7 @@ Optional properties:
reg is the GPR register offset.
shift is the bit position inside the GPR register.
val is the value of the bit (0 or 1).
-
+- fsl,ratio-1-1: AHB/SDMA core clock ration 1:1, 2:1 without this.
Examples:
sdma@83fb0000 {
diff --git a/drivers/dma/imx-sdma.c b/drivers/dma/imx-sdma.c
index 064bc50d1e99..616ffd6b301e 100644
--- a/drivers/dma/imx-sdma.c
+++ b/drivers/dma/imx-sdma.c
@@ -440,6 +440,8 @@ struct sdma_engine {
unsigned int irq;
dma_addr_t bd0_phys;
struct sdma_buffer_descriptor *bd0;
+ /* clock ratio for AHB:SDMA core. 1:1 is 1, 2:1 is 0*/
+ bool clk_ratio;
};
static int sdma_config_write(struct dma_chan *chan,
@@ -662,8 +664,14 @@ static int sdma_run_channel0(struct sdma_engine *sdma)
dev_err(sdma->dev, "Timeout waiting for CH0 ready\n");
/* Set bits of CONFIG register with dynamic context switching */
- if (readl(sdma->regs + SDMA_H_CONFIG) == 0)
- writel_relaxed(SDMA_H_CONFIG_CSM, sdma->regs + SDMA_H_CONFIG);
+ if (readl(sdma->regs + SDMA_H_CONFIG) == 0) {
+ if (sdma->clk_ratio)
+ reg = SDMA_H_CONFIG_CSM | SDMA_H_CONFIG_ACR;
+ else
+ reg = SDMA_H_CONFIG_CSM;
+
+ writel_relaxed(reg, sdma->regs + SDMA_H_CONFIG);
+ }
return ret;
}
@@ -1880,8 +1888,10 @@ static int sdma_init(struct sdma_engine *sdma)
writel_relaxed(0x4050, sdma->regs + SDMA_CHN0ADDR);
/* Set bits of CONFIG register but with static context switching */
- /* FIXME: Check whether to set ACR bit depending on clock ratios */
- writel_relaxed(0, sdma->regs + SDMA_H_CONFIG);
+ if (sdma->clk_ratio)
+ writel_relaxed(SDMA_H_CONFIG_ACR, sdma->regs + SDMA_H_CONFIG);
+ else
+ writel_relaxed(0, sdma->regs + SDMA_H_CONFIG);
writel_relaxed(ccb_phys, sdma->regs + SDMA_H_C0PTR);
@@ -1975,6 +1985,8 @@ static int sdma_probe(struct platform_device *pdev)
if (!sdma)
return -ENOMEM;
+ sdma->clk_ratio = of_property_read_bool(np, "fsl,ratio-1-1");
+
spin_lock_init(&sdma->channel_0_lock);
sdma->dev = &pdev->dev;
--
2.17.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 14+ messages in thread
* [3/3] imx8mq.dtsi: add the sdma nodes
2019-01-20 1:58 ` Angus Ainslie (Purism)
(?)
@ 2019-01-20 1:58 ` Angus Ainslie (Purism)
-1 siblings, 0 replies; 14+ messages in thread
From: Angus Ainslie @ 2019-01-20 1:58 UTC (permalink / raw)
To: angus
Cc: Vinod Koul, dmaengine, NXP Linux Team, Pengutronix Kernel Team,
linux-arm-kernel, linux-kernel
Add the sdma nodes to the base devicetree for the imx8mq
Signed-off-by: Angus Ainslie (Purism) <angus@akkea.ca>
---
arch/arm64/boot/dts/freescale/imx8mq.dtsi | 31 +++++++++++++++++++++++
1 file changed, 31 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
index c0402375e7c1..0b9a9b5ae7b7 100644
--- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
@@ -336,6 +336,19 @@
clocks = <&clk IMX8MQ_CLK_WDOG3_ROOT>;
status = "disabled";
};
+
+ sdma2: sdma@302c0000 {
+ compatible = "fsl,imx8mq-sdma", "fsl,imx7d-sdma";
+ reg = <0x302c0000 0x10000>;
+ interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk IMX8MQ_CLK_SDMA2_ROOT>,
+ <&clk IMX8MQ_CLK_SDMA2_ROOT>;
+ clock-names = "ipg", "ahb";
+ #dma-cells = <3>;
+ fsl,sdma-ram-script-name = "imx/sdma/sdma-imx7d.bin";
+ fsl,ratio-1-1;
+ status = "disabled";
+ };
};
bus@30400000 { /* AIPS2 */
@@ -370,6 +383,8 @@
clocks = <&clk IMX8MQ_CLK_UART3_ROOT>,
<&clk IMX8MQ_CLK_UART3_ROOT>;
clock-names = "ipg", "per";
+ dmas = <&sdma1 26 4 0>, <&sdma1 27 4 0>;
+ dma-names = "rx", "tx";
status = "disabled";
};
@@ -381,6 +396,8 @@
clocks = <&clk IMX8MQ_CLK_UART2_ROOT>,
<&clk IMX8MQ_CLK_UART2_ROOT>;
clock-names = "ipg", "per";
+ dmas = <&sdma1 24 4 0>, <&sdma1 25 4 0>;
+ dma-names = "rx", "tx";
status = "disabled";
};
@@ -432,6 +449,8 @@
clocks = <&clk IMX8MQ_CLK_UART4_ROOT>,
<&clk IMX8MQ_CLK_UART4_ROOT>;
clock-names = "ipg", "per";
+ dmas = <&sdma1 28 4 0>, <&sdma1 29 4 0>;
+ dma-names = "rx", "tx";
status = "disabled";
};
@@ -465,6 +484,18 @@
status = "disabled";
};
+ sdma1: sdma@30bd0000 {
+ compatible = "fsl,imx8mq-sdma", "fsl,imx7d-sdma";
+ reg = <0x30bd0000 0x10000>;
+ interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk IMX8MQ_CLK_SDMA1_ROOT>,
+ <&clk IMX8MQ_CLK_SDMA1_ROOT>;
+ clock-names = "ipg", "ahb";
+ #dma-cells = <3>;
+ fsl,sdma-ram-script-name = "imx/sdma/sdma-imx7d.bin";
+ status = "disabled";
+ };
+
fec1: ethernet@30be0000 {
compatible = "fsl,imx8mq-fec", "fsl,imx6sx-fec";
reg = <0x30be0000 0x10000>;
^ permalink raw reply related [flat|nested] 14+ messages in thread
* [PATCH 3/3] imx8mq.dtsi: add the sdma nodes
@ 2019-01-20 1:58 ` Angus Ainslie (Purism)
0 siblings, 0 replies; 14+ messages in thread
From: Angus Ainslie (Purism) @ 2019-01-20 1:58 UTC (permalink / raw)
To: angus
Cc: Vinod Koul, dmaengine, NXP Linux Team, Pengutronix Kernel Team,
linux-arm-kernel, linux-kernel
Add the sdma nodes to the base devicetree for the imx8mq
Signed-off-by: Angus Ainslie (Purism) <angus@akkea.ca>
---
arch/arm64/boot/dts/freescale/imx8mq.dtsi | 31 +++++++++++++++++++++++
1 file changed, 31 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
index c0402375e7c1..0b9a9b5ae7b7 100644
--- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
@@ -336,6 +336,19 @@
clocks = <&clk IMX8MQ_CLK_WDOG3_ROOT>;
status = "disabled";
};
+
+ sdma2: sdma@302c0000 {
+ compatible = "fsl,imx8mq-sdma", "fsl,imx7d-sdma";
+ reg = <0x302c0000 0x10000>;
+ interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk IMX8MQ_CLK_SDMA2_ROOT>,
+ <&clk IMX8MQ_CLK_SDMA2_ROOT>;
+ clock-names = "ipg", "ahb";
+ #dma-cells = <3>;
+ fsl,sdma-ram-script-name = "imx/sdma/sdma-imx7d.bin";
+ fsl,ratio-1-1;
+ status = "disabled";
+ };
};
bus@30400000 { /* AIPS2 */
@@ -370,6 +383,8 @@
clocks = <&clk IMX8MQ_CLK_UART3_ROOT>,
<&clk IMX8MQ_CLK_UART3_ROOT>;
clock-names = "ipg", "per";
+ dmas = <&sdma1 26 4 0>, <&sdma1 27 4 0>;
+ dma-names = "rx", "tx";
status = "disabled";
};
@@ -381,6 +396,8 @@
clocks = <&clk IMX8MQ_CLK_UART2_ROOT>,
<&clk IMX8MQ_CLK_UART2_ROOT>;
clock-names = "ipg", "per";
+ dmas = <&sdma1 24 4 0>, <&sdma1 25 4 0>;
+ dma-names = "rx", "tx";
status = "disabled";
};
@@ -432,6 +449,8 @@
clocks = <&clk IMX8MQ_CLK_UART4_ROOT>,
<&clk IMX8MQ_CLK_UART4_ROOT>;
clock-names = "ipg", "per";
+ dmas = <&sdma1 28 4 0>, <&sdma1 29 4 0>;
+ dma-names = "rx", "tx";
status = "disabled";
};
@@ -465,6 +484,18 @@
status = "disabled";
};
+ sdma1: sdma@30bd0000 {
+ compatible = "fsl,imx8mq-sdma", "fsl,imx7d-sdma";
+ reg = <0x30bd0000 0x10000>;
+ interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk IMX8MQ_CLK_SDMA1_ROOT>,
+ <&clk IMX8MQ_CLK_SDMA1_ROOT>;
+ clock-names = "ipg", "ahb";
+ #dma-cells = <3>;
+ fsl,sdma-ram-script-name = "imx/sdma/sdma-imx7d.bin";
+ status = "disabled";
+ };
+
fec1: ethernet@30be0000 {
compatible = "fsl,imx8mq-fec", "fsl,imx6sx-fec";
reg = <0x30be0000 0x10000>;
--
2.17.1
^ permalink raw reply related [flat|nested] 14+ messages in thread
* [PATCH 3/3] imx8mq.dtsi: add the sdma nodes
@ 2019-01-20 1:58 ` Angus Ainslie (Purism)
0 siblings, 0 replies; 14+ messages in thread
From: Angus Ainslie (Purism) @ 2019-01-20 1:58 UTC (permalink / raw)
To: angus
Cc: linux-kernel, Vinod Koul, NXP Linux Team,
Pengutronix Kernel Team, dmaengine, linux-arm-kernel
Add the sdma nodes to the base devicetree for the imx8mq
Signed-off-by: Angus Ainslie (Purism) <angus@akkea.ca>
---
arch/arm64/boot/dts/freescale/imx8mq.dtsi | 31 +++++++++++++++++++++++
1 file changed, 31 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
index c0402375e7c1..0b9a9b5ae7b7 100644
--- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
@@ -336,6 +336,19 @@
clocks = <&clk IMX8MQ_CLK_WDOG3_ROOT>;
status = "disabled";
};
+
+ sdma2: sdma@302c0000 {
+ compatible = "fsl,imx8mq-sdma", "fsl,imx7d-sdma";
+ reg = <0x302c0000 0x10000>;
+ interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk IMX8MQ_CLK_SDMA2_ROOT>,
+ <&clk IMX8MQ_CLK_SDMA2_ROOT>;
+ clock-names = "ipg", "ahb";
+ #dma-cells = <3>;
+ fsl,sdma-ram-script-name = "imx/sdma/sdma-imx7d.bin";
+ fsl,ratio-1-1;
+ status = "disabled";
+ };
};
bus@30400000 { /* AIPS2 */
@@ -370,6 +383,8 @@
clocks = <&clk IMX8MQ_CLK_UART3_ROOT>,
<&clk IMX8MQ_CLK_UART3_ROOT>;
clock-names = "ipg", "per";
+ dmas = <&sdma1 26 4 0>, <&sdma1 27 4 0>;
+ dma-names = "rx", "tx";
status = "disabled";
};
@@ -381,6 +396,8 @@
clocks = <&clk IMX8MQ_CLK_UART2_ROOT>,
<&clk IMX8MQ_CLK_UART2_ROOT>;
clock-names = "ipg", "per";
+ dmas = <&sdma1 24 4 0>, <&sdma1 25 4 0>;
+ dma-names = "rx", "tx";
status = "disabled";
};
@@ -432,6 +449,8 @@
clocks = <&clk IMX8MQ_CLK_UART4_ROOT>,
<&clk IMX8MQ_CLK_UART4_ROOT>;
clock-names = "ipg", "per";
+ dmas = <&sdma1 28 4 0>, <&sdma1 29 4 0>;
+ dma-names = "rx", "tx";
status = "disabled";
};
@@ -465,6 +484,18 @@
status = "disabled";
};
+ sdma1: sdma@30bd0000 {
+ compatible = "fsl,imx8mq-sdma", "fsl,imx7d-sdma";
+ reg = <0x30bd0000 0x10000>;
+ interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk IMX8MQ_CLK_SDMA1_ROOT>,
+ <&clk IMX8MQ_CLK_SDMA1_ROOT>;
+ clock-names = "ipg", "ahb";
+ #dma-cells = <3>;
+ fsl,sdma-ram-script-name = "imx/sdma/sdma-imx7d.bin";
+ status = "disabled";
+ };
+
fec1: ethernet@30be0000 {
compatible = "fsl,imx8mq-fec", "fsl,imx6sx-fec";
reg = <0x30be0000 0x10000>;
--
2.17.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 14+ messages in thread
* [3/3] imx8mq.dtsi: add the sdma nodes
2019-01-20 1:58 ` Angus Ainslie (Purism)
(?)
@ 2019-02-22 19:44 ` Daniel Baluta
-1 siblings, 0 replies; 14+ messages in thread
From: Daniel Baluta @ 2019-02-22 19:44 UTC (permalink / raw)
To: Angus Ainslie (Purism)
Cc: Vinod Koul, dmaengine, NXP Linux Team, Pengutronix Kernel Team,
linux-arm-kernel, Linux Kernel Mailing List, Daniel Baluta,
Shawn Guo
Hi Angus,
What is the status of this patch? Most likely this should go through
Shwan's tree.
I noticed that I have also sent a similar patch to Shawn:
https://www.spinics.net/lists/arm-kernel/msg708424.html
So, lets coordinate and work better on this.
I am now preparing another series where I add SAI nodes and enable WM
codec on imx8MQ.
If you don't mind I will pick your relevant changes from this patch
and add them to my series, then send them to Shawn.
thanks,
Daniel.
On Sun, Jan 20, 2019 at 4:05 AM Angus Ainslie (Purism) <angus@akkea.ca> wrote:
>
> Add the sdma nodes to the base devicetree for the imx8mq
>
> Signed-off-by: Angus Ainslie (Purism) <angus@akkea.ca>
> ---
> arch/arm64/boot/dts/freescale/imx8mq.dtsi | 31 +++++++++++++++++++++++
> 1 file changed, 31 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
> index c0402375e7c1..0b9a9b5ae7b7 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
> @@ -336,6 +336,19 @@
> clocks = <&clk IMX8MQ_CLK_WDOG3_ROOT>;
> status = "disabled";
> };
> +
> + sdma2: sdma@302c0000 {
> + compatible = "fsl,imx8mq-sdma", "fsl,imx7d-sdma";
> + reg = <0x302c0000 0x10000>;
> + interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&clk IMX8MQ_CLK_SDMA2_ROOT>,
> + <&clk IMX8MQ_CLK_SDMA2_ROOT>;
> + clock-names = "ipg", "ahb";
> + #dma-cells = <3>;
> + fsl,sdma-ram-script-name = "imx/sdma/sdma-imx7d.bin";
> + fsl,ratio-1-1;
> + status = "disabled";
> + };
> };
>
> bus@30400000 { /* AIPS2 */
> @@ -370,6 +383,8 @@
> clocks = <&clk IMX8MQ_CLK_UART3_ROOT>,
> <&clk IMX8MQ_CLK_UART3_ROOT>;
> clock-names = "ipg", "per";
> + dmas = <&sdma1 26 4 0>, <&sdma1 27 4 0>;
> + dma-names = "rx", "tx";
> status = "disabled";
> };
>
> @@ -381,6 +396,8 @@
> clocks = <&clk IMX8MQ_CLK_UART2_ROOT>,
> <&clk IMX8MQ_CLK_UART2_ROOT>;
> clock-names = "ipg", "per";
> + dmas = <&sdma1 24 4 0>, <&sdma1 25 4 0>;
> + dma-names = "rx", "tx";
> status = "disabled";
> };
>
> @@ -432,6 +449,8 @@
> clocks = <&clk IMX8MQ_CLK_UART4_ROOT>,
> <&clk IMX8MQ_CLK_UART4_ROOT>;
> clock-names = "ipg", "per";
> + dmas = <&sdma1 28 4 0>, <&sdma1 29 4 0>;
> + dma-names = "rx", "tx";
> status = "disabled";
> };
>
> @@ -465,6 +484,18 @@
> status = "disabled";
> };
>
> + sdma1: sdma@30bd0000 {
> + compatible = "fsl,imx8mq-sdma", "fsl,imx7d-sdma";
> + reg = <0x30bd0000 0x10000>;
> + interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&clk IMX8MQ_CLK_SDMA1_ROOT>,
> + <&clk IMX8MQ_CLK_SDMA1_ROOT>;
> + clock-names = "ipg", "ahb";
> + #dma-cells = <3>;
> + fsl,sdma-ram-script-name = "imx/sdma/sdma-imx7d.bin";
> + status = "disabled";
> + };
> +
> fec1: ethernet@30be0000 {
> compatible = "fsl,imx8mq-fec", "fsl,imx6sx-fec";
> reg = <0x30be0000 0x10000>;
> --
> 2.17.1
>
^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH 3/3] imx8mq.dtsi: add the sdma nodes
@ 2019-02-22 19:44 ` Daniel Baluta
0 siblings, 0 replies; 14+ messages in thread
From: Daniel Baluta @ 2019-02-22 19:44 UTC (permalink / raw)
To: Angus Ainslie (Purism)
Cc: Vinod Koul, dmaengine, NXP Linux Team, Pengutronix Kernel Team,
linux-arm-kernel, Linux Kernel Mailing List, Daniel Baluta,
Shawn Guo
Hi Angus,
What is the status of this patch? Most likely this should go through
Shwan's tree.
I noticed that I have also sent a similar patch to Shawn:
https://www.spinics.net/lists/arm-kernel/msg708424.html
So, lets coordinate and work better on this.
I am now preparing another series where I add SAI nodes and enable WM
codec on imx8MQ.
If you don't mind I will pick your relevant changes from this patch
and add them to my series, then send them to Shawn.
thanks,
Daniel.
On Sun, Jan 20, 2019 at 4:05 AM Angus Ainslie (Purism) <angus@akkea.ca> wrote:
>
> Add the sdma nodes to the base devicetree for the imx8mq
>
> Signed-off-by: Angus Ainslie (Purism) <angus@akkea.ca>
> ---
> arch/arm64/boot/dts/freescale/imx8mq.dtsi | 31 +++++++++++++++++++++++
> 1 file changed, 31 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
> index c0402375e7c1..0b9a9b5ae7b7 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
> @@ -336,6 +336,19 @@
> clocks = <&clk IMX8MQ_CLK_WDOG3_ROOT>;
> status = "disabled";
> };
> +
> + sdma2: sdma@302c0000 {
> + compatible = "fsl,imx8mq-sdma", "fsl,imx7d-sdma";
> + reg = <0x302c0000 0x10000>;
> + interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&clk IMX8MQ_CLK_SDMA2_ROOT>,
> + <&clk IMX8MQ_CLK_SDMA2_ROOT>;
> + clock-names = "ipg", "ahb";
> + #dma-cells = <3>;
> + fsl,sdma-ram-script-name = "imx/sdma/sdma-imx7d.bin";
> + fsl,ratio-1-1;
> + status = "disabled";
> + };
> };
>
> bus@30400000 { /* AIPS2 */
> @@ -370,6 +383,8 @@
> clocks = <&clk IMX8MQ_CLK_UART3_ROOT>,
> <&clk IMX8MQ_CLK_UART3_ROOT>;
> clock-names = "ipg", "per";
> + dmas = <&sdma1 26 4 0>, <&sdma1 27 4 0>;
> + dma-names = "rx", "tx";
> status = "disabled";
> };
>
> @@ -381,6 +396,8 @@
> clocks = <&clk IMX8MQ_CLK_UART2_ROOT>,
> <&clk IMX8MQ_CLK_UART2_ROOT>;
> clock-names = "ipg", "per";
> + dmas = <&sdma1 24 4 0>, <&sdma1 25 4 0>;
> + dma-names = "rx", "tx";
> status = "disabled";
> };
>
> @@ -432,6 +449,8 @@
> clocks = <&clk IMX8MQ_CLK_UART4_ROOT>,
> <&clk IMX8MQ_CLK_UART4_ROOT>;
> clock-names = "ipg", "per";
> + dmas = <&sdma1 28 4 0>, <&sdma1 29 4 0>;
> + dma-names = "rx", "tx";
> status = "disabled";
> };
>
> @@ -465,6 +484,18 @@
> status = "disabled";
> };
>
> + sdma1: sdma@30bd0000 {
> + compatible = "fsl,imx8mq-sdma", "fsl,imx7d-sdma";
> + reg = <0x30bd0000 0x10000>;
> + interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&clk IMX8MQ_CLK_SDMA1_ROOT>,
> + <&clk IMX8MQ_CLK_SDMA1_ROOT>;
> + clock-names = "ipg", "ahb";
> + #dma-cells = <3>;
> + fsl,sdma-ram-script-name = "imx/sdma/sdma-imx7d.bin";
> + status = "disabled";
> + };
> +
> fec1: ethernet@30be0000 {
> compatible = "fsl,imx8mq-fec", "fsl,imx6sx-fec";
> reg = <0x30be0000 0x10000>;
> --
> 2.17.1
>
^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH 3/3] imx8mq.dtsi: add the sdma nodes
@ 2019-02-22 19:44 ` Daniel Baluta
0 siblings, 0 replies; 14+ messages in thread
From: Daniel Baluta @ 2019-02-22 19:44 UTC (permalink / raw)
To: Angus Ainslie (Purism)
Cc: Shawn Guo, Linux Kernel Mailing List, Vinod Koul, NXP Linux Team,
Pengutronix Kernel Team, dmaengine, Daniel Baluta,
linux-arm-kernel
Hi Angus,
What is the status of this patch? Most likely this should go through
Shwan's tree.
I noticed that I have also sent a similar patch to Shawn:
https://www.spinics.net/lists/arm-kernel/msg708424.html
So, lets coordinate and work better on this.
I am now preparing another series where I add SAI nodes and enable WM
codec on imx8MQ.
If you don't mind I will pick your relevant changes from this patch
and add them to my series, then send them to Shawn.
thanks,
Daniel.
On Sun, Jan 20, 2019 at 4:05 AM Angus Ainslie (Purism) <angus@akkea.ca> wrote:
>
> Add the sdma nodes to the base devicetree for the imx8mq
>
> Signed-off-by: Angus Ainslie (Purism) <angus@akkea.ca>
> ---
> arch/arm64/boot/dts/freescale/imx8mq.dtsi | 31 +++++++++++++++++++++++
> 1 file changed, 31 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
> index c0402375e7c1..0b9a9b5ae7b7 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
> @@ -336,6 +336,19 @@
> clocks = <&clk IMX8MQ_CLK_WDOG3_ROOT>;
> status = "disabled";
> };
> +
> + sdma2: sdma@302c0000 {
> + compatible = "fsl,imx8mq-sdma", "fsl,imx7d-sdma";
> + reg = <0x302c0000 0x10000>;
> + interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&clk IMX8MQ_CLK_SDMA2_ROOT>,
> + <&clk IMX8MQ_CLK_SDMA2_ROOT>;
> + clock-names = "ipg", "ahb";
> + #dma-cells = <3>;
> + fsl,sdma-ram-script-name = "imx/sdma/sdma-imx7d.bin";
> + fsl,ratio-1-1;
> + status = "disabled";
> + };
> };
>
> bus@30400000 { /* AIPS2 */
> @@ -370,6 +383,8 @@
> clocks = <&clk IMX8MQ_CLK_UART3_ROOT>,
> <&clk IMX8MQ_CLK_UART3_ROOT>;
> clock-names = "ipg", "per";
> + dmas = <&sdma1 26 4 0>, <&sdma1 27 4 0>;
> + dma-names = "rx", "tx";
> status = "disabled";
> };
>
> @@ -381,6 +396,8 @@
> clocks = <&clk IMX8MQ_CLK_UART2_ROOT>,
> <&clk IMX8MQ_CLK_UART2_ROOT>;
> clock-names = "ipg", "per";
> + dmas = <&sdma1 24 4 0>, <&sdma1 25 4 0>;
> + dma-names = "rx", "tx";
> status = "disabled";
> };
>
> @@ -432,6 +449,8 @@
> clocks = <&clk IMX8MQ_CLK_UART4_ROOT>,
> <&clk IMX8MQ_CLK_UART4_ROOT>;
> clock-names = "ipg", "per";
> + dmas = <&sdma1 28 4 0>, <&sdma1 29 4 0>;
> + dma-names = "rx", "tx";
> status = "disabled";
> };
>
> @@ -465,6 +484,18 @@
> status = "disabled";
> };
>
> + sdma1: sdma@30bd0000 {
> + compatible = "fsl,imx8mq-sdma", "fsl,imx7d-sdma";
> + reg = <0x30bd0000 0x10000>;
> + interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&clk IMX8MQ_CLK_SDMA1_ROOT>,
> + <&clk IMX8MQ_CLK_SDMA1_ROOT>;
> + clock-names = "ipg", "ahb";
> + #dma-cells = <3>;
> + fsl,sdma-ram-script-name = "imx/sdma/sdma-imx7d.bin";
> + status = "disabled";
> + };
> +
> fec1: ethernet@30be0000 {
> compatible = "fsl,imx8mq-fec", "fsl,imx6sx-fec";
> reg = <0x30be0000 0x10000>;
> --
> 2.17.1
>
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^ permalink raw reply [flat|nested] 14+ messages in thread
end of thread, other threads:[~2019-02-22 19:45 UTC | newest]
Thread overview: 14+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2019-01-20 1:58 [PATCH 0/3] dma: imx-sdma: add the sdma engine to the imx8mq Angus Ainslie (Purism)
2019-01-20 1:58 ` Angus Ainslie (Purism)
2019-01-20 1:58 [1/3] dma: imx-sdma: fix NULL pointer de-reference Angus Ainslie
2019-01-20 1:58 ` [PATCH 1/3] " Angus Ainslie (Purism)
2019-01-20 1:58 ` Angus Ainslie (Purism)
2019-01-20 1:58 [2/3] dma: imx-sdma: add clock ratio 1:1 check Angus Ainslie
2019-01-20 1:58 ` [PATCH 2/3] " Angus Ainslie (Purism)
2019-01-20 1:58 ` Angus Ainslie (Purism)
2019-01-20 1:58 [3/3] imx8mq.dtsi: add the sdma nodes Angus Ainslie
2019-01-20 1:58 ` [PATCH 3/3] " Angus Ainslie (Purism)
2019-01-20 1:58 ` Angus Ainslie (Purism)
2019-02-22 19:44 [3/3] " Daniel Baluta
2019-02-22 19:44 ` [PATCH 3/3] " Daniel Baluta
2019-02-22 19:44 ` Daniel Baluta
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