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From: Jagan Teki <jagan@amarulasolutions.com>
To: Yong Deng <yong.deng@magewell.com>,
	Mauro Carvalho Chehab <mchehab@kernel.org>,
	Maxime Ripard <maxime.ripard@bootlin.com>,
	Chen-Yu Tsai <wens@csie.org>, Rob Herring <robh+dt@kernel.org>,
	Mark Rutland <mark.rutland@arm.com>
Cc: linux-media@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org,
	Michael Trimarchi <michael@amarulasolutions.com>,
	linux-amarula@amarulasolutions.com, devicetree@vger.kernel.org,
	linux-sunxi@googlegroups.com,
	Jagan Teki <jagan@amarulasolutions.com>
Subject: [PATCH v7 3/5] arm64: dts: allwinner: a64: Add A64 CSI controller
Date: Thu, 24 Jan 2019 23:37:34 +0530	[thread overview]
Message-ID: <20190124180736.28408-4-jagan@amarulasolutions.com> (raw)
In-Reply-To: <20190124180736.28408-1-jagan@amarulasolutions.com>

Add dts node details for Allwinner A64 CSI controller.

A64 CSI has similar features as like in H3, but the CSI_SCLK
need to update it to 300MHz than default clock rate.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
---
 arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 20 +++++++++++++++++++
 1 file changed, 20 insertions(+)

diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
index 839b2ae88583..62fdf850e9e5 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
@@ -558,6 +558,12 @@
 			interrupt-controller;
 			#interrupt-cells = <3>;
 
+			csi_pins: csi-pins {
+				pins = "PE0", "PE2", "PE3", "PE4", "PE5", "PE6",
+				       "PE7", "PE8", "PE9", "PE10", "PE11";
+				function = "csi";
+			};
+
 			i2c0_pins: i2c0_pins {
 				pins = "PH0", "PH1";
 				function = "i2c0";
@@ -925,6 +931,20 @@
 			status = "disabled";
 		};
 
+		csi: csi@1cb0000 {
+			compatible = "allwinner,sun50i-a64-csi";
+			reg = <0x01cb0000 0x1000>;
+			interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&ccu CLK_BUS_CSI>,
+				 <&ccu CLK_CSI_SCLK>,
+				 <&ccu CLK_DRAM_CSI>;
+			clock-names = "bus", "mod", "ram";
+			resets = <&ccu RST_BUS_CSI>;
+			pinctrl-names = "default";
+			pinctrl-0 = <&csi_pins>;
+			status = "disabled";
+		};
+
 		hdmi: hdmi@1ee0000 {
 			compatible = "allwinner,sun50i-a64-dw-hdmi",
 				     "allwinner,sun8i-a83t-dw-hdmi";
-- 
2.18.0.321.gffc6fa0e3


WARNING: multiple messages have this Message-ID (diff)
From: Jagan Teki <jagan@amarulasolutions.com>
To: Yong Deng <yong.deng@magewell.com>,
	Mauro Carvalho Chehab <mchehab@kernel.org>,
	Maxime Ripard <maxime.ripard@bootlin.com>,
	Chen-Yu Tsai <wens@csie.org>, Rob Herring <robh+dt@kernel.org>,
	Mark Rutland <mark.rutland@arm.com>
Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-sunxi@googlegroups.com,
	Jagan Teki <jagan@amarulasolutions.com>,
	Michael Trimarchi <michael@amarulasolutions.com>,
	linux-amarula@amarulasolutions.com,
	linux-arm-kernel@lists.infradead.org,
	linux-media@vger.kernel.org
Subject: [PATCH v7 3/5] arm64: dts: allwinner: a64: Add A64 CSI controller
Date: Thu, 24 Jan 2019 23:37:34 +0530	[thread overview]
Message-ID: <20190124180736.28408-4-jagan@amarulasolutions.com> (raw)
In-Reply-To: <20190124180736.28408-1-jagan@amarulasolutions.com>

Add dts node details for Allwinner A64 CSI controller.

A64 CSI has similar features as like in H3, but the CSI_SCLK
need to update it to 300MHz than default clock rate.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
---
 arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 20 +++++++++++++++++++
 1 file changed, 20 insertions(+)

diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
index 839b2ae88583..62fdf850e9e5 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
@@ -558,6 +558,12 @@
 			interrupt-controller;
 			#interrupt-cells = <3>;
 
+			csi_pins: csi-pins {
+				pins = "PE0", "PE2", "PE3", "PE4", "PE5", "PE6",
+				       "PE7", "PE8", "PE9", "PE10", "PE11";
+				function = "csi";
+			};
+
 			i2c0_pins: i2c0_pins {
 				pins = "PH0", "PH1";
 				function = "i2c0";
@@ -925,6 +931,20 @@
 			status = "disabled";
 		};
 
+		csi: csi@1cb0000 {
+			compatible = "allwinner,sun50i-a64-csi";
+			reg = <0x01cb0000 0x1000>;
+			interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&ccu CLK_BUS_CSI>,
+				 <&ccu CLK_CSI_SCLK>,
+				 <&ccu CLK_DRAM_CSI>;
+			clock-names = "bus", "mod", "ram";
+			resets = <&ccu RST_BUS_CSI>;
+			pinctrl-names = "default";
+			pinctrl-0 = <&csi_pins>;
+			status = "disabled";
+		};
+
 		hdmi: hdmi@1ee0000 {
 			compatible = "allwinner,sun50i-a64-dw-hdmi",
 				     "allwinner,sun8i-a83t-dw-hdmi";
-- 
2.18.0.321.gffc6fa0e3


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  parent reply	other threads:[~2019-01-24 18:08 UTC|newest]

Thread overview: 25+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-01-24 18:07 [PATCH v7 0/5] media/sun6i: Allwinner A64 CSI support Jagan Teki
2019-01-24 18:07 ` Jagan Teki
2019-01-24 18:07 ` Jagan Teki
2019-01-24 18:07 ` [PATCH v7 1/5] dt-bindings: media: sun6i: Add A64 CSI compatible Jagan Teki
2019-01-24 18:07   ` Jagan Teki
2019-01-25 15:41   ` Maxime Ripard
2019-01-25 15:41     ` Maxime Ripard
2019-01-25 15:41     ` Maxime Ripard
2019-01-24 18:07 ` [PATCH v7 2/5] media: sun6i: Add A64 CSI block support Jagan Teki
2019-01-24 18:07   ` Jagan Teki
2019-01-25 15:42   ` Maxime Ripard
2019-01-25 15:42     ` Maxime Ripard
2019-01-25 15:42     ` Maxime Ripard
2019-01-28  7:31     ` Jagan Teki
2019-01-28  7:31       ` Jagan Teki
2019-01-24 18:07 ` Jagan Teki [this message]
2019-01-24 18:07   ` [PATCH v7 3/5] arm64: dts: allwinner: a64: Add A64 CSI controller Jagan Teki
2019-01-25 15:43   ` Maxime Ripard
2019-01-25 15:43     ` Maxime Ripard
2019-01-25 15:43     ` Maxime Ripard
2019-01-24 18:07 ` [PATCH v7 4/5] arm64: dts: allwinner: a64: Add pinmux setting for CSI MCLK on PE1 Jagan Teki
2019-01-24 18:07   ` Jagan Teki
2019-01-24 18:07 ` [DO NOT MERGE] [PATCH v7 5/5] arm64: dts: allwinner: bananapi-m64: Add HDF5640 camera module Jagan Teki
2019-01-24 18:07   ` Jagan Teki
2019-01-24 18:07   ` Jagan Teki

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