From: "Z.q. Hou" <zhiqiang.hou@nxp.com> To: "linux-pci@vger.kernel.org" <linux-pci@vger.kernel.org>, "linux-arm-kernel@lists.infradead.org" <linux-arm-kernel@lists.infradead.org>, "devicetree@vger.kernel.org" <devicetree@vger.kernel.org>, "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>, "bhelgaas@google.com" <bhelgaas@google.com>, "robh+dt@kernel.org" <robh+dt@kernel.org>, "mark.rutland@arm.com" <mark.rutland@arm.com>, "l.subrahmanya@mobiveil.co.in" <l.subrahmanya@mobiveil.co.in>, "shawnguo@kernel.org" <shawnguo@kernel.org>, Leo Li <leoyang.li@nxp.com>, "lorenzo.pieralisi@arm.com" <lorenzo.pieralisi@arm.com>, "catalin.marinas@arm.com" <catalin.marinas@arm.com>, "will.deacon@arm.com" <will.deacon@arm.com> Cc: Mingkai Hu <mingkai.hu@nxp.com>, "M.h. Lian" <minghuan.lian@nxp.com>, Xiaowei Bao <xiaowei.bao@nxp.com>, "Z.q. Hou" <zhiqiang.hou@nxp.com> Subject: [PATCHv3 10/27] PCI: mobiveil: fix the INTx process error Date: Tue, 29 Jan 2019 08:09:32 +0000 [thread overview] Message-ID: <20190129080926.36773-11-Zhiqiang.Hou@nxp.com> (raw) In-Reply-To: <20190129080926.36773-1-Zhiqiang.Hou@nxp.com> From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> In the loop block, there is not code change the loop key, this patch updated the loop key by re-read the INTx status register. This patch also change to clear the handled INTx status. Note: Need MV to test this fix. Fixes: 9af6bcb11e12 ("PCI: mobiveil: Add Mobiveil PCIe Host Bridge IP driver") Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Minghuan Lian <Minghuan.Lian@nxp.com> --- V3: - No change drivers/pci/controller/pcie-mobiveil.c | 13 +++++++++---- 1 file changed, 9 insertions(+), 4 deletions(-) diff --git a/drivers/pci/controller/pcie-mobiveil.c b/drivers/pci/controller/pcie-mobiveil.c index 4ba458474e42..78e575e71f4d 100644 --- a/drivers/pci/controller/pcie-mobiveil.c +++ b/drivers/pci/controller/pcie-mobiveil.c @@ -361,6 +361,7 @@ static void mobiveil_pcie_isr(struct irq_desc *desc) /* Handle INTx */ if (intr_status & PAB_INTP_INTX_MASK) { shifted_status = csr_readl(pcie, PAB_INTP_AMBA_MISC_STAT); + shifted_status &= PAB_INTP_INTX_MASK; shifted_status >>= PAB_INTX_START; do { for_each_set_bit(bit, &shifted_status, PCI_NUM_INTX) { @@ -372,12 +373,16 @@ static void mobiveil_pcie_isr(struct irq_desc *desc) dev_err_ratelimited(dev, "unexpected IRQ, INT%d\n", bit); - /* clear interrupt */ - csr_writel(pcie, - shifted_status << PAB_INTX_START, + /* clear interrupt handled */ + csr_writel(pcie, 1 << (PAB_INTX_START + bit), PAB_INTP_AMBA_MISC_STAT); } - } while ((shifted_status >> PAB_INTX_START) != 0); + + shifted_status = csr_readl(pcie, + PAB_INTP_AMBA_MISC_STAT); + shifted_status &= PAB_INTP_INTX_MASK; + shifted_status >>= PAB_INTX_START; + } while (shifted_status != 0); } /* read extra MSI status register */ -- 2.17.1
WARNING: multiple messages have this Message-ID (diff)
From: "Z.q. Hou" <zhiqiang.hou@nxp.com> To: "linux-pci@vger.kernel.org" <linux-pci@vger.kernel.org>, "linux-arm-kernel@lists.infradead.org" <linux-arm-kernel@lists.infradead.org>, "devicetree@vger.kernel.org" <devicetree@vger.kernel.org>, "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>, "bhelgaas@google.com" <bhelgaas@google.com>, "robh+dt@kernel.org" <robh+dt@kernel.org>, "mark.rutland@arm.com" <mark.rutland@arm.com>, "l.subrahmanya@mobiveil.co.in" <l.subrahmanya@mobiveil.co.in>, "shawnguo@kernel.org" <shawnguo@kernel.org>, Leo Li <leoyang.li@nxp.com>, "lorenzo.pieralisi@arm.com" <lorenzo.pieralisi@arm.com>, "catalin.marinas@arm.com" <catalin.marinas@arm.com>, "will.deacon@arm.com" <will.deacon@arm.com> Cc: "M.h. Lian" <minghuan.lian@nxp.com>, "Z.q. Hou" <zhiqiang.hou@nxp.com>, Xiaowei Bao <xiaowei.bao@nxp.com>, Mingkai Hu <mingkai.hu@nxp.com> Subject: [PATCHv3 10/27] PCI: mobiveil: fix the INTx process error Date: Tue, 29 Jan 2019 08:09:32 +0000 [thread overview] Message-ID: <20190129080926.36773-11-Zhiqiang.Hou@nxp.com> (raw) In-Reply-To: <20190129080926.36773-1-Zhiqiang.Hou@nxp.com> From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> In the loop block, there is not code change the loop key, this patch updated the loop key by re-read the INTx status register. This patch also change to clear the handled INTx status. Note: Need MV to test this fix. Fixes: 9af6bcb11e12 ("PCI: mobiveil: Add Mobiveil PCIe Host Bridge IP driver") Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Minghuan Lian <Minghuan.Lian@nxp.com> --- V3: - No change drivers/pci/controller/pcie-mobiveil.c | 13 +++++++++---- 1 file changed, 9 insertions(+), 4 deletions(-) diff --git a/drivers/pci/controller/pcie-mobiveil.c b/drivers/pci/controller/pcie-mobiveil.c index 4ba458474e42..78e575e71f4d 100644 --- a/drivers/pci/controller/pcie-mobiveil.c +++ b/drivers/pci/controller/pcie-mobiveil.c @@ -361,6 +361,7 @@ static void mobiveil_pcie_isr(struct irq_desc *desc) /* Handle INTx */ if (intr_status & PAB_INTP_INTX_MASK) { shifted_status = csr_readl(pcie, PAB_INTP_AMBA_MISC_STAT); + shifted_status &= PAB_INTP_INTX_MASK; shifted_status >>= PAB_INTX_START; do { for_each_set_bit(bit, &shifted_status, PCI_NUM_INTX) { @@ -372,12 +373,16 @@ static void mobiveil_pcie_isr(struct irq_desc *desc) dev_err_ratelimited(dev, "unexpected IRQ, INT%d\n", bit); - /* clear interrupt */ - csr_writel(pcie, - shifted_status << PAB_INTX_START, + /* clear interrupt handled */ + csr_writel(pcie, 1 << (PAB_INTX_START + bit), PAB_INTP_AMBA_MISC_STAT); } - } while ((shifted_status >> PAB_INTX_START) != 0); + + shifted_status = csr_readl(pcie, + PAB_INTP_AMBA_MISC_STAT); + shifted_status &= PAB_INTP_INTX_MASK; + shifted_status >>= PAB_INTX_START; + } while (shifted_status != 0); } /* read extra MSI status register */ -- 2.17.1 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2019-01-29 8:11 UTC|newest] Thread overview: 203+ messages / expand[flat|nested] mbox.gz Atom feed top 2019-01-29 8:08 [PATCHv3 00/27] PCI: refactor Mobiveil driver and add PCIe Gen4 driver for NXP Layerscape SoCs Z.q. Hou 2019-01-29 8:08 ` Z.q. Hou 2019-01-29 8:08 ` Z.q. Hou 2019-01-29 8:08 ` [PATCHv3 01/27] PCI: mobiveil: uniform the register accessors Z.q. Hou 2019-01-29 8:08 ` Z.q. Hou 2019-01-29 8:08 ` Z.q. Hou 2019-02-05 5:39 ` Subrahmanya Lingappa 2019-02-05 5:39 ` Subrahmanya Lingappa 2019-02-05 5:39 ` Subrahmanya Lingappa 2019-02-05 17:43 ` Lorenzo Pieralisi 2019-02-05 17:43 ` Lorenzo Pieralisi 2019-02-05 17:43 ` Lorenzo Pieralisi 2019-02-06 10:59 ` Subrahmanya Lingappa 2019-02-06 10:59 ` Subrahmanya Lingappa 2019-02-06 10:59 ` Subrahmanya Lingappa 2019-01-29 8:08 ` [PATCHv3 02/27] PCI: mobiveil: format the code without function change Z.q. Hou 2019-01-29 8:08 ` Z.q. Hou 2019-01-29 8:08 ` Z.q. Hou 2019-02-05 5:48 ` Subrahmanya Lingappa 2019-02-05 5:48 ` Subrahmanya Lingappa 2019-02-05 5:48 ` Subrahmanya Lingappa 2019-02-18 7:03 ` Z.q. Hou 2019-02-18 7:03 ` Z.q. Hou 2019-01-29 8:08 ` [PATCHv3 03/27] PCI: mobiveil: correct the returned error number Z.q. Hou 2019-01-29 8:08 ` Z.q. Hou 2019-01-29 8:08 ` Z.q. Hou 2019-02-05 5:53 ` Subrahmanya Lingappa 2019-02-05 5:53 ` Subrahmanya Lingappa 2019-02-05 5:53 ` Subrahmanya Lingappa 2019-01-29 8:08 ` [PATCHv3 04/27] PCI: mobiveil: remove flag MSI_FLAG_MULTI_PCI_MSI Z.q. Hou 2019-01-29 8:08 ` Z.q. Hou 2019-01-29 8:08 ` Z.q. Hou 2019-02-05 6:05 ` Subrahmanya Lingappa 2019-02-05 6:05 ` Subrahmanya Lingappa 2019-02-05 6:05 ` Subrahmanya Lingappa 2019-02-18 7:03 ` Z.q. Hou 2019-02-18 7:03 ` Z.q. Hou 2019-02-18 7:03 ` Z.q. Hou 2019-01-29 8:09 ` [PATCHv3 05/27] PCI: mobiveil: correct PCI base address in MEM/IO outbound windows Z.q. Hou 2019-01-29 8:09 ` Z.q. Hou 2019-01-29 8:09 ` Z.q. Hou 2019-02-05 6:06 ` Subrahmanya Lingappa 2019-02-05 6:06 ` Subrahmanya Lingappa 2019-02-05 6:06 ` Subrahmanya Lingappa 2019-01-29 8:09 ` [PATCHv3 06/27] PCI: mobiveil: replace the resource list iteration function Z.q. Hou 2019-01-29 8:09 ` Z.q. Hou 2019-01-29 8:09 ` Z.q. Hou 2019-02-05 6:07 ` Subrahmanya Lingappa 2019-02-05 6:07 ` Subrahmanya Lingappa 2019-02-05 6:07 ` Subrahmanya Lingappa 2019-01-29 8:09 ` [PATCHv3 07/27] PCI: mobiveil: use WIN_NUM_0 explicitly for CFG outbound window Z.q. Hou 2019-01-29 8:09 ` Z.q. Hou 2019-01-29 8:09 ` Z.q. Hou 2019-02-05 6:08 ` Subrahmanya Lingappa 2019-02-05 6:08 ` Subrahmanya Lingappa 2019-02-05 6:08 ` Subrahmanya Lingappa 2019-01-29 8:09 ` [PATCHv3 08/27] PCI: mobiveil: use the 1st inbound window for MEM inbound transactions Z.q. Hou 2019-01-29 8:09 ` Z.q. Hou 2019-01-29 8:09 ` Z.q. Hou 2019-02-05 6:08 ` Subrahmanya Lingappa 2019-02-05 6:08 ` Subrahmanya Lingappa 2019-02-05 6:08 ` Subrahmanya Lingappa 2019-01-29 8:09 ` [PATCHv3 09/27] PCI: mobiveil: correct inbound/outbound window setup routines Z.q. Hou 2019-01-29 8:09 ` Z.q. Hou 2019-01-29 8:09 ` Z.q. Hou 2019-02-05 6:10 ` Subrahmanya Lingappa 2019-02-05 6:10 ` Subrahmanya Lingappa 2019-02-05 6:10 ` Subrahmanya Lingappa 2019-02-18 7:07 ` Z.q. Hou 2019-02-18 7:07 ` Z.q. Hou 2019-01-29 8:09 ` Z.q. Hou [this message] 2019-01-29 8:09 ` [PATCHv3 10/27] PCI: mobiveil: fix the INTx process error Z.q. Hou 2019-01-29 8:09 ` Z.q. Hou 2019-02-05 6:11 ` Subrahmanya Lingappa 2019-02-05 6:11 ` Subrahmanya Lingappa 2019-02-05 6:11 ` Subrahmanya Lingappa 2019-01-29 8:09 ` [PATCHv3 11/27] PCI: mobiveil: only fix up the Class Code field Z.q. Hou 2019-01-29 8:09 ` Z.q. Hou 2019-01-29 8:09 ` Z.q. Hou 2019-02-05 6:11 ` Subrahmanya Lingappa 2019-02-05 6:11 ` Subrahmanya Lingappa 2019-02-05 6:11 ` Subrahmanya Lingappa 2019-01-29 8:09 ` [PATCHv3 12/27] PCI: mobiveil: move out the link up waiting from mobiveil_host_init Z.q. Hou 2019-01-29 8:09 ` Z.q. Hou 2019-01-29 8:09 ` Z.q. Hou 2019-02-05 6:12 ` Subrahmanya Lingappa 2019-02-05 6:12 ` Subrahmanya Lingappa 2019-02-05 6:12 ` Subrahmanya Lingappa 2019-01-29 8:09 ` [PATCHv3 13/27] PCI: mobiveil: move irq chained handler setup out of DT parse Z.q. Hou 2019-01-29 8:09 ` Z.q. Hou 2019-01-29 8:09 ` Z.q. Hou 2019-02-08 12:30 ` Subrahmanya Lingappa 2019-02-08 12:30 ` Subrahmanya Lingappa 2019-02-08 12:30 ` Subrahmanya Lingappa 2019-01-29 8:09 ` [PATCHv3 14/27] PCI: mobiveil: initialize Primary/Secondary/Subordinate bus number Z.q. Hou 2019-01-29 8:09 ` Z.q. Hou 2019-01-29 8:09 ` Z.q. Hou 2019-02-08 12:31 ` Subrahmanya Lingappa 2019-02-08 12:31 ` Subrahmanya Lingappa 2019-02-08 12:31 ` Subrahmanya Lingappa 2019-01-29 8:10 ` [PATCHv3 15/27] dt-bindings: pci: mobiveil: change gpio_slave and apb_csr to optional Z.q. Hou 2019-01-29 8:10 ` Z.q. Hou 2019-01-29 8:10 ` Z.q. Hou 2019-02-08 12:32 ` Subrahmanya Lingappa 2019-02-08 12:32 ` Subrahmanya Lingappa 2019-02-08 12:32 ` Subrahmanya Lingappa 2019-01-29 8:10 ` [PATCHv3 16/27] PCI: mobiveil: refactor Mobiveil PCIe Host Bridge IP driver Z.q. Hou 2019-01-29 8:10 ` Z.q. Hou 2019-01-29 8:10 ` Z.q. Hou 2019-02-08 12:37 ` Subrahmanya Lingappa 2019-02-08 12:37 ` Subrahmanya Lingappa 2019-02-08 12:37 ` Subrahmanya Lingappa 2019-01-29 8:10 ` [PATCHv3 17/27] PCI: mobiveil: fix the checking of valid device Z.q. Hou 2019-01-29 8:10 ` Z.q. Hou 2019-01-29 8:10 ` Z.q. Hou 2019-02-08 12:41 ` Subrahmanya Lingappa 2019-02-08 12:41 ` Subrahmanya Lingappa 2019-02-08 12:41 ` Subrahmanya Lingappa 2019-02-08 14:13 ` Bjorn Helgaas 2019-02-08 14:13 ` Bjorn Helgaas 2019-02-08 14:13 ` Bjorn Helgaas 2019-02-18 7:15 ` Z.q. Hou 2019-02-18 7:15 ` Z.q. Hou 2019-02-18 7:15 ` Z.q. Hou 2019-02-18 7:04 ` Z.q. Hou 2019-02-18 7:04 ` Z.q. Hou 2019-02-18 7:04 ` Z.q. Hou 2019-01-29 8:10 ` [PATCHv3 18/27] PCI: mobiveil: continue to initialize the host upon no PCIe link Z.q. Hou 2019-01-29 8:10 ` Z.q. Hou 2019-01-29 8:10 ` Z.q. Hou 2019-02-08 12:41 ` Subrahmanya Lingappa 2019-02-08 12:41 ` Subrahmanya Lingappa 2019-02-08 12:41 ` Subrahmanya Lingappa 2019-01-29 8:10 ` [PATCHv3 19/27] PCI: mobiveil: disabled IB and OB windows set by bootloader Z.q. Hou 2019-01-29 8:10 ` Z.q. Hou 2019-01-29 8:10 ` Z.q. Hou 2019-02-08 12:42 ` Subrahmanya Lingappa 2019-02-08 12:42 ` Subrahmanya Lingappa 2019-02-08 12:42 ` Subrahmanya Lingappa 2019-01-29 8:10 ` [PATCHv3 20/27] PCI: mobiveil: add Byte and Half-Word width register accessors Z.q. Hou 2019-01-29 8:10 ` Z.q. Hou 2019-01-29 8:10 ` Z.q. Hou 2019-02-08 12:44 ` Subrahmanya Lingappa 2019-02-08 12:44 ` Subrahmanya Lingappa 2019-02-08 12:44 ` Subrahmanya Lingappa 2019-01-29 8:10 ` [PATCHv3 21/27] PCI: mobiveil: make mobiveil_host_init can be used to re-init host Z.q. Hou 2019-01-29 8:10 ` Z.q. Hou 2019-01-29 8:10 ` Z.q. Hou 2019-02-08 12:46 ` Subrahmanya Lingappa 2019-02-08 12:46 ` Subrahmanya Lingappa 2019-02-08 12:46 ` Subrahmanya Lingappa 2019-01-29 8:10 ` [PATCHv3 22/27] dt-bindings: pci: Add NXP Layerscape SoCs PCIe Gen4 controller Z.q. Hou 2019-01-29 8:10 ` Z.q. Hou 2019-01-29 8:10 ` Z.q. Hou 2019-01-30 18:49 ` Rob Herring 2019-01-30 18:49 ` Rob Herring 2019-01-30 18:49 ` Rob Herring 2019-01-29 8:10 ` [PATCHv3 23/27] PCI: mobiveil: add PCIe Gen4 RC driver for NXP Layerscape SoCs Z.q. Hou 2019-01-29 8:10 ` Z.q. Hou 2019-01-29 8:10 ` Z.q. Hou 2019-02-08 12:49 ` Subrahmanya Lingappa 2019-02-08 12:49 ` Subrahmanya Lingappa 2019-02-08 12:49 ` Subrahmanya Lingappa 2019-02-18 7:05 ` Z.q. Hou 2019-02-18 7:05 ` Z.q. Hou 2019-02-18 7:05 ` Z.q. Hou 2019-01-29 8:11 ` [PATCHv3 24/27] PCI: mobiveil: ls_pcie_g4: add Workaround for A-011577 Z.q. Hou 2019-01-29 8:11 ` Z.q. Hou 2019-01-29 8:11 ` Z.q. Hou 2019-02-08 12:52 ` Subrahmanya Lingappa 2019-02-08 12:52 ` Subrahmanya Lingappa 2019-02-08 12:52 ` Subrahmanya Lingappa 2019-02-18 7:10 ` Z.q. Hou 2019-02-18 7:10 ` Z.q. Hou 2019-02-18 7:10 ` Z.q. Hou 2019-01-29 8:11 ` [PATCHv3 25/27] PCI: mobiveil: ls_pcie_g4: add Workaround for A-011451 Z.q. Hou 2019-01-29 8:11 ` Z.q. Hou 2019-01-29 8:11 ` Z.q. Hou 2019-02-08 12:53 ` Subrahmanya Lingappa 2019-02-08 12:53 ` Subrahmanya Lingappa 2019-02-08 12:53 ` Subrahmanya Lingappa 2019-02-18 7:14 ` Z.q. Hou 2019-02-18 7:14 ` Z.q. Hou 2019-02-18 7:14 ` Z.q. Hou 2019-01-29 8:11 ` [PATCHv3 26/27] arm64: dts: freescale: lx2160a: add pcie DT nodes Z.q. Hou 2019-01-29 8:11 ` Z.q. Hou 2019-01-29 8:11 ` Z.q. Hou 2019-01-29 8:11 ` [PATCHv3 27/27] arm64: defconfig: Enable CONFIG_PCI_LAYERSCAPE_GEN4 Z.q. Hou 2019-01-29 8:11 ` Z.q. Hou 2019-01-29 8:11 ` Z.q. Hou 2019-01-29 11:39 ` [PATCHv3 00/27] PCI: refactor Mobiveil driver and add PCIe Gen4 driver for NXP Layerscape SoCs Lorenzo Pieralisi 2019-01-29 11:39 ` Lorenzo Pieralisi 2019-01-29 11:39 ` Lorenzo Pieralisi 2019-02-04 14:14 ` Subrahmanya Lingappa 2019-02-04 16:13 ` Lorenzo Pieralisi 2019-02-04 16:13 ` Lorenzo Pieralisi 2019-02-04 16:13 ` Lorenzo Pieralisi 2019-02-04 16:51 ` Subrahmanya Lingappa 2019-02-04 16:51 ` Subrahmanya Lingappa 2019-02-04 16:51 ` Subrahmanya Lingappa 2019-01-30 15:34 ` Bjorn Helgaas 2019-01-30 15:34 ` Bjorn Helgaas 2019-01-30 15:34 ` Bjorn Helgaas
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