* [PATCH v3 0/3] imx8mq: Add QuadSPI controller
@ 2019-01-30 12:05 ` Carlo Caione
0 siblings, 0 replies; 22+ messages in thread
From: Carlo Caione @ 2019-01-30 12:05 UTC (permalink / raw)
To: robh+dt, mark.rutland, shawnguo, s.hauer, kernel, festevam,
linux-imx, l.stach, devicetree, linux-arm-kernel
Cc: Carlo Caione
Enable the QuadSPI controller in the DTS and document it.
Carlo Caione (3):
arm64: dts: imx8mq: Add QuadSPI controller
arm64: dts: imx8mq-evk: Enable the QuadSPI controller
dt-bindings: spi: Document imx8mq binding
.../devicetree/bindings/spi/spi-fsl-qspi.txt | 2 ++
arch/arm64/boot/dts/freescale/imx8mq-evk.dts | 26 +++++++++++++++++++
arch/arm64/boot/dts/freescale/imx8mq.dtsi | 17 +++++++++++-
3 files changed, 44 insertions(+), 1 deletion(-)
--
2.19.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 22+ messages in thread
* [PATCH v3 1/3] arm64: dts: imx8mq: Add QuadSPI controller
2019-01-30 12:05 ` Carlo Caione
@ 2019-01-30 12:05 ` Carlo Caione
-1 siblings, 0 replies; 22+ messages in thread
From: Carlo Caione @ 2019-01-30 12:05 UTC (permalink / raw)
To: robh+dt, mark.rutland, shawnguo, s.hauer, kernel, festevam,
linux-imx, l.stach, devicetree, linux-arm-kernel
Cc: Carlo Caione
Add a node for the Freescale/NXP QuadSPI controller and extend the AIPS3
memory range to accommodate the QuadSPI-memory region.
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
---
arch/arm64/boot/dts/freescale/imx8mq.dtsi | 17 ++++++++++++++++-
1 file changed, 16 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
index dbedc4a5e7fb..2be302cb2f1f 100644
--- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
@@ -379,7 +379,8 @@
compatible = "fsl,imx8mq-aips-bus", "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
- ranges = <0x30800000 0x30800000 0x400000>;
+ ranges = <0x30800000 0x30800000 0x400000>,
+ <0x08000000 0x08000000 0x10000000>;
uart1: serial@30860000 {
compatible = "fsl,imx8mq-uart",
@@ -497,6 +498,20 @@
status = "disabled";
};
+ qspi0: spi@30bb0000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "fsl,imx8mq-qspi", "fsl,imx7d-qspi";
+ reg = <0x30bb0000 0x10000>,
+ <0x08000000 0x10000000>;
+ reg-names = "QuadSPI", "QuadSPI-memory";
+ interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk IMX8MQ_CLK_QSPI_ROOT>,
+ <&clk IMX8MQ_CLK_QSPI_ROOT>;
+ clock-names = "qspi_en", "qspi";
+ status = "disabled";
+ };
+
fec1: ethernet@30be0000 {
compatible = "fsl,imx8mq-fec", "fsl,imx6sx-fec";
reg = <0x30be0000 0x10000>;
--
2.19.1
^ permalink raw reply related [flat|nested] 22+ messages in thread* [PATCH v3 1/3] arm64: dts: imx8mq: Add QuadSPI controller
@ 2019-01-30 12:05 ` Carlo Caione
0 siblings, 0 replies; 22+ messages in thread
From: Carlo Caione @ 2019-01-30 12:05 UTC (permalink / raw)
To: robh+dt, mark.rutland, shawnguo, s.hauer, kernel, festevam,
linux-imx, l.stach, devicetree, linux-arm-kernel
Cc: Carlo Caione
Add a node for the Freescale/NXP QuadSPI controller and extend the AIPS3
memory range to accommodate the QuadSPI-memory region.
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
---
arch/arm64/boot/dts/freescale/imx8mq.dtsi | 17 ++++++++++++++++-
1 file changed, 16 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
index dbedc4a5e7fb..2be302cb2f1f 100644
--- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
@@ -379,7 +379,8 @@
compatible = "fsl,imx8mq-aips-bus", "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
- ranges = <0x30800000 0x30800000 0x400000>;
+ ranges = <0x30800000 0x30800000 0x400000>,
+ <0x08000000 0x08000000 0x10000000>;
uart1: serial@30860000 {
compatible = "fsl,imx8mq-uart",
@@ -497,6 +498,20 @@
status = "disabled";
};
+ qspi0: spi@30bb0000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "fsl,imx8mq-qspi", "fsl,imx7d-qspi";
+ reg = <0x30bb0000 0x10000>,
+ <0x08000000 0x10000000>;
+ reg-names = "QuadSPI", "QuadSPI-memory";
+ interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk IMX8MQ_CLK_QSPI_ROOT>,
+ <&clk IMX8MQ_CLK_QSPI_ROOT>;
+ clock-names = "qspi_en", "qspi";
+ status = "disabled";
+ };
+
fec1: ethernet@30be0000 {
compatible = "fsl,imx8mq-fec", "fsl,imx6sx-fec";
reg = <0x30be0000 0x10000>;
--
2.19.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 22+ messages in thread* Re: [PATCH v3 1/3] arm64: dts: imx8mq: Add QuadSPI controller
2019-01-30 12:05 ` Carlo Caione
@ 2019-01-30 19:24 ` Fabio Estevam
-1 siblings, 0 replies; 22+ messages in thread
From: Fabio Estevam @ 2019-01-30 19:24 UTC (permalink / raw)
To: Carlo Caione
Cc: Mark Rutland,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
Sascha Hauer, Rob Herring, NXP Linux Team, Sascha Hauer,
Shawn Guo,
moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE,
Lucas Stach
On Wed, Jan 30, 2019 at 10:05 AM Carlo Caione <ccaione@baylibre.com> wrote:
>
> Add a node for the Freescale/NXP QuadSPI controller and extend the AIPS3
> memory range to accommodate the QuadSPI-memory region.
>
> Signed-off-by: Carlo Caione <ccaione@baylibre.com>
> Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
^ permalink raw reply [flat|nested] 22+ messages in thread
* Re: [PATCH v3 1/3] arm64: dts: imx8mq: Add QuadSPI controller
@ 2019-01-30 19:24 ` Fabio Estevam
0 siblings, 0 replies; 22+ messages in thread
From: Fabio Estevam @ 2019-01-30 19:24 UTC (permalink / raw)
To: Carlo Caione
Cc: Mark Rutland,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
Sascha Hauer, Rob Herring, NXP Linux Team, Sascha Hauer,
Shawn Guo,
moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE,
Lucas Stach
On Wed, Jan 30, 2019 at 10:05 AM Carlo Caione <ccaione@baylibre.com> wrote:
>
> Add a node for the Freescale/NXP QuadSPI controller and extend the AIPS3
> memory range to accommodate the QuadSPI-memory region.
>
> Signed-off-by: Carlo Caione <ccaione@baylibre.com>
> Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 22+ messages in thread
* Re: [PATCH v3 1/3] arm64: dts: imx8mq: Add QuadSPI controller
2019-01-30 12:05 ` Carlo Caione
@ 2019-02-11 1:57 ` Shawn Guo
-1 siblings, 0 replies; 22+ messages in thread
From: Shawn Guo @ 2019-02-11 1:57 UTC (permalink / raw)
To: Carlo Caione
Cc: mark.rutland, devicetree, s.hauer, robh+dt, linux-imx, kernel,
festevam, linux-arm-kernel, l.stach
On Wed, Jan 30, 2019 at 12:05:09PM +0000, Carlo Caione wrote:
> Add a node for the Freescale/NXP QuadSPI controller and extend the AIPS3
> memory range to accommodate the QuadSPI-memory region.
>
> Signed-off-by: Carlo Caione <ccaione@baylibre.com>
> Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Applied, thanks.
^ permalink raw reply [flat|nested] 22+ messages in thread
* Re: [PATCH v3 1/3] arm64: dts: imx8mq: Add QuadSPI controller
@ 2019-02-11 1:57 ` Shawn Guo
0 siblings, 0 replies; 22+ messages in thread
From: Shawn Guo @ 2019-02-11 1:57 UTC (permalink / raw)
To: Carlo Caione
Cc: mark.rutland, devicetree, s.hauer, robh+dt, linux-imx, kernel,
festevam, linux-arm-kernel, l.stach
On Wed, Jan 30, 2019 at 12:05:09PM +0000, Carlo Caione wrote:
> Add a node for the Freescale/NXP QuadSPI controller and extend the AIPS3
> memory range to accommodate the QuadSPI-memory region.
>
> Signed-off-by: Carlo Caione <ccaione@baylibre.com>
> Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Applied, thanks.
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 22+ messages in thread
* [PATCH v3 2/3] arm64: dts: imx8mq-evk: Enable the QuadSPI controller
2019-01-30 12:05 ` Carlo Caione
@ 2019-01-30 12:05 ` Carlo Caione
-1 siblings, 0 replies; 22+ messages in thread
From: Carlo Caione @ 2019-01-30 12:05 UTC (permalink / raw)
To: robh+dt, mark.rutland, shawnguo, s.hauer, kernel, festevam,
linux-imx, l.stach, devicetree, linux-arm-kernel
Cc: Carlo Caione
Enable the Freescale/NXP QuadSPI controller with a proper pinctrl set on
the i.MX8MQ EVK board.
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
---
arch/arm64/boot/dts/freescale/imx8mq-evk.dts | 26 ++++++++++++++++++++
1 file changed, 26 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8mq-evk.dts b/arch/arm64/boot/dts/freescale/imx8mq-evk.dts
index f74b13aa5aa5..ef452d2d8653 100644
--- a/arch/arm64/boot/dts/freescale/imx8mq-evk.dts
+++ b/arch/arm64/boot/dts/freescale/imx8mq-evk.dts
@@ -137,6 +137,20 @@
status = "okay";
};
+&qspi0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_qspi>;
+ status = "okay";
+
+ n25q256a: flash@0 {
+ reg = <0>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "micron,n25q256a", "jedec,spi-nor";
+ spi-max-frequency = <29000000>;
+ };
+};
+
&usdhc1 {
pinctrl-names = "default", "state_100mhz", "state_200mhz";
pinctrl-0 = <&pinctrl_usdhc1>;
@@ -195,6 +209,18 @@
>;
};
+ pinctrl_qspi: qspigrp {
+ fsl,pins = <
+ MX8MQ_IOMUXC_NAND_ALE_QSPI_A_SCLK 0x82
+ MX8MQ_IOMUXC_NAND_CE0_B_QSPI_A_SS0_B 0x82
+ MX8MQ_IOMUXC_NAND_DATA00_QSPI_A_DATA0 0x82
+ MX8MQ_IOMUXC_NAND_DATA01_QSPI_A_DATA1 0x82
+ MX8MQ_IOMUXC_NAND_DATA02_QSPI_A_DATA2 0x82
+ MX8MQ_IOMUXC_NAND_DATA03_QSPI_A_DATA3 0x82
+
+ >;
+ };
+
pinctrl_reg_usdhc2: regusdhc2grpgpio {
fsl,pins = <
MX8MQ_IOMUXC_SD2_RESET_B_GPIO2_IO19 0x41
--
2.19.1
^ permalink raw reply related [flat|nested] 22+ messages in thread* [PATCH v3 2/3] arm64: dts: imx8mq-evk: Enable the QuadSPI controller
@ 2019-01-30 12:05 ` Carlo Caione
0 siblings, 0 replies; 22+ messages in thread
From: Carlo Caione @ 2019-01-30 12:05 UTC (permalink / raw)
To: robh+dt, mark.rutland, shawnguo, s.hauer, kernel, festevam,
linux-imx, l.stach, devicetree, linux-arm-kernel
Cc: Carlo Caione
Enable the Freescale/NXP QuadSPI controller with a proper pinctrl set on
the i.MX8MQ EVK board.
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
---
arch/arm64/boot/dts/freescale/imx8mq-evk.dts | 26 ++++++++++++++++++++
1 file changed, 26 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8mq-evk.dts b/arch/arm64/boot/dts/freescale/imx8mq-evk.dts
index f74b13aa5aa5..ef452d2d8653 100644
--- a/arch/arm64/boot/dts/freescale/imx8mq-evk.dts
+++ b/arch/arm64/boot/dts/freescale/imx8mq-evk.dts
@@ -137,6 +137,20 @@
status = "okay";
};
+&qspi0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_qspi>;
+ status = "okay";
+
+ n25q256a: flash@0 {
+ reg = <0>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "micron,n25q256a", "jedec,spi-nor";
+ spi-max-frequency = <29000000>;
+ };
+};
+
&usdhc1 {
pinctrl-names = "default", "state_100mhz", "state_200mhz";
pinctrl-0 = <&pinctrl_usdhc1>;
@@ -195,6 +209,18 @@
>;
};
+ pinctrl_qspi: qspigrp {
+ fsl,pins = <
+ MX8MQ_IOMUXC_NAND_ALE_QSPI_A_SCLK 0x82
+ MX8MQ_IOMUXC_NAND_CE0_B_QSPI_A_SS0_B 0x82
+ MX8MQ_IOMUXC_NAND_DATA00_QSPI_A_DATA0 0x82
+ MX8MQ_IOMUXC_NAND_DATA01_QSPI_A_DATA1 0x82
+ MX8MQ_IOMUXC_NAND_DATA02_QSPI_A_DATA2 0x82
+ MX8MQ_IOMUXC_NAND_DATA03_QSPI_A_DATA3 0x82
+
+ >;
+ };
+
pinctrl_reg_usdhc2: regusdhc2grpgpio {
fsl,pins = <
MX8MQ_IOMUXC_SD2_RESET_B_GPIO2_IO19 0x41
--
2.19.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 22+ messages in thread* Re: [PATCH v3 2/3] arm64: dts: imx8mq-evk: Enable the QuadSPI controller
2019-01-30 12:05 ` Carlo Caione
@ 2019-01-30 19:25 ` Fabio Estevam
-1 siblings, 0 replies; 22+ messages in thread
From: Fabio Estevam @ 2019-01-30 19:25 UTC (permalink / raw)
To: Carlo Caione
Cc: Mark Rutland,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
Sascha Hauer, Rob Herring, NXP Linux Team, Sascha Hauer,
Shawn Guo,
moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE,
Lucas Stach
On Wed, Jan 30, 2019 at 10:05 AM Carlo Caione <ccaione@baylibre.com> wrote:
>
> Enable the Freescale/NXP QuadSPI controller with a proper pinctrl set on
> the i.MX8MQ EVK board.
>
> Signed-off-by: Carlo Caione <ccaione@baylibre.com>
> Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
^ permalink raw reply [flat|nested] 22+ messages in thread
* Re: [PATCH v3 2/3] arm64: dts: imx8mq-evk: Enable the QuadSPI controller
@ 2019-01-30 19:25 ` Fabio Estevam
0 siblings, 0 replies; 22+ messages in thread
From: Fabio Estevam @ 2019-01-30 19:25 UTC (permalink / raw)
To: Carlo Caione
Cc: Mark Rutland,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
Sascha Hauer, Rob Herring, NXP Linux Team, Sascha Hauer,
Shawn Guo,
moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE,
Lucas Stach
On Wed, Jan 30, 2019 at 10:05 AM Carlo Caione <ccaione@baylibre.com> wrote:
>
> Enable the Freescale/NXP QuadSPI controller with a proper pinctrl set on
> the i.MX8MQ EVK board.
>
> Signed-off-by: Carlo Caione <ccaione@baylibre.com>
> Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 22+ messages in thread
* Re: [PATCH v3 2/3] arm64: dts: imx8mq-evk: Enable the QuadSPI controller
2019-01-30 12:05 ` Carlo Caione
@ 2019-02-11 1:58 ` Shawn Guo
-1 siblings, 0 replies; 22+ messages in thread
From: Shawn Guo @ 2019-02-11 1:58 UTC (permalink / raw)
To: Carlo Caione
Cc: mark.rutland, devicetree, s.hauer, robh+dt, linux-imx, kernel,
festevam, linux-arm-kernel, l.stach
On Wed, Jan 30, 2019 at 12:05:10PM +0000, Carlo Caione wrote:
> Enable the Freescale/NXP QuadSPI controller with a proper pinctrl set on
> the i.MX8MQ EVK board.
>
> Signed-off-by: Carlo Caione <ccaione@baylibre.com>
> Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Applied, thanks.
^ permalink raw reply [flat|nested] 22+ messages in thread
* Re: [PATCH v3 2/3] arm64: dts: imx8mq-evk: Enable the QuadSPI controller
@ 2019-02-11 1:58 ` Shawn Guo
0 siblings, 0 replies; 22+ messages in thread
From: Shawn Guo @ 2019-02-11 1:58 UTC (permalink / raw)
To: Carlo Caione
Cc: mark.rutland, devicetree, s.hauer, robh+dt, linux-imx, kernel,
festevam, linux-arm-kernel, l.stach
On Wed, Jan 30, 2019 at 12:05:10PM +0000, Carlo Caione wrote:
> Enable the Freescale/NXP QuadSPI controller with a proper pinctrl set on
> the i.MX8MQ EVK board.
>
> Signed-off-by: Carlo Caione <ccaione@baylibre.com>
> Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Applied, thanks.
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 22+ messages in thread
* [PATCH v3 3/3] dt-bindings: spi: Document imx8mq binding
2019-01-30 12:05 ` Carlo Caione
@ 2019-01-30 12:05 ` Carlo Caione
-1 siblings, 0 replies; 22+ messages in thread
From: Carlo Caione @ 2019-01-30 12:05 UTC (permalink / raw)
To: robh+dt, mark.rutland, shawnguo, s.hauer, kernel, festevam,
linux-imx, l.stach, devicetree, linux-arm-kernel
Cc: Carlo Caione
Add the "fsl,imx8mq-qspi" binding to the spi-fsl-qspi documentation.
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
---
Documentation/devicetree/bindings/spi/spi-fsl-qspi.txt | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings/spi/spi-fsl-qspi.txt b/Documentation/devicetree/bindings/spi/spi-fsl-qspi.txt
index e8f1d627d288..3fd1b8baf5ca 100644
--- a/Documentation/devicetree/bindings/spi/spi-fsl-qspi.txt
+++ b/Documentation/devicetree/bindings/spi/spi-fsl-qspi.txt
@@ -5,6 +5,8 @@ Required properties:
"fsl,imx7d-qspi", "fsl,imx6ul-qspi",
"fsl,ls1021a-qspi"
or
+ "fsl,imx8mq-qspi" followed by "fsl,imx7d-qspi"
+ or
"fsl,ls2080a-qspi" followed by "fsl,ls1021a-qspi",
"fsl,ls1043a-qspi" followed by "fsl,ls1021a-qspi"
- reg : the first contains the register location and length,
--
2.19.1
^ permalink raw reply related [flat|nested] 22+ messages in thread
* [PATCH v3 3/3] dt-bindings: spi: Document imx8mq binding
@ 2019-01-30 12:05 ` Carlo Caione
0 siblings, 0 replies; 22+ messages in thread
From: Carlo Caione @ 2019-01-30 12:05 UTC (permalink / raw)
To: robh+dt, mark.rutland, shawnguo, s.hauer, kernel, festevam,
linux-imx, l.stach, devicetree, linux-arm-kernel
Cc: Carlo Caione
Add the "fsl,imx8mq-qspi" binding to the spi-fsl-qspi documentation.
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
---
Documentation/devicetree/bindings/spi/spi-fsl-qspi.txt | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings/spi/spi-fsl-qspi.txt b/Documentation/devicetree/bindings/spi/spi-fsl-qspi.txt
index e8f1d627d288..3fd1b8baf5ca 100644
--- a/Documentation/devicetree/bindings/spi/spi-fsl-qspi.txt
+++ b/Documentation/devicetree/bindings/spi/spi-fsl-qspi.txt
@@ -5,6 +5,8 @@ Required properties:
"fsl,imx7d-qspi", "fsl,imx6ul-qspi",
"fsl,ls1021a-qspi"
or
+ "fsl,imx8mq-qspi" followed by "fsl,imx7d-qspi"
+ or
"fsl,ls2080a-qspi" followed by "fsl,ls1021a-qspi",
"fsl,ls1043a-qspi" followed by "fsl,ls1021a-qspi"
- reg : the first contains the register location and length,
--
2.19.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 22+ messages in thread
* Re: [PATCH v3 3/3] dt-bindings: spi: Document imx8mq binding
2019-01-30 12:05 ` Carlo Caione
@ 2019-01-30 18:54 ` Rob Herring
-1 siblings, 0 replies; 22+ messages in thread
From: Rob Herring @ 2019-01-30 18:54 UTC (permalink / raw)
Cc: mark.rutland, devicetree, Carlo Caione, shawnguo, s.hauer,
robh+dt, linux-imx, kernel, festevam, linux-arm-kernel, l.stach
On Wed, 30 Jan 2019 12:05:11 +0000, Carlo Caione wrote:
> Add the "fsl,imx8mq-qspi" binding to the spi-fsl-qspi documentation.
>
> Signed-off-by: Carlo Caione <ccaione@baylibre.com>
> ---
> Documentation/devicetree/bindings/spi/spi-fsl-qspi.txt | 2 ++
> 1 file changed, 2 insertions(+)
>
Reviewed-by: Rob Herring <robh@kernel.org>
^ permalink raw reply [flat|nested] 22+ messages in thread
* Re: [PATCH v3 3/3] dt-bindings: spi: Document imx8mq binding
@ 2019-01-30 18:54 ` Rob Herring
0 siblings, 0 replies; 22+ messages in thread
From: Rob Herring @ 2019-01-30 18:54 UTC (permalink / raw)
To: Carlo Caione
Cc: mark.rutland, devicetree, Carlo Caione, shawnguo, s.hauer,
robh+dt, linux-imx, kernel, festevam, linux-arm-kernel, l.stach
On Wed, 30 Jan 2019 12:05:11 +0000, Carlo Caione wrote:
> Add the "fsl,imx8mq-qspi" binding to the spi-fsl-qspi documentation.
>
> Signed-off-by: Carlo Caione <ccaione@baylibre.com>
> ---
> Documentation/devicetree/bindings/spi/spi-fsl-qspi.txt | 2 ++
> 1 file changed, 2 insertions(+)
>
Reviewed-by: Rob Herring <robh@kernel.org>
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linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 22+ messages in thread
* Re: [PATCH v3 3/3] dt-bindings: spi: Document imx8mq binding
2019-01-30 12:05 ` Carlo Caione
@ 2019-01-30 19:25 ` Fabio Estevam
-1 siblings, 0 replies; 22+ messages in thread
From: Fabio Estevam @ 2019-01-30 19:25 UTC (permalink / raw)
To: Carlo Caione
Cc: Mark Rutland,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
Sascha Hauer, Rob Herring, NXP Linux Team, Sascha Hauer,
Shawn Guo,
moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE,
Lucas Stach
On Wed, Jan 30, 2019 at 10:05 AM Carlo Caione <ccaione@baylibre.com> wrote:
>
> Add the "fsl,imx8mq-qspi" binding to the spi-fsl-qspi documentation.
>
> Signed-off-by: Carlo Caione <ccaione@baylibre.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
^ permalink raw reply [flat|nested] 22+ messages in thread
* Re: [PATCH v3 3/3] dt-bindings: spi: Document imx8mq binding
@ 2019-01-30 19:25 ` Fabio Estevam
0 siblings, 0 replies; 22+ messages in thread
From: Fabio Estevam @ 2019-01-30 19:25 UTC (permalink / raw)
To: Carlo Caione
Cc: Mark Rutland,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
Sascha Hauer, Rob Herring, NXP Linux Team, Sascha Hauer,
Shawn Guo,
moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE,
Lucas Stach
On Wed, Jan 30, 2019 at 10:05 AM Carlo Caione <ccaione@baylibre.com> wrote:
>
> Add the "fsl,imx8mq-qspi" binding to the spi-fsl-qspi documentation.
>
> Signed-off-by: Carlo Caione <ccaione@baylibre.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 22+ messages in thread
* Re: [PATCH v3 3/3] dt-bindings: spi: Document imx8mq binding
2019-01-30 12:05 ` Carlo Caione
@ 2019-02-11 1:59 ` Shawn Guo
-1 siblings, 0 replies; 22+ messages in thread
From: Shawn Guo @ 2019-02-11 1:59 UTC (permalink / raw)
To: Carlo Caione
Cc: mark.rutland, devicetree, s.hauer, robh+dt, linux-imx, kernel,
festevam, linux-arm-kernel, l.stach
On Wed, Jan 30, 2019 at 12:05:11PM +0000, Carlo Caione wrote:
> Add the "fsl,imx8mq-qspi" binding to the spi-fsl-qspi documentation.
>
> Signed-off-by: Carlo Caione <ccaione@baylibre.com>
It doesn't apply to my tree, so you may need to send via spi tree.
Shawn
> ---
> Documentation/devicetree/bindings/spi/spi-fsl-qspi.txt | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/spi/spi-fsl-qspi.txt b/Documentation/devicetree/bindings/spi/spi-fsl-qspi.txt
> index e8f1d627d288..3fd1b8baf5ca 100644
> --- a/Documentation/devicetree/bindings/spi/spi-fsl-qspi.txt
> +++ b/Documentation/devicetree/bindings/spi/spi-fsl-qspi.txt
> @@ -5,6 +5,8 @@ Required properties:
> "fsl,imx7d-qspi", "fsl,imx6ul-qspi",
> "fsl,ls1021a-qspi"
> or
> + "fsl,imx8mq-qspi" followed by "fsl,imx7d-qspi"
> + or
> "fsl,ls2080a-qspi" followed by "fsl,ls1021a-qspi",
> "fsl,ls1043a-qspi" followed by "fsl,ls1021a-qspi"
> - reg : the first contains the register location and length,
> --
> 2.19.1
>
^ permalink raw reply [flat|nested] 22+ messages in thread
* Re: [PATCH v3 3/3] dt-bindings: spi: Document imx8mq binding
@ 2019-02-11 1:59 ` Shawn Guo
0 siblings, 0 replies; 22+ messages in thread
From: Shawn Guo @ 2019-02-11 1:59 UTC (permalink / raw)
To: Carlo Caione
Cc: mark.rutland, devicetree, s.hauer, robh+dt, linux-imx, kernel,
festevam, linux-arm-kernel, l.stach
On Wed, Jan 30, 2019 at 12:05:11PM +0000, Carlo Caione wrote:
> Add the "fsl,imx8mq-qspi" binding to the spi-fsl-qspi documentation.
>
> Signed-off-by: Carlo Caione <ccaione@baylibre.com>
It doesn't apply to my tree, so you may need to send via spi tree.
Shawn
> ---
> Documentation/devicetree/bindings/spi/spi-fsl-qspi.txt | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/spi/spi-fsl-qspi.txt b/Documentation/devicetree/bindings/spi/spi-fsl-qspi.txt
> index e8f1d627d288..3fd1b8baf5ca 100644
> --- a/Documentation/devicetree/bindings/spi/spi-fsl-qspi.txt
> +++ b/Documentation/devicetree/bindings/spi/spi-fsl-qspi.txt
> @@ -5,6 +5,8 @@ Required properties:
> "fsl,imx7d-qspi", "fsl,imx6ul-qspi",
> "fsl,ls1021a-qspi"
> or
> + "fsl,imx8mq-qspi" followed by "fsl,imx7d-qspi"
> + or
> "fsl,ls2080a-qspi" followed by "fsl,ls1021a-qspi",
> "fsl,ls1043a-qspi" followed by "fsl,ls1021a-qspi"
> - reg : the first contains the register location and length,
> --
> 2.19.1
>
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^ permalink raw reply [flat|nested] 22+ messages in thread