* ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Don't use the second dbuf slice on icl
2019-01-21 15:31 [PATCH] drm/i915: Don't use the second dbuf slice on icl Ville Syrjala
@ 2019-01-21 16:02 ` Patchwork
2019-01-21 16:25 ` ✓ Fi.CI.BAT: success " Patchwork
` (8 subsequent siblings)
9 siblings, 0 replies; 16+ messages in thread
From: Patchwork @ 2019-01-21 16:02 UTC (permalink / raw)
To: Ville Syrjala; +Cc: intel-gfx
== Series Details ==
Series: drm/i915: Don't use the second dbuf slice on icl
URL : https://patchwork.freedesktop.org/series/55517/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
143de466f689 drm/i915: Don't use the second dbuf slice on icl
-:40: CHECK:CAMELCASE: Avoid CamelCase: <GBps>
#40: FILE: drivers/gpu/drm/i915/intel_pm.c:3837:
+ if (0 && (num_active > 1 || total_data_bw >= GBps(12))) {
total: 0 errors, 0 warnings, 1 checks, 23 lines checked
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 16+ messages in thread* ✓ Fi.CI.BAT: success for drm/i915: Don't use the second dbuf slice on icl
2019-01-21 15:31 [PATCH] drm/i915: Don't use the second dbuf slice on icl Ville Syrjala
2019-01-21 16:02 ` ✗ Fi.CI.CHECKPATCH: warning for " Patchwork
@ 2019-01-21 16:25 ` Patchwork
2019-01-21 21:42 ` ✓ Fi.CI.IGT: " Patchwork
` (7 subsequent siblings)
9 siblings, 0 replies; 16+ messages in thread
From: Patchwork @ 2019-01-21 16:25 UTC (permalink / raw)
To: Ville Syrjala; +Cc: intel-gfx
== Series Details ==
Series: drm/i915: Don't use the second dbuf slice on icl
URL : https://patchwork.freedesktop.org/series/55517/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_5459 -> Patchwork_11998
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://patchwork.freedesktop.org/api/1.0/series/55517/revisions/1/mbox/
Known issues
------------
Here are the changes found in Patchwork_11998 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@kms_pipe_crc_basic@suspend-read-crc-pipe-b:
- fi-blb-e6850: PASS -> INCOMPLETE [fdo#107718]
#### Possible fixes ####
* igt@i915_selftest@live_hangcheck:
- fi-bwr-2160: DMESG-FAIL [fdo#108735] -> PASS
* igt@kms_frontbuffer_tracking@basic:
- {fi-icl-u2}: FAIL [fdo#103167] -> PASS
* igt@pm_rpm@module-reload:
- {fi-icl-u2}: DMESG-WARN [fdo#108654] -> PASS
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167
[fdo#107718]: https://bugs.freedesktop.org/show_bug.cgi?id=107718
[fdo#108569]: https://bugs.freedesktop.org/show_bug.cgi?id=108569
[fdo#108654]: https://bugs.freedesktop.org/show_bug.cgi?id=108654
[fdo#108735]: https://bugs.freedesktop.org/show_bug.cgi?id=108735
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109315]: https://bugs.freedesktop.org/show_bug.cgi?id=109315
Participating hosts (47 -> 42)
------------------------------
Additional (1): fi-glk-j4005
Missing (6): fi-kbl-soraka fi-ilk-m540 fi-byt-squawks fi-bsw-cyan fi-icl-y fi-bdw-samus
Build changes
-------------
* Linux: CI_DRM_5459 -> Patchwork_11998
CI_DRM_5459: 0f693a275dd91391b476ada7481cf08f4fe610aa @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_4780: 1c1612bdc36b44a704095e7b0ba5542818ce793f @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_11998: 143de466f6895ec4ef9b983a358045ded1703a37 @ git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
143de466f689 drm/i915: Don't use the second dbuf slice on icl
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_11998/
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 16+ messages in thread* ✓ Fi.CI.IGT: success for drm/i915: Don't use the second dbuf slice on icl
2019-01-21 15:31 [PATCH] drm/i915: Don't use the second dbuf slice on icl Ville Syrjala
2019-01-21 16:02 ` ✗ Fi.CI.CHECKPATCH: warning for " Patchwork
2019-01-21 16:25 ` ✓ Fi.CI.BAT: success " Patchwork
@ 2019-01-21 21:42 ` Patchwork
2019-01-22 9:19 ` [PATCH] " Mahesh Kumar
` (6 subsequent siblings)
9 siblings, 0 replies; 16+ messages in thread
From: Patchwork @ 2019-01-21 21:42 UTC (permalink / raw)
To: Ville Syrjala; +Cc: intel-gfx
== Series Details ==
Series: drm/i915: Don't use the second dbuf slice on icl
URL : https://patchwork.freedesktop.org/series/55517/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_5459_full -> Patchwork_11998_full
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Known issues
------------
Here are the changes found in Patchwork_11998_full that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_exec_schedule@pi-ringfull-blt:
- shard-apl: NOTRUN -> FAIL [fdo#103158]
* igt@kms_content_protection@legacy:
- shard-apl: NOTRUN -> FAIL [fdo#108597]
* igt@kms_cursor_crc@cursor-128x128-onscreen:
- shard-apl: PASS -> FAIL [fdo#103232]
* igt@kms_cursor_crc@cursor-128x42-sliding:
- shard-glk: PASS -> FAIL [fdo#103232]
* igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-indfb-draw-mmap-wc:
- shard-glk: PASS -> FAIL [fdo#103167]
* igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-pwrite:
- shard-apl: PASS -> FAIL [fdo#103167]
* igt@kms_plane@plane-position-covered-pipe-b-planes:
- shard-apl: PASS -> FAIL [fdo#103166]
* igt@kms_plane_multiple@atomic-pipe-c-tiling-yf:
- shard-glk: PASS -> FAIL [fdo#103166]
* igt@kms_vblank@pipe-b-wait-idle-hang:
- shard-glk: PASS -> INCOMPLETE [fdo#103359] / [k.org#198133]
* igt@sw_sync@sync_busy_fork:
- shard-apl: PASS -> INCOMPLETE [fdo#103927]
#### Possible fixes ####
* igt@kms_busy@extended-pageflip-hang-newfb-render-c:
- shard-glk: DMESG-WARN [fdo#107956] -> PASS
* igt@kms_busy@extended-pageflip-hang-oldfb-render-b:
- shard-snb: {SKIP} [fdo#109271] / [fdo#109278] -> PASS
* igt@kms_ccs@pipe-b-crc-sprite-planes-basic:
- shard-glk: FAIL [fdo#108145] -> PASS
* igt@kms_cursor_crc@cursor-128x42-random:
- shard-apl: FAIL [fdo#103232] -> PASS +1
* igt@kms_cursor_crc@cursor-256x256-suspend:
- shard-glk: FAIL [fdo#103232] -> PASS
* igt@kms_draw_crc@draw-method-xrgb8888-mmap-gtt-untiled:
- shard-snb: {SKIP} [fdo#109271] -> PASS +3
* igt@kms_plane@plane-position-covered-pipe-c-planes:
- shard-glk: FAIL [fdo#103166] -> PASS
* igt@kms_rotation_crc@multiplane-rotation:
- shard-kbl: FAIL -> PASS
* igt@kms_setmode@basic:
- shard-kbl: FAIL [fdo#99912] -> PASS
#### Warnings ####
* igt@kms_rotation_crc@multiplane-rotation-cropping-top:
- shard-glk: DMESG-FAIL [fdo#105763] / [fdo#106538] -> FAIL [fdo#109381]
* igt@kms_setmode@basic:
- shard-apl: INCOMPLETE [fdo#103927] -> FAIL [fdo#99912]
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#103158]: https://bugs.freedesktop.org/show_bug.cgi?id=103158
[fdo#103166]: https://bugs.freedesktop.org/show_bug.cgi?id=103166
[fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167
[fdo#103232]: https://bugs.freedesktop.org/show_bug.cgi?id=103232
[fdo#103359]: https://bugs.freedesktop.org/show_bug.cgi?id=103359
[fdo#103927]: https://bugs.freedesktop.org/show_bug.cgi?id=103927
[fdo#105763]: https://bugs.freedesktop.org/show_bug.cgi?id=105763
[fdo#106538]: https://bugs.freedesktop.org/show_bug.cgi?id=106538
[fdo#107956]: https://bugs.freedesktop.org/show_bug.cgi?id=107956
[fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145
[fdo#108597]: https://bugs.freedesktop.org/show_bug.cgi?id=108597
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109278]: https://bugs.freedesktop.org/show_bug.cgi?id=109278
[fdo#109381]: https://bugs.freedesktop.org/show_bug.cgi?id=109381
[fdo#99912]: https://bugs.freedesktop.org/show_bug.cgi?id=99912
[k.org#198133]: https://bugzilla.kernel.org/show_bug.cgi?id=198133
Participating hosts (7 -> 5)
------------------------------
Missing (2): shard-skl shard-iclb
Build changes
-------------
* Linux: CI_DRM_5459 -> Patchwork_11998
CI_DRM_5459: 0f693a275dd91391b476ada7481cf08f4fe610aa @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_4780: 1c1612bdc36b44a704095e7b0ba5542818ce793f @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_11998: 143de466f6895ec4ef9b983a358045ded1703a37 @ git://anongit.freedesktop.org/gfx-ci/linux
piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_11998/
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 16+ messages in thread* Re: [PATCH] drm/i915: Don't use the second dbuf slice on icl
2019-01-21 15:31 [PATCH] drm/i915: Don't use the second dbuf slice on icl Ville Syrjala
` (2 preceding siblings ...)
2019-01-21 21:42 ` ✓ Fi.CI.IGT: " Patchwork
@ 2019-01-22 9:19 ` Mahesh Kumar
2019-01-25 15:08 ` Imre Deak
2019-01-22 9:28 ` Mahesh Kumar
` (5 subsequent siblings)
9 siblings, 1 reply; 16+ messages in thread
From: Mahesh Kumar @ 2019-01-22 9:19 UTC (permalink / raw)
To: Ville Syrjala; +Cc: intel-gfx
Hi,
On Mon, Jan 21, 2019 at 9:01 PM Ville Syrjala
<ville.syrjala@linux.intel.com> wrote:
>
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> The code managing the dbuf slices is borked and needs some
> real work to fix. In the meantime let's just stop using the
> second slice.
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
> drivers/gpu/drm/i915/intel_pm.c | 10 ++++++++--
> 1 file changed, 8 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_pm.c
b/drivers/gpu/drm/i915/intel_pm.c
> index 8b63afa3a221..1e41c899ffe2 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -3618,7 +3618,8 @@ static u8
intel_enabled_dbuf_slices_num(struct drm_i915_private *dev_priv)
> enabled_slices = 1;
>
> /* Gen prior to GEN11 have only one DBuf slice */
> - if (INTEL_GEN(dev_priv) < 11)
> + /* FIXME dbuf slice code is broken: see intel_get_ddb_size() */
> + if (1 || INTEL_GEN(dev_priv) < 11)
> return enabled_slices;
IMHO we may not need this, If we return from above we'll never disable
second slice in case it's enabled by bios.
Anyhow code change in intel_get_ddb_size will take care of enabling
only one slice.
>
> if (I915_READ(DBUF_CTL_S2) & DBUF_POWER_STATE)
> @@ -3827,8 +3828,13 @@ static u16 intel_get_ddb_size(struct
drm_i915_private *dev_priv,
>
> /*
> * 12GB/s is maximum BW supported by single DBuf slice.
> + *
> + * FIXME dbuf slice code is broken:
> + * - must wait for planes to stop using the slice before
powering it off
AFAIR we were already doing it and disabling slice only after
update_crtcs, and skl_update_crtc code is taking care of waiting for
vblank in case it's required.
> + * - plane straddling both slices is illegal in
multi-pipe scenarios
This is something new :)
although this change introduce a major limitation with number and size
of planes we can display, yet
As code is broken and mentioned conditions need to be taken care of,
This change should be ok until proper fix.
~Mahesh
> + * - should validate we stay within the hw bandwidth limits
> */
> - if (num_active > 1 || total_data_bw >= GBps(12)) {
> + if (0 && (num_active > 1 || total_data_bw >= GBps(12))) {
> ddb->enabled_slices = 2;
> } else {
> ddb->enabled_slices = 1;
> --
> 2.19.2
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 16+ messages in thread* Re: [PATCH] drm/i915: Don't use the second dbuf slice on icl
2019-01-22 9:19 ` [PATCH] " Mahesh Kumar
@ 2019-01-25 15:08 ` Imre Deak
2019-01-28 3:41 ` Mahesh Kumar
0 siblings, 1 reply; 16+ messages in thread
From: Imre Deak @ 2019-01-25 15:08 UTC (permalink / raw)
To: Mahesh Kumar; +Cc: intel-gfx
On Tue, Jan 22, 2019 at 02:49:13PM +0530, Mahesh Kumar wrote:
> Hi,
>
>
> On Mon, Jan 21, 2019 at 9:01 PM Ville Syrjala
> <ville.syrjala@linux.intel.com> wrote:
> >
> > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> >
> > The code managing the dbuf slices is borked and needs some
> > real work to fix. In the meantime let's just stop using the
> > second slice.
> >
> > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > ---
> > drivers/gpu/drm/i915/intel_pm.c | 10 ++++++++--
> > 1 file changed, 8 insertions(+), 2 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/intel_pm.c
> b/drivers/gpu/drm/i915/intel_pm.c
> > index 8b63afa3a221..1e41c899ffe2 100644
> > --- a/drivers/gpu/drm/i915/intel_pm.c
> > +++ b/drivers/gpu/drm/i915/intel_pm.c
> > @@ -3618,7 +3618,8 @@ static u8
> intel_enabled_dbuf_slices_num(struct drm_i915_private *dev_priv)
> > enabled_slices = 1;
> >
> > /* Gen prior to GEN11 have only one DBuf slice */
> > - if (INTEL_GEN(dev_priv) < 11)
> > + /* FIXME dbuf slice code is broken: see intel_get_ddb_size() */
> > + if (1 || INTEL_GEN(dev_priv) < 11)
> > return enabled_slices;
>
> IMHO we may not need this,
It's easier to pretend that we have only a single slice. Not sure for
instance if the lack of the above would lead to state check errors (due
to other problems in the dbuf silce implementation).
> If we return from above we'll never disable
> second slice in case it's enabled by bios.
We'll disable whenever we need to, that is during suspend/driver unload.
We can ignore the rest of the cases I think.
> Anyhow code change in intel_get_ddb_size will take care of enabling
> only one slice.
>
> >
> > if (I915_READ(DBUF_CTL_S2) & DBUF_POWER_STATE)
> > @@ -3827,8 +3828,13 @@ static u16 intel_get_ddb_size(struct
> drm_i915_private *dev_priv,
> >
> > /*
> > * 12GB/s is maximum BW supported by single DBuf slice.
> > + *
> > + * FIXME dbuf slice code is broken:
> > + * - must wait for planes to stop using the slice before
> powering it off
>
> AFAIR we were already doing it and disabling slice only after
> update_crtcs, and skl_update_crtc code is taking care of waiting for
> vblank in case it's required.
>
> > + * - plane straddling both slices is illegal in
> multi-pipe scenarios
>
> This is something new :)
>
> although this change introduce a major limitation with number and size
> of planes we can display, yet
> As code is broken and mentioned conditions need to be taken care of,
> This change should be ok until proper fix.
>
> ~Mahesh
>
> > + * - should validate we stay within the hw bandwidth limits
> > */
> > - if (num_active > 1 || total_data_bw >= GBps(12)) {
> > + if (0 && (num_active > 1 || total_data_bw >= GBps(12))) {
> > ddb->enabled_slices = 2;
> > } else {
> > ddb->enabled_slices = 1;
> > --
> > 2.19.2
> >
> > _______________________________________________
> > Intel-gfx mailing list
> > Intel-gfx@lists.freedesktop.org
> > https://lists.freedesktop.org/mailman/listinfo/intel-gfx
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 16+ messages in thread* Re: [PATCH] drm/i915: Don't use the second dbuf slice on icl
2019-01-25 15:08 ` Imre Deak
@ 2019-01-28 3:41 ` Mahesh Kumar
0 siblings, 0 replies; 16+ messages in thread
From: Mahesh Kumar @ 2019-01-28 3:41 UTC (permalink / raw)
To: imre.deak; +Cc: intel-gfx
Hi,
On Fri, Jan 25, 2019 at 8:38 PM Imre Deak <imre.deak@intel.com> wrote:
>
> On Tue, Jan 22, 2019 at 02:49:13PM +0530, Mahesh Kumar wrote:
> > Hi,
> >
> >
> > On Mon, Jan 21, 2019 at 9:01 PM Ville Syrjala
> > <ville.syrjala@linux.intel.com> wrote:
> > >
> > > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > >
> > > The code managing the dbuf slices is borked and needs some
> > > real work to fix. In the meantime let's just stop using the
> > > second slice.
> > >
> > > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > > ---
> > > drivers/gpu/drm/i915/intel_pm.c | 10 ++++++++--
> > > 1 file changed, 8 insertions(+), 2 deletions(-)
> > >
> > > diff --git a/drivers/gpu/drm/i915/intel_pm.c
> > b/drivers/gpu/drm/i915/intel_pm.c
> > > index 8b63afa3a221..1e41c899ffe2 100644
> > > --- a/drivers/gpu/drm/i915/intel_pm.c
> > > +++ b/drivers/gpu/drm/i915/intel_pm.c
> > > @@ -3618,7 +3618,8 @@ static u8
> > intel_enabled_dbuf_slices_num(struct drm_i915_private *dev_priv)
> > > enabled_slices = 1;
> > >
> > > /* Gen prior to GEN11 have only one DBuf slice */
> > > - if (INTEL_GEN(dev_priv) < 11)
> > > + /* FIXME dbuf slice code is broken: see intel_get_ddb_size() */
> > > + if (1 || INTEL_GEN(dev_priv) < 11)
> > > return enabled_slices;
> >
> > IMHO we may not need this,
>
> It's easier to pretend that we have only a single slice. Not sure for
> instance if the lack of the above would lead to state check errors (due
> to other problems in the dbuf silce implementation).
>
> > If we return from above we'll never disable
> > second slice in case it's enabled by bios.
>
> We'll disable whenever we need to, that is during suspend/driver unload.
> We can ignore the rest of the cases I think.
exactly, It will get disabled during suspend/unload, but as we are not
using second slice, it's going to consume some power until then.
This function is to tell us H/W state, So we should assume that second
slice is disabled without checking H/W state.
~Mahesh
>
> > Anyhow code change in intel_get_ddb_size will take care of enabling
> > only one slice.
> >
> > >
> > > if (I915_READ(DBUF_CTL_S2) & DBUF_POWER_STATE)
> > > @@ -3827,8 +3828,13 @@ static u16 intel_get_ddb_size(struct
> > drm_i915_private *dev_priv,
> > >
> > > /*
> > > * 12GB/s is maximum BW supported by single DBuf slice.
> > > + *
> > > + * FIXME dbuf slice code is broken:
> > > + * - must wait for planes to stop using the slice before
> > powering it off
> >
> > AFAIR we were already doing it and disabling slice only after
> > update_crtcs, and skl_update_crtc code is taking care of waiting for
> > vblank in case it's required.
> >
> > > + * - plane straddling both slices is illegal in
> > multi-pipe scenarios
> >
> > This is something new :)
> >
> > although this change introduce a major limitation with number and size
> > of planes we can display, yet
> > As code is broken and mentioned conditions need to be taken care of,
> > This change should be ok until proper fix.
> >
> > ~Mahesh
> >
> > > + * - should validate we stay within the hw bandwidth limits
> > > */
> > > - if (num_active > 1 || total_data_bw >= GBps(12)) {
> > > + if (0 && (num_active > 1 || total_data_bw >= GBps(12))) {
> > > ddb->enabled_slices = 2;
> > > } else {
> > > ddb->enabled_slices = 1;
> > > --
> > > 2.19.2
> > >
> > > _______________________________________________
> > > Intel-gfx mailing list
> > > Intel-gfx@lists.freedesktop.org
> > > https://lists.freedesktop.org/mailman/listinfo/intel-gfx
> > _______________________________________________
> > Intel-gfx mailing list
> > Intel-gfx@lists.freedesktop.org
> > https://lists.freedesktop.org/mailman/listinfo/intel-gfx
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [PATCH] drm/i915: Don't use the second dbuf slice on icl
2019-01-21 15:31 [PATCH] drm/i915: Don't use the second dbuf slice on icl Ville Syrjala
` (3 preceding siblings ...)
2019-01-22 9:19 ` [PATCH] " Mahesh Kumar
@ 2019-01-22 9:28 ` Mahesh Kumar
2019-01-25 15:27 ` Ville Syrjälä
2019-01-25 15:09 ` Imre Deak
` (4 subsequent siblings)
9 siblings, 1 reply; 16+ messages in thread
From: Mahesh Kumar @ 2019-01-22 9:28 UTC (permalink / raw)
To: Ville Syrjala; +Cc: intel-gfx
Hi,
On Mon, Jan 21, 2019 at 9:01 PM Ville Syrjala
<ville.syrjala@linux.intel.com> wrote:
>
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> The code managing the dbuf slices is borked and needs some
> real work to fix. In the meantime let's just stop using the
> second slice.
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
> drivers/gpu/drm/i915/intel_pm.c | 10 ++++++++--
> 1 file changed, 8 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index 8b63afa3a221..1e41c899ffe2 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -3618,7 +3618,8 @@ static u8 intel_enabled_dbuf_slices_num(struct drm_i915_private *dev_priv)
> enabled_slices = 1;
>
> /* Gen prior to GEN11 have only one DBuf slice */
> - if (INTEL_GEN(dev_priv) < 11)
> + /* FIXME dbuf slice code is broken: see intel_get_ddb_size() */
> + if (1 || INTEL_GEN(dev_priv) < 11)
> return enabled_slices;
IMHO we may not need this, If we return from above we'll never disable
second slice in case it's enabled by bios.
Anyhow code changes in intel_get_ddb_size will take care of enabling
only one slice.
>
> if (I915_READ(DBUF_CTL_S2) & DBUF_POWER_STATE)
> @@ -3827,8 +3828,13 @@ static u16 intel_get_ddb_size(struct drm_i915_private *dev_priv,
>
> /*
> * 12GB/s is maximum BW supported by single DBuf slice.
> + *
> + * FIXME dbuf slice code is broken:
> + * - must wait for planes to stop using the slice before powering it off
AFAIR we're already doing it and disabling slice only after
update_crtcs, and skl_update_crtcs code is taking care of waiting for
vblank in case it's required.
> + * - plane straddling both slices is illegal in multi-pipe scenarios
This is something new :)
although this change introduce a major limitation with number and size
of planes we can display, yet
As code is broken and mentioned conditions need to be taken care of,
This change should be ok until proper fix.
~Mahesh
> + * - should validate we stay within the hw bandwidth limits
> */
> - if (num_active > 1 || total_data_bw >= GBps(12)) {
> + if (0 && (num_active > 1 || total_data_bw >= GBps(12))) {
> ddb->enabled_slices = 2;
> } else {
> ddb->enabled_slices = 1;
> --
> 2.19.2
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 16+ messages in thread* Re: [PATCH] drm/i915: Don't use the second dbuf slice on icl
2019-01-22 9:28 ` Mahesh Kumar
@ 2019-01-25 15:27 ` Ville Syrjälä
2019-01-28 3:54 ` Mahesh Kumar
0 siblings, 1 reply; 16+ messages in thread
From: Ville Syrjälä @ 2019-01-25 15:27 UTC (permalink / raw)
To: Mahesh Kumar; +Cc: intel-gfx
On Tue, Jan 22, 2019 at 02:58:46PM +0530, Mahesh Kumar wrote:
> Hi,
>
> On Mon, Jan 21, 2019 at 9:01 PM Ville Syrjala
> <ville.syrjala@linux.intel.com> wrote:
> >
> > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> >
> > The code managing the dbuf slices is borked and needs some
> > real work to fix. In the meantime let's just stop using the
> > second slice.
> >
> > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > ---
> > drivers/gpu/drm/i915/intel_pm.c | 10 ++++++++--
> > 1 file changed, 8 insertions(+), 2 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> > index 8b63afa3a221..1e41c899ffe2 100644
> > --- a/drivers/gpu/drm/i915/intel_pm.c
> > +++ b/drivers/gpu/drm/i915/intel_pm.c
> > @@ -3618,7 +3618,8 @@ static u8 intel_enabled_dbuf_slices_num(struct drm_i915_private *dev_priv)
> > enabled_slices = 1;
> >
> > /* Gen prior to GEN11 have only one DBuf slice */
> > - if (INTEL_GEN(dev_priv) < 11)
> > + /* FIXME dbuf slice code is broken: see intel_get_ddb_size() */
> > + if (1 || INTEL_GEN(dev_priv) < 11)
> > return enabled_slices;
>
> IMHO we may not need this, If we return from above we'll never disable
> second slice in case it's enabled by bios.
> Anyhow code changes in intel_get_ddb_size will take care of enabling
> only one slice.
I suppose. Can't recall if leaving this out caused more warns due
something else getting confused.
>
> >
> > if (I915_READ(DBUF_CTL_S2) & DBUF_POWER_STATE)
> > @@ -3827,8 +3828,13 @@ static u16 intel_get_ddb_size(struct drm_i915_private *dev_priv,
> >
> > /*
> > * 12GB/s is maximum BW supported by single DBuf slice.
> > + *
> > + * FIXME dbuf slice code is broken:
> > + * - must wait for planes to stop using the slice before powering it off
>
> AFAIR we're already doing it and disabling slice only after
> update_crtcs, and skl_update_crtcs code is taking care of waiting for
> vblank in case it's required.
skl_update_crtcs() only deals with reallocation between pipes. It won't
do anything when a single pipe is going from two slices to one slice.
>
> > + * - plane straddling both slices is illegal in multi-pipe scenarios
>
> This is something new :)
>
> although this change introduce a major limitation with number and size
> of planes we can display, yet
> As code is broken and mentioned conditions need to be taken care of,
> This change should be ok until proper fix.
>
> ~Mahesh
>
> > + * - should validate we stay within the hw bandwidth limits
> > */
> > - if (num_active > 1 || total_data_bw >= GBps(12)) {
> > + if (0 && (num_active > 1 || total_data_bw >= GBps(12))) {
> > ddb->enabled_slices = 2;
> > } else {
> > ddb->enabled_slices = 1;
> > --
> > 2.19.2
> >
> > _______________________________________________
> > Intel-gfx mailing list
> > Intel-gfx@lists.freedesktop.org
> > https://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Ville Syrjälä
Intel
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 16+ messages in thread* Re: [PATCH] drm/i915: Don't use the second dbuf slice on icl
2019-01-25 15:27 ` Ville Syrjälä
@ 2019-01-28 3:54 ` Mahesh Kumar
0 siblings, 0 replies; 16+ messages in thread
From: Mahesh Kumar @ 2019-01-28 3:54 UTC (permalink / raw)
To: Ville Syrjälä; +Cc: intel-gfx
Hi,
On Fri, Jan 25, 2019 at 8:58 PM Ville Syrjälä
<ville.syrjala@linux.intel.com> wrote:
>
> On Tue, Jan 22, 2019 at 02:58:46PM +0530, Mahesh Kumar wrote:
> > Hi,
> >
> > On Mon, Jan 21, 2019 at 9:01 PM Ville Syrjala
> > <ville.syrjala@linux.intel.com> wrote:
> > >
> > > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > >
> > > The code managing the dbuf slices is borked and needs some
> > > real work to fix. In the meantime let's just stop using the
> > > second slice.
> > >
> > > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > > ---
> > > drivers/gpu/drm/i915/intel_pm.c | 10 ++++++++--
> > > 1 file changed, 8 insertions(+), 2 deletions(-)
> > >
> > > diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> > > index 8b63afa3a221..1e41c899ffe2 100644
> > > --- a/drivers/gpu/drm/i915/intel_pm.c
> > > +++ b/drivers/gpu/drm/i915/intel_pm.c
> > > @@ -3618,7 +3618,8 @@ static u8 intel_enabled_dbuf_slices_num(struct drm_i915_private *dev_priv)
> > > enabled_slices = 1;
> > >
> > > /* Gen prior to GEN11 have only one DBuf slice */
> > > - if (INTEL_GEN(dev_priv) < 11)
> > > + /* FIXME dbuf slice code is broken: see intel_get_ddb_size() */
> > > + if (1 || INTEL_GEN(dev_priv) < 11)
> > > return enabled_slices;
> >
> > IMHO we may not need this, If we return from above we'll never disable
> > second slice in case it's enabled by bios.
> > Anyhow code changes in intel_get_ddb_size will take care of enabling
> > only one slice.
>
> I suppose. Can't recall if leaving this out caused more warns due
> something else getting confused.
This will not cause any S/W state warning. Only H/W slice will not get
disabled until suspend, If enabled by bios.
>
> >
> > >
> > > if (I915_READ(DBUF_CTL_S2) & DBUF_POWER_STATE)
> > > @@ -3827,8 +3828,13 @@ static u16 intel_get_ddb_size(struct drm_i915_private *dev_priv,
> > >
> > > /*
> > > * 12GB/s is maximum BW supported by single DBuf slice.
> > > + *
> > > + * FIXME dbuf slice code is broken:
> > > + * - must wait for planes to stop using the slice before powering it off
> >
> > AFAIR we're already doing it and disabling slice only after
> > update_crtcs, and skl_update_crtcs code is taking care of waiting for
> > vblank in case it's required.
>
> skl_update_crtcs() only deals with reallocation between pipes. It won't
> do anything when a single pipe is going from two slices to one slice.
hmm agree, I think I missed that part. although we'll disable the
slice only after updating the pipe, yet it'll not wait for vblank
before disabling slice.
that part need fixing :)
~Mahesh
>
> >
> > > + * - plane straddling both slices is illegal in multi-pipe scenarios
> >
> > This is something new :)
> >
> > although this change introduce a major limitation with number and size
> > of planes we can display, yet
> > As code is broken and mentioned conditions need to be taken care of,
> > This change should be ok until proper fix.
> >
> > ~Mahesh
> >
> > > + * - should validate we stay within the hw bandwidth limits
> > > */
> > > - if (num_active > 1 || total_data_bw >= GBps(12)) {
> > > + if (0 && (num_active > 1 || total_data_bw >= GBps(12))) {
> > > ddb->enabled_slices = 2;
> > > } else {
> > > ddb->enabled_slices = 1;
> > > --
> > > 2.19.2
> > >
> > > _______________________________________________
> > > Intel-gfx mailing list
> > > Intel-gfx@lists.freedesktop.org
> > > https://lists.freedesktop.org/mailman/listinfo/intel-gfx
>
> --
> Ville Syrjälä
> Intel
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [PATCH] drm/i915: Don't use the second dbuf slice on icl
2019-01-21 15:31 [PATCH] drm/i915: Don't use the second dbuf slice on icl Ville Syrjala
` (4 preceding siblings ...)
2019-01-22 9:28 ` Mahesh Kumar
@ 2019-01-25 15:09 ` Imre Deak
2019-01-30 15:51 ` [PATCH v2] " Ville Syrjala
` (3 subsequent siblings)
9 siblings, 0 replies; 16+ messages in thread
From: Imre Deak @ 2019-01-25 15:09 UTC (permalink / raw)
To: Ville Syrjala; +Cc: intel-gfx
On Mon, Jan 21, 2019 at 05:31:43PM +0200, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> The code managing the dbuf slices is borked and needs some
> real work to fix. In the meantime let's just stop using the
> second slice.
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Imre Deak <imre.deak@intel.com>
> ---
> drivers/gpu/drm/i915/intel_pm.c | 10 ++++++++--
> 1 file changed, 8 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index 8b63afa3a221..1e41c899ffe2 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -3618,7 +3618,8 @@ static u8 intel_enabled_dbuf_slices_num(struct drm_i915_private *dev_priv)
> enabled_slices = 1;
>
> /* Gen prior to GEN11 have only one DBuf slice */
> - if (INTEL_GEN(dev_priv) < 11)
> + /* FIXME dbuf slice code is broken: see intel_get_ddb_size() */
> + if (1 || INTEL_GEN(dev_priv) < 11)
> return enabled_slices;
>
> if (I915_READ(DBUF_CTL_S2) & DBUF_POWER_STATE)
> @@ -3827,8 +3828,13 @@ static u16 intel_get_ddb_size(struct drm_i915_private *dev_priv,
>
> /*
> * 12GB/s is maximum BW supported by single DBuf slice.
> + *
> + * FIXME dbuf slice code is broken:
> + * - must wait for planes to stop using the slice before powering it off
> + * - plane straddling both slices is illegal in multi-pipe scenarios
> + * - should validate we stay within the hw bandwidth limits
> */
> - if (num_active > 1 || total_data_bw >= GBps(12)) {
> + if (0 && (num_active > 1 || total_data_bw >= GBps(12))) {
> ddb->enabled_slices = 2;
> } else {
> ddb->enabled_slices = 1;
> --
> 2.19.2
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 16+ messages in thread* [PATCH v2] drm/i915: Don't use the second dbuf slice on icl
2019-01-21 15:31 [PATCH] drm/i915: Don't use the second dbuf slice on icl Ville Syrjala
` (5 preceding siblings ...)
2019-01-25 15:09 ` Imre Deak
@ 2019-01-30 15:51 ` Ville Syrjala
2019-01-31 3:48 ` Mahesh Kumar
2019-01-30 17:57 ` ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Don't use the second dbuf slice on icl (rev2) Patchwork
` (2 subsequent siblings)
9 siblings, 1 reply; 16+ messages in thread
From: Ville Syrjala @ 2019-01-30 15:51 UTC (permalink / raw)
To: intel-gfx
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
The code managing the dbuf slices is borked and needs some
real work to fix. In the meantime let's just stop using the
second slice.
v2: Drop the change to intel_enabled_dbuf_slices_num() (Mahesh)
Cc: Mahesh Kumar <mahesh1.sh.kumar@gmail.com>
Reviewed-by: Imre Deak <imre.deak@intel.com> #v1
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/intel_pm.c | 7 ++++++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 53b706154c94..ed9786241307 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -3822,8 +3822,13 @@ static u16 intel_get_ddb_size(struct drm_i915_private *dev_priv,
/*
* 12GB/s is maximum BW supported by single DBuf slice.
+ *
+ * FIXME dbuf slice code is broken:
+ * - must wait for planes to stop using the slice before powering it off
+ * - plane straddling both slices is illegal in multi-pipe scenarios
+ * - should validate we stay within the hw bandwidth limits
*/
- if (num_active > 1 || total_data_bw >= GBps(12)) {
+ if (0 && (num_active > 1 || total_data_bw >= GBps(12))) {
ddb->enabled_slices = 2;
} else {
ddb->enabled_slices = 1;
--
2.19.2
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 16+ messages in thread* Re: [PATCH v2] drm/i915: Don't use the second dbuf slice on icl
2019-01-30 15:51 ` [PATCH v2] " Ville Syrjala
@ 2019-01-31 3:48 ` Mahesh Kumar
0 siblings, 0 replies; 16+ messages in thread
From: Mahesh Kumar @ 2019-01-31 3:48 UTC (permalink / raw)
To: Ville Syrjala; +Cc: intel-gfx
LGTM...
Reviewed-by: Mahesh Kumar <mahesh1.sh.kumar@gmail.com>
On Wed, Jan 30, 2019 at 9:21 PM Ville Syrjala
<ville.syrjala@linux.intel.com> wrote:
>
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> The code managing the dbuf slices is borked and needs some
> real work to fix. In the meantime let's just stop using the
> second slice.
>
> v2: Drop the change to intel_enabled_dbuf_slices_num() (Mahesh)
>
> Cc: Mahesh Kumar <mahesh1.sh.kumar@gmail.com>
> Reviewed-by: Imre Deak <imre.deak@intel.com> #v1
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
> drivers/gpu/drm/i915/intel_pm.c | 7 ++++++-
> 1 file changed, 6 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index 53b706154c94..ed9786241307 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -3822,8 +3822,13 @@ static u16 intel_get_ddb_size(struct drm_i915_private *dev_priv,
>
> /*
> * 12GB/s is maximum BW supported by single DBuf slice.
> + *
> + * FIXME dbuf slice code is broken:
> + * - must wait for planes to stop using the slice before powering it off
> + * - plane straddling both slices is illegal in multi-pipe scenarios
> + * - should validate we stay within the hw bandwidth limits
> */
> - if (num_active > 1 || total_data_bw >= GBps(12)) {
> + if (0 && (num_active > 1 || total_data_bw >= GBps(12))) {
> ddb->enabled_slices = 2;
> } else {
> ddb->enabled_slices = 1;
> --
> 2.19.2
>
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 16+ messages in thread
* ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Don't use the second dbuf slice on icl (rev2)
2019-01-21 15:31 [PATCH] drm/i915: Don't use the second dbuf slice on icl Ville Syrjala
` (6 preceding siblings ...)
2019-01-30 15:51 ` [PATCH v2] " Ville Syrjala
@ 2019-01-30 17:57 ` Patchwork
2019-01-30 18:18 ` ✓ Fi.CI.BAT: success " Patchwork
2019-01-31 0:24 ` ✓ Fi.CI.IGT: " Patchwork
9 siblings, 0 replies; 16+ messages in thread
From: Patchwork @ 2019-01-30 17:57 UTC (permalink / raw)
To: Ville Syrjala; +Cc: intel-gfx
== Series Details ==
Series: drm/i915: Don't use the second dbuf slice on icl (rev2)
URL : https://patchwork.freedesktop.org/series/55517/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
4c2c8d99954e drm/i915: Don't use the second dbuf slice on icl
-:34: CHECK:CAMELCASE: Avoid CamelCase: <GBps>
#34: FILE: drivers/gpu/drm/i915/intel_pm.c:3831:
+ if (0 && (num_active > 1 || total_data_bw >= GBps(12))) {
total: 0 errors, 0 warnings, 1 checks, 14 lines checked
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 16+ messages in thread* ✓ Fi.CI.BAT: success for drm/i915: Don't use the second dbuf slice on icl (rev2)
2019-01-21 15:31 [PATCH] drm/i915: Don't use the second dbuf slice on icl Ville Syrjala
` (7 preceding siblings ...)
2019-01-30 17:57 ` ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Don't use the second dbuf slice on icl (rev2) Patchwork
@ 2019-01-30 18:18 ` Patchwork
2019-01-31 0:24 ` ✓ Fi.CI.IGT: " Patchwork
9 siblings, 0 replies; 16+ messages in thread
From: Patchwork @ 2019-01-30 18:18 UTC (permalink / raw)
To: Ville Syrjala; +Cc: intel-gfx
== Series Details ==
Series: drm/i915: Don't use the second dbuf slice on icl (rev2)
URL : https://patchwork.freedesktop.org/series/55517/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_5511 -> Patchwork_12092
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://patchwork.freedesktop.org/api/1.0/series/55517/revisions/2/mbox/
Known issues
------------
Here are the changes found in Patchwork_12092 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_exec_suspend@basic-s3:
- fi-blb-e6850: PASS -> INCOMPLETE [fdo#107718]
* igt@kms_frontbuffer_tracking@basic:
- fi-byt-clapper: PASS -> FAIL [fdo#103167]
#### Possible fixes ####
* igt@kms_chamelium@common-hpd-after-suspend:
- fi-kbl-7567u: WARN [fdo#109380] -> PASS
* igt@kms_flip@basic-flip-vs-modeset:
- fi-skl-6700hq: DMESG-WARN [fdo#105998] -> PASS +1
* igt@kms_pipe_crc_basic@nonblocking-crc-pipe-a-frame-sequence:
- fi-byt-clapper: FAIL [fdo#103191] / [fdo#107362] -> PASS +2
* igt@kms_pipe_crc_basic@nonblocking-crc-pipe-c:
- fi-kbl-7567u: {SKIP} [fdo#109271] -> PASS +33
* igt@pm_rpm@module-reload:
- fi-skl-6700hq: DMESG-WARN -> PASS
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167
[fdo#103191]: https://bugs.freedesktop.org/show_bug.cgi?id=103191
[fdo#105998]: https://bugs.freedesktop.org/show_bug.cgi?id=105998
[fdo#107362]: https://bugs.freedesktop.org/show_bug.cgi?id=107362
[fdo#107718]: https://bugs.freedesktop.org/show_bug.cgi?id=107718
[fdo#108654]: https://bugs.freedesktop.org/show_bug.cgi?id=108654
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109278]: https://bugs.freedesktop.org/show_bug.cgi?id=109278
[fdo#109380]: https://bugs.freedesktop.org/show_bug.cgi?id=109380
Participating hosts (45 -> 39)
------------------------------
Missing (6): fi-kbl-soraka fi-ilk-m540 fi-byt-squawks fi-bsw-cyan fi-gdg-551 fi-icl-y
Build changes
-------------
* Linux: CI_DRM_5511 -> Patchwork_12092
CI_DRM_5511: bf1da2552de642ebce4ea3f91a3259ef819b13ce @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_4801: 6f6bacf12759fb319ade3ba37861ae711f8a5cd9 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_12092: 4c2c8d99954ede3aa2576355b6a0f693f681538e @ git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
4c2c8d99954e drm/i915: Don't use the second dbuf slice on icl
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12092/
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 16+ messages in thread* ✓ Fi.CI.IGT: success for drm/i915: Don't use the second dbuf slice on icl (rev2)
2019-01-21 15:31 [PATCH] drm/i915: Don't use the second dbuf slice on icl Ville Syrjala
` (8 preceding siblings ...)
2019-01-30 18:18 ` ✓ Fi.CI.BAT: success " Patchwork
@ 2019-01-31 0:24 ` Patchwork
9 siblings, 0 replies; 16+ messages in thread
From: Patchwork @ 2019-01-31 0:24 UTC (permalink / raw)
To: Ville Syrjälä; +Cc: intel-gfx
== Series Details ==
Series: drm/i915: Don't use the second dbuf slice on icl (rev2)
URL : https://patchwork.freedesktop.org/series/55517/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_5511_full -> Patchwork_12092_full
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Known issues
------------
Here are the changes found in Patchwork_12092_full that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_workarounds@suspend-resume-context:
- shard-kbl: PASS -> DMESG-WARN [fdo#103313]
* igt@kms_busy@basic-modeset-c:
- shard-apl: NOTRUN -> FAIL [fdo#109490]
* igt@kms_busy@extended-modeset-hang-newfb-render-b:
- shard-snb: PASS -> DMESG-WARN [fdo#107956]
* igt@kms_busy@extended-modeset-hang-newfb-with-reset-render-a:
- shard-apl: NOTRUN -> DMESG-WARN [fdo#107956]
* igt@kms_color@pipe-b-ctm-max:
- shard-apl: PASS -> FAIL [fdo#108147]
* igt@kms_cursor_crc@cursor-128x42-offscreen:
- shard-hsw: PASS -> INCOMPLETE [fdo#103540]
* igt@kms_cursor_crc@cursor-64x64-random:
- shard-apl: PASS -> FAIL [fdo#103232]
* igt@kms_cursor_crc@cursor-64x64-sliding:
- shard-glk: PASS -> FAIL [fdo#103232]
* igt@kms_flip@flip-vs-blocking-wf-vblank:
- shard-snb: PASS -> DMESG-WARN [fdo#107469]
* igt@kms_plane_alpha_blend@pipe-b-constant-alpha-max:
- shard-glk: PASS -> FAIL [fdo#108145]
* igt@kms_plane_multiple@atomic-pipe-a-tiling-y:
- shard-apl: PASS -> FAIL [fdo#103166] +2
* igt@kms_plane_multiple@atomic-pipe-a-tiling-yf:
- shard-glk: PASS -> FAIL [fdo#103166]
* igt@kms_plane_multiple@atomic-pipe-c-tiling-y:
- shard-apl: NOTRUN -> FAIL [fdo#103166]
#### Possible fixes ####
* igt@gem_workarounds@suspend-resume:
- shard-kbl: INCOMPLETE [fdo#103665] -> PASS
* igt@kms_atomic_interruptible@legacy-dpms:
- shard-hsw: INCOMPLETE [fdo#103540] -> PASS
* igt@kms_ccs@pipe-a-crc-sprite-planes-basic:
- shard-apl: FAIL [fdo#106510] / [fdo#108145] -> PASS
* igt@kms_cursor_crc@cursor-256x85-onscreen:
- shard-apl: FAIL [fdo#103232] -> PASS +3
* igt@kms_cursor_crc@cursor-64x64-random:
- shard-glk: FAIL [fdo#103232] -> PASS +1
* igt@kms_plane@pixel-format-pipe-b-planes-source-clamping:
- shard-apl: FAIL [fdo#108948] -> PASS
* igt@kms_plane_alpha_blend@pipe-a-alpha-opaque-fb:
- shard-glk: FAIL [fdo#108145] -> PASS +1
* igt@kms_plane_multiple@atomic-pipe-a-tiling-x:
- shard-apl: FAIL [fdo#103166] -> PASS
* igt@kms_rotation_crc@sprite-rotation-90:
- shard-apl: INCOMPLETE [fdo#103927] -> PASS
* igt@kms_setmode@basic:
- shard-hsw: FAIL [fdo#99912] -> PASS
* igt@kms_vblank@pipe-b-ts-continuation-idle-hang:
- shard-snb: {SKIP} [fdo#109271] -> PASS +3
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#103166]: https://bugs.freedesktop.org/show_bug.cgi?id=103166
[fdo#103232]: https://bugs.freedesktop.org/show_bug.cgi?id=103232
[fdo#103313]: https://bugs.freedesktop.org/show_bug.cgi?id=103313
[fdo#103540]: https://bugs.freedesktop.org/show_bug.cgi?id=103540
[fdo#103665]: https://bugs.freedesktop.org/show_bug.cgi?id=103665
[fdo#103927]: https://bugs.freedesktop.org/show_bug.cgi?id=103927
[fdo#106510]: https://bugs.freedesktop.org/show_bug.cgi?id=106510
[fdo#107469]: https://bugs.freedesktop.org/show_bug.cgi?id=107469
[fdo#107956]: https://bugs.freedesktop.org/show_bug.cgi?id=107956
[fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145
[fdo#108147]: https://bugs.freedesktop.org/show_bug.cgi?id=108147
[fdo#108948]: https://bugs.freedesktop.org/show_bug.cgi?id=108948
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109278]: https://bugs.freedesktop.org/show_bug.cgi?id=109278
[fdo#109490]: https://bugs.freedesktop.org/show_bug.cgi?id=109490
[fdo#99912]: https://bugs.freedesktop.org/show_bug.cgi?id=99912
Participating hosts (7 -> 5)
------------------------------
Missing (2): shard-skl shard-iclb
Build changes
-------------
* Linux: CI_DRM_5511 -> Patchwork_12092
CI_DRM_5511: bf1da2552de642ebce4ea3f91a3259ef819b13ce @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_4801: 6f6bacf12759fb319ade3ba37861ae711f8a5cd9 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_12092: 4c2c8d99954ede3aa2576355b6a0f693f681538e @ git://anongit.freedesktop.org/gfx-ci/linux
piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12092/
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 16+ messages in thread