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* [PATCH v1 1/6] Add device tree for Nuvoton RunBMC Module board
@ 2019-02-01  8:40 Samuel.Jiang
  2019-02-01  8:40 ` [PATCH v1 2/6] ARM: dts: nuvoton: nuvoton-npcm750-runbmc: add jtag and led nodes Samuel.Jiang
                   ` (4 more replies)
  0 siblings, 5 replies; 6+ messages in thread
From: Samuel.Jiang @ 2019-02-01  8:40 UTC (permalink / raw)
  To: KWLIU, joel, tomer.maimon, fran.hsu; +Cc: openbmc

From: Samuel Jiang <Samuel.Jiang@quantatw.com>

Initial device tree for Nuvoton RunBMC Module based on Nuvoton EVB board

Including features:
1. image partitions
2. pwm fan controller
3. lpc and kcs
4. usb
5. serial port
6. spi
7. fiu
8. watchdog

Signed-off-by: Samuel Jiang <Samuel.Jiang@quantatw.com>
---
 arch/arm/boot/dts/nuvoton-npcm750-runbmc.dts | 343 +++++++++++++++++++
 1 file changed, 343 insertions(+)
 create mode 100644 arch/arm/boot/dts/nuvoton-npcm750-runbmc.dts

diff --git a/arch/arm/boot/dts/nuvoton-npcm750-runbmc.dts b/arch/arm/boot/dts/nuvoton-npcm750-runbmc.dts
new file mode 100644
index 000000000000..7ab03add7f9c
--- /dev/null
+++ b/arch/arm/boot/dts/nuvoton-npcm750-runbmc.dts
@@ -0,0 +1,343 @@
+// SPDX-License-Identifier: GPL-2.0
+// Copyright (c) 2018 Nuvoton Technology tomer.maimon@nuvoton.com
+// Copyright 2018 Google, Inc.
+
+/dts-v1/;
+#include "nuvoton-npcm750.dtsi"
+
+/ {
+	model = "Nuvoton npcm750 RunBMC Module";
+	compatible = "nuvoton,npcm750";
+
+	aliases {
+		serial0 = &serial0;
+		serial1 = &serial1;
+		serial2 = &serial2;
+		serial3 = &serial3;
+		udc0 = &udc0;
+		udc1 = &udc1;
+		udc2 = &udc2;
+		udc3 = &udc3;
+		udc4 = &udc4;
+		udc5 = &udc5;
+		udc6 = &udc6;
+		udc7 = &udc7;
+		udc8 = &udc8;
+		udc9 = &udc9;
+		emmc0 = &sdhci0;
+		spi0 = &spi0;
+		spi1 = &spi1;
+		fiu0 = &fiu0;
+		fiu1 = &fiu3;
+		fiu2 = &fiux;
+	};
+
+	chosen {
+		stdout-path = &serial3;
+	};
+
+	memory {
+		reg = <0 0x40000000>;
+	};
+
+	ahb {
+
+		ehci1: usb@f0806000 {
+			status = "okay";
+		};
+
+		ohci1: ohci@f0807000 {
+			status = "okay";
+		};
+
+		udc0:udc@f0830000 {
+			status = "okay";
+		};
+
+		udc1:udc@f0831000 {
+			status = "okay";
+		};
+
+		udc2:udc@f0832000 {
+			status = "okay";
+		};
+
+		udc3:udc@f0833000 {
+			status = "okay";
+		};
+
+		udc4:udc@f0834000 {
+			status = "okay";
+		};
+
+		udc5:udc@f0835000 {
+			status = "okay";
+		};
+
+		udc6:udc@f0836000 {
+			status = "okay";
+		};
+
+		udc7:udc@f0837000 {
+			status = "okay";
+		};
+
+		udc8:udc@f0838000 {
+			status = "okay";
+		};
+
+		udc9:udc@f0839000 {
+			status = "okay";
+		};
+
+		aes:aes@f0858000 {
+			status = "okay";
+		};
+
+		sha:sha@f085a000 {
+			status = "okay";
+		};
+
+		fiu0: fiu@fb000000 {
+			pinctrl-names = "default";
+			pinctrl-0 = <&spi0cs1_pins>;
+			status = "okay";
+			spi-nor@0 {
+				compatible = "jedec,spi-nor";
+				#address-cells = <1>;
+				#size-cells = <1>;
+				reg = <0>;
+				spi-rx-bus-width = <2>;
+				partitions@80000000 {
+						compatible = "fixed-partitions";
+						#address-cells = <1>;
+						#size-cells = <1>;
+						bmc@0{
+							label = "bmc";
+							reg = <0x0000000 0x2000000>;
+						};
+						u-boot@0 {
+							label = "u-boot";
+							reg = <0x0000000 0x80000>;
+						};
+						envparam@100000 {
+							label = "env-param";
+							reg = <0x0100000 0x40000>;
+						};
+						kernel@200000 {
+							label = "kernel";
+							reg = <0x0200000 0x580000>;
+						};
+						rofs@780000 {
+							label = "rofs";
+							reg = <0x0780000 0x1680000>;
+						};
+						rwfs@1e00000 {
+							label = "rwfs";
+							reg = <0x1e00000 0x200000>;
+						};
+				};
+			};
+			spi-nor@1 {
+				compatible = "jedec,spi-nor";
+				#address-cells = <1>;
+				#size-cells = <1>;
+				reg = <1>;
+				npcm,fiu-rx-bus-width = <2>;
+				partitions@88000000 {
+					compatible = "fixed-partitions";
+					#address-cells = <1>;
+					#size-cells = <1>;
+					spare1@0 {
+						label = "spi0-cs1-spare1";
+						reg = <0x0 0x800000>;
+					};
+					spare2@800000 {
+						label = "spi0-cs1-spare2";
+						reg = <0x800000 0x0>;
+					};
+				};
+			};
+		};
+
+		fiu3: fiu@c0000000 {
+			pinctrl-0 = <&spi3_pins>;
+			status = "okay";
+			spi-nor@0 {
+				compatible = "jedec,spi-nor";
+				#address-cells = <1>;
+				#size-cells = <1>;
+				reg = <0>;
+				spi-rx-bus-width = <2>;
+				partitions@A0000000 {
+					compatible = "fixed-partitions";
+					#address-cells = <1>;
+					#size-cells = <1>;
+					system1@0 {
+						label = "spi3-system1";
+						reg = <0x0 0x800000>;
+					};
+					system2@800000 {
+						label = "spi3-system2";
+						reg = <0x800000 0x0>;
+					};
+				};
+			};
+		};
+
+		fiux: fiu@fb001000 {
+			status = "disabled";
+			spix-mode;
+		};
+
+		sdhci0: sdhci@f0842000 {
+			status = "okay";
+		};
+
+		pcimbox: pcimbox@f0848000 {
+			status = "okay";
+		};
+
+		vcd: vcd@f0810000 {
+			status = "okay";
+		};
+
+		ece: ece@f0820000 {
+			status = "okay";
+		};
+
+		apb {
+
+			watchdog1: watchdog@901C {
+				status = "okay";
+			};
+
+			rng: rng@b000 {
+				status = "okay";
+			};
+
+			serial0: serial@1000 {
+				status = "okay";
+			};
+
+			serial1: serial@2000 {
+				status = "okay";
+			};
+
+			serial2: serial@3000 {
+				status = "okay";
+			};
+
+			serial3: serial@4000 {
+				status = "okay";
+			};
+
+			adc: adc@c000 {
+				status = "okay";
+			};
+			otp:otp@189000 {
+				status = "okay";
+			};
+
+			lpc_kcs: lpc_kcs@7000 {
+				kcs1: kcs1@0 {
+					status = "okay";
+				};
+
+				kcs2: kcs2@0 {
+					status = "okay";
+				};
+
+				kcs3: kcs3@0 {
+					status = "okay";
+				};
+			};
+
+			lpc_host: lpc_host@7000 {
+				lpc_bpc: lpc_bpc@40 {
+					monitor-ports = <0x80>;
+					status = "okay";
+				};
+			};
+
+			pwm_fan:pwm-fan-controller@103000 {
+				pinctrl-names = "default";
+				pinctrl-0 = <   &pwm0_pins &pwm1_pins
+								&fanin0_pins &fanin1_pins
+								&fanin2_pins &fanin3_pins
+								&fanin4_pins &fanin5_pins
+								&fanin6_pins &fanin7_pins
+								&fanin8_pins &fanin9_pins
+								&fanin10_pins &fanin11_pins>;
+						status = "okay";
+
+				fan@0 {
+					reg = <0x00>;
+					fan-tach-ch = /bits/ 8 <0x00 0x01>;
+					cooling-levels = <127 255>;
+				};
+				fan@1 {
+					reg = <0x01>;
+					fan-tach-ch = /bits/ 8 <0x02 0x03>;
+					cooling-levels = /bits/ 8 <127 255>;
+				};
+				fan@2 {
+					reg = <0x02>;
+					fan-tach-ch = /bits/ 8 <0x04 0x05>;
+					cooling-levels = /bits/ 8 <127 255>;
+				};
+				fan@3 {
+					reg = <0x03>;
+					fan-tach-ch = /bits/ 8 <0x06 0x07>;
+					cooling-levels = /bits/ 8 <127 255>;
+				};
+				fan@4 {
+					reg = <0x04>;
+					fan-tach-ch = /bits/ 8 <0x08 0x09>;
+					cooling-levels = /bits/ 8 <127 255>;
+				};
+				fan@5 {
+					reg = <0x05>;
+					fan-tach-ch = /bits/ 8 <0x0A 0x0B>;
+					cooling-levels = /bits/ 8 <127 255>;
+				};
+				fan@6 {
+					reg = <0x06>;
+					fan-tach-ch = /bits/ 8 <0x0C 0x0D>;
+					cooling-levels = /bits/ 8 <127 255>;
+				};
+				fan@7 {
+					reg = <0x07>;
+					fan-tach-ch = /bits/ 8 <0x0E 0x0F>;
+					cooling-levels = /bits/ 8 <127 255>;
+				};
+			};
+
+			spi0: spi@200000 {
+				cs-gpios = <&gpio6 11 GPIO_ACTIVE_LOW>;
+				status = "okay";
+			};
+
+			spi1: spi@201000 {
+				status = "okay";
+			};
+
+		};
+	};
+
+	pinctrl: pinctrl@f0800000 {
+		pinctrl-names = "default";
+
+	};
+
+};
+
+&gcr {
+	serial_port_mux: mux-controller {
+		compatible = "mmio-mux";
+		#mux-control-cells = <1>;
+
+		mux-reg-masks = <0x38 0x07>;
+		idle-states = <6>; /* Serial port mode 7 (takeover) */
+	};
+};
-- 
2.17.1

^ permalink raw reply related	[flat|nested] 6+ messages in thread

* [PATCH v1 2/6] ARM: dts: nuvoton: nuvoton-npcm750-runbmc: add jtag and led nodes
  2019-02-01  8:40 [PATCH v1 1/6] Add device tree for Nuvoton RunBMC Module board Samuel.Jiang
@ 2019-02-01  8:40 ` Samuel.Jiang
  2019-02-01  8:40 ` [PATCH v1 3/6] ARM: dts: nuvoton: nuvoton-npcm750-runbmc: Add i2c nodes Samuel.Jiang
                   ` (3 subsequent siblings)
  4 siblings, 0 replies; 6+ messages in thread
From: Samuel.Jiang @ 2019-02-01  8:40 UTC (permalink / raw)
  To: KWLIU, joel, tomer.maimon, fran.hsu; +Cc: openbmc

From: Samuel Jiang <Samuel.Jiang@quantatw.com>

Add leds setting which on RunBMC Module and add jtag node

Signed-off-by: Samuel Jiang <Samuel.Jiang@quantatw.com>
---
 arch/arm/boot/dts/nuvoton-npcm750-runbmc.dts | 40 ++++++++++++++++++++
 1 file changed, 40 insertions(+)

diff --git a/arch/arm/boot/dts/nuvoton-npcm750-runbmc.dts b/arch/arm/boot/dts/nuvoton-npcm750-runbmc.dts
index 7ab03add7f9c..5a56181af25c 100644
--- a/arch/arm/boot/dts/nuvoton-npcm750-runbmc.dts
+++ b/arch/arm/boot/dts/nuvoton-npcm750-runbmc.dts
@@ -329,7 +329,47 @@
 		pinctrl-names = "default";
 
 	};
+	
+	jtag {
+		compatible = "nuvoton,npcm750-jtag";
+		enable_pspi_jtag = <1>;
+		pspi-index = <2>;
+		tck {
+			label = "tck";
+			gpios = <&gpio0 19 0>;
+			regbase = <0xf0010000 0x1000>;
+		};
+
+		tdi {
+			label = "tdi";
+			gpios = <&gpio0 18 0>;
+			regbase = <0xf0010000 0x1000>;
+		};
+
+		tdo {
+			label = "tdo";
+			gpios = <&gpio0 17 0>;
+			regbase = <0xf0010000 0x1000>;
+		};
+
+		tms {
+			label = "tms";
+			gpios = <&gpio0 16 0>;
+			regbase = <0xf0010000 0x1000>;
+		};
+	};
+
+	leds {
+		compatible = "gpio-leds";
+		pinctrl-names = "default";
+		pinctrl-0 = <&gpio110ol_pins>;
 
+		led {
+		label = "led-green-arm";
+			gpios = <&gpio3 14 GPIO_ACTIVE_HIGH>;
+			linux,default-trigger = "heartbeat";
+		};
+	};
 };
 
 &gcr {
-- 
2.17.1

^ permalink raw reply related	[flat|nested] 6+ messages in thread

* [PATCH v1 3/6] ARM: dts: nuvoton: nuvoton-npcm750-runbmc: Add i2c nodes
  2019-02-01  8:40 [PATCH v1 1/6] Add device tree for Nuvoton RunBMC Module board Samuel.Jiang
  2019-02-01  8:40 ` [PATCH v1 2/6] ARM: dts: nuvoton: nuvoton-npcm750-runbmc: add jtag and led nodes Samuel.Jiang
@ 2019-02-01  8:40 ` Samuel.Jiang
  2019-02-01  8:40 ` [PATCH v1 4/6] ARM: dts: nuvoton: nuvoton-npcm750-runbmc: Add i2c ioexpander nodes Samuel.Jiang
                   ` (2 subsequent siblings)
  4 siblings, 0 replies; 6+ messages in thread
From: Samuel.Jiang @ 2019-02-01  8:40 UTC (permalink / raw)
  To: KWLIU, joel, tomer.maimon, fran.hsu; +Cc: openbmc

From: Samuel Jiang <Samuel.Jiang@quantatw.com>

Add i2c nodes, including:
1. ADC
2. EEPROM
3. i2c-switch
4. Temperature Sensor
5. ADM

Signed-off-by: Samuel Jiang <Samuel.Jiang@quantatw.com>
---
 arch/arm/boot/dts/nuvoton-npcm750-runbmc.dts | 213 +++++++++++++++++++
 1 file changed, 213 insertions(+)

diff --git a/arch/arm/boot/dts/nuvoton-npcm750-runbmc.dts b/arch/arm/boot/dts/nuvoton-npcm750-runbmc.dts
index 5a56181af25c..f2eda099d20a 100644
--- a/arch/arm/boot/dts/nuvoton-npcm750-runbmc.dts
+++ b/arch/arm/boot/dts/nuvoton-npcm750-runbmc.dts
@@ -25,6 +25,17 @@
 		udc8 = &udc8;
 		udc9 = &udc9;
 		emmc0 = &sdhci0;
+		i2c1 = &i2c1;
+		i2c2 = &i2c2;
+		i2c3 = &i2c3;
+		i2c4 = &i2c4;
+		i2c5 = &i2c5;
+		i2c6 = &i2c6;
+		i2c7 = &i2c7;
+		i2c8 = &i2c8;
+		i2c9 = &i2c9;
+		i2c10 = &i2c10;
+		i2c13 = &i2c13;
 		spi0 = &spi0;
 		spi1 = &spi1;
 		fiu0 = &fiu0;
@@ -260,6 +271,208 @@
 				};
 			};
 
+			i2c1: i2c@81000 {
+				#address-cells = <1>;
+				#size-cells = <0>;
+				bus-frequency = <100000>;
+				status = "okay";
+				i2c-switch@70 {
+					compatible = "nxp,pca9548";
+					#address-cells = <1>;
+					#size-cells = <0>;
+					reg = <0x70>;
+					i2c-mux-idle-disconnect;
+
+					i2c_slot1a: i2c-bus@0 {
+						#address-cells = <1>;
+						#size-cells = <0>;
+						reg = <0>;
+					};
+
+					i2c_slot1b: i2c-bus@1 {
+						#address-cells = <1>;
+						#size-cells = <0>;
+						reg = <1>;
+					};
+
+					i2c_slot2a: i2c-bus@2 {
+						#address-cells = <1>;
+						#size-cells = <0>;
+						reg = <2>;
+					};
+
+					i2c_slot2b: i2c-bus@3 {
+						#address-cells = <1>;
+						#size-cells = <0>;
+						reg = <3>;
+					};
+
+					i2c_slot3: i2c-bus@4 {
+						#address-cells = <1>;
+						#size-cells = <0>;
+						reg = <4>;
+					};
+
+					i2c_slot4: i2c-bus@5 {
+						#address-cells = <1>;
+						#size-cells = <0>;
+						reg = <5>;
+					};
+
+					i2c_slot5: i2c-bus@6 {
+						#address-cells = <1>;
+						#size-cells = <0>;
+						reg = <6>;
+					};
+				};
+
+				i2c-switch@71 {
+					compatible = "nxp,pca9546";
+					reg = <0x71>;
+					#address-cells = <1>;
+					#size-cells = <0>;
+					i2c-mux-idle-disconnect;
+
+					i2c_m2_s1: i2c-bus@0 {
+						#address-cells = <1>;
+						#size-cells = <0>;
+						reg = <0>;
+					};
+
+					i2c_m2_s2: i2c-bus@1 {
+						#address-cells = <1>;
+						#size-cells = <0>;
+						reg = <1>;
+					};
+					i2c_m2_s3: i2c-bus@2 {
+						#address-cells = <1>;
+						#size-cells = <0>;
+						reg = <2>;
+					};
+
+					i2c_m2_s4: i2c-bus@3 {
+						#address-cells = <1>;
+						#size-cells = <0>;
+						reg = <3>;
+					};
+				};
+			};
+
+			i2c2: i2c@82000 {
+				#address-cells = <1>;
+				#size-cells = <0>;
+				bus-frequency = <100000>;
+				status = "okay";
+				tmp421@4c {
+					compatible = "ti,tmp421";
+					reg = <0x4c>;
+				};
+			};
+
+			i2c3: i2c@83000 {
+				#address-cells = <1>;
+				#size-cells = <0>;
+				bus-frequency = <100000>;
+				status = "okay";
+			};
+
+			i2c4: i2c@84000 {
+				#address-cells = <1>;
+				#size-cells = <0>;
+				bus-frequency = <100000>;
+				status = "okay";
+				eeprom@54 {
+					compatible = "atmel,24c64";
+					reg = <0x54>;
+				};
+			};
+
+			i2c5: i2c@85000 {
+				#address-cells = <1>;
+				#size-cells = <0>;
+				bus-frequency = <100000>;
+				status = "okay";
+			};
+
+			i2c6: i2c@86000 {
+				#address-cells = <1>;
+				#size-cells = <0>;
+				bus-frequency = <100000>;
+				status = "okay";
+			};
+
+			i2c7: i2c@87000 {
+				#address-cells = <1>;
+				#size-cells = <0>;
+				bus-frequency = <100000>;
+				status = "okay";
+				tmp421@4c {
+					compatible = "ti,tmp421";
+					reg = <0x4c>;
+				};
+
+				adc128d818@1d {
+					compatible = "ti,adc128d818";
+					reg = <0x1d>;
+					ti,mode = <1>;
+				};
+			};
+
+			i2c8: i2c@88000 {
+				#address-cells = <1>;
+				#size-cells = <0>;
+				bus-frequency = <100000>;
+				status = "okay";
+				adm1278@11 {
+					compatible = "adm1278";
+					reg = <0x11>;
+					Rsense = <500>;
+				};
+
+				adm1278@12 {
+					compatible = "adm1278";
+					reg = <0x12>;
+					Rsense = <500>;
+				};
+			};
+
+			i2c9: i2c@89000 {
+				#address-cells = <1>;
+				#size-cells = <0>;
+				bus-frequency = <100000>;
+				status = "okay";
+			};
+
+			i2c10: i2c@8a000 {
+				#address-cells = <1>;
+				#size-cells = <0>;
+				bus-frequency = <100000>;
+				status = "okay";
+			};
+
+			i2c13: i2c@8d000 {
+				#address-cells = <1>;
+				#size-cells = <0>;
+				bus-frequency = <100000>;
+				status = "okay";
+				tmp75@4a {
+					compatible = "ti,tmp75";
+					reg = <0x4a>;
+					status = "okay";
+				};
+				m24128_fru@51 {
+					compatible = "atmel,24c128";
+					reg = <0x51>;
+					pagesize = <64>;
+					status = "okay";
+				};
+				ATtiny1634@52 {
+					compatible = "atmel,ATtiny1634";
+					reg = <0x52>;
+					status = "disabled";
+				};
+			};
+
 			pwm_fan:pwm-fan-controller@103000 {
 				pinctrl-names = "default";
 				pinctrl-0 = <   &pwm0_pins &pwm1_pins
-- 
2.17.1

^ permalink raw reply related	[flat|nested] 6+ messages in thread

* [PATCH v1 4/6] ARM: dts: nuvoton: nuvoton-npcm750-runbmc: Add i2c ioexpander nodes
  2019-02-01  8:40 [PATCH v1 1/6] Add device tree for Nuvoton RunBMC Module board Samuel.Jiang
  2019-02-01  8:40 ` [PATCH v1 2/6] ARM: dts: nuvoton: nuvoton-npcm750-runbmc: add jtag and led nodes Samuel.Jiang
  2019-02-01  8:40 ` [PATCH v1 3/6] ARM: dts: nuvoton: nuvoton-npcm750-runbmc: Add i2c nodes Samuel.Jiang
@ 2019-02-01  8:40 ` Samuel.Jiang
  2019-02-01  8:40 ` [PATCH v1 5/6] ARM: dts: nuvoton: nuvoton-npcm750-runbmc: define gpios inside Module Samuel.Jiang
  2019-02-01  8:40 ` [PATCH v1 6/6] ARM: dts: nuvoton: nuvoton-npcm750-runbmc: define gpios outside Module Samuel.Jiang
  4 siblings, 0 replies; 6+ messages in thread
From: Samuel.Jiang @ 2019-02-01  8:40 UTC (permalink / raw)
  To: KWLIU, joel, tomer.maimon, fran.hsu; +Cc: openbmc

From: Samuel Jiang <Samuel.Jiang@quantatw.com>

Add i2c ioexpender nodes and define gpios which outside RunBMC Module

Signed-off-by: Samuel Jiang <Samuel.Jiang@quantatw.com>
---
 arch/arm/boot/dts/nuvoton-npcm750-runbmc.dts | 404 +++++++++++++++++++
 1 file changed, 404 insertions(+)

diff --git a/arch/arm/boot/dts/nuvoton-npcm750-runbmc.dts b/arch/arm/boot/dts/nuvoton-npcm750-runbmc.dts
index f2eda099d20a..a90c66ea2e17 100644
--- a/arch/arm/boot/dts/nuvoton-npcm750-runbmc.dts
+++ b/arch/arm/boot/dts/nuvoton-npcm750-runbmc.dts
@@ -35,6 +35,8 @@
 		i2c8 = &i2c8;
 		i2c9 = &i2c9;
 		i2c10 = &i2c10;
+    i2c11 = &i2c11;
+    i2c12 = &i2c12;
 		i2c13 = &i2c13;
 		spi0 = &spi0;
 		spi1 = &spi1;
@@ -450,6 +452,408 @@
 				status = "okay";
 			};
 
+			i2c11: i2c@8b000 {
+				#address-cells = <1>;
+				#size-cells = <0>;
+				bus-frequency = <100000>;
+				status = "okay";
+				pca9539_g1a: pca9539-g1a@74 {
+					compatible = "nxp,pca9539";
+					reg = <0x74>;
+					gpio-controller;
+					#gpio-cells = <2>;
+					reset-gpios = <&gpio7 4 GPIO_ACTIVE_LOW>;    /* Rst gpio228 */
+					G1A_P0_0 {
+						gpio-hog;
+						gpios = <0 0>;
+						output-high;
+						line-name = "TPM_BMC_ALERT_N";
+					};
+					G1A_P0_1 {
+						gpio-hog;
+						gpios = <1 0>;
+						input;
+						line-name = "FM_BIOS_TOP_SWAP";
+					};
+					G1A_P0_2 {
+						gpio-hog;
+						gpios = <2 0>;
+						input;
+						line-name = "FM_BIOS_PREFRB2_GOOD";
+					};
+					G1A_P0_3 {
+						gpio-hog;
+						gpios = <3 0>;
+						input;
+						line-name = "BMC_SATAXPCIE_0TO3_SEL";
+					};
+					G1A_P0_4 {
+						gpio-hog;
+						gpios = <4 0>;
+						input;
+						line-name = "BMC_SATAXPCIE_4TO7_SEL";
+					};
+					G1A_P0_5 {
+						gpio-hog;
+						gpios = <5 0>;
+						output-low;
+						line-name = "FM_UV_ADR_TRIGGER_EN_N";
+					};
+					G1A_P0_6 {
+						gpio-hog;
+						gpios = <6 0>;
+						input;
+						line-name = "RM_THROTTLE_EN_N";
+					};
+					G1A_P1_0 {
+						gpio-hog;
+						gpios = <8 0>;
+						input;
+						line-name = "FM_BMC_TPM_PRES_N";
+					};
+					G1A_P1_1 {
+						gpio-hog;
+						gpios = <9 0>;
+						input;
+						line-name = "FM_CPU0_SKTOCC_LVT3_N";
+					};
+					G1A_P1_2 {
+						gpio-hog;
+						gpios = <10 0>;
+						input;
+						line-name = "FM_CPU1_SKTOCC_LVT3_N";
+					};
+					G1A_P1_3 {
+						gpio-hog;
+						gpios = <11 0>;
+						input;
+						line-name = "PSU1_ALERT_N";
+					};
+					G1A_P1_4 {
+						gpio-hog;
+						gpios = <12 0>;
+						input;
+						line-name = "PSU2_ALERT_N";
+					};
+					G1A_P1_5 {
+						gpio-hog;
+						gpios = <13 0>;
+						input;
+						line-name = "H_CPU0_FAST_WAKE_LVT3_N";
+					};
+					G1A_P1_6 {
+						gpio-hog;
+						gpios = <14 0>;
+						output-high;
+						line-name = "I2C_MUX1_RESET_N";
+					};
+					G1A_P1_7 {
+						gpio-hog;
+						gpios = <15 0>;
+						input;
+						line-name = "FM_CPU_CATERR_LVT3_N";
+					};
+				};
+				pca9539_g1b: pca9539-g1b@75 {
+					compatible = "nxp,pca9539";
+					reg = <0x75>;
+					gpio-controller;
+					#gpio-cells = <2>;
+					/*reset-gpios = <&gpio7 4 GPIO_ACTIVE_LOW>;     Rst gpio228 */
+					G1B_P0_0 {
+						gpio-hog;
+						gpios = <0 0>;
+						input;
+						line-name = "PVDDQ_ABC_PINALERT_N";
+					};
+					G1B_P0_1 {
+						gpio-hog;
+						gpios = <1 0>;
+						input;
+						line-name = "PVDDQ_DEF_PINALERT_N";
+					};
+					G1B_P0_2 {
+						gpio-hog;
+						gpios = <2 0>;
+						input;
+						line-name = "PVDDQ_GHJ_PINALERT_N";
+					};
+					G1B_P0_3 {
+						gpio-hog;
+						gpios = <3 0>;
+						input;
+						line-name = "PVDDQ_KLM_PINALERT_N";
+					};
+					G1B_P0_5 {
+						gpio-hog;
+						gpios = <5 0>;
+						input;
+						line-name = "FM_BOARD_REV_ID0";
+					};
+					G1B_P0_6 {
+						gpio-hog;
+						gpios = <6 0>;
+						input;
+						line-name = "FM_BOARD_REV_ID1";
+					};
+					G1B_P0_7 {
+						gpio-hog;
+						gpios = <7 0>;
+						input;
+						line-name = "FM_BOARD_REV_ID2";
+					};
+					G1B_P1_0 {
+						gpio-hog;
+						gpios = <8 0>;
+						input;
+						line-name = "FM_OC_DETECT_EN_N";
+					};
+					G1B_P1_1 {
+						gpio-hog;
+						gpios = <9 0>;
+						input;
+						line-name = "FM_FLASH_DESC_OVERRIDE";
+					};
+					G1B_P1_2 {
+						gpio-hog;
+						gpios = <10 0>;
+						output-low;
+						line-name = "FP_PWR_ID_LED_N";
+					};
+					G1B_P1_3 {
+						gpio-hog;
+						gpios = <11 0>;
+						output-low;
+						line-name = "BMC_LED_PWR_GRN";
+					};
+					G1B_P1_4 {
+						gpio-hog;
+						gpios = <12 0>;
+						output-low;
+						line-name = "BMC_LED_PWR_AMBER";
+					};
+					G1B_P1_5 {
+						gpio-hog;
+						gpios = <13 0>;
+						output-high;
+						line-name = "FM_BMC_FAULT_LED_N";
+					};
+					G1B_P1_6 {
+						gpio-hog;
+						gpios = <14 0>;
+						output-high;
+						line-name = "FM_CPLD_BMC_PWRDN_N";
+					};
+					G1B_P1_7 {
+						gpio-hog;
+						gpios = <15 0>;
+						output-high;
+						line-name = "BMC_LED_CATERR_N";
+					};
+				};
+			};
+
+			i2c12: i2c@8c000 {
+				#address-cells = <1>;
+				#size-cells = <0>;
+				bus-frequency = <100000>;
+				status = "okay";
+				pca9539_g2a: pca9539-g2a@74 {
+					compatible = "nxp,pca9539";
+					reg = <0x74>;
+					gpio-controller;
+					#gpio-cells = <2>;
+					reset-gpios = <&gpio5 28 GPIO_ACTIVE_LOW>;    /* Rst gpio188 */
+					G2A_P0_0 {
+						gpio-hog;
+						gpios = <0 0>;
+						output-high;
+						line-name = "BMC_PON_RST_REQ_N";
+					};
+					G2A_P0_1 {
+						gpio-hog;
+						gpios = <1 0>;
+						output-high;
+						line-name = "BMC_RST_IND_REQ_N";
+					};
+					G2A_P0_2 {
+						gpio-hog;
+						gpios = <2 0>;
+						input;
+						line-name = "RST_BMC_RTCRST";
+					};
+					G2A_P0_3 {
+						gpio-hog;
+						gpios = <3 0>;
+						output-high;
+						line-name = "FM_BMC_PWRBTN_OUT_N";
+					};
+					G2A_P0_4 {
+						gpio-hog;
+						gpios = <4 0>;
+						output-high;
+						line-name = "RST_BMC_SYSRST_BTN_OUT_N";
+					};
+					G2A_P0_5 {
+						gpio-hog;
+						gpios = <5 0>;
+						output-high;
+						line-name = "FM_BATTERY_SENSE_EN_N";
+					};
+					G2A_P0_6 {
+						gpio-hog;
+						gpios = <6 0>;
+						output-high;
+						line-name = "FM_BMC_READY_N";
+					};
+					G2A_P0_7 {
+						gpio-hog;
+						gpios = <7 0>;
+						input;
+						line-name = "IRQ_BMC_PCH_SMI_LPC_N";
+					};
+					G2A_P1_0 {
+						gpio-hog;
+						gpios = <8 0>;
+						input;
+						line-name = "FM_SLOT4_CFG0";
+					};
+					G2A_P1_1 {
+						gpio-hog;
+						gpios = <9 0>;
+						input;
+						line-name = "FM_SLOT4_CFG1";
+					};
+					G2A_P1_2 {
+						gpio-hog;
+						gpios = <10 0>;
+						input;
+						line-name = "FM_NVDIMM_EVENT_N";
+					};
+					G2A_P1_3 {
+						gpio-hog;
+						gpios = <11 0>;
+						input;
+						line-name = "PSU1_BLADE_EN_N";
+					};
+					G2A_P1_4 {
+						gpio-hog;
+						gpios = <12 0>;
+						input;
+						line-name = "BMC_PCH_FNM";
+					};
+					G2A_P1_5 {
+						gpio-hog;
+						gpios = <13 0>;
+						input;
+						line-name = "FM_SOL_UART_CH_SEL";
+					};
+					G2A_P1_6 {
+						gpio-hog;
+						gpios = <14 0>;
+						input;
+						line-name = "FM_BIOS_POST_CMPLT_N";
+					};
+				};
+				pca9539_g2b: pca9539-g2b@75 {
+					compatible = "nxp,pca9539";
+					reg = <0x75>;
+					gpio-controller;
+					#gpio-cells = <2>;
+					/*reset-gpios = <&gpio5 28 GPIO_ACTIVE_LOW>;*/
+					G2B_P0_0 {
+						gpio-hog;
+						gpios = <0 0>;
+						input;
+						line-name = "FM_CPU_MSMI_LVT3_N";
+					};
+					G2B_P0_1 {
+						gpio-hog;
+						gpios = <1 0>;
+						input;
+						line-name = "FM_BIOS_MRC_DEBUG_MSG_DIS";
+					};
+					G2B_P0_2 {
+						gpio-hog;
+						gpios = <2 0>;
+						input;
+						line-name = "FM_CPU1_DISABLE_BMC_N";
+					};
+					G2B_P0_3 {
+						gpio-hog;
+						gpios = <3 0>;
+						output-low;
+						line-name = "BMC_JTAG_SELECT";
+					};
+					G2B_P0_4 {
+						gpio-hog;
+						gpios = <4 0>;
+						output-low;
+						line-name = "PECI_MUX_SELECT";
+					};
+					G2B_P0_5 {
+						gpio-hog;
+						gpios = <5 0>;
+						output-high;
+						line-name = "I2C_MUX2_RESET_N";
+					};
+					G2B_P0_6 {
+						gpio-hog;
+						gpios = <6 0>;
+						input;
+						line-name = "FM_BMC_CPLD_PSU2_ON";
+					};
+					G2B_P0_7 {
+						gpio-hog;
+						gpios = <7 0>;
+						output-high;
+						line-name = "PSU2_ALERT_EN_N";
+					};
+					G2B_P1_0 {
+						gpio-hog;
+						gpios = <8 0>;
+						output-high;
+						line-name = "FM_CPU_BMC_INIT";
+					};
+					G2B_P1_1 {
+						gpio-hog;
+						gpios = <9 0>;
+						output-high;
+						line-name = "IRQ_BMC_PCH_SCI_LPC_N";
+					};
+					G2B_P1_2 {
+						gpio-hog;
+						gpios = <10 0>;
+						output-low;
+						line-name = "PMB_ALERT_EN_N";
+					};
+					G2B_P1_3 {
+						gpio-hog;
+						gpios = <11 0>;
+						output-high;
+						line-name = "FM_FAST_PROCHOT_EN_N";
+					};
+					G2B_P1_4 {
+						gpio-hog;
+						gpios = <12 0>;
+						output-high;
+						line-name = "BMC_NVDIMM_PRSNT_N";
+					};
+					G2B_P1_5 {
+						gpio-hog;
+						gpios = <13 0>;
+						output-low;
+						line-name = "FM_BACKUP_BIOS_SEL_H_BMC";
+					};
+					G2B_P1_6 {
+						gpio-hog;
+						gpios = <14 0>;
+						output-high;
+						line-name = "FM_PWRBRK_N";
+					};
+				};
+			};
+
 			i2c13: i2c@8d000 {
 				#address-cells = <1>;
 				#size-cells = <0>;
-- 
2.17.1

^ permalink raw reply related	[flat|nested] 6+ messages in thread

* [PATCH v1 5/6] ARM: dts: nuvoton: nuvoton-npcm750-runbmc: define gpios inside Module
  2019-02-01  8:40 [PATCH v1 1/6] Add device tree for Nuvoton RunBMC Module board Samuel.Jiang
                   ` (2 preceding siblings ...)
  2019-02-01  8:40 ` [PATCH v1 4/6] ARM: dts: nuvoton: nuvoton-npcm750-runbmc: Add i2c ioexpander nodes Samuel.Jiang
@ 2019-02-01  8:40 ` Samuel.Jiang
  2019-02-01  8:40 ` [PATCH v1 6/6] ARM: dts: nuvoton: nuvoton-npcm750-runbmc: define gpios outside Module Samuel.Jiang
  4 siblings, 0 replies; 6+ messages in thread
From: Samuel.Jiang @ 2019-02-01  8:40 UTC (permalink / raw)
  To: KWLIU, joel, tomer.maimon, fran.hsu; +Cc: openbmc

From: Samuel Jiang <Samuel.Jiang@quantatw.com>

Add gpios define on dtsi, define gpio lists which inside RunBMC Module

Signed-off-by: Samuel Jiang <Samuel.Jiang@quantatw.com>
---
 arch/arm/boot/dts/nuvoton-npcm750-gpio.dtsi  | 35 ++++++++++++++++++++
 arch/arm/boot/dts/nuvoton-npcm750-runbmc.dts | 35 +++++++++++++++++++-
 2 files changed, 69 insertions(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/nuvoton-npcm750-gpio.dtsi b/arch/arm/boot/dts/nuvoton-npcm750-gpio.dtsi
index a912910bc7ec..68cd3d817cec 100644
--- a/arch/arm/boot/dts/nuvoton-npcm750-gpio.dtsi
+++ b/arch/arm/boot/dts/nuvoton-npcm750-gpio.dtsi
@@ -8,11 +8,21 @@
 			bias-disable;
 			output-high;
 		};
+		gpio0ol_pins: gpio0ol-pins {
+			pins = "GPIO0/IOX1DI";
+			bias-disable;
+			output-low;
+		};
 		gpio1_pins: gpio1-pins {
 			pins = "GPIO1/IOX1LD";
 			bias-disable;
 			input-enable;
 		};
+		gpio1ol_pins: gpio1ol-pins {
+			pins = "GPIO1/IOX1LD";
+			bias-disable;
+			output-low;
+		};
 		gpio2_pins: gpio2-pins {
 			pins = "GPIO2/IOX1CK";
 			bias-disable;
@@ -23,6 +33,11 @@
 			bias-disable;
 			output_high;
 		};
+		gpio2ol_pins: gpio2ol-pins {
+			pins = "GPIO2/IOX1CK";
+			bias-disable;
+			output-low;
+		};
 		gpio3_pins: gpio3-pins {
 			pins = "GPIO3/IOX1D0";
 			bias-disable;
@@ -33,6 +48,11 @@
 			bias-disable;
 			output-high;
 		};
+		gpio3ol_pins: gpio3ol-pins {
+			pins = "GPIO3/IOX1D0";
+			bias-disable;
+			output-low;
+		};
 		gpio4_pins: gpio4-pins {
 			pins = "GPIO4/IOX2DI/SMB1DSDA";
 			bias-disable;
@@ -78,6 +98,11 @@
 			bias-disable;
 			input-enable;
 		};
+		gpio8o_pins: gpio8o-pins {
+			pins = "GPIO8/LKGPO1";
+			bias-disable;
+			output-high;
+		};
 		gpio8ol_pins: gpio8ol-pins {
 			pins = "GPIO8/LKGPO1";
 			bias-disable;
@@ -168,6 +193,11 @@
 			bias-disable;
 			output-high;
 		};
+		gpio15ol_pins: gpio15ol-pins {
+			pins = "GPIO15/GSPICS/SMB5CSDA";
+			bias-disable;
+			output-low;
+		};
 		gpio16_pins: gpio16-pins {
 			pins = "GPIO16/LKGPO0";
 			bias-disable;
@@ -842,6 +872,11 @@
 			bias-disable;
 			output-high;
 		};
+		gpio94ol_pins: gpio94ol-pins {
+			pins = "GPIO94/nKBRST/SMB5DSDA";
+			bias-disable;
+			output-low;
+		};
 		gpio95_pins: gpio95-pins {
 			pins = "GPIO95/nLRESET/nESPIRST";
 			bias-disable;
diff --git a/arch/arm/boot/dts/nuvoton-npcm750-runbmc.dts b/arch/arm/boot/dts/nuvoton-npcm750-runbmc.dts
index a90c66ea2e17..b589e3982584 100644
--- a/arch/arm/boot/dts/nuvoton-npcm750-runbmc.dts
+++ b/arch/arm/boot/dts/nuvoton-npcm750-runbmc.dts
@@ -38,6 +38,7 @@
     i2c11 = &i2c11;
     i2c12 = &i2c12;
 		i2c13 = &i2c13;
+		gpio0o_pins = &gpio0o_pins;
 		spi0 = &spi0;
 		spi1 = &spi1;
 		fiu0 = &fiu0;
@@ -944,7 +945,39 @@
 
 	pinctrl: pinctrl@f0800000 {
 		pinctrl-names = "default";
-
+		pinctrl-0 = <
+				&gpio0o_pins        /* Note Used */        /******* RunBMC inside Module pins *******/
+				&gpio1ol_pins        /* Note Used */
+				&gpio2ol_pins        /* Note Used */
+				&gpio3ol_pins        /* Note Used */
+				&gpio8o_pins
+				&gpio9ol_pins        /* Note Used */
+				&gpio12ol_pins       /* Note Used */
+				&gpio13ol_pins       /* Note Used */
+				&gpio14ol_pins       /* Note Used */
+				&gpio15ol_pins       /* Note Used */
+				&gpio37ol_pins
+				&gpio38_pins
+				&gpio39_pins
+				&hgpio7_pins
+				&gpio94ol_pins
+			    /*&lpc_pins*/         /* Handled by BB */
+				&gpio108ol_pins       /* Note Used */
+				&gpio109ol_pins       /* Note Used */
+				&gpio111ol_pins
+				&gpio112ol_pins
+				&gpio113ol_pins
+				&gpio208_pins
+				&gpio209ol_pins       /* Note Used */
+				&gpio210ol_pins       /* Note Used */
+				&gpio211ol_pins       /* Note Used */
+				&gpio212ol_pins       /* Note Used */
+				&gpio213ol_pins       /* Note Used */
+				&gpio214ol_pins       /* Note Used */
+				&gpio215ol_pins       /* Note Used */
+				&gpio216ol_pins       /* Note Used */
+				&gpio217ol_pins       /* Note Used */
+				>;
 	};
 	
 	jtag {
-- 
2.17.1

^ permalink raw reply related	[flat|nested] 6+ messages in thread

* [PATCH v1 6/6] ARM: dts: nuvoton: nuvoton-npcm750-runbmc: define gpios outside Module
  2019-02-01  8:40 [PATCH v1 1/6] Add device tree for Nuvoton RunBMC Module board Samuel.Jiang
                   ` (3 preceding siblings ...)
  2019-02-01  8:40 ` [PATCH v1 5/6] ARM: dts: nuvoton: nuvoton-npcm750-runbmc: define gpios inside Module Samuel.Jiang
@ 2019-02-01  8:40 ` Samuel.Jiang
  4 siblings, 0 replies; 6+ messages in thread
From: Samuel.Jiang @ 2019-02-01  8:40 UTC (permalink / raw)
  To: KWLIU, joel, tomer.maimon, fran.hsu; +Cc: openbmc

From: Samuel Jiang <Samuel.Jiang@quantatw.com>

add gpios define on dtsi, define gpio lists which outside RunBMC Module

Signed-off-by: Samuel Jiang <Samuel.Jiang@quantatw.com>
---
 arch/arm/boot/dts/nuvoton-npcm750-gpio.dtsi  | 70 ++++++++++++++++
 arch/arm/boot/dts/nuvoton-npcm750-runbmc.dts | 84 +++++++++++++++++++-
 2 files changed, 153 insertions(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/nuvoton-npcm750-gpio.dtsi b/arch/arm/boot/dts/nuvoton-npcm750-gpio.dtsi
index 68cd3d817cec..337000212db4 100644
--- a/arch/arm/boot/dts/nuvoton-npcm750-gpio.dtsi
+++ b/arch/arm/boot/dts/nuvoton-npcm750-gpio.dtsi
@@ -278,6 +278,11 @@
 			bias-disable;
 			input-enable;
 		};
+		gpio22o_pins: gpio22o-pins {
+			pins = "GPIO22/SMB4DSDA/SMB14SDA";
+			bias-disable;
+			output-high;
+		};
 		gpio22ol_pins: gpio22ol-pins {
 			pins = "GPIO22/SMB4DSDA/SMB14SDA";
 			bias-disable;
@@ -333,6 +338,16 @@
 			bias-disable;
 			input-enable;
 		};
+		gpio30_pins: gpio27-pins {
+			pins = "GPIO30/SMB3SDA";
+			bias-disable;
+			input-enable;
+		};
+		gpio31_pins: gpio27-pins {
+			pins = "GPIO31/SMB3SCL";
+			bias-disable;
+			input-enable;
+		};
 		gpio32_pins: gpio32-pins {
 			pins = "GPIO32/nSPI0CS1";
 			bias-disable;
@@ -712,6 +727,11 @@
 			bias-disable;
 			input-enable;
 		};
+		gpio78o_pins: gpio78o-pins {
+			pins = "GPIO78/FANIN14";
+			bias-disable;
+			output-high;
+		};
 		gpio78ol_pins: gpio78ol-pins {
 			pins = "GPIO78/FANIN14";
 			bias-disable;
@@ -777,6 +797,11 @@
 			bias-disable;
 			output-high;
 		};
+		gpio86ol_pins: gpio86ol-pins {
+			pins = "GPIO86/R2TXEN";
+			bias-disable;
+			output-low;
+		};
 		gpio87_pins: gpio87-pins {
 			pins = "GPIO87/R2RXD0";
 			bias-disable;
@@ -1062,6 +1087,16 @@
 			bias-disable;
 			output-low;
 		};
+		gpio114o_pins: gpio114o-pins {
+			pins = "GPIO114/SMB0SCL";
+			bias-disable;
+			output-high;
+		};
+		gpio115_pins: gpio115-pins {
+			pins = "GPIO115/SMB0SDA";
+			bias-disable;
+			input-enable;
+		};
 		gpio118_pins: gpio118-pins {
 			pins = "GPIO118/SMB2SCL";
 			bias-disable;
@@ -1117,6 +1152,11 @@
 			bias-disable;
 			input-enable;
 		};
+		gpio127o_pins: gpio127o-pins {
+			pins = "GPIO127/SMB1BSCL";
+			bias-disable;
+			output-high;
+		};
 		gpio128o_pins: gpio128o-pins {
 			pins = "GPIO128/SMB8SCL";
 			bias-disable;
@@ -1337,6 +1377,11 @@
 			bias-disable;
 			input-enable;
 		};
+		gpio153o_pins: gpio153o-pins {
+			pins = "GPIO153/MMCWP";
+			bias-disable;
+			output-high;
+		};
 		gpio153ol_pins: gpio153ol-pins {
 			pins = "GPIO153/MMCWP";
 			bias-disable;
@@ -1587,6 +1632,11 @@
 			bias-disable;
 			output-high;
 		};
+		gpio189_pins: gpio189o-pins {
+			pins = "GPIO189/SPI3D3/nSPI3CS3";
+			bias-disable;
+			input-enable;
+		};
 		gpio189o_pins: gpio189o-pins {
 			pins = "GPIO189/SPI3D3/nSPI3CS3";
 			bias-disable;
@@ -1682,6 +1732,11 @@
 			bias-disable;
 			input-enable;
 		};
+		gpio199o_pins: gpio199o-pins {
+			pins = "GPIO199/SMB0DSCL";
+			bias-disable;
+			output-high;
+		};
 		gpio200_pins: gpio200-pins {
 			pins = "GPIO200/R2CK";
 			input-enable;
@@ -1977,6 +2032,11 @@
 			bias-disable;
 			output-high;
 		};
+		gpio225ol_pins: gpio225ol-pins {
+			pins = "GPO225/SPIXD0/STRAP12";
+			bias-disable;
+			output-low;
+		};
 		gpio226_pins: gpio226-pins {
 			pins = "GPO226/SPIXD1/STRAP13";
 			bias-disable;
@@ -1987,6 +2047,11 @@
 			bias-disable;
 			output-high;
 		};
+		gpio226ol_pins: gpio226ol-pins {
+			pins = "GPO226/SPIXD1/STRAP13";
+			bias-disable;
+			output-low;
+		};
 		gpio227_pins: gpio227-pins {
 			pins = "GPIO227/nSPIXCS0";
 			bias-disable;
@@ -2007,6 +2072,11 @@
 			bias-disable;
 			input-enable;
 		};
+		gpio228o_pins: gpio228o-pins {
+			pins = "GPIO228/nSPIXCS1";
+			bias-disable;
+			output-high;
+		};
 		gpio228ol_pins: gpio228ol-pins {
 			pins = "GPIO228/nSPIXCS1";
 			bias-disable;
diff --git a/arch/arm/boot/dts/nuvoton-npcm750-runbmc.dts b/arch/arm/boot/dts/nuvoton-npcm750-runbmc.dts
index b589e3982584..a9aa3ac81ff9 100644
--- a/arch/arm/boot/dts/nuvoton-npcm750-runbmc.dts
+++ b/arch/arm/boot/dts/nuvoton-npcm750-runbmc.dts
@@ -38,7 +38,6 @@
     i2c11 = &i2c11;
     i2c12 = &i2c12;
 		i2c13 = &i2c13;
-		gpio0o_pins = &gpio0o_pins;
 		spi0 = &spi0;
 		spi1 = &spi1;
 		fiu0 = &fiu0;
@@ -977,6 +976,89 @@
 				&gpio215ol_pins       /* Note Used */
 				&gpio216ol_pins       /* Note Used */
 				&gpio217ol_pins       /* Note Used */
+						&gpio5_pins                                   /******* RunBMC outside Connector pins *******/
+				&gpio6_pins
+				&gpio7_pins
+			/*	&bmcuart0a_pins  */      /* UART0 BSP */
+			/*	&uart1_pins      */      /* UART1 SI1 */
+			/*	&uart2_pins      */      /* UART2 SI2 */
+				&gpio10_pins
+				&gpio11_pins
+				&gpio24_pins
+				&gpio25_pins
+				&gpio82_pins
+				&gpio144_pins
+				&gpio146_pins
+				&gpio83_pins
+				&gpio145_pins
+				&gpio147_pins
+				&gpio76_pins
+				&gpio77_pins
+				&gpio78o_pins
+				&gpio79_pins
+				&gpio30_pins
+				&gpio31_pins
+				&gpio23_pins
+				&gpio22o_pins
+				&gpio21_pins
+				&gpio20_pins
+				&gpio114o_pins
+				&gpio115_pins
+				&ddc_pins
+				&gpio203o_pins
+				&gpio84_pins
+				&gpio85o_pins
+				&gpio86ol_pins
+				&gpio87_pins
+				&gpio88_pins
+				&gpio89_pins
+				&gpio90_pins
+				&gpio200_pins
+				&gpio136_pins
+				&gpio137_pins
+				&gpio138_pins
+				&gpio139_pins
+				&gpio140_pins
+				&gpio141_pins
+				&gpio142_pins
+				&gpio143_pins
+				&gpio188o_pins
+				&gpio189_pins
+				&gpio225ol_pins
+				&gpio226ol_pins
+				&gpio227ol_pins
+				&gpio228o_pins
+				&gpio229o_pins
+				&gpio230_pins
+				&gpio224_pins
+			/*	&gpio192_pins         pspi jtag */
+			/*	&gpio17_pins          pspi jtag */
+			/*	&gpio18_pins          pspi jtag */
+			/*	&gpio19_pins          pspi jtag */
+			/*	&gpio16_pins          pspi jtag */
+				&gpio199o_pins
+				&gpio202_pins
+				&gpio127o_pins
+				&gpio198o_pins
+				&gpio124_pins
+				&gpio125_pins
+				&gpio126_pins
+				&gpio93_pins
+				&wdog2_pins
+				&wdog1_pins
+				&gpio160o_pins
+				&gpio169o_pins
+				&gpio231o_pins
+				&gpio196_pins
+				&gpio197_pins
+				&gpio155_pins
+				&gpio153o_pins
+				&gpio59_pins
+				&gpio40o_pins
+				&gpio122_pins
+				&gpio121_pins
+				&gpio120_pins
+				&gpio123_pins
 				>;
 	};
 	
-- 
2.17.1

^ permalink raw reply related	[flat|nested] 6+ messages in thread

end of thread, other threads:[~2019-02-01  8:40 UTC | newest]

Thread overview: 6+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2019-02-01  8:40 [PATCH v1 1/6] Add device tree for Nuvoton RunBMC Module board Samuel.Jiang
2019-02-01  8:40 ` [PATCH v1 2/6] ARM: dts: nuvoton: nuvoton-npcm750-runbmc: add jtag and led nodes Samuel.Jiang
2019-02-01  8:40 ` [PATCH v1 3/6] ARM: dts: nuvoton: nuvoton-npcm750-runbmc: Add i2c nodes Samuel.Jiang
2019-02-01  8:40 ` [PATCH v1 4/6] ARM: dts: nuvoton: nuvoton-npcm750-runbmc: Add i2c ioexpander nodes Samuel.Jiang
2019-02-01  8:40 ` [PATCH v1 5/6] ARM: dts: nuvoton: nuvoton-npcm750-runbmc: define gpios inside Module Samuel.Jiang
2019-02-01  8:40 ` [PATCH v1 6/6] ARM: dts: nuvoton: nuvoton-npcm750-runbmc: define gpios outside Module Samuel.Jiang

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