From: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
To: Andrey Smirnov <andrew.smirnov@gmail.com>
Cc: Bjorn Helgaas <bhelgaas@google.com>,
Fabio Estevam <fabio.estevam@nxp.com>,
Chris Healy <cphealy@gmail.com>,
Lucas Stach <l.stach@pengutronix.de>,
Leonard Crestez <leonard.crestez@nxp.com>,
"A.s. Dong" <aisheng.dong@nxp.com>,
Richard Zhu <hongxing.zhu@nxp.com>,
linux-imx@nxp.com, linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org
Subject: Re: [PATCH v6 0/4] PCIE support for i.MX8MQ
Date: Fri, 1 Feb 2019 17:01:01 +0000 [thread overview]
Message-ID: <20190201170101.GB22887@e107981-ln.cambridge.arm.com> (raw)
In-Reply-To: <20190124201522.8973-1-andrew.smirnov@gmail.com>
On Thu, Jan 24, 2019 at 12:15:18PM -0800, Andrey Smirnov wrote:
> Everyone:
>
> This series contains changes I made in order to enable support of PCIE
> IP block on i.MX8MQ SoCs.
>
> Changes since [v5]:
>
> - Reformatted commit messages to adhere to
> https://lore.kernel.org/linux-pci/20171026223701.GA25649@bhelgaas-glaptop.roam.corp.google.com/
>
> Changes since [v4]:
>
> - Collected Reviewed-by from Lucas
>
> - Replaced ((ARM || ARM64) && COMPILE_TEST) with COMPILE_TEST as per
> suggestion from Rob
>
> Changes since [v3]:
>
> - Based on feedback from NXP, DIRECT_SPEED_CHANGE quirk was expanded
> to cover both i.MX7 and i.MX8MQ
>
> - Code setting device type in GPR12 moved to a standalone function
>
> - Explicit "fsl,controller-id" binding was dropped, replaced by using
> controller physical address to determine logical ID
>
> - Dropped Reviewed-by from Lucas for patch 4/4 due to the change
> above (haven't heard explicit "yea" for it from him)
>
> Changes since [v2], [fixes]:
>
> - Incorporated [patch] introducing drvdata
>
> - i.MX6 PHY operation gating converted to a single patch and to use a
> dedicated flag instead of doing explicit variant check
>
> - Kconfig entry changed to use ARM64 && ARCH_MXC
>
> - Dropped FALLTHROUGH annotations
>
> Changes since [v1]:
>
> - Driver changed to use single "fsl,controller-id" property to
> distinguish between two intances of PCIE IP block
>
> - All code pertaining to L1SS was dropped to simplify the patch
>
> - Documented additions to DT bindings
>
> Feedback is welcome!
>
> Thanks,
> Andrey Smirnov
>
> [v4] https://lore.kernel.org/linux-arm-kernel/20190104165335.13205-1-andrew.smirnov@gmail.com
> [v3] https://lore.kernel.org/linux-arm-kernel/20181218040702.29231-1-andrew.smirnov@gmail.com
> [patch] https://patchwork.kernel.org/patch/10712261/
> [fixes] https://lore.kernel.org/linux-arm-kernel/20181216230916.22982-1-andrew.smirnov@gmail.com
> [v2] https://lore.kernel.org/linux-arm-kernel/20181206073545.10967-1-andrew.smirnov@gmail.com
> [v1] https://lore.kernel.org/linux-arm-kernel/20181117181225.10737-1-andrew.smirnov@gmail.com/
>
> Andrey Smirnov (4):
> PCI: imx6: Introduce drvdata
> PCI: imx6: Mark PHY functions as i.MX6 specific
> PCI: imx6: Convert DIRECT_SPEED_CHANGE quirk code to use a flag
> PCI: imx6: Add support for i.MX8MQ
>
> .../bindings/pci/fsl,imx6q-pcie.txt | 3 +-
> drivers/pci/controller/dwc/Kconfig | 4 +-
> drivers/pci/controller/dwc/pci-imx6.c | 150 +++++++++++++++---
> 3 files changed, 133 insertions(+), 24 deletions(-)
Can you rebase it on top of my pci/dwc branch please and repost it ?
Thanks,
Lorenzo
WARNING: multiple messages have this Message-ID (diff)
From: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
To: Andrey Smirnov <andrew.smirnov@gmail.com>
Cc: "A.s. Dong" <aisheng.dong@nxp.com>,
Richard Zhu <hongxing.zhu@nxp.com>,
linux-arm-kernel@lists.infradead.org, linux-pci@vger.kernel.org,
linux-kernel@vger.kernel.org,
Fabio Estevam <fabio.estevam@nxp.com>,
linux-imx@nxp.com, Bjorn Helgaas <bhelgaas@google.com>,
Leonard Crestez <leonard.crestez@nxp.com>,
Chris Healy <cphealy@gmail.com>,
Lucas Stach <l.stach@pengutronix.de>
Subject: Re: [PATCH v6 0/4] PCIE support for i.MX8MQ
Date: Fri, 1 Feb 2019 17:01:01 +0000 [thread overview]
Message-ID: <20190201170101.GB22887@e107981-ln.cambridge.arm.com> (raw)
In-Reply-To: <20190124201522.8973-1-andrew.smirnov@gmail.com>
On Thu, Jan 24, 2019 at 12:15:18PM -0800, Andrey Smirnov wrote:
> Everyone:
>
> This series contains changes I made in order to enable support of PCIE
> IP block on i.MX8MQ SoCs.
>
> Changes since [v5]:
>
> - Reformatted commit messages to adhere to
> https://lore.kernel.org/linux-pci/20171026223701.GA25649@bhelgaas-glaptop.roam.corp.google.com/
>
> Changes since [v4]:
>
> - Collected Reviewed-by from Lucas
>
> - Replaced ((ARM || ARM64) && COMPILE_TEST) with COMPILE_TEST as per
> suggestion from Rob
>
> Changes since [v3]:
>
> - Based on feedback from NXP, DIRECT_SPEED_CHANGE quirk was expanded
> to cover both i.MX7 and i.MX8MQ
>
> - Code setting device type in GPR12 moved to a standalone function
>
> - Explicit "fsl,controller-id" binding was dropped, replaced by using
> controller physical address to determine logical ID
>
> - Dropped Reviewed-by from Lucas for patch 4/4 due to the change
> above (haven't heard explicit "yea" for it from him)
>
> Changes since [v2], [fixes]:
>
> - Incorporated [patch] introducing drvdata
>
> - i.MX6 PHY operation gating converted to a single patch and to use a
> dedicated flag instead of doing explicit variant check
>
> - Kconfig entry changed to use ARM64 && ARCH_MXC
>
> - Dropped FALLTHROUGH annotations
>
> Changes since [v1]:
>
> - Driver changed to use single "fsl,controller-id" property to
> distinguish between two intances of PCIE IP block
>
> - All code pertaining to L1SS was dropped to simplify the patch
>
> - Documented additions to DT bindings
>
> Feedback is welcome!
>
> Thanks,
> Andrey Smirnov
>
> [v4] https://lore.kernel.org/linux-arm-kernel/20190104165335.13205-1-andrew.smirnov@gmail.com
> [v3] https://lore.kernel.org/linux-arm-kernel/20181218040702.29231-1-andrew.smirnov@gmail.com
> [patch] https://patchwork.kernel.org/patch/10712261/
> [fixes] https://lore.kernel.org/linux-arm-kernel/20181216230916.22982-1-andrew.smirnov@gmail.com
> [v2] https://lore.kernel.org/linux-arm-kernel/20181206073545.10967-1-andrew.smirnov@gmail.com
> [v1] https://lore.kernel.org/linux-arm-kernel/20181117181225.10737-1-andrew.smirnov@gmail.com/
>
> Andrey Smirnov (4):
> PCI: imx6: Introduce drvdata
> PCI: imx6: Mark PHY functions as i.MX6 specific
> PCI: imx6: Convert DIRECT_SPEED_CHANGE quirk code to use a flag
> PCI: imx6: Add support for i.MX8MQ
>
> .../bindings/pci/fsl,imx6q-pcie.txt | 3 +-
> drivers/pci/controller/dwc/Kconfig | 4 +-
> drivers/pci/controller/dwc/pci-imx6.c | 150 +++++++++++++++---
> 3 files changed, 133 insertions(+), 24 deletions(-)
Can you rebase it on top of my pci/dwc branch please and repost it ?
Thanks,
Lorenzo
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2019-02-01 17:01 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-01-24 20:15 [PATCH v6 0/4] PCIE support for i.MX8MQ Andrey Smirnov
2019-01-24 20:15 ` Andrey Smirnov
2019-01-24 20:15 ` [PATCH v6 1/4] PCI: imx6: Introduce drvdata Andrey Smirnov
2019-01-24 20:15 ` Andrey Smirnov
2019-01-24 20:15 ` [PATCH v6 2/4] PCI: imx6: Mark PHY functions as i.MX6 specific Andrey Smirnov
2019-01-24 20:15 ` Andrey Smirnov
2019-02-01 16:59 ` Lorenzo Pieralisi
2019-02-01 16:59 ` Lorenzo Pieralisi
2019-01-24 20:15 ` [PATCH v6 3/4] PCI: imx6: Convert DIRECT_SPEED_CHANGE quirk code to use a flag Andrey Smirnov
2019-01-24 20:15 ` Andrey Smirnov
2019-01-24 20:15 ` [PATCH v6 4/4] PCI: imx6: Add support for i.MX8MQ Andrey Smirnov
2019-01-24 20:15 ` Andrey Smirnov
2019-02-01 17:01 ` Lorenzo Pieralisi [this message]
2019-02-01 17:01 ` [PATCH v6 0/4] PCIE " Lorenzo Pieralisi
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20190201170101.GB22887@e107981-ln.cambridge.arm.com \
--to=lorenzo.pieralisi@arm.com \
--cc=aisheng.dong@nxp.com \
--cc=andrew.smirnov@gmail.com \
--cc=bhelgaas@google.com \
--cc=cphealy@gmail.com \
--cc=fabio.estevam@nxp.com \
--cc=hongxing.zhu@nxp.com \
--cc=l.stach@pengutronix.de \
--cc=leonard.crestez@nxp.com \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-imx@nxp.com \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-pci@vger.kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.