[PATCH v3 0/4] Ingenic JZ47xx NEMC patchset V3

[PATCH v3 0/4] Ingenic JZ47xx NEMC patchset V3

[Paul Cercueil]

Hi,

Since the V2 of my patchset I could test it on the JZ4740, and see
that the hardware is the exact same as on the JZ4725B.

As the JZ4740 is already fully upstream, and also older, I now add
support for the JZ4740 instead of the JZ4725B.

The only patches modified since v2 are the 1/4 and 4/4, and the change
is a dumb rename of '4725b' into '4740', so I kept the Reviewed-by: for
these two. I hope it's OK.

Cheers,
-Paul

[PATCH v3 1/4] dt-bindings: memory: jz4780: Add compatible string for JZ4740 SoC

[Paul Cercueil]

Add a compatible string to support the memory controller built into the
JZ4740 SoC from Ingenic.

Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Reviewed-by: Boris Brezillon <bbrezillon@kernel.org>
Reviewed-by: Rob Herring <robh@kernel.org>
---

v2: No change

v3: Change compatible string for jz4740 instead of j4725b

 .../devicetree/bindings/memory-controllers/ingenic,jz4780-nemc.txt       | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/memory-controllers/ingenic,jz4780-nemc.txt b/Documentation/devicetree/bindings/memory-controllers/ingenic,jz4780-nemc.txt
index f936b5589b19..59b8dcc118ee 100644
--- a/Documentation/devicetree/bindings/memory-controllers/ingenic,jz4780-nemc.txt
+++ b/Documentation/devicetree/bindings/memory-controllers/ingenic,jz4780-nemc.txt
@@ -5,6 +5,7 @@ controller in Ingenic JZ4780
 
 Required properties:
 - compatible: Should be set to one of:
+    "ingenic,jz4740-nemc" (JZ4740)
     "ingenic,jz4780-nemc" (JZ4780)
 - reg: Should specify the NEMC controller registers location and length.
 - clocks: Clock for the NEMC controller.
-- 
2.11.0

[PATCH v3 2/4] memory: Kconfig: Drop dependency on MACH_JZ4780 for jz4780

[Paul Cercueil]

Depending on MACH_JZ4780 prevent us from creating a generic kernel that
works on more than one MIPS board. Instead, we just depend on MIPS being
set.

Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Reviewed-by: Boris Brezillon <bbrezillon@kernel.org>
---

v2: No change

v3: No change

 drivers/memory/Kconfig | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/memory/Kconfig b/drivers/memory/Kconfig
index 2d91b00e3591..3d411575fcb6 100644
--- a/drivers/memory/Kconfig
+++ b/drivers/memory/Kconfig
@@ -122,7 +122,7 @@ config FSL_IFC
 config JZ4780_NEMC
 	bool "Ingenic JZ4780 SoC NEMC driver"
 	default y
-	depends on MACH_JZ4780 || COMPILE_TEST
+	depends on MIPS || COMPILE_TEST
 	depends on HAS_IOMEM && OF
 	help
 	  This driver is for the NAND/External Memory Controller (NEMC) in
-- 
2.11.0

[PATCH v3 3/4] memory: jz4780-nemc: Reduce size of const array

[Paul Cercueil]

The maximum value found in that array is 15, there's no need to store
these values as uint32_t, a uint8_t is enough.

Signed-off-by: Paul Cercueil <paul@crapouillou.net>
---

v2: Remove casts to uint32_t

v3: No change

 drivers/memory/jz4780-nemc.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/memory/jz4780-nemc.c b/drivers/memory/jz4780-nemc.c
index bcf06adefc96..66b8b43eaeff 100644
--- a/drivers/memory/jz4780-nemc.c
+++ b/drivers/memory/jz4780-nemc.c
@@ -161,7 +161,7 @@ static bool jz4780_nemc_configure_bank(struct jz4780_nemc *nemc,
 	 * Conversion of tBP and tAW cycle counts to values supported by the
 	 * hardware (round up to the next supported value).
 	 */
-	static const uint32_t convert_tBP_tAW[] = {
+	static const u8 convert_tBP_tAW[] = {
 		0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10,
 
 		/* 11 - 12 -> 12 cycles */
-- 
2.11.0

[PATCH v3 4/4] memory: jz4780_nemc: Add support for the JZ4740

[Paul Cercueil]

Add support for the JZ4740 SoC from Ingenic.

Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Reviewed-by: Boris Brezillon <bbrezillon@kernel.org>
---

v2: No change

v3: Support the JZ4740 instead of the JZ4725B (exact same functionality
    but JZ4740 is already fully upstream)

 drivers/memory/jz4780-nemc.c | 24 +++++++++++++++++++++---
 1 file changed, 21 insertions(+), 3 deletions(-)

diff --git a/drivers/memory/jz4780-nemc.c b/drivers/memory/jz4780-nemc.c
index 66b8b43eaeff..f3a19b9b76ac 100644
--- a/drivers/memory/jz4780-nemc.c
+++ b/drivers/memory/jz4780-nemc.c
@@ -44,9 +44,14 @@
 #define NEMC_NFCSR_NFCEn(n)	BIT((((n) - 1) << 1) + 1)
 #define NEMC_NFCSR_TNFEn(n)	BIT(16 + (n) - 1)
 
+struct jz_soc_info {
+	u8 tas_tah_cycles_max;
+};
+
 struct jz4780_nemc {
 	spinlock_t lock;
 	struct device *dev;
+	const struct jz_soc_info *soc_info;
 	void __iomem *base;
 	struct clk *clk;
 	uint32_t clk_period;
@@ -202,7 +207,7 @@ static bool jz4780_nemc_configure_bank(struct jz4780_nemc *nemc,
 	if (of_property_read_u32(node, "ingenic,nemc-tAS", &val) == 0) {
 		smcr &= ~NEMC_SMCR_TAS_MASK;
 		cycles = jz4780_nemc_ns_to_cycles(nemc, val);
-		if (cycles > 15) {
+		if (cycles > nemc->soc_info->tas_tah_cycles_max) {
 			dev_err(nemc->dev, "tAS %u is too high (%u cycles)\n",
 				val, cycles);
 			return false;
@@ -214,7 +219,7 @@ static bool jz4780_nemc_configure_bank(struct jz4780_nemc *nemc,
 	if (of_property_read_u32(node, "ingenic,nemc-tAH", &val) == 0) {
 		smcr &= ~NEMC_SMCR_TAH_MASK;
 		cycles = jz4780_nemc_ns_to_cycles(nemc, val);
-		if (cycles > 15) {
+		if (cycles > nemc->soc_info->tas_tah_cycles_max) {
 			dev_err(nemc->dev, "tAH %u is too high (%u cycles)\n",
 				val, cycles);
 			return false;
@@ -278,6 +283,10 @@ static int jz4780_nemc_probe(struct platform_device *pdev)
 	if (!nemc)
 		return -ENOMEM;
 
+	nemc->soc_info = device_get_match_data(dev);
+	if (!nemc->soc_info)
+		return -EINVAL;
+
 	spin_lock_init(&nemc->lock);
 	nemc->dev = dev;
 
@@ -370,8 +379,17 @@ static int jz4780_nemc_remove(struct platform_device *pdev)
 	return 0;
 }
 
+static const struct jz_soc_info jz4740_soc_info = {
+	.tas_tah_cycles_max = 7,
+};
+
+static const struct jz_soc_info jz4780_soc_info = {
+	.tas_tah_cycles_max = 15,
+};
+
 static const struct of_device_id jz4780_nemc_dt_match[] = {
-	{ .compatible = "ingenic,jz4780-nemc" },
+	{ .compatible = "ingenic,jz4740-nemc", .data = &jz4740_soc_info, },
+	{ .compatible = "ingenic,jz4780-nemc", .data = &jz4780_soc_info, },
 	{},
 };
 
-- 
2.11.0

Re: [PATCH v3 4/4] memory: jz4780_nemc: Add support for the JZ4740

[Paul Cercueil]

Hi,

Any feedback on this patchset? Should I resend?

Thanks,
-Paul

Le mar. 5 févr. 2019 à 4:52, Paul Cercueil <paul@crapouillou.net> a 
écrit :
> Add support for the JZ4740 SoC from Ingenic.
> 
> Signed-off-by: Paul Cercueil <paul@crapouillou.net>
> Reviewed-by: Boris Brezillon <bbrezillon@kernel.org>
> ---
> 
> v2: No change
> 
> v3: Support the JZ4740 instead of the JZ4725B (exact same 
> functionality
>     but JZ4740 is already fully upstream)
> 
>  drivers/memory/jz4780-nemc.c | 24 +++++++++++++++++++++---
>  1 file changed, 21 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/memory/jz4780-nemc.c 
> b/drivers/memory/jz4780-nemc.c
> index 66b8b43eaeff..f3a19b9b76ac 100644
> --- a/drivers/memory/jz4780-nemc.c
> +++ b/drivers/memory/jz4780-nemc.c
> @@ -44,9 +44,14 @@
>  #define NEMC_NFCSR_NFCEn(n)	BIT((((n) - 1) << 1) + 1)
>  #define NEMC_NFCSR_TNFEn(n)	BIT(16 + (n) - 1)
> 
> +struct jz_soc_info {
> +	u8 tas_tah_cycles_max;
> +};
> +
>  struct jz4780_nemc {
>  	spinlock_t lock;
>  	struct device *dev;
> +	const struct jz_soc_info *soc_info;
>  	void __iomem *base;
>  	struct clk *clk;
>  	uint32_t clk_period;
> @@ -202,7 +207,7 @@ static bool jz4780_nemc_configure_bank(struct 
> jz4780_nemc *nemc,
>  	if (of_property_read_u32(node, "ingenic,nemc-tAS", &val) == 0) {
>  		smcr &= ~NEMC_SMCR_TAS_MASK;
>  		cycles = jz4780_nemc_ns_to_cycles(nemc, val);
> -		if (cycles > 15) {
> +		if (cycles > nemc->soc_info->tas_tah_cycles_max) {
>  			dev_err(nemc->dev, "tAS %u is too high (%u cycles)\n",
>  				val, cycles);
>  			return false;
> @@ -214,7 +219,7 @@ static bool jz4780_nemc_configure_bank(struct 
> jz4780_nemc *nemc,
>  	if (of_property_read_u32(node, "ingenic,nemc-tAH", &val) == 0) {
>  		smcr &= ~NEMC_SMCR_TAH_MASK;
>  		cycles = jz4780_nemc_ns_to_cycles(nemc, val);
> -		if (cycles > 15) {
> +		if (cycles > nemc->soc_info->tas_tah_cycles_max) {
>  			dev_err(nemc->dev, "tAH %u is too high (%u cycles)\n",
>  				val, cycles);
>  			return false;
> @@ -278,6 +283,10 @@ static int jz4780_nemc_probe(struct 
> platform_device *pdev)
>  	if (!nemc)
>  		return -ENOMEM;
> 
> +	nemc->soc_info = device_get_match_data(dev);
> +	if (!nemc->soc_info)
> +		return -EINVAL;
> +
>  	spin_lock_init(&nemc->lock);
>  	nemc->dev = dev;
> 
> @@ -370,8 +379,17 @@ static int jz4780_nemc_remove(struct 
> platform_device *pdev)
>  	return 0;
>  }
> 
> +static const struct jz_soc_info jz4740_soc_info = {
> +	.tas_tah_cycles_max = 7,
> +};
> +
> +static const struct jz_soc_info jz4780_soc_info = {
> +	.tas_tah_cycles_max = 15,
> +};
> +
>  static const struct of_device_id jz4780_nemc_dt_match[] = {
> -	{ .compatible = "ingenic,jz4780-nemc" },
> +	{ .compatible = "ingenic,jz4740-nemc", .data = &jz4740_soc_info, },
> +	{ .compatible = "ingenic,jz4780-nemc", .data = &jz4780_soc_info, },
>  	{},
>  };
> 
> --
> 2.11.0
>