[PATCH i-g-t 01/13] i915/gem_mocs_settings: Allow hangs around reset tests

[PATCH i-g-t 01/13] i915/gem_mocs_settings: Allow hangs around reset tests

[Chris Wilson]

To inject a GPU hang, we should ask the kernel first if it is legal to
do so.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
---
 tests/i915/gem_mocs_settings.c | 54 +++++++++++++++++++++-------------
 1 file changed, 34 insertions(+), 20 deletions(-)

diff --git a/tests/i915/gem_mocs_settings.c b/tests/i915/gem_mocs_settings.c
index 967223f1b..5b3b6bc1e 100644
--- a/tests/i915/gem_mocs_settings.c
+++ b/tests/i915/gem_mocs_settings.c
@@ -453,26 +453,40 @@ igt_main
 			continue;
 
 		for (unsigned mode = NONE; mode < MAX_MOCS_TEST_MODES; mode++) {
-			for (unsigned flags = 0; flags < ALL_MOCS_FLAGS + 1; flags++) {
-				/* Trying to test non-render engines for dirtying MOCS
-				 * values from one context having effect on different
-				 * context is bound to fail - only render engine is
-				 * doing context save/restore of MOCS registers.
-				 * Let's also limit testing values on non-default
-				 * contexts to render-only.
-				 */
-				if (flags && e->exec_id != I915_EXEC_RENDER)
-					continue;
-
-				igt_subtest_f("mocs-%s%s%s-%s",
-					      test_modes[mode],
-					      flags & MOCS_NON_DEFAULT_CTX ? "-ctx": "",
-					      flags & MOCS_DIRTY_VALUES ? "-dirty" : "",
-					      e->name) {
-					if (flags & (MOCS_NON_DEFAULT_CTX | MOCS_DIRTY_VALUES))
-						gem_require_contexts(fd);
-
-					run_test(fd, e->exec_id | e->flags, flags, mode);
+			igt_subtest_group {
+				igt_hang_t hang = {};
+
+				igt_fixture {
+					if (mode == RESET)
+						hang = igt_allow_hang(fd, 0, 0);
+				}
+
+				for (unsigned flags = 0; flags < ALL_MOCS_FLAGS + 1; flags++) {
+					/* Trying to test non-render engines for dirtying MOCS
+					 * values from one context having effect on different
+					 * context is bound to fail - only render engine is
+					 * doing context save/restore of MOCS registers.
+					 * Let's also limit testing values on non-default
+					 * contexts to render-only.
+					 */
+					if (flags && e->exec_id != I915_EXEC_RENDER)
+						continue;
+
+					igt_subtest_f("mocs-%s%s%s-%s",
+						      test_modes[mode],
+						      flags & MOCS_NON_DEFAULT_CTX ? "-ctx": "",
+						      flags & MOCS_DIRTY_VALUES ? "-dirty" : "",
+						      e->name) {
+						if (flags & (MOCS_NON_DEFAULT_CTX | MOCS_DIRTY_VALUES))
+							gem_require_contexts(fd);
+
+						run_test(fd, e->exec_id | e->flags, flags, mode);
+					}
+				}
+
+				igt_fixture {
+					if (mode == RESET)
+						igt_disallow_hang(fd, hang);
 				}
 			}
 		}
-- 
2.20.1

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[igt-dev] [PATCH i-g-t 01/13] i915/gem_mocs_settings: Allow hangs around reset tests

[Chris Wilson]

To inject a GPU hang, we should ask the kernel first if it is legal to
do so.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
---
 tests/i915/gem_mocs_settings.c | 54 +++++++++++++++++++++-------------
 1 file changed, 34 insertions(+), 20 deletions(-)

diff --git a/tests/i915/gem_mocs_settings.c b/tests/i915/gem_mocs_settings.c
index 967223f1b..5b3b6bc1e 100644
--- a/tests/i915/gem_mocs_settings.c
+++ b/tests/i915/gem_mocs_settings.c
@@ -453,26 +453,40 @@ igt_main
 			continue;
 
 		for (unsigned mode = NONE; mode < MAX_MOCS_TEST_MODES; mode++) {
-			for (unsigned flags = 0; flags < ALL_MOCS_FLAGS + 1; flags++) {
-				/* Trying to test non-render engines for dirtying MOCS
-				 * values from one context having effect on different
-				 * context is bound to fail - only render engine is
-				 * doing context save/restore of MOCS registers.
-				 * Let's also limit testing values on non-default
-				 * contexts to render-only.
-				 */
-				if (flags && e->exec_id != I915_EXEC_RENDER)
-					continue;
-
-				igt_subtest_f("mocs-%s%s%s-%s",
-					      test_modes[mode],
-					      flags & MOCS_NON_DEFAULT_CTX ? "-ctx": "",
-					      flags & MOCS_DIRTY_VALUES ? "-dirty" : "",
-					      e->name) {
-					if (flags & (MOCS_NON_DEFAULT_CTX | MOCS_DIRTY_VALUES))
-						gem_require_contexts(fd);
-
-					run_test(fd, e->exec_id | e->flags, flags, mode);
+			igt_subtest_group {
+				igt_hang_t hang = {};
+
+				igt_fixture {
+					if (mode == RESET)
+						hang = igt_allow_hang(fd, 0, 0);
+				}
+
+				for (unsigned flags = 0; flags < ALL_MOCS_FLAGS + 1; flags++) {
+					/* Trying to test non-render engines for dirtying MOCS
+					 * values from one context having effect on different
+					 * context is bound to fail - only render engine is
+					 * doing context save/restore of MOCS registers.
+					 * Let's also limit testing values on non-default
+					 * contexts to render-only.
+					 */
+					if (flags && e->exec_id != I915_EXEC_RENDER)
+						continue;
+
+					igt_subtest_f("mocs-%s%s%s-%s",
+						      test_modes[mode],
+						      flags & MOCS_NON_DEFAULT_CTX ? "-ctx": "",
+						      flags & MOCS_DIRTY_VALUES ? "-dirty" : "",
+						      e->name) {
+						if (flags & (MOCS_NON_DEFAULT_CTX | MOCS_DIRTY_VALUES))
+							gem_require_contexts(fd);
+
+						run_test(fd, e->exec_id | e->flags, flags, mode);
+					}
+				}
+
+				igt_fixture {
+					if (mode == RESET)
+						igt_disallow_hang(fd, hang);
 				}
 			}
 		}
-- 
2.20.1

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[PATCH i-g-t 02/13] lib/i915: Pretty print busy stats support

[Chris Wilson]

Expose the scheduler query for enhanced busyness tracking for the PMU.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
---
 lib/i915/gem_scheduler.c | 21 ++++++++++++++++++---
 lib/i915/gem_scheduler.h |  2 ++
 2 files changed, 20 insertions(+), 3 deletions(-)

diff --git a/lib/i915/gem_scheduler.c b/lib/i915/gem_scheduler.c
index ad156306f..8e5e60311 100644
--- a/lib/i915/gem_scheduler.c
+++ b/lib/i915/gem_scheduler.c
@@ -67,7 +67,7 @@ unsigned gem_scheduler_capability(int fd)
 }
 
 /**
- * gem_has_scheduler:
+ * gem_scheduler_enabled:
  * @fd: open i915 drm file descriptor
  *
  * Feature test macro to query whether the driver has scheduling capability.
@@ -79,7 +79,7 @@ bool gem_scheduler_enabled(int fd)
 }
 
 /**
- * gem_has_ctx_priority:
+ * gem_scheduler_has_ctx_priority:
  * @fd: open i915 drm file descriptor
  *
  * Feature test macro to query whether the driver supports assigning custom
@@ -92,7 +92,7 @@ bool gem_scheduler_has_ctx_priority(int fd)
 }
 
 /**
- * gem_has_preemption:
+ * gem_scheduler_has_preemption:
  * @fd: open i915 drm file descriptor
  *
  * Feature test macro to query whether the driver supports preempting active
@@ -104,6 +104,19 @@ bool gem_scheduler_has_preemption(int fd)
 	       LOCAL_I915_SCHEDULER_CAP_PREEMPTION;
 }
 
+/**
+ * gem_scheduler_has_pmu_support:
+ * @fd: open i915 drm file descriptor
+ *
+ * Feature test macro to query whether the driver supports enhanced busyness
+ * tracking (more accurate time accumulation).
+ */
+bool gem_scheduler_has_pmu_support(int fd)
+{
+	return gem_scheduler_capability(fd) &
+	       LOCAL_I915_SCHEDULER_CAP_PMU;
+}
+
 /**
  * gem_scheduler_print_capability:
  * @fd: open i915 drm file descriptor
@@ -122,4 +135,6 @@ void gem_scheduler_print_capability(int fd)
 		igt_info(" - With priority sorting\n");
 	if (caps & LOCAL_I915_SCHEDULER_CAP_PREEMPTION)
 		igt_info(" - With preemption enabled\n");
+	if (caps & LOCAL_I915_SCHEDULER_CAP_PMU)
+		igt_info(" - With PMU support\n");
 }
diff --git a/lib/i915/gem_scheduler.h b/lib/i915/gem_scheduler.h
index 9fcb02665..d57f08dad 100644
--- a/lib/i915/gem_scheduler.h
+++ b/lib/i915/gem_scheduler.h
@@ -27,11 +27,13 @@
 #define LOCAL_I915_SCHEDULER_CAP_ENABLED	(1 << 0)
 #define LOCAL_I915_SCHEDULER_CAP_PRIORITY	(1 << 1)
 #define LOCAL_I915_SCHEDULER_CAP_PREEMPTION	(1 << 2)
+#define LOCAL_I915_SCHEDULER_CAP_PMU		(1 << 3)
 
 unsigned gem_scheduler_capability(int fd);
 bool gem_scheduler_enabled(int fd);
 bool gem_scheduler_has_ctx_priority(int fd);
 bool gem_scheduler_has_preemption(int fd);
+bool gem_scheduler_has_pmu_support(int fd);
 void gem_scheduler_print_capability(int fd);
 
 #endif /* GEM_SCHEDULER_H */
-- 
2.20.1

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[igt-dev] [PATCH i-g-t 02/13] lib/i915: Pretty print busy stats support

[Chris Wilson]

Expose the scheduler query for enhanced busyness tracking for the PMU.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
---
 lib/i915/gem_scheduler.c | 21 ++++++++++++++++++---
 lib/i915/gem_scheduler.h |  2 ++
 2 files changed, 20 insertions(+), 3 deletions(-)

diff --git a/lib/i915/gem_scheduler.c b/lib/i915/gem_scheduler.c
index ad156306f..8e5e60311 100644
--- a/lib/i915/gem_scheduler.c
+++ b/lib/i915/gem_scheduler.c
@@ -67,7 +67,7 @@ unsigned gem_scheduler_capability(int fd)
 }
 
 /**
- * gem_has_scheduler:
+ * gem_scheduler_enabled:
  * @fd: open i915 drm file descriptor
  *
  * Feature test macro to query whether the driver has scheduling capability.
@@ -79,7 +79,7 @@ bool gem_scheduler_enabled(int fd)
 }
 
 /**
- * gem_has_ctx_priority:
+ * gem_scheduler_has_ctx_priority:
  * @fd: open i915 drm file descriptor
  *
  * Feature test macro to query whether the driver supports assigning custom
@@ -92,7 +92,7 @@ bool gem_scheduler_has_ctx_priority(int fd)
 }
 
 /**
- * gem_has_preemption:
+ * gem_scheduler_has_preemption:
  * @fd: open i915 drm file descriptor
  *
  * Feature test macro to query whether the driver supports preempting active
@@ -104,6 +104,19 @@ bool gem_scheduler_has_preemption(int fd)
 	       LOCAL_I915_SCHEDULER_CAP_PREEMPTION;
 }
 
+/**
+ * gem_scheduler_has_pmu_support:
+ * @fd: open i915 drm file descriptor
+ *
+ * Feature test macro to query whether the driver supports enhanced busyness
+ * tracking (more accurate time accumulation).
+ */
+bool gem_scheduler_has_pmu_support(int fd)
+{
+	return gem_scheduler_capability(fd) &
+	       LOCAL_I915_SCHEDULER_CAP_PMU;
+}
+
 /**
  * gem_scheduler_print_capability:
  * @fd: open i915 drm file descriptor
@@ -122,4 +135,6 @@ void gem_scheduler_print_capability(int fd)
 		igt_info(" - With priority sorting\n");
 	if (caps & LOCAL_I915_SCHEDULER_CAP_PREEMPTION)
 		igt_info(" - With preemption enabled\n");
+	if (caps & LOCAL_I915_SCHEDULER_CAP_PMU)
+		igt_info(" - With PMU support\n");
 }
diff --git a/lib/i915/gem_scheduler.h b/lib/i915/gem_scheduler.h
index 9fcb02665..d57f08dad 100644
--- a/lib/i915/gem_scheduler.h
+++ b/lib/i915/gem_scheduler.h
@@ -27,11 +27,13 @@
 #define LOCAL_I915_SCHEDULER_CAP_ENABLED	(1 << 0)
 #define LOCAL_I915_SCHEDULER_CAP_PRIORITY	(1 << 1)
 #define LOCAL_I915_SCHEDULER_CAP_PREEMPTION	(1 << 2)
+#define LOCAL_I915_SCHEDULER_CAP_PMU		(1 << 3)
 
 unsigned gem_scheduler_capability(int fd);
 bool gem_scheduler_enabled(int fd);
 bool gem_scheduler_has_ctx_priority(int fd);
 bool gem_scheduler_has_preemption(int fd);
+bool gem_scheduler_has_pmu_support(int fd);
 void gem_scheduler_print_capability(int fd);
 
 #endif /* GEM_SCHEDULER_H */
-- 
2.20.1

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[PATCH i-g-t 03/13] i915/perf_pmu: Query for enhanced busyness tracking

[Chris Wilson]

Use the scheduler query to determine if the platform supports the
enhanced busyness tracking required for high accuracy tests.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
---
 tests/perf_pmu.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/tests/perf_pmu.c b/tests/perf_pmu.c
index c9881e59f..45ff5a2a2 100644
--- a/tests/perf_pmu.c
+++ b/tests/perf_pmu.c
@@ -1457,7 +1457,7 @@ test_enable_race(int gem_fd, const struct intel_execution_engine2 *e)
 	struct drm_i915_gem_execbuffer2 eb = { };
 	int fd;
 
-	igt_require(gem_has_execlists(gem_fd));
+	igt_require(gem_scheduler_has_pmu_support(gem_fd));
 	igt_require(gem_has_engine(gem_fd, e->class, e->instance));
 
 	obj.handle = gem_create(gem_fd, 4096);
@@ -1535,7 +1535,7 @@ accuracy(int gem_fd, const struct intel_execution_engine2 *e,
 	int fd;
 
 	/* Sampling platforms cannot reach the high accuracy criteria. */
-	igt_require(gem_has_execlists(gem_fd));
+	igt_require(gem_scheduler_has_pmu_support(gem_fd));
 
 	/* Aim for approximately 100 iterations for calibration */
 	cycle_us = min_test_us / target_iters;
-- 
2.20.1

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[Intel-gfx] [PATCH i-g-t 03/13] i915/perf_pmu: Query for enhanced busyness tracking

[Chris Wilson]

Use the scheduler query to determine if the platform supports the
enhanced busyness tracking required for high accuracy tests.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
---
 tests/perf_pmu.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/tests/perf_pmu.c b/tests/perf_pmu.c
index c9881e59f..45ff5a2a2 100644
--- a/tests/perf_pmu.c
+++ b/tests/perf_pmu.c
@@ -1457,7 +1457,7 @@ test_enable_race(int gem_fd, const struct intel_execution_engine2 *e)
 	struct drm_i915_gem_execbuffer2 eb = { };
 	int fd;
 
-	igt_require(gem_has_execlists(gem_fd));
+	igt_require(gem_scheduler_has_pmu_support(gem_fd));
 	igt_require(gem_has_engine(gem_fd, e->class, e->instance));
 
 	obj.handle = gem_create(gem_fd, 4096);
@@ -1535,7 +1535,7 @@ accuracy(int gem_fd, const struct intel_execution_engine2 *e,
 	int fd;
 
 	/* Sampling platforms cannot reach the high accuracy criteria. */
-	igt_require(gem_has_execlists(gem_fd));
+	igt_require(gem_scheduler_has_pmu_support(gem_fd));
 
 	/* Aim for approximately 100 iterations for calibration */
 	cycle_us = min_test_us / target_iters;
-- 
2.20.1

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[PATCH i-g-t 04/13] lib/i915: Pretty print HW semaphores

[Chris Wilson]

Include whether the scheduler is using HW semaphore assistance in our
pretty debug strings, and make the caps known for requires.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
---
 lib/i915/gem_scheduler.c | 16 ++++++++++++++++
 lib/i915/gem_scheduler.h |  2 ++
 2 files changed, 18 insertions(+)

diff --git a/lib/i915/gem_scheduler.c b/lib/i915/gem_scheduler.c
index 8e5e60311..cd14622d6 100644
--- a/lib/i915/gem_scheduler.c
+++ b/lib/i915/gem_scheduler.c
@@ -117,6 +117,20 @@ bool gem_scheduler_has_pmu_support(int fd)
 	       LOCAL_I915_SCHEDULER_CAP_PMU;
 }
 
+/**
+ * gem_scheduler_has_semaphores:
+ * @fd: open i915 drm file descriptor
+ *
+ * Feature test macro to query whether the driver supports using HW semaphores
+ * to schedule dependencies in parallel (using the HW to delay execution until
+ * ready to reduce latency).
+ */
+bool gem_scheduler_has_semaphores(int fd)
+{
+	return gem_scheduler_capability(fd) &
+	       LOCAL_I915_SCHEDULER_CAP_SEMAPHORES;
+}
+
 /**
  * gem_scheduler_print_capability:
  * @fd: open i915 drm file descriptor
@@ -135,6 +149,8 @@ void gem_scheduler_print_capability(int fd)
 		igt_info(" - With priority sorting\n");
 	if (caps & LOCAL_I915_SCHEDULER_CAP_PREEMPTION)
 		igt_info(" - With preemption enabled\n");
+	if (caps & LOCAL_I915_SCHEDULER_CAP_SEMAPHORES)
+		igt_info(" - With HW semaphores enabled\n");
 	if (caps & LOCAL_I915_SCHEDULER_CAP_PMU)
 		igt_info(" - With PMU support\n");
 }
diff --git a/lib/i915/gem_scheduler.h b/lib/i915/gem_scheduler.h
index d57f08dad..32778e7dd 100644
--- a/lib/i915/gem_scheduler.h
+++ b/lib/i915/gem_scheduler.h
@@ -28,12 +28,14 @@
 #define LOCAL_I915_SCHEDULER_CAP_PRIORITY	(1 << 1)
 #define LOCAL_I915_SCHEDULER_CAP_PREEMPTION	(1 << 2)
 #define LOCAL_I915_SCHEDULER_CAP_PMU		(1 << 3)
+#define LOCAL_I915_SCHEDULER_CAP_SEMAPHORES	(1 << 4)
 
 unsigned gem_scheduler_capability(int fd);
 bool gem_scheduler_enabled(int fd);
 bool gem_scheduler_has_ctx_priority(int fd);
 bool gem_scheduler_has_preemption(int fd);
 bool gem_scheduler_has_pmu_support(int fd);
+bool gem_scheduler_has_semaphores(int fd);
 void gem_scheduler_print_capability(int fd);
 
 #endif /* GEM_SCHEDULER_H */
-- 
2.20.1

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[igt-dev] [PATCH i-g-t 04/13] lib/i915: Pretty print HW semaphores

[Chris Wilson]

Include whether the scheduler is using HW semaphore assistance in our
pretty debug strings, and make the caps known for requires.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
---
 lib/i915/gem_scheduler.c | 16 ++++++++++++++++
 lib/i915/gem_scheduler.h |  2 ++
 2 files changed, 18 insertions(+)

diff --git a/lib/i915/gem_scheduler.c b/lib/i915/gem_scheduler.c
index 8e5e60311..cd14622d6 100644
--- a/lib/i915/gem_scheduler.c
+++ b/lib/i915/gem_scheduler.c
@@ -117,6 +117,20 @@ bool gem_scheduler_has_pmu_support(int fd)
 	       LOCAL_I915_SCHEDULER_CAP_PMU;
 }
 
+/**
+ * gem_scheduler_has_semaphores:
+ * @fd: open i915 drm file descriptor
+ *
+ * Feature test macro to query whether the driver supports using HW semaphores
+ * to schedule dependencies in parallel (using the HW to delay execution until
+ * ready to reduce latency).
+ */
+bool gem_scheduler_has_semaphores(int fd)
+{
+	return gem_scheduler_capability(fd) &
+	       LOCAL_I915_SCHEDULER_CAP_SEMAPHORES;
+}
+
 /**
  * gem_scheduler_print_capability:
  * @fd: open i915 drm file descriptor
@@ -135,6 +149,8 @@ void gem_scheduler_print_capability(int fd)
 		igt_info(" - With priority sorting\n");
 	if (caps & LOCAL_I915_SCHEDULER_CAP_PREEMPTION)
 		igt_info(" - With preemption enabled\n");
+	if (caps & LOCAL_I915_SCHEDULER_CAP_SEMAPHORES)
+		igt_info(" - With HW semaphores enabled\n");
 	if (caps & LOCAL_I915_SCHEDULER_CAP_PMU)
 		igt_info(" - With PMU support\n");
 }
diff --git a/lib/i915/gem_scheduler.h b/lib/i915/gem_scheduler.h
index d57f08dad..32778e7dd 100644
--- a/lib/i915/gem_scheduler.h
+++ b/lib/i915/gem_scheduler.h
@@ -28,12 +28,14 @@
 #define LOCAL_I915_SCHEDULER_CAP_PRIORITY	(1 << 1)
 #define LOCAL_I915_SCHEDULER_CAP_PREEMPTION	(1 << 2)
 #define LOCAL_I915_SCHEDULER_CAP_PMU		(1 << 3)
+#define LOCAL_I915_SCHEDULER_CAP_SEMAPHORES	(1 << 4)
 
 unsigned gem_scheduler_capability(int fd);
 bool gem_scheduler_enabled(int fd);
 bool gem_scheduler_has_ctx_priority(int fd);
 bool gem_scheduler_has_preemption(int fd);
 bool gem_scheduler_has_pmu_support(int fd);
+bool gem_scheduler_has_semaphores(int fd);
 void gem_scheduler_print_capability(int fd);
 
 #endif /* GEM_SCHEDULER_H */
-- 
2.20.1

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[PATCH i-g-t 05/13] lib: Add GPU power measurement

[Chris Wilson]

Read the RAPL power metrics courtesy of perf. Or your local HW
equivalent?

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
---
 lib/Makefile.sources |   2 +
 lib/igt_gpu_power.c  | 109 +++++++++++++++++++++++++++++++++++++++++++
 lib/igt_gpu_power.h  |  59 +++++++++++++++++++++++
 lib/meson.build      |   2 +
 4 files changed, 172 insertions(+)
 create mode 100644 lib/igt_gpu_power.c
 create mode 100644 lib/igt_gpu_power.h

diff --git a/lib/Makefile.sources b/lib/Makefile.sources
index 808b9617e..54d9e3e7b 100644
--- a/lib/Makefile.sources
+++ b/lib/Makefile.sources
@@ -24,6 +24,8 @@ lib_source_list =	 	\
 	igt_color_encoding.c	\
 	igt_color_encoding.h	\
 	igt_edid_template.h	\
+	igt_gpu_power.c		\
+	igt_gpu_power.h		\
 	igt_gt.c		\
 	igt_gt.h		\
 	igt_gvt.c		\
diff --git a/lib/igt_gpu_power.c b/lib/igt_gpu_power.c
new file mode 100644
index 000000000..d62bf5dc8
--- /dev/null
+++ b/lib/igt_gpu_power.c
@@ -0,0 +1,109 @@
+#include <ctype.h>
+#include <errno.h>
+#include <fcntl.h>
+#include <locale.h>
+#include <math.h>
+#include <unistd.h>
+
+#include "igt_gpu_power.h"
+#include "igt_perf.h"
+
+static int filename_to_buf(const char *filename, char *buf, unsigned int sz)
+{
+	int fd;
+	ssize_t ret;
+
+	fd = open(filename, O_RDONLY);
+	if (fd < 0)
+		return -1;
+
+	ret = read(fd, buf, sz - 1);
+	close(fd);
+	if (ret < 1)
+		return -1;
+
+	buf[ret] = '\0';
+
+	return 0;
+}
+
+static uint64_t filename_to_u64(const char *filename, int base)
+{
+	char buf[64], *b;
+
+	if (filename_to_buf(filename, buf, sizeof(buf)))
+		return 0;
+
+	/*
+	 * Handle both single integer and key=value formats by skipping
+	 * leading non-digits.
+	 */
+	b = buf;
+	while (*b && !isdigit(*b))
+		b++;
+
+	return strtoull(b, NULL, base);
+}
+
+static double filename_to_double(const char *filename)
+{
+	char *oldlocale;
+	char buf[80];
+	double v;
+
+	if (filename_to_buf(filename, buf, sizeof(buf)))
+		return 0;
+
+	oldlocale = setlocale(LC_ALL, "C");
+	v = strtod(buf, NULL);
+	setlocale(LC_ALL, oldlocale);
+
+	return v;
+}
+
+static uint64_t rapl_type_id(void)
+{
+	return filename_to_u64("/sys/devices/power/type", 10);
+}
+
+static uint64_t rapl_gpu_power(void)
+{
+	return filename_to_u64("/sys/devices/power/events/energy-gpu", 0);
+}
+
+static double rapl_gpu_power_scale(void)
+{
+	return filename_to_double("/sys/devices/power/events/energy-gpu.scale");
+}
+
+int gpu_power_open(struct gpu_power *power)
+{
+	power->fd = igt_perf_open(rapl_type_id(), rapl_gpu_power());
+	if (power->fd < 0) {
+		power->fd = -errno;
+		goto err;
+	}
+
+	power->scale = rapl_gpu_power_scale();
+	if (isnan(power->scale) || !power->scale) {
+		close(power->fd);
+		goto err;
+	}
+	power->scale *= 1e9;
+
+	return 0;
+
+err:
+	errno = 0;
+	return power->fd;
+}
+
+bool gpu_power_read(struct gpu_power *power, struct gpu_power_sample *s)
+{
+	return read(power->fd, s, sizeof(*s)) == sizeof(*s);
+}
+
+void gpu_power_close(struct gpu_power *power)
+{
+	close(power->fd);
+}
diff --git a/lib/igt_gpu_power.h b/lib/igt_gpu_power.h
new file mode 100644
index 000000000..4e1b747c0
--- /dev/null
+++ b/lib/igt_gpu_power.h
@@ -0,0 +1,59 @@
+/*
+ * Copyright © 2019 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+ * IN THE SOFTWARE.
+ *
+ */
+
+#ifndef IGT_GPU_POWER_H
+#define IGT_GPU_POWER_H
+
+#include <stdbool.h>
+#include <stdint.h>
+
+struct gpu_power {
+	int fd;
+	double scale;
+};
+
+struct gpu_power_sample {
+	uint64_t energy;
+	uint64_t time;
+};
+
+int gpu_power_open(struct gpu_power *power);
+bool gpu_power_read(struct gpu_power *power, struct gpu_power_sample *s);
+void gpu_power_close(struct gpu_power *power);
+
+static inline double gpu_power_J(const struct gpu_power *p,
+				 const struct gpu_power_sample *t0,
+				 const struct gpu_power_sample *t1)
+{
+	return (t1->energy - t0->energy) * p->scale * 1e-9;
+}
+
+static inline double gpu_power_W(const struct gpu_power *p,
+				 const struct gpu_power_sample *t0,
+				 const struct gpu_power_sample *t1)
+{
+	return (t1->energy - t0->energy) * p->scale / (t1->time - t0->time);
+}
+
+#endif /* IGT_GPU_POWER_H */
diff --git a/lib/meson.build b/lib/meson.build
index dd36f8180..63279ae30 100644
--- a/lib/meson.build
+++ b/lib/meson.build
@@ -8,9 +8,11 @@ lib_sources = [
 	'igt_debugfs.c',
 	'igt_device.c',
 	'igt_aux.c',
+	'igt_gpu_power.c',
 	'igt_gt.c',
 	'igt_gvt.c',
 	'igt_matrix.c',
+	'igt_perf.c',
 	'igt_primes.c',
 	'igt_rand.c',
 	'igt_stats.c',
-- 
2.20.1

_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

[igt-dev] [PATCH i-g-t 05/13] lib: Add GPU power measurement

[Chris Wilson]

Read the RAPL power metrics courtesy of perf. Or your local HW
equivalent?

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
---
 lib/Makefile.sources |   2 +
 lib/igt_gpu_power.c  | 109 +++++++++++++++++++++++++++++++++++++++++++
 lib/igt_gpu_power.h  |  59 +++++++++++++++++++++++
 lib/meson.build      |   2 +
 4 files changed, 172 insertions(+)
 create mode 100644 lib/igt_gpu_power.c
 create mode 100644 lib/igt_gpu_power.h

diff --git a/lib/Makefile.sources b/lib/Makefile.sources
index 808b9617e..54d9e3e7b 100644
--- a/lib/Makefile.sources
+++ b/lib/Makefile.sources
@@ -24,6 +24,8 @@ lib_source_list =	 	\
 	igt_color_encoding.c	\
 	igt_color_encoding.h	\
 	igt_edid_template.h	\
+	igt_gpu_power.c		\
+	igt_gpu_power.h		\
 	igt_gt.c		\
 	igt_gt.h		\
 	igt_gvt.c		\
diff --git a/lib/igt_gpu_power.c b/lib/igt_gpu_power.c
new file mode 100644
index 000000000..d62bf5dc8
--- /dev/null
+++ b/lib/igt_gpu_power.c
@@ -0,0 +1,109 @@
+#include <ctype.h>
+#include <errno.h>
+#include <fcntl.h>
+#include <locale.h>
+#include <math.h>
+#include <unistd.h>
+
+#include "igt_gpu_power.h"
+#include "igt_perf.h"
+
+static int filename_to_buf(const char *filename, char *buf, unsigned int sz)
+{
+	int fd;
+	ssize_t ret;
+
+	fd = open(filename, O_RDONLY);
+	if (fd < 0)
+		return -1;
+
+	ret = read(fd, buf, sz - 1);
+	close(fd);
+	if (ret < 1)
+		return -1;
+
+	buf[ret] = '\0';
+
+	return 0;
+}
+
+static uint64_t filename_to_u64(const char *filename, int base)
+{
+	char buf[64], *b;
+
+	if (filename_to_buf(filename, buf, sizeof(buf)))
+		return 0;
+
+	/*
+	 * Handle both single integer and key=value formats by skipping
+	 * leading non-digits.
+	 */
+	b = buf;
+	while (*b && !isdigit(*b))
+		b++;
+
+	return strtoull(b, NULL, base);
+}
+
+static double filename_to_double(const char *filename)
+{
+	char *oldlocale;
+	char buf[80];
+	double v;
+
+	if (filename_to_buf(filename, buf, sizeof(buf)))
+		return 0;
+
+	oldlocale = setlocale(LC_ALL, "C");
+	v = strtod(buf, NULL);
+	setlocale(LC_ALL, oldlocale);
+
+	return v;
+}
+
+static uint64_t rapl_type_id(void)
+{
+	return filename_to_u64("/sys/devices/power/type", 10);
+}
+
+static uint64_t rapl_gpu_power(void)
+{
+	return filename_to_u64("/sys/devices/power/events/energy-gpu", 0);
+}
+
+static double rapl_gpu_power_scale(void)
+{
+	return filename_to_double("/sys/devices/power/events/energy-gpu.scale");
+}
+
+int gpu_power_open(struct gpu_power *power)
+{
+	power->fd = igt_perf_open(rapl_type_id(), rapl_gpu_power());
+	if (power->fd < 0) {
+		power->fd = -errno;
+		goto err;
+	}
+
+	power->scale = rapl_gpu_power_scale();
+	if (isnan(power->scale) || !power->scale) {
+		close(power->fd);
+		goto err;
+	}
+	power->scale *= 1e9;
+
+	return 0;
+
+err:
+	errno = 0;
+	return power->fd;
+}
+
+bool gpu_power_read(struct gpu_power *power, struct gpu_power_sample *s)
+{
+	return read(power->fd, s, sizeof(*s)) == sizeof(*s);
+}
+
+void gpu_power_close(struct gpu_power *power)
+{
+	close(power->fd);
+}
diff --git a/lib/igt_gpu_power.h b/lib/igt_gpu_power.h
new file mode 100644
index 000000000..4e1b747c0
--- /dev/null
+++ b/lib/igt_gpu_power.h
@@ -0,0 +1,59 @@
+/*
+ * Copyright © 2019 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+ * IN THE SOFTWARE.
+ *
+ */
+
+#ifndef IGT_GPU_POWER_H
+#define IGT_GPU_POWER_H
+
+#include <stdbool.h>
+#include <stdint.h>
+
+struct gpu_power {
+	int fd;
+	double scale;
+};
+
+struct gpu_power_sample {
+	uint64_t energy;
+	uint64_t time;
+};
+
+int gpu_power_open(struct gpu_power *power);
+bool gpu_power_read(struct gpu_power *power, struct gpu_power_sample *s);
+void gpu_power_close(struct gpu_power *power);
+
+static inline double gpu_power_J(const struct gpu_power *p,
+				 const struct gpu_power_sample *t0,
+				 const struct gpu_power_sample *t1)
+{
+	return (t1->energy - t0->energy) * p->scale * 1e-9;
+}
+
+static inline double gpu_power_W(const struct gpu_power *p,
+				 const struct gpu_power_sample *t0,
+				 const struct gpu_power_sample *t1)
+{
+	return (t1->energy - t0->energy) * p->scale / (t1->time - t0->time);
+}
+
+#endif /* IGT_GPU_POWER_H */
diff --git a/lib/meson.build b/lib/meson.build
index dd36f8180..63279ae30 100644
--- a/lib/meson.build
+++ b/lib/meson.build
@@ -8,9 +8,11 @@ lib_sources = [
 	'igt_debugfs.c',
 	'igt_device.c',
 	'igt_aux.c',
+	'igt_gpu_power.c',
 	'igt_gt.c',
 	'igt_gvt.c',
 	'igt_matrix.c',
+	'igt_perf.c',
 	'igt_primes.c',
 	'igt_rand.c',
 	'igt_stats.c',
-- 
2.20.1

_______________________________________________
igt-dev mailing list
igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev

Re: [igt-dev] [PATCH i-g-t 05/13] lib: Add GPU power measurement

[Katarzyna Dec]

On Mon, Feb 04, 2019 at 08:36:06AM +0000, Chris Wilson wrote:
> Read the RAPL power metrics courtesy of perf. Or your local HW
> equivalent?
> 
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> ---
>  lib/Makefile.sources |   2 +
>  lib/igt_gpu_power.c  | 109 +++++++++++++++++++++++++++++++++++++++++++
>  lib/igt_gpu_power.h  |  59 +++++++++++++++++++++++
>  lib/meson.build      |   2 +
>  4 files changed, 172 insertions(+)
>  create mode 100644 lib/igt_gpu_power.c
>  create mode 100644 lib/igt_gpu_power.h
> 
> diff --git a/lib/Makefile.sources b/lib/Makefile.sources
> index 808b9617e..54d9e3e7b 100644
> --- a/lib/Makefile.sources
> +++ b/lib/Makefile.sources
> @@ -24,6 +24,8 @@ lib_source_list =	 	\
>  	igt_color_encoding.c	\
>  	igt_color_encoding.h	\
>  	igt_edid_template.h	\
> +	igt_gpu_power.c		\
> +	igt_gpu_power.h		\
>  	igt_gt.c		\
>  	igt_gt.h		\
>  	igt_gvt.c		\
> diff --git a/lib/igt_gpu_power.c b/lib/igt_gpu_power.c
> new file mode 100644
> index 000000000..d62bf5dc8
> --- /dev/null
> +++ b/lib/igt_gpu_power.c
> @@ -0,0 +1,109 @@
> +#include <ctype.h>
> +#include <errno.h>
> +#include <fcntl.h>
> +#include <locale.h>
> +#include <math.h>
> +#include <unistd.h>
> +
> +#include "igt_gpu_power.h"
> +#include "igt_perf.h"
> +
> +static int filename_to_buf(const char *filename, char *buf, unsigned int sz)
> +{
> +	int fd;
> +	ssize_t ret;
> +
> +	fd = open(filename, O_RDONLY);
> +	if (fd < 0)
> +		return -1;
> +
> +	ret = read(fd, buf, sz - 1);
> +	close(fd);
> +	if (ret < 1)
> +		return -1;
> +
> +	buf[ret] = '\0';
> +
> +	return 0;
> +}
> +
> +static uint64_t filename_to_u64(const char *filename, int base)
> +{
> +	char buf[64], *b;
> +
> +	if (filename_to_buf(filename, buf, sizeof(buf)))
> +		return 0;
> +
> +	/*
> +	 * Handle both single integer and key=value formats by skipping
> +	 * leading non-digits.
> +	 */
> +	b = buf;
> +	while (*b && !isdigit(*b))
> +		b++;
> +
> +	return strtoull(b, NULL, base);
> +}
> +
> +static double filename_to_double(const char *filename)
> +{
> +	char *oldlocale;
> +	char buf[80];
> +	double v;
> +
> +	if (filename_to_buf(filename, buf, sizeof(buf)))
> +		return 0;
> +
> +	oldlocale = setlocale(LC_ALL, "C");
> +	v = strtod(buf, NULL);
> +	setlocale(LC_ALL, oldlocale);
Why we are first setting "C" locale and then restoring it? Is there a moment
during mesurement when it is changed?

Kasia :)
> +
> +	return v;
> +}
> +
> +static uint64_t rapl_type_id(void)
> +{
> +	return filename_to_u64("/sys/devices/power/type", 10);
> +}
> +
> +static uint64_t rapl_gpu_power(void)
> +{
> +	return filename_to_u64("/sys/devices/power/events/energy-gpu", 0);
> +}
> +
> +static double rapl_gpu_power_scale(void)
> +{
> +	return filename_to_double("/sys/devices/power/events/energy-gpu.scale");
> +}
> +
> +int gpu_power_open(struct gpu_power *power)
> +{
> +	power->fd = igt_perf_open(rapl_type_id(), rapl_gpu_power());
> +	if (power->fd < 0) {
> +		power->fd = -errno;
> +		goto err;
> +	}
> +
> +	power->scale = rapl_gpu_power_scale();
> +	if (isnan(power->scale) || !power->scale) {
> +		close(power->fd);
> +		goto err;
> +	}
> +	power->scale *= 1e9;
> +
> +	return 0;
> +
> +err:
> +	errno = 0;
> +	return power->fd;
> +}
> +
> +bool gpu_power_read(struct gpu_power *power, struct gpu_power_sample *s)
> +{
> +	return read(power->fd, s, sizeof(*s)) == sizeof(*s);
> +}
> +
> +void gpu_power_close(struct gpu_power *power)
> +{
> +	close(power->fd);
> +}
> diff --git a/lib/igt_gpu_power.h b/lib/igt_gpu_power.h
> new file mode 100644
> index 000000000..4e1b747c0
> --- /dev/null
> +++ b/lib/igt_gpu_power.h
> @@ -0,0 +1,59 @@
> +/*
> + * Copyright © 2019 Intel Corporation
> + *
> + * Permission is hereby granted, free of charge, to any person obtaining a
> + * copy of this software and associated documentation files (the "Software"),
> + * to deal in the Software without restriction, including without limitation
> + * the rights to use, copy, modify, merge, publish, distribute, sublicense,
> + * and/or sell copies of the Software, and to permit persons to whom the
> + * Software is furnished to do so, subject to the following conditions:
> + *
> + * The above copyright notice and this permission notice (including the next
> + * paragraph) shall be included in all copies or substantial portions of the
> + * Software.
> + *
> + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
> + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
> + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
> + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
> + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
> + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
> + * IN THE SOFTWARE.
> + *
> + */
> +
> +#ifndef IGT_GPU_POWER_H
> +#define IGT_GPU_POWER_H
> +
> +#include <stdbool.h>
> +#include <stdint.h>
> +
> +struct gpu_power {
> +	int fd;
> +	double scale;
> +};
> +
> +struct gpu_power_sample {
> +	uint64_t energy;
> +	uint64_t time;
> +};
> +
> +int gpu_power_open(struct gpu_power *power);
> +bool gpu_power_read(struct gpu_power *power, struct gpu_power_sample *s);
> +void gpu_power_close(struct gpu_power *power);
> +
> +static inline double gpu_power_J(const struct gpu_power *p,
> +				 const struct gpu_power_sample *t0,
> +				 const struct gpu_power_sample *t1)
> +{
> +	return (t1->energy - t0->energy) * p->scale * 1e-9;
> +}
> +
> +static inline double gpu_power_W(const struct gpu_power *p,
> +				 const struct gpu_power_sample *t0,
> +				 const struct gpu_power_sample *t1)
> +{
> +	return (t1->energy - t0->energy) * p->scale / (t1->time - t0->time);
> +}
> +
> +#endif /* IGT_GPU_POWER_H */
> diff --git a/lib/meson.build b/lib/meson.build
> index dd36f8180..63279ae30 100644
> --- a/lib/meson.build
> +++ b/lib/meson.build
> @@ -8,9 +8,11 @@ lib_sources = [
>  	'igt_debugfs.c',
>  	'igt_device.c',
>  	'igt_aux.c',
> +	'igt_gpu_power.c',
>  	'igt_gt.c',
>  	'igt_gvt.c',
>  	'igt_matrix.c',
> +	'igt_perf.c',
>  	'igt_primes.c',
>  	'igt_rand.c',
>  	'igt_stats.c',
> -- 
> 2.20.1
> 
> _______________________________________________
> igt-dev mailing list
> igt-dev@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/igt-dev
_______________________________________________
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Re: [igt-dev] [PATCH i-g-t 05/13] lib: Add GPU power measurement

[Katarzyna Dec]

On Mon, Feb 04, 2019 at 08:36:06AM +0000, Chris Wilson wrote:
> Read the RAPL power metrics courtesy of perf. Or your local HW
> equivalent?
> 
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> ---
>  lib/Makefile.sources |   2 +
>  lib/igt_gpu_power.c  | 109 +++++++++++++++++++++++++++++++++++++++++++
>  lib/igt_gpu_power.h  |  59 +++++++++++++++++++++++
>  lib/meson.build      |   2 +
>  4 files changed, 172 insertions(+)
>  create mode 100644 lib/igt_gpu_power.c
>  create mode 100644 lib/igt_gpu_power.h
> 
> diff --git a/lib/Makefile.sources b/lib/Makefile.sources
> index 808b9617e..54d9e3e7b 100644
> --- a/lib/Makefile.sources
> +++ b/lib/Makefile.sources
> @@ -24,6 +24,8 @@ lib_source_list =	 	\
>  	igt_color_encoding.c	\
>  	igt_color_encoding.h	\
>  	igt_edid_template.h	\
> +	igt_gpu_power.c		\
> +	igt_gpu_power.h		\
>  	igt_gt.c		\
>  	igt_gt.h		\
>  	igt_gvt.c		\
> diff --git a/lib/igt_gpu_power.c b/lib/igt_gpu_power.c
> new file mode 100644
> index 000000000..d62bf5dc8
> --- /dev/null
> +++ b/lib/igt_gpu_power.c
> @@ -0,0 +1,109 @@
> +#include <ctype.h>
> +#include <errno.h>
> +#include <fcntl.h>
> +#include <locale.h>
> +#include <math.h>
> +#include <unistd.h>
> +
> +#include "igt_gpu_power.h"
> +#include "igt_perf.h"
> +
> +static int filename_to_buf(const char *filename, char *buf, unsigned int sz)
> +{
> +	int fd;
> +	ssize_t ret;
> +
> +	fd = open(filename, O_RDONLY);
> +	if (fd < 0)
> +		return -1;
> +
> +	ret = read(fd, buf, sz - 1);
> +	close(fd);
> +	if (ret < 1)
> +		return -1;
> +
> +	buf[ret] = '\0';
> +
> +	return 0;
> +}
> +
> +static uint64_t filename_to_u64(const char *filename, int base)
> +{
> +	char buf[64], *b;
> +
> +	if (filename_to_buf(filename, buf, sizeof(buf)))
> +		return 0;
> +
> +	/*
> +	 * Handle both single integer and key=value formats by skipping
> +	 * leading non-digits.
> +	 */
> +	b = buf;
> +	while (*b && !isdigit(*b))
> +		b++;
> +
> +	return strtoull(b, NULL, base);
> +}
> +
> +static double filename_to_double(const char *filename)
> +{
> +	char *oldlocale;
> +	char buf[80];
> +	double v;
> +
> +	if (filename_to_buf(filename, buf, sizeof(buf)))
> +		return 0;
> +
> +	oldlocale = setlocale(LC_ALL, "C");
> +	v = strtod(buf, NULL);
> +	setlocale(LC_ALL, oldlocale);
Why we are first setting "C" locale and then restoring it? Is there a moment
during mesurement when it is changed?

Kasia :)
> +
> +	return v;
> +}
> +
> +static uint64_t rapl_type_id(void)
> +{
> +	return filename_to_u64("/sys/devices/power/type", 10);
> +}
> +
> +static uint64_t rapl_gpu_power(void)
> +{
> +	return filename_to_u64("/sys/devices/power/events/energy-gpu", 0);
> +}
> +
> +static double rapl_gpu_power_scale(void)
> +{
> +	return filename_to_double("/sys/devices/power/events/energy-gpu.scale");
> +}
> +
> +int gpu_power_open(struct gpu_power *power)
> +{
> +	power->fd = igt_perf_open(rapl_type_id(), rapl_gpu_power());
> +	if (power->fd < 0) {
> +		power->fd = -errno;
> +		goto err;
> +	}
> +
> +	power->scale = rapl_gpu_power_scale();
> +	if (isnan(power->scale) || !power->scale) {
> +		close(power->fd);
> +		goto err;
> +	}
> +	power->scale *= 1e9;
> +
> +	return 0;
> +
> +err:
> +	errno = 0;
> +	return power->fd;
> +}
> +
> +bool gpu_power_read(struct gpu_power *power, struct gpu_power_sample *s)
> +{
> +	return read(power->fd, s, sizeof(*s)) == sizeof(*s);
> +}
> +
> +void gpu_power_close(struct gpu_power *power)
> +{
> +	close(power->fd);
> +}
> diff --git a/lib/igt_gpu_power.h b/lib/igt_gpu_power.h
> new file mode 100644
> index 000000000..4e1b747c0
> --- /dev/null
> +++ b/lib/igt_gpu_power.h
> @@ -0,0 +1,59 @@
> +/*
> + * Copyright © 2019 Intel Corporation
> + *
> + * Permission is hereby granted, free of charge, to any person obtaining a
> + * copy of this software and associated documentation files (the "Software"),
> + * to deal in the Software without restriction, including without limitation
> + * the rights to use, copy, modify, merge, publish, distribute, sublicense,
> + * and/or sell copies of the Software, and to permit persons to whom the
> + * Software is furnished to do so, subject to the following conditions:
> + *
> + * The above copyright notice and this permission notice (including the next
> + * paragraph) shall be included in all copies or substantial portions of the
> + * Software.
> + *
> + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
> + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
> + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
> + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
> + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
> + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
> + * IN THE SOFTWARE.
> + *
> + */
> +
> +#ifndef IGT_GPU_POWER_H
> +#define IGT_GPU_POWER_H
> +
> +#include <stdbool.h>
> +#include <stdint.h>
> +
> +struct gpu_power {
> +	int fd;
> +	double scale;
> +};
> +
> +struct gpu_power_sample {
> +	uint64_t energy;
> +	uint64_t time;
> +};
> +
> +int gpu_power_open(struct gpu_power *power);
> +bool gpu_power_read(struct gpu_power *power, struct gpu_power_sample *s);
> +void gpu_power_close(struct gpu_power *power);
> +
> +static inline double gpu_power_J(const struct gpu_power *p,
> +				 const struct gpu_power_sample *t0,
> +				 const struct gpu_power_sample *t1)
> +{
> +	return (t1->energy - t0->energy) * p->scale * 1e-9;
> +}
> +
> +static inline double gpu_power_W(const struct gpu_power *p,
> +				 const struct gpu_power_sample *t0,
> +				 const struct gpu_power_sample *t1)
> +{
> +	return (t1->energy - t0->energy) * p->scale / (t1->time - t0->time);
> +}
> +
> +#endif /* IGT_GPU_POWER_H */
> diff --git a/lib/meson.build b/lib/meson.build
> index dd36f8180..63279ae30 100644
> --- a/lib/meson.build
> +++ b/lib/meson.build
> @@ -8,9 +8,11 @@ lib_sources = [
>  	'igt_debugfs.c',
>  	'igt_device.c',
>  	'igt_aux.c',
> +	'igt_gpu_power.c',
>  	'igt_gt.c',
>  	'igt_gvt.c',
>  	'igt_matrix.c',
> +	'igt_perf.c',
>  	'igt_primes.c',
>  	'igt_rand.c',
>  	'igt_stats.c',
> -- 
> 2.20.1
> 
> _______________________________________________
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> igt-dev@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/igt-dev
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Re: [igt-dev] [PATCH i-g-t 05/13] lib: Add GPU power measurement

[Chris Wilson]

Quoting Katarzyna Dec (2019-02-04 10:05:36)
> On Mon, Feb 04, 2019 at 08:36:06AM +0000, Chris Wilson wrote:
> > +     oldlocale = setlocale(LC_ALL, "C");
> > +     v = strtod(buf, NULL);
> > +     setlocale(LC_ALL, oldlocale);
> Why we are first setting "C" locale and then restoring it? Is there a moment
> during mesurement when it is changed?

No, but it may be set in the environment for pretty-printing of output.
Thread-safety not guaranteed.
-Chris
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Re: [igt-dev] [PATCH i-g-t 05/13] lib: Add GPU power measurement

[Chris Wilson]

Quoting Katarzyna Dec (2019-02-04 10:05:36)
> On Mon, Feb 04, 2019 at 08:36:06AM +0000, Chris Wilson wrote:
> > +     oldlocale = setlocale(LC_ALL, "C");
> > +     v = strtod(buf, NULL);
> > +     setlocale(LC_ALL, oldlocale);
> Why we are first setting "C" locale and then restoring it? Is there a moment
> during mesurement when it is changed?

No, but it may be set in the environment for pretty-printing of output.
Thread-safety not guaranteed.
-Chris
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Re: [igt-dev] [PATCH i-g-t 05/13] lib: Add GPU power measurement

[Ville Syrjälä]

On Mon, Feb 04, 2019 at 10:25:19AM +0000, Chris Wilson wrote:
> Quoting Katarzyna Dec (2019-02-04 10:05:36)
> > On Mon, Feb 04, 2019 at 08:36:06AM +0000, Chris Wilson wrote:
> > > +     oldlocale = setlocale(LC_ALL, "C");
> > > +     v = strtod(buf, NULL);
> > > +     setlocale(LC_ALL, oldlocale);
> > Why we are first setting "C" locale and then restoring it? Is there a moment
> > during mesurement when it is changed?
> 
> No, but it may be set in the environment for pretty-printing of output.
> Thread-safety not guaranteed.

uselocale() ?

-- 
Ville Syrjälä
Intel
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Re: [igt-dev] [PATCH i-g-t 05/13] lib: Add GPU power measurement

[Ville Syrjälä]

On Mon, Feb 04, 2019 at 10:25:19AM +0000, Chris Wilson wrote:
> Quoting Katarzyna Dec (2019-02-04 10:05:36)
> > On Mon, Feb 04, 2019 at 08:36:06AM +0000, Chris Wilson wrote:
> > > +     oldlocale = setlocale(LC_ALL, "C");
> > > +     v = strtod(buf, NULL);
> > > +     setlocale(LC_ALL, oldlocale);
> > Why we are first setting "C" locale and then restoring it? Is there a moment
> > during mesurement when it is changed?
> 
> No, but it may be set in the environment for pretty-printing of output.
> Thread-safety not guaranteed.

uselocale() ?

-- 
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Intel
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Re: [igt-dev] [PATCH i-g-t 05/13] lib: Add GPU power measurement

[Chris Wilson]

Quoting Ville Syrjälä (2019-02-05 14:41:10)
> On Mon, Feb 04, 2019 at 10:25:19AM +0000, Chris Wilson wrote:
> > Quoting Katarzyna Dec (2019-02-04 10:05:36)
> > > On Mon, Feb 04, 2019 at 08:36:06AM +0000, Chris Wilson wrote:
> > > > +     oldlocale = setlocale(LC_ALL, "C");
> > > > +     v = strtod(buf, NULL);
> > > > +     setlocale(LC_ALL, oldlocale);
> > > Why we are first setting "C" locale and then restoring it? Is there a moment
> > > during mesurement when it is changed?
> > 
> > No, but it may be set in the environment for pretty-printing of output.
> > Thread-safety not guaranteed.
> 
> uselocale() ?

Seems viable. TIL.
-Chris
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Re: [igt-dev] [PATCH i-g-t 05/13] lib: Add GPU power measurement

[Chris Wilson]

Quoting Ville Syrjälä (2019-02-05 14:41:10)
> On Mon, Feb 04, 2019 at 10:25:19AM +0000, Chris Wilson wrote:
> > Quoting Katarzyna Dec (2019-02-04 10:05:36)
> > > On Mon, Feb 04, 2019 at 08:36:06AM +0000, Chris Wilson wrote:
> > > > +     oldlocale = setlocale(LC_ALL, "C");
> > > > +     v = strtod(buf, NULL);
> > > > +     setlocale(LC_ALL, oldlocale);
> > > Why we are first setting "C" locale and then restoring it? Is there a moment
> > > during mesurement when it is changed?
> > 
> > No, but it may be set in the environment for pretty-printing of output.
> > Thread-safety not guaranteed.
> 
> uselocale() ?

Seems viable. TIL.
-Chris
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Re: [igt-dev] [PATCH i-g-t 05/13] lib: Add GPU power measurement

[Katarzyna Dec]

On Mon, Feb 04, 2019 at 08:36:06AM +0000, Chris Wilson wrote:
> Read the RAPL power metrics courtesy of perf. Or your local HW
> equivalent?
I think this commit message it too brief. Who should answet the question? :)
> 
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> ---
>  lib/Makefile.sources |   2 +
>  lib/igt_gpu_power.c  | 109 +++++++++++++++++++++++++++++++++++++++++++
>  lib/igt_gpu_power.h  |  59 +++++++++++++++++++++++
>  lib/meson.build      |   2 +
>  4 files changed, 172 insertions(+)
>  create mode 100644 lib/igt_gpu_power.c
>  create mode 100644 lib/igt_gpu_power.h
> 
> diff --git a/lib/Makefile.sources b/lib/Makefile.sources
> index 808b9617e..54d9e3e7b 100644
> --- a/lib/Makefile.sources
> +++ b/lib/Makefile.sources
> @@ -24,6 +24,8 @@ lib_source_list =	 	\
>  	igt_color_encoding.c	\
>  	igt_color_encoding.h	\
>  	igt_edid_template.h	\
> +	igt_gpu_power.c		\
> +	igt_gpu_power.h		\
>  	igt_gt.c		\
>  	igt_gt.h		\
>  	igt_gvt.c		\
> diff --git a/lib/igt_gpu_power.c b/lib/igt_gpu_power.c
> new file mode 100644
> index 000000000..d62bf5dc8
> --- /dev/null
> +++ b/lib/igt_gpu_power.c
> @@ -0,0 +1,109 @@
> +#include <ctype.h>
> +#include <errno.h>
> +#include <fcntl.h>
> +#include <locale.h>
> +#include <math.h>
> +#include <unistd.h>
> +
> +#include "igt_gpu_power.h"
> +#include "igt_perf.h"
> +
> +static int filename_to_buf(const char *filename, char *buf, unsigned int sz)
> +{
> +	int fd;
> +	ssize_t ret;
> +
> +	fd = open(filename, O_RDONLY);
> +	if (fd < 0)
> +		return -1;
> +
> +	ret = read(fd, buf, sz - 1);
> +	close(fd);
> +	if (ret < 1)
> +		return -1;
> +
> +	buf[ret] = '\0';
> +
> +	return 0;
> +}
> +
> +static uint64_t filename_to_u64(const char *filename, int base)
> +{
> +	char buf[64], *b;
> +
> +	if (filename_to_buf(filename, buf, sizeof(buf)))
> +		return 0;
> +
> +	/*
> +	 * Handle both single integer and key=value formats by skipping
> +	 * leading non-digits.
> +	 */
> +	b = buf;
> +	while (*b && !isdigit(*b))
> +		b++;
> +
> +	return strtoull(b, NULL, base);
> +}
> +
> +static double filename_to_double(const char *filename)
> +{
> +	char *oldlocale;
> +	char buf[80];
> +	double v;
> +
> +	if (filename_to_buf(filename, buf, sizeof(buf)))
> +		return 0;
> +
> +	oldlocale = setlocale(LC_ALL, "C");
> +	v = strtod(buf, NULL);
> +	setlocale(LC_ALL, oldlocale);
> +
> +	return v;
> +}
> +
> +static uint64_t rapl_type_id(void)
> +{
> +	return filename_to_u64("/sys/devices/power/type", 10);
> +}
> +
> +static uint64_t rapl_gpu_power(void)
> +{
> +	return filename_to_u64("/sys/devices/power/events/energy-gpu", 0);
> +}
> +
> +static double rapl_gpu_power_scale(void)
> +{
> +	return filename_to_double("/sys/devices/power/events/energy-gpu.scale");
> +}
> +
> +int gpu_power_open(struct gpu_power *power)
> +{
> +	power->fd = igt_perf_open(rapl_type_id(), rapl_gpu_power());
> +	if (power->fd < 0) {
> +		power->fd = -errno;
> +		goto err;
> +	}
> +
> +	power->scale = rapl_gpu_power_scale();
> +	if (isnan(power->scale) || !power->scale) {
> +		close(power->fd);
> +		goto err;
> +	}
> +	power->scale *= 1e9;
Where this scale value is coming from? I looked at this parameter on my desktop
and it is e-10.
> +
> +	return 0;
> +
> +err:
> +	errno = 0;
> +	return power->fd;
> +}
> +
> +bool gpu_power_read(struct gpu_power *power, struct gpu_power_sample *s)
> +{
> +	return read(power->fd, s, sizeof(*s)) == sizeof(*s);
> +}
> +
> +void gpu_power_close(struct gpu_power *power)
> +{
> +	close(power->fd);
> +}
> diff --git a/lib/igt_gpu_power.h b/lib/igt_gpu_power.h
> new file mode 100644
> index 000000000..4e1b747c0
> --- /dev/null
> +++ b/lib/igt_gpu_power.h
> @@ -0,0 +1,59 @@
> +/*
> + * Copyright © 2019 Intel Corporation
> + *
> + * Permission is hereby granted, free of charge, to any person obtaining a
> + * copy of this software and associated documentation files (the "Software"),
> + * to deal in the Software without restriction, including without limitation
> + * the rights to use, copy, modify, merge, publish, distribute, sublicense,
> + * and/or sell copies of the Software, and to permit persons to whom the
> + * Software is furnished to do so, subject to the following conditions:
> + *
> + * The above copyright notice and this permission notice (including the next
> + * paragraph) shall be included in all copies or substantial portions of the
> + * Software.
> + *
> + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
> + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
> + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
> + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
> + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
> + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
> + * IN THE SOFTWARE.
> + *
> + */
> +
> +#ifndef IGT_GPU_POWER_H
> +#define IGT_GPU_POWER_H
> +
> +#include <stdbool.h>
> +#include <stdint.h>
> +
> +struct gpu_power {
> +	int fd;
> +	double scale;
> +};
> +
> +struct gpu_power_sample {
> +	uint64_t energy;
> +	uint64_t time;
> +};
> +
> +int gpu_power_open(struct gpu_power *power);
> +bool gpu_power_read(struct gpu_power *power, struct gpu_power_sample *s);
> +void gpu_power_close(struct gpu_power *power);
> +
> +static inline double gpu_power_J(const struct gpu_power *p,
> +				 const struct gpu_power_sample *t0,
> +				 const struct gpu_power_sample *t1)
> +{
> +	return (t1->energy - t0->energy) * p->scale * 1e-9;
Same a above - where this value comes from?

Kasia :)
> +}
> +
> +static inline double gpu_power_W(const struct gpu_power *p,
> +				 const struct gpu_power_sample *t0,
> +				 const struct gpu_power_sample *t1)
> +{
> +	return (t1->energy - t0->energy) * p->scale / (t1->time - t0->time);
> +}
> +
> +#endif /* IGT_GPU_POWER_H */
> diff --git a/lib/meson.build b/lib/meson.build
> index dd36f8180..63279ae30 100644
> --- a/lib/meson.build
> +++ b/lib/meson.build
> @@ -8,9 +8,11 @@ lib_sources = [
>  	'igt_debugfs.c',
>  	'igt_device.c',
>  	'igt_aux.c',
> +	'igt_gpu_power.c',
>  	'igt_gt.c',
>  	'igt_gvt.c',
>  	'igt_matrix.c',
> +	'igt_perf.c',
>  	'igt_primes.c',
>  	'igt_rand.c',
>  	'igt_stats.c',
> -- 
> 2.20.1
> 
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Re: [igt-dev] [PATCH i-g-t 05/13] lib: Add GPU power measurement

[Chris Wilson]

Quoting Katarzyna Dec (2019-02-05 12:27:57)
> On Mon, Feb 04, 2019 at 08:36:06AM +0000, Chris Wilson wrote:
> > +     power->scale = rapl_gpu_power_scale();
> > +     if (isnan(power->scale) || !power->scale) {
> > +             close(power->fd);
> > +             goto err;
> > +     }
> > +     power->scale *= 1e9;
> Where this scale value is coming from? I looked at this parameter on my desktop
> and it is e-10.

The timestamps are in nanoseconds. Pick your poison.
-Chris
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Re: [igt-dev] [PATCH i-g-t 05/13] lib: Add GPU power measurement

[Katarzyna Dec]

On Tue, Feb 05, 2019 at 12:31:55PM +0000, Chris Wilson wrote:
> Quoting Katarzyna Dec (2019-02-05 12:27:57)
> > On Mon, Feb 04, 2019 at 08:36:06AM +0000, Chris Wilson wrote:
> > > +     power->scale = rapl_gpu_power_scale();
> > > +     if (isnan(power->scale) || !power->scale) {
> > > +             close(power->fd);
> > > +             goto err;
> > > +     }
> > > +     power->scale *= 1e9;
> > Where this scale value is coming from? I looked at this parameter on my desktop
> > and it is e-10.
> 
> The timestamps are in nanoseconds. Pick your poison.
> -Chris
Can I have donuts for poison? Just kidding :)

Reviewed-by: Katarzyna Dec <katarzyna.dec@intel.com>
Kasia :)
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[PATCH i-g-t 06/13] i915/gem_exec_schedule: Measure semaphore power consumption

[Chris Wilson]

How much energy does spinning on a semaphore consume relative to plain
old spinning?

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
---
 tests/i915/gem_exec_schedule.c | 72 +++++++++++++++++++++++++++++++++-
 1 file changed, 71 insertions(+), 1 deletion(-)

diff --git a/tests/i915/gem_exec_schedule.c b/tests/i915/gem_exec_schedule.c
index 0462ce84f..184ceb7d6 100644
--- a/tests/i915/gem_exec_schedule.c
+++ b/tests/i915/gem_exec_schedule.c
@@ -29,9 +29,10 @@
 #include <signal.h>
 
 #include "igt.h"
-#include "igt_vgem.h"
+#include "igt_gpu_power.h"
 #include "igt_rand.h"
 #include "igt_sysfs.h"
+#include "igt_vgem.h"
 #include "i915/gem_ring.h"
 
 #define LO 0
@@ -1191,6 +1192,65 @@ static void test_pi_ringfull(int fd, unsigned int engine)
 	munmap(result, 4096);
 }
 
+static void measure_semaphore_power(int i915)
+{
+	struct gpu_power power;
+	unsigned int engine, signaler;
+
+	igt_require(gpu_power_open(&power) == 0);
+
+	for_each_physical_engine(i915, signaler) {
+		struct gpu_power_sample s_spin[2];
+		struct gpu_power_sample s_sema[2];
+		double baseline, total;
+		int64_t jiffie = 1;
+		igt_spin_t *spin;
+
+		spin = __igt_spin_batch_new(i915,
+					    .engine = signaler,
+					    .flags = IGT_SPIN_POLL_RUN);
+		gem_wait(i915, spin->handle, &jiffie); /* waitboost */
+		igt_assert(spin->running);
+		igt_spin_busywait_until_running(spin);
+
+		gpu_power_read(&power, &s_spin[0]);
+		usleep(100*1000);
+		gpu_power_read(&power, &s_spin[1]);
+
+		/* Add a waiter to each engine */
+		for_each_physical_engine(i915, engine) {
+			igt_spin_t *sema;
+
+			if (engine == signaler)
+				continue;
+
+			sema = __igt_spin_batch_new(i915,
+						    .engine = engine,
+						    .dependency = spin->handle);
+
+			igt_spin_batch_free(i915, sema);
+		}
+		usleep(10); /* just give the tasklets a chance to run */
+
+		gpu_power_read(&power, &s_sema[0]);
+		usleep(100*1000);
+		gpu_power_read(&power, &s_sema[1]);
+
+		igt_spin_batch_free(i915, spin);
+
+		baseline = gpu_power_W(&power, &s_spin[0], &s_spin[1]);
+		total = gpu_power_W(&power, &s_sema[0], &s_sema[1]);
+
+		igt_info("%s: %.1fmW + %.1fmW (total %1.fmW)\n",
+			 e__->name,
+			 1e3 * baseline,
+			 1e3 * (total - baseline),
+			 1e3 * total);
+	}
+
+	gpu_power_close(&power);
+}
+
 igt_main
 {
 	const struct intel_execution_engine *e;
@@ -1351,6 +1411,16 @@ igt_main
 		}
 	}
 
+	igt_subtest_group {
+		igt_fixture {
+			igt_require(gem_scheduler_enabled(fd));
+			igt_require(gem_scheduler_has_semaphores(fd));
+		}
+
+		igt_subtest("semaphore-power")
+			measure_semaphore_power(fd);
+	}
+
 	igt_fixture {
 		igt_stop_hang_detector();
 		close(fd);
-- 
2.20.1

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[igt-dev] [PATCH i-g-t 06/13] i915/gem_exec_schedule: Measure semaphore power consumption

[Chris Wilson]

How much energy does spinning on a semaphore consume relative to plain
old spinning?

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
---
 tests/i915/gem_exec_schedule.c | 72 +++++++++++++++++++++++++++++++++-
 1 file changed, 71 insertions(+), 1 deletion(-)

diff --git a/tests/i915/gem_exec_schedule.c b/tests/i915/gem_exec_schedule.c
index 0462ce84f..184ceb7d6 100644
--- a/tests/i915/gem_exec_schedule.c
+++ b/tests/i915/gem_exec_schedule.c
@@ -29,9 +29,10 @@
 #include <signal.h>
 
 #include "igt.h"
-#include "igt_vgem.h"
+#include "igt_gpu_power.h"
 #include "igt_rand.h"
 #include "igt_sysfs.h"
+#include "igt_vgem.h"
 #include "i915/gem_ring.h"
 
 #define LO 0
@@ -1191,6 +1192,65 @@ static void test_pi_ringfull(int fd, unsigned int engine)
 	munmap(result, 4096);
 }
 
+static void measure_semaphore_power(int i915)
+{
+	struct gpu_power power;
+	unsigned int engine, signaler;
+
+	igt_require(gpu_power_open(&power) == 0);
+
+	for_each_physical_engine(i915, signaler) {
+		struct gpu_power_sample s_spin[2];
+		struct gpu_power_sample s_sema[2];
+		double baseline, total;
+		int64_t jiffie = 1;
+		igt_spin_t *spin;
+
+		spin = __igt_spin_batch_new(i915,
+					    .engine = signaler,
+					    .flags = IGT_SPIN_POLL_RUN);
+		gem_wait(i915, spin->handle, &jiffie); /* waitboost */
+		igt_assert(spin->running);
+		igt_spin_busywait_until_running(spin);
+
+		gpu_power_read(&power, &s_spin[0]);
+		usleep(100*1000);
+		gpu_power_read(&power, &s_spin[1]);
+
+		/* Add a waiter to each engine */
+		for_each_physical_engine(i915, engine) {
+			igt_spin_t *sema;
+
+			if (engine == signaler)
+				continue;
+
+			sema = __igt_spin_batch_new(i915,
+						    .engine = engine,
+						    .dependency = spin->handle);
+
+			igt_spin_batch_free(i915, sema);
+		}
+		usleep(10); /* just give the tasklets a chance to run */
+
+		gpu_power_read(&power, &s_sema[0]);
+		usleep(100*1000);
+		gpu_power_read(&power, &s_sema[1]);
+
+		igt_spin_batch_free(i915, spin);
+
+		baseline = gpu_power_W(&power, &s_spin[0], &s_spin[1]);
+		total = gpu_power_W(&power, &s_sema[0], &s_sema[1]);
+
+		igt_info("%s: %.1fmW + %.1fmW (total %1.fmW)\n",
+			 e__->name,
+			 1e3 * baseline,
+			 1e3 * (total - baseline),
+			 1e3 * total);
+	}
+
+	gpu_power_close(&power);
+}
+
 igt_main
 {
 	const struct intel_execution_engine *e;
@@ -1351,6 +1411,16 @@ igt_main
 		}
 	}
 
+	igt_subtest_group {
+		igt_fixture {
+			igt_require(gem_scheduler_enabled(fd));
+			igt_require(gem_scheduler_has_semaphores(fd));
+		}
+
+		igt_subtest("semaphore-power")
+			measure_semaphore_power(fd);
+	}
+
 	igt_fixture {
 		igt_stop_hang_detector();
 		close(fd);
-- 
2.20.1

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Re: [igt-dev] [PATCH i-g-t 06/13] i915/gem_exec_schedule: Measure semaphore power consumption

[Katarzyna Dec]

On Mon, Feb 04, 2019 at 08:36:07AM +0000, Chris Wilson wrote:
> How much energy does spinning on a semaphore consume relative to plain
> old spinning?
> 
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Is this patch relying on something more then:
bad9d8d0 lib: Add GPU power measurement ? Because I got errors on compilation:

'../tests/i915/gem_exec_schedule.c:1417:16: error: implicit declaration of
function ‘gem_scheduler_has_semaphores’; did you mean
‘gem_scheduler_has_preemption’? [-Werror=implicit-function-declaration]'
I've seen some patches on intel-gfx, but not in this series.

> ---
>  tests/i915/gem_exec_schedule.c | 72 +++++++++++++++++++++++++++++++++-
>  1 file changed, 71 insertions(+), 1 deletion(-)
> 
> diff --git a/tests/i915/gem_exec_schedule.c b/tests/i915/gem_exec_schedule.c
> index 0462ce84f..184ceb7d6 100644
> --- a/tests/i915/gem_exec_schedule.c
> +++ b/tests/i915/gem_exec_schedule.c
> @@ -29,9 +29,10 @@
>  #include <signal.h>
>  
>  #include "igt.h"
> -#include "igt_vgem.h"
> +#include "igt_gpu_power.h"
>  #include "igt_rand.h"
>  #include "igt_sysfs.h"
> +#include "igt_vgem.h"
>  #include "i915/gem_ring.h"
>  
>  #define LO 0
> @@ -1191,6 +1192,65 @@ static void test_pi_ringfull(int fd, unsigned int engine)
>  	munmap(result, 4096);
>  }
>  
> +static void measure_semaphore_power(int i915)
> +{
> +	struct gpu_power power;
Where power struct is initialized?
> +	unsigned int engine, signaler;
How does signaler differ from engine (in usage)?
> +
> +	igt_require(gpu_power_open(&power) == 0);
> +
> +	for_each_physical_engine(i915, signaler) {
> +		struct gpu_power_sample s_spin[2];
> +		struct gpu_power_sample s_sema[2];
> +		double baseline, total;
> +		int64_t jiffie = 1;
> +		igt_spin_t *spin;
> +
> +		spin = __igt_spin_batch_new(i915,
> +					    .engine = signaler,
> +					    .flags = IGT_SPIN_POLL_RUN);
> +		gem_wait(i915, spin->handle, &jiffie); /* waitboost */
> +		igt_assert(spin->running);
> +		igt_spin_busywait_until_running(spin);
> +
> +		gpu_power_read(&power, &s_spin[0]);
> +		usleep(100*1000);
> +		gpu_power_read(&power, &s_spin[1]);
Shouldn't we be checking results of gpu_power_read in both cases?
> +
> +		/* Add a waiter to each engine */
> +		for_each_physical_engine(i915, engine) {
> +			igt_spin_t *sema;
> +
> +			if (engine == signaler)
> +				continue;
> +
> +			sema = __igt_spin_batch_new(i915,
> +						    .engine = engine,
> +						    .dependency = spin->handle);
> +
> +			igt_spin_batch_free(i915, sema);
> +		}
> +		usleep(10); /* just give the tasklets a chance to run */
> +
> +		gpu_power_read(&power, &s_sema[0]);
> +		usleep(100*1000);
> +		gpu_power_read(&power, &s_sema[1]);
Same as above.

Kasia :)
> +
> +		igt_spin_batch_free(i915, spin);
> +
> +		baseline = gpu_power_W(&power, &s_spin[0], &s_spin[1]);
> +		total = gpu_power_W(&power, &s_sema[0], &s_sema[1]);
> +
> +		igt_info("%s: %.1fmW + %.1fmW (total %1.fmW)\n",
> +			 e__->name,
> +			 1e3 * baseline,
> +			 1e3 * (total - baseline),
> +			 1e3 * total);
> +	}
> +
> +	gpu_power_close(&power);
> +}
> +
>  igt_main
>  {
>  	const struct intel_execution_engine *e;
> @@ -1351,6 +1411,16 @@ igt_main
>  		}
>  	}
>  
> +	igt_subtest_group {
> +		igt_fixture {
> +			igt_require(gem_scheduler_enabled(fd));
> +			igt_require(gem_scheduler_has_semaphores(fd));
> +		}
> +
> +		igt_subtest("semaphore-power")
> +			measure_semaphore_power(fd);
> +	}
> +
>  	igt_fixture {
>  		igt_stop_hang_detector();
>  		close(fd);
> -- 
> 2.20.1
> 
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> igt-dev@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/igt-dev
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Re: [igt-dev] [PATCH i-g-t 06/13] i915/gem_exec_schedule: Measure semaphore power consumption

[Chris Wilson]

Quoting Katarzyna Dec (2019-02-05 12:50:38)
> On Mon, Feb 04, 2019 at 08:36:07AM +0000, Chris Wilson wrote:
> > How much energy does spinning on a semaphore consume relative to plain
> > old spinning?
> > 
> > Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> Is this patch relying on something more then:
> bad9d8d0 lib: Add GPU power measurement ? Because I got errors on compilation:
> 
> '../tests/i915/gem_exec_schedule.c:1417:16: error: implicit declaration of
> function ‘gem_scheduler_has_semaphores’; did you mean
> ‘gem_scheduler_has_preemption’? [-Werror=implicit-function-declaration]'
> I've seen some patches on intel-gfx, but not in this series.

That'll be patch 4/13.

> > ---
> >  tests/i915/gem_exec_schedule.c | 72 +++++++++++++++++++++++++++++++++-
> >  1 file changed, 71 insertions(+), 1 deletion(-)
> > 
> > diff --git a/tests/i915/gem_exec_schedule.c b/tests/i915/gem_exec_schedule.c
> > index 0462ce84f..184ceb7d6 100644
> > --- a/tests/i915/gem_exec_schedule.c
> > +++ b/tests/i915/gem_exec_schedule.c
> > @@ -29,9 +29,10 @@
> >  #include <signal.h>
> >  
> >  #include "igt.h"
> > -#include "igt_vgem.h"
> > +#include "igt_gpu_power.h"
> >  #include "igt_rand.h"
> >  #include "igt_sysfs.h"
> > +#include "igt_vgem.h"
> >  #include "i915/gem_ring.h"
> >  
> >  #define LO 0
> > @@ -1191,6 +1192,65 @@ static void test_pi_ringfull(int fd, unsigned int engine)
> >       munmap(result, 4096);
> >  }
> >  
> > +static void measure_semaphore_power(int i915)
> > +{
> > +     struct gpu_power power;
> Where power struct is initialized?
> > +     unsigned int engine, signaler;
> How does signaler differ from engine (in usage)?

signaler tells engines to go.

> > +     igt_require(gpu_power_open(&power) == 0);

This initialises the struct gpu_power.

> > +     for_each_physical_engine(i915, signaler) {
> > +             struct gpu_power_sample s_spin[2];
> > +             struct gpu_power_sample s_sema[2];
> > +             double baseline, total;
> > +             int64_t jiffie = 1;
> > +             igt_spin_t *spin;
> > +
> > +             spin = __igt_spin_batch_new(i915,
> > +                                         .engine = signaler,
> > +                                         .flags = IGT_SPIN_POLL_RUN);
> > +             gem_wait(i915, spin->handle, &jiffie); /* waitboost */
> > +             igt_assert(spin->running);
> > +             igt_spin_busywait_until_running(spin);
> > +
> > +             gpu_power_read(&power, &s_spin[0]);
> > +             usleep(100*1000);
> > +             gpu_power_read(&power, &s_spin[1]);
> Shouldn't we be checking results of gpu_power_read in both cases?

Why? If it fails the output is garbage, which is apparent in the info.
-Chris
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Re: [igt-dev] [PATCH i-g-t 06/13] i915/gem_exec_schedule: Measure semaphore power consumption

[Katarzyna Dec]

On Tue, Feb 05, 2019 at 12:53:14PM +0000, Chris Wilson wrote:
> Quoting Katarzyna Dec (2019-02-05 12:50:38)
> > On Mon, Feb 04, 2019 at 08:36:07AM +0000, Chris Wilson wrote:
> > > How much energy does spinning on a semaphore consume relative to plain
> > > old spinning?
> > > 
> > > Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> > Is this patch relying on something more then:
> > bad9d8d0 lib: Add GPU power measurement ? Because I got errors on compilation:
> > 
> > '../tests/i915/gem_exec_schedule.c:1417:16: error: implicit declaration of
> > function ‘gem_scheduler_has_semaphores’; did you mean
> > ‘gem_scheduler_has_preemption’? [-Werror=implicit-function-declaration]'
> > I've seen some patches on intel-gfx, but not in this series.
> 
> That'll be patch 4/13.
I new I've seen the code somewhere :)

> 
> > > ---
> > >  tests/i915/gem_exec_schedule.c | 72 +++++++++++++++++++++++++++++++++-
> > >  1 file changed, 71 insertions(+), 1 deletion(-)
> > > 
> > > diff --git a/tests/i915/gem_exec_schedule.c b/tests/i915/gem_exec_schedule.c
> > > index 0462ce84f..184ceb7d6 100644
> > > --- a/tests/i915/gem_exec_schedule.c
> > > +++ b/tests/i915/gem_exec_schedule.c
> > > @@ -29,9 +29,10 @@
> > >  #include <signal.h>
> > >  
> > >  #include "igt.h"
> > > -#include "igt_vgem.h"
> > > +#include "igt_gpu_power.h"
> > >  #include "igt_rand.h"
> > >  #include "igt_sysfs.h"
> > > +#include "igt_vgem.h"
> > >  #include "i915/gem_ring.h"
> > >  
> > >  #define LO 0
> > > @@ -1191,6 +1192,65 @@ static void test_pi_ringfull(int fd, unsigned int engine)
> > >       munmap(result, 4096);
> > >  }
> > >  
> > > +static void measure_semaphore_power(int i915)
> > > +{
> > > +     struct gpu_power power;
> > Where power struct is initialized?
> > > +     unsigned int engine, signaler;
> > How does signaler differ from engine (in usage)?
> 
> signaler tells engines to go.

> 
> > > +     igt_require(gpu_power_open(&power) == 0);
> 
> This initialises the struct gpu_power.
> 
> > > +     for_each_physical_engine(i915, signaler) {
> > > +             struct gpu_power_sample s_spin[2];
> > > +             struct gpu_power_sample s_sema[2];
> > > +             double baseline, total;
> > > +             int64_t jiffie = 1;
> > > +             igt_spin_t *spin;
> > > +
> > > +             spin = __igt_spin_batch_new(i915,
> > > +                                         .engine = signaler,
> > > +                                         .flags = IGT_SPIN_POLL_RUN);
> > > +             gem_wait(i915, spin->handle, &jiffie); /* waitboost */
> > > +             igt_assert(spin->running);
> > > +             igt_spin_busywait_until_running(spin);
> > > +
> > > +             gpu_power_read(&power, &s_spin[0]);
> > > +             usleep(100*1000);
> > > +             gpu_power_read(&power, &s_spin[1]);
> > Shouldn't we be checking results of gpu_power_read in both cases?
> 
> Why? If it fails the output is garbage, which is apparent in the info.
Fair enough.
> -Chris

I guess all LGTM.
Reviewed-by: Katarzyna Dec <katarzyna.dec@intel.com>
Kasia :)
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[PATCH i-g-t 07/13] i915/gem_exec_whisper: Measure total power consumed

[Chris Wilson]

Show the total power consumed across all the whispers.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
---
 tests/i915/gem_exec_whisper.c | 11 ++++++++++-
 1 file changed, 10 insertions(+), 1 deletion(-)

diff --git a/tests/i915/gem_exec_whisper.c b/tests/i915/gem_exec_whisper.c
index 0b15fe431..6c3b53756 100644
--- a/tests/i915/gem_exec_whisper.c
+++ b/tests/i915/gem_exec_whisper.c
@@ -28,8 +28,9 @@
  */
 
 #include "igt.h"
-#include "igt_gt.h"
 #include "igt_debugfs.h"
+#include "igt_gpu_power.h"
+#include "igt_gt.h"
 #include "igt_rand.h"
 #include "igt_sysfs.h"
 
@@ -192,6 +193,8 @@ static void whisper(int fd, unsigned engine, unsigned flags)
 	unsigned int reloc_migrations = 0;
 	unsigned int reloc_interruptions = 0;
 	unsigned int eb_migrations = 0;
+	struct gpu_power_sample sample[2];
+	struct gpu_power power;
 	uint64_t old_offset;
 	int i, n, loc;
 	int debugfs;
@@ -202,6 +205,7 @@ static void whisper(int fd, unsigned engine, unsigned flags)
 	}
 
 	debugfs = igt_debugfs_dir(fd);
+	gpu_power_open(&power);
 
 	nengine = 0;
 	if (engine == ALL_ENGINES) {
@@ -226,6 +230,7 @@ static void whisper(int fd, unsigned engine, unsigned flags)
 		init_hang(&hang);
 
 	intel_detect_and_clear_missed_interrupts(fd);
+	gpu_power_read(&power, &sample[0]);
 	igt_fork(child, flags & FORKED ? sysconf(_SC_NPROCESSORS_ONLN) : 1)  {
 		unsigned int pass;
 
@@ -495,6 +500,10 @@ static void whisper(int fd, unsigned engine, unsigned flags)
 		fini_hang(&hang);
 	else
 		igt_assert_eq(intel_detect_and_clear_missed_interrupts(fd), 0);
+	if (gpu_power_read(&power, &sample[1]))  {
+		igt_info("Total energy used: %.1fmJ\n",
+			 gpu_power_J(&power, &sample[0], &sample[1]) * 1e3);
+	}
 
 	close(debugfs);
 }
-- 
2.20.1

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[Intel-gfx] [PATCH i-g-t 07/13] i915/gem_exec_whisper: Measure total power consumed

[Chris Wilson]

Show the total power consumed across all the whispers.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
---
 tests/i915/gem_exec_whisper.c | 11 ++++++++++-
 1 file changed, 10 insertions(+), 1 deletion(-)

diff --git a/tests/i915/gem_exec_whisper.c b/tests/i915/gem_exec_whisper.c
index 0b15fe431..6c3b53756 100644
--- a/tests/i915/gem_exec_whisper.c
+++ b/tests/i915/gem_exec_whisper.c
@@ -28,8 +28,9 @@
  */
 
 #include "igt.h"
-#include "igt_gt.h"
 #include "igt_debugfs.h"
+#include "igt_gpu_power.h"
+#include "igt_gt.h"
 #include "igt_rand.h"
 #include "igt_sysfs.h"
 
@@ -192,6 +193,8 @@ static void whisper(int fd, unsigned engine, unsigned flags)
 	unsigned int reloc_migrations = 0;
 	unsigned int reloc_interruptions = 0;
 	unsigned int eb_migrations = 0;
+	struct gpu_power_sample sample[2];
+	struct gpu_power power;
 	uint64_t old_offset;
 	int i, n, loc;
 	int debugfs;
@@ -202,6 +205,7 @@ static void whisper(int fd, unsigned engine, unsigned flags)
 	}
 
 	debugfs = igt_debugfs_dir(fd);
+	gpu_power_open(&power);
 
 	nengine = 0;
 	if (engine == ALL_ENGINES) {
@@ -226,6 +230,7 @@ static void whisper(int fd, unsigned engine, unsigned flags)
 		init_hang(&hang);
 
 	intel_detect_and_clear_missed_interrupts(fd);
+	gpu_power_read(&power, &sample[0]);
 	igt_fork(child, flags & FORKED ? sysconf(_SC_NPROCESSORS_ONLN) : 1)  {
 		unsigned int pass;
 
@@ -495,6 +500,10 @@ static void whisper(int fd, unsigned engine, unsigned flags)
 		fini_hang(&hang);
 	else
 		igt_assert_eq(intel_detect_and_clear_missed_interrupts(fd), 0);
+	if (gpu_power_read(&power, &sample[1]))  {
+		igt_info("Total energy used: %.1fmJ\n",
+			 gpu_power_J(&power, &sample[0], &sample[1]) * 1e3);
+	}
 
 	close(debugfs);
 }
-- 
2.20.1

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[PATCH i-g-t 08/13] i915/gem_exec_latency: Normalize results into ns

[Chris Wilson]

Present the latency results in nanoseconds not RCS cycles.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
---
 tests/i915/gem_exec_latency.c | 36 ++++++++++++++++++++++++++++++++---
 1 file changed, 33 insertions(+), 3 deletions(-)

diff --git a/tests/i915/gem_exec_latency.c b/tests/i915/gem_exec_latency.c
index de16322a6..b16b25e53 100644
--- a/tests/i915/gem_exec_latency.c
+++ b/tests/i915/gem_exec_latency.c
@@ -59,6 +59,7 @@
 #define PREEMPT 0x2
 
 static unsigned int ring_size;
+static double rcs_clock;
 
 static void
 poll_ring(int fd, unsigned ring, const char *name)
@@ -238,10 +239,11 @@ static void latency_on_ring(int fd,
 	igt_assert(offset == obj[2].offset);
 
 	gem_set_domain(fd, obj[1].handle, I915_GEM_DOMAIN_GTT, 0);
-	igt_info("%s: dispatch latency: %.2f, execution latency: %.2f (target %.2f)\n",
+	igt_info("%s: dispatch latency: %.1fns, execution latency: %.1fns (target %.1fns)\n",
 		 name,
-		 (end - start) / (double)repeats,
-		 gpu_latency, (results[repeats - 1] - results[0]) / (double)(repeats - 1));
+		 (end - start) / (double)repeats * rcs_clock,
+		 gpu_latency * rcs_clock,
+		 (results[repeats - 1] - results[0]) / (double)(repeats - 1) * rcs_clock);
 
 	munmap(map, 64*1024);
 	munmap(results, 4096);
@@ -620,6 +622,30 @@ rthog_latency_on_ring(int fd, unsigned int engine, const char *name, unsigned in
 	munmap(results, MMAP_SZ);
 }
 
+static double clockrate(int reg)
+{
+	volatile uint32_t *mmio;
+	uint32_t r_start, r_end;
+	struct timespec tv;
+	uint64_t t_start, t_end;
+	uint64_t elapsed;
+
+	mmio = (volatile uint32_t *)((volatile char *)igt_global_mmio + reg);
+
+	t_start = igt_nsec_elapsed(&tv);
+	r_start = *mmio;
+	elapsed = igt_nsec_elapsed(&tv) - t_start;
+
+	usleep(1000);
+
+	t_end = igt_nsec_elapsed(&tv);
+	r_end = *mmio;
+	elapsed += igt_nsec_elapsed(&tv) - t_end;
+
+	elapsed = (t_end - t_start) + elapsed / 2;
+	return (r_end - r_start) * 1e9 / elapsed;
+}
+
 igt_main
 {
 	const struct intel_execution_engine *e;
@@ -640,6 +666,10 @@ igt_main
 			ring_size = 1024;
 
 		intel_register_access_init(intel_get_pci_device(), false, device);
+		rcs_clock = clockrate(RCS_TIMESTAMP);
+		igt_info("RCS timestamp clock: %.3fKHz, %.1fns\n",
+			 rcs_clock / 1e3, 1e9 / rcs_clock);
+		rcs_clock = 1e9 / rcs_clock;
 	}
 
 	igt_subtest("all-rtidle-submit")
-- 
2.20.1

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[igt-dev] [PATCH i-g-t 08/13] i915/gem_exec_latency: Normalize results into ns

[Chris Wilson]

Present the latency results in nanoseconds not RCS cycles.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
---
 tests/i915/gem_exec_latency.c | 36 ++++++++++++++++++++++++++++++++---
 1 file changed, 33 insertions(+), 3 deletions(-)

diff --git a/tests/i915/gem_exec_latency.c b/tests/i915/gem_exec_latency.c
index de16322a6..b16b25e53 100644
--- a/tests/i915/gem_exec_latency.c
+++ b/tests/i915/gem_exec_latency.c
@@ -59,6 +59,7 @@
 #define PREEMPT 0x2
 
 static unsigned int ring_size;
+static double rcs_clock;
 
 static void
 poll_ring(int fd, unsigned ring, const char *name)
@@ -238,10 +239,11 @@ static void latency_on_ring(int fd,
 	igt_assert(offset == obj[2].offset);
 
 	gem_set_domain(fd, obj[1].handle, I915_GEM_DOMAIN_GTT, 0);
-	igt_info("%s: dispatch latency: %.2f, execution latency: %.2f (target %.2f)\n",
+	igt_info("%s: dispatch latency: %.1fns, execution latency: %.1fns (target %.1fns)\n",
 		 name,
-		 (end - start) / (double)repeats,
-		 gpu_latency, (results[repeats - 1] - results[0]) / (double)(repeats - 1));
+		 (end - start) / (double)repeats * rcs_clock,
+		 gpu_latency * rcs_clock,
+		 (results[repeats - 1] - results[0]) / (double)(repeats - 1) * rcs_clock);
 
 	munmap(map, 64*1024);
 	munmap(results, 4096);
@@ -620,6 +622,30 @@ rthog_latency_on_ring(int fd, unsigned int engine, const char *name, unsigned in
 	munmap(results, MMAP_SZ);
 }
 
+static double clockrate(int reg)
+{
+	volatile uint32_t *mmio;
+	uint32_t r_start, r_end;
+	struct timespec tv;
+	uint64_t t_start, t_end;
+	uint64_t elapsed;
+
+	mmio = (volatile uint32_t *)((volatile char *)igt_global_mmio + reg);
+
+	t_start = igt_nsec_elapsed(&tv);
+	r_start = *mmio;
+	elapsed = igt_nsec_elapsed(&tv) - t_start;
+
+	usleep(1000);
+
+	t_end = igt_nsec_elapsed(&tv);
+	r_end = *mmio;
+	elapsed += igt_nsec_elapsed(&tv) - t_end;
+
+	elapsed = (t_end - t_start) + elapsed / 2;
+	return (r_end - r_start) * 1e9 / elapsed;
+}
+
 igt_main
 {
 	const struct intel_execution_engine *e;
@@ -640,6 +666,10 @@ igt_main
 			ring_size = 1024;
 
 		intel_register_access_init(intel_get_pci_device(), false, device);
+		rcs_clock = clockrate(RCS_TIMESTAMP);
+		igt_info("RCS timestamp clock: %.3fKHz, %.1fns\n",
+			 rcs_clock / 1e3, 1e9 / rcs_clock);
+		rcs_clock = 1e9 / rcs_clock;
 	}
 
 	igt_subtest("all-rtidle-submit")
-- 
2.20.1

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[PATCH i-g-t 09/13] i915/gem_exec_latency: Eliminate the wakeup penalty

[Chris Wilson]

The first dispatch incurs the cost of waking up the device, so also
measure after issuing a spinner to keep the device awake as we submit.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
---
 tests/i915/gem_exec_latency.c | 19 +++++++++++++++++--
 1 file changed, 17 insertions(+), 2 deletions(-)

diff --git a/tests/i915/gem_exec_latency.c b/tests/i915/gem_exec_latency.c
index b16b25e53..e726385bd 100644
--- a/tests/i915/gem_exec_latency.c
+++ b/tests/i915/gem_exec_latency.c
@@ -55,8 +55,9 @@
 
 #define ENGINE_FLAGS  (I915_EXEC_RING_MASK | LOCAL_I915_EXEC_BSD_MASK)
 
-#define CORK 0x1
-#define PREEMPT 0x2
+#define LIVE 0x1
+#define CORK 0x2
+#define PREEMPT 0x4
 
 static unsigned int ring_size;
 static double rcs_clock;
@@ -120,6 +121,7 @@ static void latency_on_ring(int fd,
 	struct drm_i915_gem_exec_object2 obj[3];
 	struct drm_i915_gem_relocation_entry reloc;
 	struct drm_i915_gem_execbuffer2 execbuf;
+	igt_spin_t *spin = NULL;
 	IGT_CORK_HANDLE(c);
 	volatile uint32_t *reg;
 	unsigned repeats = ring_size;
@@ -189,6 +191,9 @@ static void latency_on_ring(int fd,
 		execbuf.buffer_count = 3;
 	}
 
+	if (flags & LIVE)
+		spin = igt_spin_batch_new(fd, .engine = ring);
+
 	start = *reg;
 	for (j = 0; j < repeats; j++) {
 		uint64_t presumed_offset = reloc.presumed_offset;
@@ -204,6 +209,7 @@ static void latency_on_ring(int fd,
 	end = *reg;
 	igt_assert(reloc.presumed_offset == obj[1].offset);
 
+	igt_spin_batch_free(fd, spin);
 	if (flags & CORK)
 		igt_cork_unplug(&c);
 
@@ -696,6 +702,11 @@ igt_main
 							e->exec_id | e->flags,
 							e->name, 0);
 
+				igt_subtest_f("%s-live-dispatch", e->name)
+					latency_on_ring(device,
+							e->exec_id | e->flags,
+							e->name, LIVE);
+
 				igt_subtest_f("%s-poll", e->name)
 					poll_ring(device,
 						  e->exec_id | e->flags,
@@ -715,6 +726,10 @@ igt_main
 							      e->name,
 							      0);
 
+				igt_subtest_f("%s-live-dispatch-queued", e->name)
+					latency_on_ring(device,
+							e->exec_id | e->flags,
+							e->name, LIVE | CORK);
 				igt_subtest_f("%s-dispatch-queued", e->name)
 					latency_on_ring(device,
 							e->exec_id | e->flags,
-- 
2.20.1

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[igt-dev] [PATCH i-g-t 09/13] i915/gem_exec_latency: Eliminate the wakeup penalty

[Chris Wilson]

The first dispatch incurs the cost of waking up the device, so also
measure after issuing a spinner to keep the device awake as we submit.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
---
 tests/i915/gem_exec_latency.c | 19 +++++++++++++++++--
 1 file changed, 17 insertions(+), 2 deletions(-)

diff --git a/tests/i915/gem_exec_latency.c b/tests/i915/gem_exec_latency.c
index b16b25e53..e726385bd 100644
--- a/tests/i915/gem_exec_latency.c
+++ b/tests/i915/gem_exec_latency.c
@@ -55,8 +55,9 @@
 
 #define ENGINE_FLAGS  (I915_EXEC_RING_MASK | LOCAL_I915_EXEC_BSD_MASK)
 
-#define CORK 0x1
-#define PREEMPT 0x2
+#define LIVE 0x1
+#define CORK 0x2
+#define PREEMPT 0x4
 
 static unsigned int ring_size;
 static double rcs_clock;
@@ -120,6 +121,7 @@ static void latency_on_ring(int fd,
 	struct drm_i915_gem_exec_object2 obj[3];
 	struct drm_i915_gem_relocation_entry reloc;
 	struct drm_i915_gem_execbuffer2 execbuf;
+	igt_spin_t *spin = NULL;
 	IGT_CORK_HANDLE(c);
 	volatile uint32_t *reg;
 	unsigned repeats = ring_size;
@@ -189,6 +191,9 @@ static void latency_on_ring(int fd,
 		execbuf.buffer_count = 3;
 	}
 
+	if (flags & LIVE)
+		spin = igt_spin_batch_new(fd, .engine = ring);
+
 	start = *reg;
 	for (j = 0; j < repeats; j++) {
 		uint64_t presumed_offset = reloc.presumed_offset;
@@ -204,6 +209,7 @@ static void latency_on_ring(int fd,
 	end = *reg;
 	igt_assert(reloc.presumed_offset == obj[1].offset);
 
+	igt_spin_batch_free(fd, spin);
 	if (flags & CORK)
 		igt_cork_unplug(&c);
 
@@ -696,6 +702,11 @@ igt_main
 							e->exec_id | e->flags,
 							e->name, 0);
 
+				igt_subtest_f("%s-live-dispatch", e->name)
+					latency_on_ring(device,
+							e->exec_id | e->flags,
+							e->name, LIVE);
+
 				igt_subtest_f("%s-poll", e->name)
 					poll_ring(device,
 						  e->exec_id | e->flags,
@@ -715,6 +726,10 @@ igt_main
 							      e->name,
 							      0);
 
+				igt_subtest_f("%s-live-dispatch-queued", e->name)
+					latency_on_ring(device,
+							e->exec_id | e->flags,
+							e->name, LIVE | CORK);
 				igt_subtest_f("%s-dispatch-queued", e->name)
 					latency_on_ring(device,
 							e->exec_id | e->flags,
-- 
2.20.1

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[PATCH i-g-t 10/13] i915/gem_exec_latency: Robustify measurements

[Chris Wilson]

Repeat the latency measurements and present the median over many so that
the results are more reliable.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
---
 tests/i915/gem_exec_latency.c | 165 ++++++++++++++++------------------
 1 file changed, 75 insertions(+), 90 deletions(-)

diff --git a/tests/i915/gem_exec_latency.c b/tests/i915/gem_exec_latency.c
index e726385bd..6bd05bcdf 100644
--- a/tests/i915/gem_exec_latency.c
+++ b/tests/i915/gem_exec_latency.c
@@ -266,13 +266,12 @@ static void latency_from_ring(int fd,
 	const int gen = intel_gen(intel_get_drm_devid(fd));
 	const int has_64bit_reloc = gen >= 8;
 	struct drm_i915_gem_exec_object2 obj[3];
-	struct drm_i915_gem_relocation_entry reloc;
 	struct drm_i915_gem_execbuffer2 execbuf;
-	const unsigned int repeats = ring_size / 2;
+	uint64_t presumed_offset;
 	unsigned int other;
 	uint32_t *map, *results;
 	uint32_t ctx[2] = {};
-	int i, j;
+	int j;
 
 	if (flags & PREEMPT) {
 		ctx[0] = gem_context_create(fd);
@@ -302,102 +301,83 @@ static void latency_from_ring(int fd,
 	map[0] = MI_BATCH_BUFFER_END;
 	gem_execbuf(fd, &execbuf);
 
-	memset(&reloc,0, sizeof(reloc));
-	obj[2].relocation_count = 1;
-	obj[2].relocs_ptr = to_user_pointer(&reloc);
-
 	gem_set_domain(fd, obj[2].handle,
 		       I915_GEM_DOMAIN_GTT,
 		       I915_GEM_DOMAIN_GTT);
+	presumed_offset = obj[1].offset;
+	for (j = 0; j < 1024; j++) {
+		uint64_t offset = sizeof(uint32_t) * j + presumed_offset;
+		int i = 16 * j;
 
-	reloc.read_domains = I915_GEM_DOMAIN_INSTRUCTION;
-	reloc.write_domain = I915_GEM_DOMAIN_INSTRUCTION;
-	reloc.presumed_offset = obj[1].offset;
-	reloc.target_handle = flags & CORK ? 1 : 0;
+		/* MI_STORE_REG_MEM */
+		map[i++] = 0x24 << 23 | 1;
+		if (has_64bit_reloc)
+			map[i-1]++;
+		map[i++] = RCS_TIMESTAMP; /* ring local! */
+		map[i++] = offset;
+		if (has_64bit_reloc)
+			map[i++] = offset >> 32;
+
+		map[i++] = MI_BATCH_BUFFER_END;
+	}
+	igt_assert(ring_size <= 1024);
 
 	for_each_physical_engine(fd, other) {
-		igt_spin_t *spin = NULL;
-		IGT_CORK_HANDLE(c);
-
-		gem_set_domain(fd, obj[2].handle,
-			       I915_GEM_DOMAIN_GTT,
-			       I915_GEM_DOMAIN_GTT);
-
-		if (flags & PREEMPT)
-			spin = __igt_spin_batch_new(fd,
-						    .ctx = ctx[0],
-						    .engine = ring);
-
-		if (flags & CORK) {
-			obj[0].handle = igt_cork_plug(&c, fd);
-			execbuf.buffers_ptr = to_user_pointer(&obj[0]);
-			execbuf.buffer_count = 3;
-		}
+		if (flags & PREEMPT && other == ring)
+			continue;
+
+		for (int qlen = 1; qlen < ring_size/2; qlen *= 2) {
+			unsigned int count = 32 * ring_size / qlen;
+			igt_stats_t stats;
+
+			igt_stats_init_with_size(&stats, count);
+			for (unsigned int rep = 0; rep < count; rep++) {
+				igt_spin_t *spin = NULL;
+				IGT_CORK_HANDLE(c);
+
+				if (flags & PREEMPT)
+					spin = __igt_spin_batch_new(fd,
+								    .ctx = ctx[0],
+								    .engine = ring);
+
+				if (flags & CORK) {
+					obj[0].handle = igt_cork_plug(&c, fd);
+					execbuf.buffers_ptr = to_user_pointer(&obj[0]);
+					execbuf.buffer_count = 3;
+				}
 
-		for (j = 0; j < repeats; j++) {
-			uint64_t offset;
-
-			execbuf.flags &= ~ENGINE_FLAGS;
-			execbuf.flags |= ring;
-
-			execbuf.batch_start_offset = 64 * j;
-			reloc.offset =
-				execbuf.batch_start_offset + sizeof(uint32_t);
-			reloc.delta = sizeof(uint32_t) * j;
-
-			reloc.presumed_offset = obj[1].offset;
-			offset = reloc.presumed_offset;
-			offset += reloc.delta;
-
-			i = 16 * j;
-			/* MI_STORE_REG_MEM */
-			map[i++] = 0x24 << 23 | 1;
-			if (has_64bit_reloc)
-				map[i-1]++;
-			map[i++] = RCS_TIMESTAMP; /* ring local! */
-			map[i++] = offset;
-			if (has_64bit_reloc)
-				map[i++] = offset >> 32;
-			map[i++] = MI_BATCH_BUFFER_END;
-
-			gem_execbuf(fd, &execbuf);
-
-			execbuf.flags &= ~ENGINE_FLAGS;
-			execbuf.flags |= other;
-
-			execbuf.batch_start_offset = 64 * (j + repeats);
-			reloc.offset =
-				execbuf.batch_start_offset + sizeof(uint32_t);
-			reloc.delta = sizeof(uint32_t) * (j + repeats);
-
-			reloc.presumed_offset = obj[1].offset;
-			offset = reloc.presumed_offset;
-			offset += reloc.delta;
-
-			i = 16 * (j + repeats);
-			/* MI_STORE_REG_MEM */
-			map[i++] = 0x24 << 23 | 1;
-			if (has_64bit_reloc)
-				map[i-1]++;
-			map[i++] = RCS_TIMESTAMP; /* ring local! */
-			map[i++] = offset;
-			if (has_64bit_reloc)
-				map[i++] = offset >> 32;
-			map[i++] = MI_BATCH_BUFFER_END;
-
-			gem_execbuf(fd, &execbuf);
-		}
+				for (j = 0; j < qlen; j++) {
+					execbuf.flags &= ~ENGINE_FLAGS;
+					execbuf.flags |= ring;
+					execbuf.batch_start_offset = 64 * j;
+
+					gem_execbuf(fd, &execbuf);
 
-		if (flags & CORK)
-			igt_cork_unplug(&c);
-		gem_set_domain(fd, obj[1].handle,
-			       I915_GEM_DOMAIN_GTT,
-			       I915_GEM_DOMAIN_GTT);
-		igt_spin_batch_free(fd, spin);
+					execbuf.flags &= ~ENGINE_FLAGS;
+					execbuf.flags |= other;
+					execbuf.batch_start_offset = 64 * (j + qlen);
 
-		igt_info("%s-%s delay: %.2f\n",
-			 name, e__->name,
-			 (results[2*repeats-1] - results[0]) / (double)repeats);
+					gem_execbuf(fd, &execbuf);
+				}
+
+				if (flags & CORK)
+					igt_cork_unplug(&c);
+				gem_set_domain(fd, obj[1].handle,
+					       I915_GEM_DOMAIN_GTT,
+					       I915_GEM_DOMAIN_GTT);
+				igt_spin_batch_free(fd, spin);
+
+				igt_assert_eq_u64(obj[1].offset,
+						  presumed_offset);
+				igt_stats_push(&stats,
+					       ((uint64_t)(results[2*qlen-1] - results[0]) << 32) / qlen);
+			}
+
+			igt_info("%s-%s-%d delay: %.2f\n",
+				 name, e__->name, qlen,
+				 igt_stats_get_median(&stats) / (1ull << 32));
+			igt_stats_fini(&stats);
+		}
 	}
 
 	munmap(map, 64*1024);
@@ -755,6 +735,11 @@ igt_main
 						latency_from_ring(device,
 								  e->exec_id | e->flags,
 								  e->name, PREEMPT);
+
+					igt_subtest_f("%s-preemption-queued", e->name)
+						latency_from_ring(device,
+								  e->exec_id | e->flags,
+								  e->name, PREEMPT | CORK);
 				}
 			}
 		}
-- 
2.20.1

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[igt-dev] [PATCH i-g-t 10/13] i915/gem_exec_latency: Robustify measurements

[Chris Wilson]

Repeat the latency measurements and present the median over many so that
the results are more reliable.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
---
 tests/i915/gem_exec_latency.c | 165 ++++++++++++++++------------------
 1 file changed, 75 insertions(+), 90 deletions(-)

diff --git a/tests/i915/gem_exec_latency.c b/tests/i915/gem_exec_latency.c
index e726385bd..6bd05bcdf 100644
--- a/tests/i915/gem_exec_latency.c
+++ b/tests/i915/gem_exec_latency.c
@@ -266,13 +266,12 @@ static void latency_from_ring(int fd,
 	const int gen = intel_gen(intel_get_drm_devid(fd));
 	const int has_64bit_reloc = gen >= 8;
 	struct drm_i915_gem_exec_object2 obj[3];
-	struct drm_i915_gem_relocation_entry reloc;
 	struct drm_i915_gem_execbuffer2 execbuf;
-	const unsigned int repeats = ring_size / 2;
+	uint64_t presumed_offset;
 	unsigned int other;
 	uint32_t *map, *results;
 	uint32_t ctx[2] = {};
-	int i, j;
+	int j;
 
 	if (flags & PREEMPT) {
 		ctx[0] = gem_context_create(fd);
@@ -302,102 +301,83 @@ static void latency_from_ring(int fd,
 	map[0] = MI_BATCH_BUFFER_END;
 	gem_execbuf(fd, &execbuf);
 
-	memset(&reloc,0, sizeof(reloc));
-	obj[2].relocation_count = 1;
-	obj[2].relocs_ptr = to_user_pointer(&reloc);
-
 	gem_set_domain(fd, obj[2].handle,
 		       I915_GEM_DOMAIN_GTT,
 		       I915_GEM_DOMAIN_GTT);
+	presumed_offset = obj[1].offset;
+	for (j = 0; j < 1024; j++) {
+		uint64_t offset = sizeof(uint32_t) * j + presumed_offset;
+		int i = 16 * j;
 
-	reloc.read_domains = I915_GEM_DOMAIN_INSTRUCTION;
-	reloc.write_domain = I915_GEM_DOMAIN_INSTRUCTION;
-	reloc.presumed_offset = obj[1].offset;
-	reloc.target_handle = flags & CORK ? 1 : 0;
+		/* MI_STORE_REG_MEM */
+		map[i++] = 0x24 << 23 | 1;
+		if (has_64bit_reloc)
+			map[i-1]++;
+		map[i++] = RCS_TIMESTAMP; /* ring local! */
+		map[i++] = offset;
+		if (has_64bit_reloc)
+			map[i++] = offset >> 32;
+
+		map[i++] = MI_BATCH_BUFFER_END;
+	}
+	igt_assert(ring_size <= 1024);
 
 	for_each_physical_engine(fd, other) {
-		igt_spin_t *spin = NULL;
-		IGT_CORK_HANDLE(c);
-
-		gem_set_domain(fd, obj[2].handle,
-			       I915_GEM_DOMAIN_GTT,
-			       I915_GEM_DOMAIN_GTT);
-
-		if (flags & PREEMPT)
-			spin = __igt_spin_batch_new(fd,
-						    .ctx = ctx[0],
-						    .engine = ring);
-
-		if (flags & CORK) {
-			obj[0].handle = igt_cork_plug(&c, fd);
-			execbuf.buffers_ptr = to_user_pointer(&obj[0]);
-			execbuf.buffer_count = 3;
-		}
+		if (flags & PREEMPT && other == ring)
+			continue;
+
+		for (int qlen = 1; qlen < ring_size/2; qlen *= 2) {
+			unsigned int count = 32 * ring_size / qlen;
+			igt_stats_t stats;
+
+			igt_stats_init_with_size(&stats, count);
+			for (unsigned int rep = 0; rep < count; rep++) {
+				igt_spin_t *spin = NULL;
+				IGT_CORK_HANDLE(c);
+
+				if (flags & PREEMPT)
+					spin = __igt_spin_batch_new(fd,
+								    .ctx = ctx[0],
+								    .engine = ring);
+
+				if (flags & CORK) {
+					obj[0].handle = igt_cork_plug(&c, fd);
+					execbuf.buffers_ptr = to_user_pointer(&obj[0]);
+					execbuf.buffer_count = 3;
+				}
 
-		for (j = 0; j < repeats; j++) {
-			uint64_t offset;
-
-			execbuf.flags &= ~ENGINE_FLAGS;
-			execbuf.flags |= ring;
-
-			execbuf.batch_start_offset = 64 * j;
-			reloc.offset =
-				execbuf.batch_start_offset + sizeof(uint32_t);
-			reloc.delta = sizeof(uint32_t) * j;
-
-			reloc.presumed_offset = obj[1].offset;
-			offset = reloc.presumed_offset;
-			offset += reloc.delta;
-
-			i = 16 * j;
-			/* MI_STORE_REG_MEM */
-			map[i++] = 0x24 << 23 | 1;
-			if (has_64bit_reloc)
-				map[i-1]++;
-			map[i++] = RCS_TIMESTAMP; /* ring local! */
-			map[i++] = offset;
-			if (has_64bit_reloc)
-				map[i++] = offset >> 32;
-			map[i++] = MI_BATCH_BUFFER_END;
-
-			gem_execbuf(fd, &execbuf);
-
-			execbuf.flags &= ~ENGINE_FLAGS;
-			execbuf.flags |= other;
-
-			execbuf.batch_start_offset = 64 * (j + repeats);
-			reloc.offset =
-				execbuf.batch_start_offset + sizeof(uint32_t);
-			reloc.delta = sizeof(uint32_t) * (j + repeats);
-
-			reloc.presumed_offset = obj[1].offset;
-			offset = reloc.presumed_offset;
-			offset += reloc.delta;
-
-			i = 16 * (j + repeats);
-			/* MI_STORE_REG_MEM */
-			map[i++] = 0x24 << 23 | 1;
-			if (has_64bit_reloc)
-				map[i-1]++;
-			map[i++] = RCS_TIMESTAMP; /* ring local! */
-			map[i++] = offset;
-			if (has_64bit_reloc)
-				map[i++] = offset >> 32;
-			map[i++] = MI_BATCH_BUFFER_END;
-
-			gem_execbuf(fd, &execbuf);
-		}
+				for (j = 0; j < qlen; j++) {
+					execbuf.flags &= ~ENGINE_FLAGS;
+					execbuf.flags |= ring;
+					execbuf.batch_start_offset = 64 * j;
+
+					gem_execbuf(fd, &execbuf);
 
-		if (flags & CORK)
-			igt_cork_unplug(&c);
-		gem_set_domain(fd, obj[1].handle,
-			       I915_GEM_DOMAIN_GTT,
-			       I915_GEM_DOMAIN_GTT);
-		igt_spin_batch_free(fd, spin);
+					execbuf.flags &= ~ENGINE_FLAGS;
+					execbuf.flags |= other;
+					execbuf.batch_start_offset = 64 * (j + qlen);
 
-		igt_info("%s-%s delay: %.2f\n",
-			 name, e__->name,
-			 (results[2*repeats-1] - results[0]) / (double)repeats);
+					gem_execbuf(fd, &execbuf);
+				}
+
+				if (flags & CORK)
+					igt_cork_unplug(&c);
+				gem_set_domain(fd, obj[1].handle,
+					       I915_GEM_DOMAIN_GTT,
+					       I915_GEM_DOMAIN_GTT);
+				igt_spin_batch_free(fd, spin);
+
+				igt_assert_eq_u64(obj[1].offset,
+						  presumed_offset);
+				igt_stats_push(&stats,
+					       ((uint64_t)(results[2*qlen-1] - results[0]) << 32) / qlen);
+			}
+
+			igt_info("%s-%s-%d delay: %.2f\n",
+				 name, e__->name, qlen,
+				 igt_stats_get_median(&stats) / (1ull << 32));
+			igt_stats_fini(&stats);
+		}
 	}
 
 	munmap(map, 64*1024);
@@ -755,6 +735,11 @@ igt_main
 						latency_from_ring(device,
 								  e->exec_id | e->flags,
 								  e->name, PREEMPT);
+
+					igt_subtest_f("%s-preemption-queued", e->name)
+						latency_from_ring(device,
+								  e->exec_id | e->flags,
+								  e->name, PREEMPT | CORK);
 				}
 			}
 		}
-- 
2.20.1

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[PATCH i-g-t 11/13] i915/gem_exec_schedule: Verify that using HW semaphores doesn't block

[Chris Wilson]

We may use HW semaphores to schedule nearly-ready work such that they
are already spinning on the GPU waiting for the completion on another
engine. However, we don't want for that spinning task to actually block
any real work should it be scheduled.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
---
 tests/i915/gem_exec_schedule.c | 87 ++++++++++++++++++++++++++++++++++
 1 file changed, 87 insertions(+)

diff --git a/tests/i915/gem_exec_schedule.c b/tests/i915/gem_exec_schedule.c
index 184ceb7d6..08e441ac1 100644
--- a/tests/i915/gem_exec_schedule.c
+++ b/tests/i915/gem_exec_schedule.c
@@ -48,6 +48,10 @@
 
 #define MAX_CONTEXTS 1024
 
+#define LOCAL_I915_EXEC_BSD_SHIFT      (13)
+#define LOCAL_I915_EXEC_BSD_MASK       (3 << LOCAL_I915_EXEC_BSD_SHIFT)
+#define ENGINE_MASK  (I915_EXEC_RING_MASK | LOCAL_I915_EXEC_BSD_MASK)
+
 IGT_TEST_DESCRIPTION("Check that we can control the order of execution");
 
 static uint32_t __store_dword(int fd, uint32_t ctx, unsigned ring,
@@ -306,6 +310,86 @@ static void smoketest(int fd, unsigned ring, unsigned timeout)
 	munmap(ptr, 4096);
 }
 
+static uint32_t __batch_create(int i915, uint32_t offset)
+{
+	const uint32_t bbe = MI_BATCH_BUFFER_END;
+	uint32_t handle;
+
+	handle = gem_create(i915, ALIGN(offset + 4, 4096));
+	gem_write(i915, handle, offset, &bbe, sizeof(bbe));
+
+	return handle;
+}
+
+static uint32_t batch_create(int i915)
+{
+	return __batch_create(i915, 0);
+}
+
+static void semaphore_userlock(int i915)
+{
+	struct drm_i915_gem_exec_object2 obj = {
+		.handle = batch_create(i915),
+	};
+	igt_spin_t *spin = NULL;
+	unsigned int engine;
+	uint32_t scratch;
+
+	igt_require(gem_scheduler_has_preemption(i915));
+
+	/*
+	 * Given the use of semaphores to govern parallel submission
+	 * of nearly-ready work to HW, we still want to run actually
+	 * ready work immediately. Without semaphores, the dependent
+	 * work wouldn't be submitted so our ready work will run.
+	 */
+
+	scratch = gem_create(i915, 4096);
+	for_each_physical_engine(i915, engine) {
+		if (!spin) {
+			spin = igt_spin_batch_new(i915,
+						  .dependency = scratch,
+						  .engine = engine);
+		} else {
+			typeof(spin->execbuf.flags) saved = spin->execbuf.flags;
+
+			spin->execbuf.flags &= ~ENGINE_MASK;
+			spin->execbuf.flags |= engine;
+
+			gem_execbuf(i915, &spin->execbuf);
+
+			spin->execbuf.flags = saved;
+		}
+	}
+	igt_require(spin);
+	gem_close(i915, scratch);
+
+	/*
+	 * On all dependent engines, the request may be executing (busywaiting
+	 * on a HW semaphore) but it should not prevent any real work from
+	 * taking precedence.
+	 */
+	scratch = gem_context_create(i915);
+	for_each_physical_engine(i915, engine) {
+		struct drm_i915_gem_execbuffer2 execbuf = {
+			.buffers_ptr = to_user_pointer(&obj),
+			.buffer_count = 1,
+			.flags = engine,
+			.rsvd1 = scratch,
+		};
+
+		if (engine == (spin->execbuf.flags & ENGINE_MASK))
+			continue;
+
+		gem_execbuf(i915, &execbuf);
+	}
+	gem_context_destroy(i915, scratch);
+	gem_sync(i915, obj.handle); /* to hang unless we can preempt */
+	gem_close(i915, obj.handle);
+
+	igt_spin_batch_free(i915, spin);
+}
+
 static void reorder(int fd, unsigned ring, unsigned flags)
 #define EQUAL 1
 {
@@ -1296,6 +1380,9 @@ igt_main
 			igt_require(gem_scheduler_has_ctx_priority(fd));
 		}
 
+		igt_subtest("semaphore-user")
+			semaphore_userlock(fd);
+
 		igt_subtest("smoketest-all")
 			smoketest(fd, ALL_ENGINES, 30);
 
-- 
2.20.1

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[igt-dev] [PATCH i-g-t 11/13] i915/gem_exec_schedule: Verify that using HW semaphores doesn't block

[Chris Wilson]

We may use HW semaphores to schedule nearly-ready work such that they
are already spinning on the GPU waiting for the completion on another
engine. However, we don't want for that spinning task to actually block
any real work should it be scheduled.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
---
 tests/i915/gem_exec_schedule.c | 87 ++++++++++++++++++++++++++++++++++
 1 file changed, 87 insertions(+)

diff --git a/tests/i915/gem_exec_schedule.c b/tests/i915/gem_exec_schedule.c
index 184ceb7d6..08e441ac1 100644
--- a/tests/i915/gem_exec_schedule.c
+++ b/tests/i915/gem_exec_schedule.c
@@ -48,6 +48,10 @@
 
 #define MAX_CONTEXTS 1024
 
+#define LOCAL_I915_EXEC_BSD_SHIFT      (13)
+#define LOCAL_I915_EXEC_BSD_MASK       (3 << LOCAL_I915_EXEC_BSD_SHIFT)
+#define ENGINE_MASK  (I915_EXEC_RING_MASK | LOCAL_I915_EXEC_BSD_MASK)
+
 IGT_TEST_DESCRIPTION("Check that we can control the order of execution");
 
 static uint32_t __store_dword(int fd, uint32_t ctx, unsigned ring,
@@ -306,6 +310,86 @@ static void smoketest(int fd, unsigned ring, unsigned timeout)
 	munmap(ptr, 4096);
 }
 
+static uint32_t __batch_create(int i915, uint32_t offset)
+{
+	const uint32_t bbe = MI_BATCH_BUFFER_END;
+	uint32_t handle;
+
+	handle = gem_create(i915, ALIGN(offset + 4, 4096));
+	gem_write(i915, handle, offset, &bbe, sizeof(bbe));
+
+	return handle;
+}
+
+static uint32_t batch_create(int i915)
+{
+	return __batch_create(i915, 0);
+}
+
+static void semaphore_userlock(int i915)
+{
+	struct drm_i915_gem_exec_object2 obj = {
+		.handle = batch_create(i915),
+	};
+	igt_spin_t *spin = NULL;
+	unsigned int engine;
+	uint32_t scratch;
+
+	igt_require(gem_scheduler_has_preemption(i915));
+
+	/*
+	 * Given the use of semaphores to govern parallel submission
+	 * of nearly-ready work to HW, we still want to run actually
+	 * ready work immediately. Without semaphores, the dependent
+	 * work wouldn't be submitted so our ready work will run.
+	 */
+
+	scratch = gem_create(i915, 4096);
+	for_each_physical_engine(i915, engine) {
+		if (!spin) {
+			spin = igt_spin_batch_new(i915,
+						  .dependency = scratch,
+						  .engine = engine);
+		} else {
+			typeof(spin->execbuf.flags) saved = spin->execbuf.flags;
+
+			spin->execbuf.flags &= ~ENGINE_MASK;
+			spin->execbuf.flags |= engine;
+
+			gem_execbuf(i915, &spin->execbuf);
+
+			spin->execbuf.flags = saved;
+		}
+	}
+	igt_require(spin);
+	gem_close(i915, scratch);
+
+	/*
+	 * On all dependent engines, the request may be executing (busywaiting
+	 * on a HW semaphore) but it should not prevent any real work from
+	 * taking precedence.
+	 */
+	scratch = gem_context_create(i915);
+	for_each_physical_engine(i915, engine) {
+		struct drm_i915_gem_execbuffer2 execbuf = {
+			.buffers_ptr = to_user_pointer(&obj),
+			.buffer_count = 1,
+			.flags = engine,
+			.rsvd1 = scratch,
+		};
+
+		if (engine == (spin->execbuf.flags & ENGINE_MASK))
+			continue;
+
+		gem_execbuf(i915, &execbuf);
+	}
+	gem_context_destroy(i915, scratch);
+	gem_sync(i915, obj.handle); /* to hang unless we can preempt */
+	gem_close(i915, obj.handle);
+
+	igt_spin_batch_free(i915, spin);
+}
+
 static void reorder(int fd, unsigned ring, unsigned flags)
 #define EQUAL 1
 {
@@ -1296,6 +1380,9 @@ igt_main
 			igt_require(gem_scheduler_has_ctx_priority(fd));
 		}
 
+		igt_subtest("semaphore-user")
+			semaphore_userlock(fd);
+
 		igt_subtest("smoketest-all")
 			smoketest(fd, ALL_ENGINES, 30);
 
-- 
2.20.1

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https://lists.freedesktop.org/mailman/listinfo/igt-dev

[PATCH i-g-t 12/13] i915/gem_exec_nop: poll-sequential requires ordering between rings

[Chris Wilson]

In order to correctly serialise the order of execution between rings, we
need to flag the scratch address as being written. Make it so.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
---
 tests/i915/gem_exec_nop.c | 152 +++++++++++++++++++++++++++++++++-----
 1 file changed, 133 insertions(+), 19 deletions(-)

diff --git a/tests/i915/gem_exec_nop.c b/tests/i915/gem_exec_nop.c
index 59a08ad08..b91b4d0f6 100644
--- a/tests/i915/gem_exec_nop.c
+++ b/tests/i915/gem_exec_nop.c
@@ -104,7 +104,7 @@ static double nop_on_ring(int fd, uint32_t handle, unsigned ring_id,
 	return elapsed(&start, &now);
 }
 
-static void poll_ring(int fd, unsigned ring, const char *name, int timeout)
+static void poll_ring(int fd, unsigned engine, const char *name, int timeout)
 {
 	const int gen = intel_gen(intel_get_drm_devid(fd));
 	const uint32_t MI_ARB_CHK = 0x5 << 23;
@@ -112,29 +112,17 @@ static void poll_ring(int fd, unsigned ring, const char *name, int timeout)
 	struct drm_i915_gem_exec_object2 obj;
 	struct drm_i915_gem_relocation_entry reloc[4], *r;
 	uint32_t *bbe[2], *state, *batch;
-	unsigned engines[16], nengine, flags;
 	struct timespec tv = {};
 	unsigned long cycles;
+	unsigned flags;
 	uint64_t elapsed;
 
 	flags = I915_EXEC_NO_RELOC;
 	if (gen == 4 || gen == 5)
 		flags |= I915_EXEC_SECURE;
 
-	nengine = 0;
-	if (ring == ALL_ENGINES) {
-		for_each_physical_engine(fd, ring) {
-			if (!gem_can_store_dword(fd, ring))
-				continue;
-
-			engines[nengine++] = ring;
-		}
-	} else {
-		gem_require_ring(fd, ring);
-		igt_require(gem_can_store_dword(fd, ring));
-		engines[nengine++] = ring;
-	}
-	igt_require(nengine);
+	gem_require_ring(fd, engine);
+	igt_require(gem_can_store_dword(fd, engine));
 
 	memset(&obj, 0, sizeof(obj));
 	obj.handle = gem_create(fd, 4096);
@@ -198,7 +186,7 @@ static void poll_ring(int fd, unsigned ring, const char *name, int timeout)
 	memset(&execbuf, 0, sizeof(execbuf));
 	execbuf.buffers_ptr = to_user_pointer(&obj);
 	execbuf.buffer_count = 1;
-	execbuf.flags = engines[0];
+	execbuf.flags = engine | flags;
 
 	cycles = 0;
 	do {
@@ -208,7 +196,6 @@ static void poll_ring(int fd, unsigned ring, const char *name, int timeout)
 		execbuf.batch_start_offset =
 			(bbe[idx] - batch) * sizeof(*batch) - 64;
 
-		execbuf.flags = engines[cycles % nengine] | flags;
 		gem_execbuf(fd, &execbuf);
 
 		*bbe[!idx] = MI_BATCH_BUFFER_END;
@@ -227,6 +214,133 @@ static void poll_ring(int fd, unsigned ring, const char *name, int timeout)
 	gem_close(fd, obj.handle);
 }
 
+static void poll_sequential(int fd, const char *name, int timeout)
+{
+	const int gen = intel_gen(intel_get_drm_devid(fd));
+	const uint32_t MI_ARB_CHK = 0x5 << 23;
+	struct drm_i915_gem_execbuffer2 execbuf;
+	struct drm_i915_gem_exec_object2 obj[2];
+	struct drm_i915_gem_relocation_entry reloc[4], *r;
+	uint32_t *bbe[2], *state, *batch;
+	unsigned engines[16], nengine, engine, flags;
+	struct timespec tv = {};
+	unsigned long cycles;
+	uint64_t elapsed;
+	bool cached;
+
+	flags = I915_EXEC_NO_RELOC;
+	if (gen == 4 || gen == 5)
+		flags |= I915_EXEC_SECURE;
+
+	nengine = 0;
+	for_each_physical_engine(fd, engine) {
+		if (!gem_can_store_dword(fd, engine))
+			continue;
+
+		engines[nengine++] = engine;
+	}
+	igt_require(nengine);
+
+	memset(obj, 0, sizeof(obj));
+	obj[0].handle = gem_create(fd, 4096);
+	obj[0].flags = EXEC_OBJECT_WRITE;
+	cached = __gem_set_caching(fd, obj[0].handle, 1) == 0;
+	obj[1].handle = gem_create(fd, 4096);
+	obj[1].relocs_ptr = to_user_pointer(reloc);
+	obj[1].relocation_count = ARRAY_SIZE(reloc);
+
+	r = memset(reloc, 0, sizeof(reloc));
+	batch = gem_mmap__wc(fd, obj[1].handle, 0, 4096, PROT_WRITE);
+
+	for (unsigned int start_offset = 0;
+	     start_offset <= 128;
+	     start_offset += 128) {
+		uint32_t *b = batch + start_offset / sizeof(*batch);
+
+		r->target_handle = obj[0].handle;
+		r->offset = (b - batch + 1) * sizeof(uint32_t);
+		r->delta = 0;
+		r->read_domains = I915_GEM_DOMAIN_RENDER;
+		r->write_domain = I915_GEM_DOMAIN_RENDER;
+
+		*b = MI_STORE_DWORD_IMM | (gen < 6 ? 1 << 22 : 0);
+		if (gen >= 8) {
+			*++b = r->delta;
+			*++b = 0;
+		} else if (gen >= 4) {
+			r->offset += sizeof(uint32_t);
+			*++b = 0;
+			*++b = r->delta;
+		} else {
+			*b -= 1;
+			*++b = r->delta;
+		}
+		*++b = start_offset != 0;
+		r++;
+
+		b = batch + (start_offset + 64) / sizeof(*batch);
+		bbe[start_offset != 0] = b;
+		*b++ = MI_ARB_CHK;
+
+		r->target_handle = obj[1].handle;
+		r->offset = (b - batch + 1) * sizeof(uint32_t);
+		r->read_domains = I915_GEM_DOMAIN_COMMAND;
+		r->delta = start_offset + 64;
+		if (gen >= 8) {
+			*b++ = MI_BATCH_BUFFER_START | 1 << 8 | 1;
+			*b++ = r->delta;
+			*b++ = 0;
+		} else if (gen >= 6) {
+			*b++ = MI_BATCH_BUFFER_START | 1 << 8;
+			*b++ = r->delta;
+		} else {
+			*b++ = MI_BATCH_BUFFER_START | 2 << 6;
+			if (gen < 4)
+				r->delta |= 1;
+			*b++ = r->delta;
+		}
+		r++;
+	}
+	igt_assert(r == reloc + ARRAY_SIZE(reloc));
+
+	if (cached)
+		state = gem_mmap__cpu(fd, obj[0].handle, 0, 4096, PROT_READ);
+	else
+		state = gem_mmap__wc(fd, obj[0].handle, 0, 4096, PROT_READ);
+
+	memset(&execbuf, 0, sizeof(execbuf));
+	execbuf.buffers_ptr = to_user_pointer(obj);
+	execbuf.buffer_count = ARRAY_SIZE(obj);
+
+	cycles = 0;
+	do {
+		unsigned int idx = ++cycles & 1;
+
+		*bbe[idx] = MI_ARB_CHK;
+		execbuf.batch_start_offset =
+			(bbe[idx] - batch) * sizeof(*batch) - 64;
+
+		execbuf.flags = engines[cycles % nengine] | flags;
+		gem_execbuf(fd, &execbuf);
+
+		*bbe[!idx] = MI_BATCH_BUFFER_END;
+		__sync_synchronize();
+
+		while (READ_ONCE(*state) != idx)
+			;
+	} while ((elapsed = igt_nsec_elapsed(&tv)) >> 30 < timeout);
+	*bbe[cycles & 1] = MI_BATCH_BUFFER_END;
+	gem_sync(fd, obj[1].handle);
+
+	igt_info("%s completed %ld cycles: %.3f us\n",
+		 name, cycles, elapsed*1e-3/cycles);
+
+	munmap(state, 4096);
+	munmap(batch, 4096);
+	gem_close(fd, obj[1].handle);
+	gem_close(fd, obj[0].handle);
+}
+
 static void single(int fd, uint32_t handle,
 		   unsigned ring_id, const char *ring_name)
 {
@@ -813,7 +927,7 @@ igt_main
 		}
 
 		igt_subtest("poll-sequential")
-			poll_ring(device, ALL_ENGINES, "Sequential", 20);
+			poll_sequential(device, "Sequential", 20);
 
 		igt_subtest("headless") {
 			/* Requires master for changing display modes */
-- 
2.20.1

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[igt-dev] [PATCH i-g-t 12/13] i915/gem_exec_nop: poll-sequential requires ordering between rings

[Chris Wilson]

In order to correctly serialise the order of execution between rings, we
need to flag the scratch address as being written. Make it so.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
---
 tests/i915/gem_exec_nop.c | 152 +++++++++++++++++++++++++++++++++-----
 1 file changed, 133 insertions(+), 19 deletions(-)

diff --git a/tests/i915/gem_exec_nop.c b/tests/i915/gem_exec_nop.c
index 59a08ad08..b91b4d0f6 100644
--- a/tests/i915/gem_exec_nop.c
+++ b/tests/i915/gem_exec_nop.c
@@ -104,7 +104,7 @@ static double nop_on_ring(int fd, uint32_t handle, unsigned ring_id,
 	return elapsed(&start, &now);
 }
 
-static void poll_ring(int fd, unsigned ring, const char *name, int timeout)
+static void poll_ring(int fd, unsigned engine, const char *name, int timeout)
 {
 	const int gen = intel_gen(intel_get_drm_devid(fd));
 	const uint32_t MI_ARB_CHK = 0x5 << 23;
@@ -112,29 +112,17 @@ static void poll_ring(int fd, unsigned ring, const char *name, int timeout)
 	struct drm_i915_gem_exec_object2 obj;
 	struct drm_i915_gem_relocation_entry reloc[4], *r;
 	uint32_t *bbe[2], *state, *batch;
-	unsigned engines[16], nengine, flags;
 	struct timespec tv = {};
 	unsigned long cycles;
+	unsigned flags;
 	uint64_t elapsed;
 
 	flags = I915_EXEC_NO_RELOC;
 	if (gen == 4 || gen == 5)
 		flags |= I915_EXEC_SECURE;
 
-	nengine = 0;
-	if (ring == ALL_ENGINES) {
-		for_each_physical_engine(fd, ring) {
-			if (!gem_can_store_dword(fd, ring))
-				continue;
-
-			engines[nengine++] = ring;
-		}
-	} else {
-		gem_require_ring(fd, ring);
-		igt_require(gem_can_store_dword(fd, ring));
-		engines[nengine++] = ring;
-	}
-	igt_require(nengine);
+	gem_require_ring(fd, engine);
+	igt_require(gem_can_store_dword(fd, engine));
 
 	memset(&obj, 0, sizeof(obj));
 	obj.handle = gem_create(fd, 4096);
@@ -198,7 +186,7 @@ static void poll_ring(int fd, unsigned ring, const char *name, int timeout)
 	memset(&execbuf, 0, sizeof(execbuf));
 	execbuf.buffers_ptr = to_user_pointer(&obj);
 	execbuf.buffer_count = 1;
-	execbuf.flags = engines[0];
+	execbuf.flags = engine | flags;
 
 	cycles = 0;
 	do {
@@ -208,7 +196,6 @@ static void poll_ring(int fd, unsigned ring, const char *name, int timeout)
 		execbuf.batch_start_offset =
 			(bbe[idx] - batch) * sizeof(*batch) - 64;
 
-		execbuf.flags = engines[cycles % nengine] | flags;
 		gem_execbuf(fd, &execbuf);
 
 		*bbe[!idx] = MI_BATCH_BUFFER_END;
@@ -227,6 +214,133 @@ static void poll_ring(int fd, unsigned ring, const char *name, int timeout)
 	gem_close(fd, obj.handle);
 }
 
+static void poll_sequential(int fd, const char *name, int timeout)
+{
+	const int gen = intel_gen(intel_get_drm_devid(fd));
+	const uint32_t MI_ARB_CHK = 0x5 << 23;
+	struct drm_i915_gem_execbuffer2 execbuf;
+	struct drm_i915_gem_exec_object2 obj[2];
+	struct drm_i915_gem_relocation_entry reloc[4], *r;
+	uint32_t *bbe[2], *state, *batch;
+	unsigned engines[16], nengine, engine, flags;
+	struct timespec tv = {};
+	unsigned long cycles;
+	uint64_t elapsed;
+	bool cached;
+
+	flags = I915_EXEC_NO_RELOC;
+	if (gen == 4 || gen == 5)
+		flags |= I915_EXEC_SECURE;
+
+	nengine = 0;
+	for_each_physical_engine(fd, engine) {
+		if (!gem_can_store_dword(fd, engine))
+			continue;
+
+		engines[nengine++] = engine;
+	}
+	igt_require(nengine);
+
+	memset(obj, 0, sizeof(obj));
+	obj[0].handle = gem_create(fd, 4096);
+	obj[0].flags = EXEC_OBJECT_WRITE;
+	cached = __gem_set_caching(fd, obj[0].handle, 1) == 0;
+	obj[1].handle = gem_create(fd, 4096);
+	obj[1].relocs_ptr = to_user_pointer(reloc);
+	obj[1].relocation_count = ARRAY_SIZE(reloc);
+
+	r = memset(reloc, 0, sizeof(reloc));
+	batch = gem_mmap__wc(fd, obj[1].handle, 0, 4096, PROT_WRITE);
+
+	for (unsigned int start_offset = 0;
+	     start_offset <= 128;
+	     start_offset += 128) {
+		uint32_t *b = batch + start_offset / sizeof(*batch);
+
+		r->target_handle = obj[0].handle;
+		r->offset = (b - batch + 1) * sizeof(uint32_t);
+		r->delta = 0;
+		r->read_domains = I915_GEM_DOMAIN_RENDER;
+		r->write_domain = I915_GEM_DOMAIN_RENDER;
+
+		*b = MI_STORE_DWORD_IMM | (gen < 6 ? 1 << 22 : 0);
+		if (gen >= 8) {
+			*++b = r->delta;
+			*++b = 0;
+		} else if (gen >= 4) {
+			r->offset += sizeof(uint32_t);
+			*++b = 0;
+			*++b = r->delta;
+		} else {
+			*b -= 1;
+			*++b = r->delta;
+		}
+		*++b = start_offset != 0;
+		r++;
+
+		b = batch + (start_offset + 64) / sizeof(*batch);
+		bbe[start_offset != 0] = b;
+		*b++ = MI_ARB_CHK;
+
+		r->target_handle = obj[1].handle;
+		r->offset = (b - batch + 1) * sizeof(uint32_t);
+		r->read_domains = I915_GEM_DOMAIN_COMMAND;
+		r->delta = start_offset + 64;
+		if (gen >= 8) {
+			*b++ = MI_BATCH_BUFFER_START | 1 << 8 | 1;
+			*b++ = r->delta;
+			*b++ = 0;
+		} else if (gen >= 6) {
+			*b++ = MI_BATCH_BUFFER_START | 1 << 8;
+			*b++ = r->delta;
+		} else {
+			*b++ = MI_BATCH_BUFFER_START | 2 << 6;
+			if (gen < 4)
+				r->delta |= 1;
+			*b++ = r->delta;
+		}
+		r++;
+	}
+	igt_assert(r == reloc + ARRAY_SIZE(reloc));
+
+	if (cached)
+		state = gem_mmap__cpu(fd, obj[0].handle, 0, 4096, PROT_READ);
+	else
+		state = gem_mmap__wc(fd, obj[0].handle, 0, 4096, PROT_READ);
+
+	memset(&execbuf, 0, sizeof(execbuf));
+	execbuf.buffers_ptr = to_user_pointer(obj);
+	execbuf.buffer_count = ARRAY_SIZE(obj);
+
+	cycles = 0;
+	do {
+		unsigned int idx = ++cycles & 1;
+
+		*bbe[idx] = MI_ARB_CHK;
+		execbuf.batch_start_offset =
+			(bbe[idx] - batch) * sizeof(*batch) - 64;
+
+		execbuf.flags = engines[cycles % nengine] | flags;
+		gem_execbuf(fd, &execbuf);
+
+		*bbe[!idx] = MI_BATCH_BUFFER_END;
+		__sync_synchronize();
+
+		while (READ_ONCE(*state) != idx)
+			;
+	} while ((elapsed = igt_nsec_elapsed(&tv)) >> 30 < timeout);
+	*bbe[cycles & 1] = MI_BATCH_BUFFER_END;
+	gem_sync(fd, obj[1].handle);
+
+	igt_info("%s completed %ld cycles: %.3f us\n",
+		 name, cycles, elapsed*1e-3/cycles);
+
+	munmap(state, 4096);
+	munmap(batch, 4096);
+	gem_close(fd, obj[1].handle);
+	gem_close(fd, obj[0].handle);
+}
+
 static void single(int fd, uint32_t handle,
 		   unsigned ring_id, const char *ring_name)
 {
@@ -813,7 +927,7 @@ igt_main
 		}
 
 		igt_subtest("poll-sequential")
-			poll_ring(device, ALL_ENGINES, "Sequential", 20);
+			poll_sequential(device, "Sequential", 20);
 
 		igt_subtest("headless") {
 			/* Requires master for changing display modes */
-- 
2.20.1

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[PATCH i-g-t 13/13] i915/gem_sync: Make switch-default asymmetric

[Chris Wilson]

To make the demonstration of the cheeky preemption more impactful, make
the second context a nop to contrast the first being 1024
MI_STORE_DWORD_IMM. Then if we execute and wait on the second context
before executing the first, the client latency is even more drastically
reduced.

To more clearly show any effect on wait reordering, measure the
alternative path and present both.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
---
 tests/i915/gem_sync.c | 40 +++++++++++++++++++++++++++++-----------
 1 file changed, 29 insertions(+), 11 deletions(-)

diff --git a/tests/i915/gem_sync.c b/tests/i915/gem_sync.c
index fb209977d..3e4feff32 100644
--- a/tests/i915/gem_sync.c
+++ b/tests/i915/gem_sync.c
@@ -651,7 +651,7 @@ switch_ring(int fd, unsigned ring, int num_children, int timeout)
 			struct drm_i915_gem_relocation_entry reloc[1024];
 			struct drm_i915_gem_execbuffer2 execbuf;
 		} contexts[2];
-		double start, elapsed;
+		double elapsed, baseline;
 		unsigned long cycles;
 
 		for (int i = 0; i < ARRAY_SIZE(contexts); i++) {
@@ -679,7 +679,7 @@ switch_ring(int fd, unsigned ring, int num_children, int timeout)
 			c->object[1].handle = gem_create(fd, sz);
 
 			c->object[1].relocs_ptr = to_user_pointer(c->reloc);
-			c->object[1].relocation_count = 1024;
+			c->object[1].relocation_count = 1024 * i;
 
 			batch = gem_mmap__cpu(fd, c->object[1].handle, 0, sz,
 					PROT_WRITE | PROT_READ);
@@ -688,7 +688,7 @@ switch_ring(int fd, unsigned ring, int num_children, int timeout)
 
 			memset(c->reloc, 0, sizeof(c->reloc));
 			b = batch;
-			for (int r = 0; r < 1024; r++) {
+			for (int r = 0; r < c->object[1].relocation_count; r++) {
 				uint64_t offset;
 
 				c->reloc[r].presumed_offset = c->object[0].offset;
@@ -722,26 +722,44 @@ switch_ring(int fd, unsigned ring, int num_children, int timeout)
 		}
 
 		cycles = 0;
-		elapsed = 0;
-		start = gettime();
-		do {
+		baseline = 0;
+		igt_until_timeout(timeout) {
 			do {
 				double this;
 
-				gem_execbuf(fd, &contexts[0].execbuf);
 				gem_execbuf(fd, &contexts[1].execbuf);
+				gem_execbuf(fd, &contexts[0].execbuf);
 
 				this = gettime();
 				gem_sync(fd, contexts[1].object[1].handle);
-				elapsed += gettime() - this;
+				gem_sync(fd, contexts[0].object[1].handle);
+				baseline += gettime() - this;
+			} while (++cycles & 1023);
+		}
+		baseline /= cycles;
+
+		cycles = 0;
+		elapsed = 0;
+		igt_until_timeout(timeout) {
+			do {
+				double this;
 
+				gem_execbuf(fd, &contexts[1].execbuf);
+				gem_execbuf(fd, &contexts[0].execbuf);
+
+				this = gettime();
 				gem_sync(fd, contexts[0].object[1].handle);
+				elapsed += gettime() - this;
+
+				gem_sync(fd, contexts[1].object[1].handle);
 			} while (++cycles & 1023);
-		} while ((gettime() - start) < timeout);
-		igt_info("%s%sompleted %ld cycles: %.3f us\n",
+		}
+		elapsed /= cycles;
+
+		igt_info("%s%sompleted %ld cycles: %.3f us, baseline %.3f us\n",
 			 names[child % num_engines] ?: "",
 			 names[child % num_engines] ? " c" : "C",
-			 cycles, elapsed*1e6/cycles);
+			 cycles, elapsed*1e6, baseline*1e6);
 
 		for (int i = 0; i < ARRAY_SIZE(contexts); i++) {
 			gem_close(fd, contexts[i].object[1].handle);
-- 
2.20.1

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[igt-dev] [PATCH i-g-t 13/13] i915/gem_sync: Make switch-default asymmetric

[Chris Wilson]

To make the demonstration of the cheeky preemption more impactful, make
the second context a nop to contrast the first being 1024
MI_STORE_DWORD_IMM. Then if we execute and wait on the second context
before executing the first, the client latency is even more drastically
reduced.

To more clearly show any effect on wait reordering, measure the
alternative path and present both.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
---
 tests/i915/gem_sync.c | 40 +++++++++++++++++++++++++++++-----------
 1 file changed, 29 insertions(+), 11 deletions(-)

diff --git a/tests/i915/gem_sync.c b/tests/i915/gem_sync.c
index fb209977d..3e4feff32 100644
--- a/tests/i915/gem_sync.c
+++ b/tests/i915/gem_sync.c
@@ -651,7 +651,7 @@ switch_ring(int fd, unsigned ring, int num_children, int timeout)
 			struct drm_i915_gem_relocation_entry reloc[1024];
 			struct drm_i915_gem_execbuffer2 execbuf;
 		} contexts[2];
-		double start, elapsed;
+		double elapsed, baseline;
 		unsigned long cycles;
 
 		for (int i = 0; i < ARRAY_SIZE(contexts); i++) {
@@ -679,7 +679,7 @@ switch_ring(int fd, unsigned ring, int num_children, int timeout)
 			c->object[1].handle = gem_create(fd, sz);
 
 			c->object[1].relocs_ptr = to_user_pointer(c->reloc);
-			c->object[1].relocation_count = 1024;
+			c->object[1].relocation_count = 1024 * i;
 
 			batch = gem_mmap__cpu(fd, c->object[1].handle, 0, sz,
 					PROT_WRITE | PROT_READ);
@@ -688,7 +688,7 @@ switch_ring(int fd, unsigned ring, int num_children, int timeout)
 
 			memset(c->reloc, 0, sizeof(c->reloc));
 			b = batch;
-			for (int r = 0; r < 1024; r++) {
+			for (int r = 0; r < c->object[1].relocation_count; r++) {
 				uint64_t offset;
 
 				c->reloc[r].presumed_offset = c->object[0].offset;
@@ -722,26 +722,44 @@ switch_ring(int fd, unsigned ring, int num_children, int timeout)
 		}
 
 		cycles = 0;
-		elapsed = 0;
-		start = gettime();
-		do {
+		baseline = 0;
+		igt_until_timeout(timeout) {
 			do {
 				double this;
 
-				gem_execbuf(fd, &contexts[0].execbuf);
 				gem_execbuf(fd, &contexts[1].execbuf);
+				gem_execbuf(fd, &contexts[0].execbuf);
 
 				this = gettime();
 				gem_sync(fd, contexts[1].object[1].handle);
-				elapsed += gettime() - this;
+				gem_sync(fd, contexts[0].object[1].handle);
+				baseline += gettime() - this;
+			} while (++cycles & 1023);
+		}
+		baseline /= cycles;
+
+		cycles = 0;
+		elapsed = 0;
+		igt_until_timeout(timeout) {
+			do {
+				double this;
 
+				gem_execbuf(fd, &contexts[1].execbuf);
+				gem_execbuf(fd, &contexts[0].execbuf);
+
+				this = gettime();
 				gem_sync(fd, contexts[0].object[1].handle);
+				elapsed += gettime() - this;
+
+				gem_sync(fd, contexts[1].object[1].handle);
 			} while (++cycles & 1023);
-		} while ((gettime() - start) < timeout);
-		igt_info("%s%sompleted %ld cycles: %.3f us\n",
+		}
+		elapsed /= cycles;
+
+		igt_info("%s%sompleted %ld cycles: %.3f us, baseline %.3f us\n",
 			 names[child % num_engines] ?: "",
 			 names[child % num_engines] ? " c" : "C",
-			 cycles, elapsed*1e6/cycles);
+			 cycles, elapsed*1e6, baseline*1e6);
 
 		for (int i = 0; i < ARRAY_SIZE(contexts); i++) {
 			gem_close(fd, contexts[i].object[1].handle);
-- 
2.20.1

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Re: [PATCH i-g-t 01/13] i915/gem_mocs_settings: Allow hangs around reset tests

[Tvrtko Ursulin]

On 04/02/2019 08:36, Chris Wilson wrote:
> To inject a GPU hang, we should ask the kernel first if it is legal to
> do so.
> 
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> ---
>   tests/i915/gem_mocs_settings.c | 54 +++++++++++++++++++++-------------
>   1 file changed, 34 insertions(+), 20 deletions(-)
> 
> diff --git a/tests/i915/gem_mocs_settings.c b/tests/i915/gem_mocs_settings.c
> index 967223f1b..5b3b6bc1e 100644
> --- a/tests/i915/gem_mocs_settings.c
> +++ b/tests/i915/gem_mocs_settings.c
> @@ -453,26 +453,40 @@ igt_main
>   			continue;
>   
>   		for (unsigned mode = NONE; mode < MAX_MOCS_TEST_MODES; mode++) {
> -			for (unsigned flags = 0; flags < ALL_MOCS_FLAGS + 1; flags++) {
> -				/* Trying to test non-render engines for dirtying MOCS
> -				 * values from one context having effect on different
> -				 * context is bound to fail - only render engine is
> -				 * doing context save/restore of MOCS registers.
> -				 * Let's also limit testing values on non-default
> -				 * contexts to render-only.
> -				 */
> -				if (flags && e->exec_id != I915_EXEC_RENDER)
> -					continue;
> -
> -				igt_subtest_f("mocs-%s%s%s-%s",
> -					      test_modes[mode],
> -					      flags & MOCS_NON_DEFAULT_CTX ? "-ctx": "",
> -					      flags & MOCS_DIRTY_VALUES ? "-dirty" : "",
> -					      e->name) {
> -					if (flags & (MOCS_NON_DEFAULT_CTX | MOCS_DIRTY_VALUES))
> -						gem_require_contexts(fd);
> -
> -					run_test(fd, e->exec_id | e->flags, flags, mode);
> +			igt_subtest_group {
> +				igt_hang_t hang = {};
> +
> +				igt_fixture {
> +					if (mode == RESET)
> +						hang = igt_allow_hang(fd, 0, 0);
> +				}
> +
> +				for (unsigned flags = 0; flags < ALL_MOCS_FLAGS + 1; flags++) {
> +					/* Trying to test non-render engines for dirtying MOCS
> +					 * values from one context having effect on different
> +					 * context is bound to fail - only render engine is
> +					 * doing context save/restore of MOCS registers.
> +					 * Let's also limit testing values on non-default
> +					 * contexts to render-only.
> +					 */
> +					if (flags && e->exec_id != I915_EXEC_RENDER)
> +						continue;
> +
> +					igt_subtest_f("mocs-%s%s%s-%s",
> +						      test_modes[mode],
> +						      flags & MOCS_NON_DEFAULT_CTX ? "-ctx": "",
> +						      flags & MOCS_DIRTY_VALUES ? "-dirty" : "",
> +						      e->name) {
> +						if (flags & (MOCS_NON_DEFAULT_CTX | MOCS_DIRTY_VALUES))
> +							gem_require_contexts(fd);
> +
> +						run_test(fd, e->exec_id | e->flags, flags, mode);
> +					}
> +				}
> +
> +				igt_fixture {
> +					if (mode == RESET)
> +						igt_disallow_hang(fd, hang);
>   				}
>   			}
>   		}
> 

Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>

Regards,

Tvrtko
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Re: [igt-dev] [Intel-gfx] [PATCH i-g-t 01/13] i915/gem_mocs_settings: Allow hangs around reset tests

[Tvrtko Ursulin]

On 04/02/2019 08:36, Chris Wilson wrote:
> To inject a GPU hang, we should ask the kernel first if it is legal to
> do so.
> 
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> ---
>   tests/i915/gem_mocs_settings.c | 54 +++++++++++++++++++++-------------
>   1 file changed, 34 insertions(+), 20 deletions(-)
> 
> diff --git a/tests/i915/gem_mocs_settings.c b/tests/i915/gem_mocs_settings.c
> index 967223f1b..5b3b6bc1e 100644
> --- a/tests/i915/gem_mocs_settings.c
> +++ b/tests/i915/gem_mocs_settings.c
> @@ -453,26 +453,40 @@ igt_main
>   			continue;
>   
>   		for (unsigned mode = NONE; mode < MAX_MOCS_TEST_MODES; mode++) {
> -			for (unsigned flags = 0; flags < ALL_MOCS_FLAGS + 1; flags++) {
> -				/* Trying to test non-render engines for dirtying MOCS
> -				 * values from one context having effect on different
> -				 * context is bound to fail - only render engine is
> -				 * doing context save/restore of MOCS registers.
> -				 * Let's also limit testing values on non-default
> -				 * contexts to render-only.
> -				 */
> -				if (flags && e->exec_id != I915_EXEC_RENDER)
> -					continue;
> -
> -				igt_subtest_f("mocs-%s%s%s-%s",
> -					      test_modes[mode],
> -					      flags & MOCS_NON_DEFAULT_CTX ? "-ctx": "",
> -					      flags & MOCS_DIRTY_VALUES ? "-dirty" : "",
> -					      e->name) {
> -					if (flags & (MOCS_NON_DEFAULT_CTX | MOCS_DIRTY_VALUES))
> -						gem_require_contexts(fd);
> -
> -					run_test(fd, e->exec_id | e->flags, flags, mode);
> +			igt_subtest_group {
> +				igt_hang_t hang = {};
> +
> +				igt_fixture {
> +					if (mode == RESET)
> +						hang = igt_allow_hang(fd, 0, 0);
> +				}
> +
> +				for (unsigned flags = 0; flags < ALL_MOCS_FLAGS + 1; flags++) {
> +					/* Trying to test non-render engines for dirtying MOCS
> +					 * values from one context having effect on different
> +					 * context is bound to fail - only render engine is
> +					 * doing context save/restore of MOCS registers.
> +					 * Let's also limit testing values on non-default
> +					 * contexts to render-only.
> +					 */
> +					if (flags && e->exec_id != I915_EXEC_RENDER)
> +						continue;
> +
> +					igt_subtest_f("mocs-%s%s%s-%s",
> +						      test_modes[mode],
> +						      flags & MOCS_NON_DEFAULT_CTX ? "-ctx": "",
> +						      flags & MOCS_DIRTY_VALUES ? "-dirty" : "",
> +						      e->name) {
> +						if (flags & (MOCS_NON_DEFAULT_CTX | MOCS_DIRTY_VALUES))
> +							gem_require_contexts(fd);
> +
> +						run_test(fd, e->exec_id | e->flags, flags, mode);
> +					}
> +				}
> +
> +				igt_fixture {
> +					if (mode == RESET)
> +						igt_disallow_hang(fd, hang);
>   				}
>   			}
>   		}
> 

Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>

Regards,

Tvrtko
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Re: [igt-dev] [PATCH i-g-t 01/13] i915/gem_mocs_settings: Allow hangs around reset tests

[Katarzyna Dec]

On Mon, Feb 04, 2019 at 08:36:02AM +0000, Chris Wilson wrote:
> To inject a GPU hang, we should ask the kernel first if it is legal to
> do so.
> 
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>

Reviewed-by: Katarzyna Dec <katarzyna.dec@intel.com>

Kasia :)
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Re: [igt-dev] [PATCH i-g-t 01/13] i915/gem_mocs_settings: Allow hangs around reset tests

[Katarzyna Dec]

On Mon, Feb 04, 2019 at 08:36:02AM +0000, Chris Wilson wrote:
> To inject a GPU hang, we should ask the kernel first if it is legal to
> do so.
> 
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>

Reviewed-by: Katarzyna Dec <katarzyna.dec@intel.com>

Kasia :)
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[igt-dev] ✓ Fi.CI.BAT: success for series starting with [i-g-t,01/13] i915/gem_mocs_settings: Allow hangs around reset tests

[Patchwork]

== Series Details ==

Series: series starting with [i-g-t,01/13] i915/gem_mocs_settings: Allow hangs around reset tests
URL   : https://patchwork.freedesktop.org/series/56165/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_5534 -> IGTPW_2338
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  External URL: https://patchwork.freedesktop.org/api/1.0/series/56165/revisions/1/mbox/

Known issues
------------

  Here are the changes found in IGTPW_2338 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@kms_frontbuffer_tracking@basic:
    - fi-byt-clapper:     PASS -> FAIL [fdo#103167]

  
#### Possible fixes ####

  * igt@i915_module_load@reload:
    - fi-blb-e6850:       INCOMPLETE [fdo#107718] -> PASS

  * igt@pm_rpm@module-reload:
    - {fi-whl-u}:         DMESG-WARN -> PASS

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167
  [fdo#107718]: https://bugs.freedesktop.org/show_bug.cgi?id=107718
  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [fdo#109278]: https://bugs.freedesktop.org/show_bug.cgi?id=109278


Participating hosts (45 -> 43)
------------------------------

  Additional (3): fi-kbl-7560u fi-gdg-551 fi-snb-2520m 
  Missing    (5): fi-kbl-soraka fi-ilk-m540 fi-byt-j1900 fi-byt-squawks fi-bsw-cyan 


Build changes
-------------

    * IGT: IGT_4804 -> IGTPW_2338

  CI_DRM_5534: e13a2ff1c977caccd4533c955a40eb8e751b5d2d @ git://anongit.freedesktop.org/gfx-ci/linux
  IGTPW_2338: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_2338/
  IGT_4804: 0b9ac934a6aad9ed5c1fdfd48d2b0faa10bfbbc4 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools



== Testlist changes ==

+igt@gem_exec_latency@blt-live-dispatch
+igt@gem_exec_latency@blt-live-dispatch-queued
+igt@gem_exec_latency@blt-preemption-queued
+igt@gem_exec_latency@bsd1-live-dispatch
+igt@gem_exec_latency@bsd1-live-dispatch-queued
+igt@gem_exec_latency@bsd1-preemption-queued
+igt@gem_exec_latency@bsd2-live-dispatch
+igt@gem_exec_latency@bsd2-live-dispatch-queued
+igt@gem_exec_latency@bsd2-preemption-queued
+igt@gem_exec_latency@bsd-live-dispatch
+igt@gem_exec_latency@bsd-live-dispatch-queued
+igt@gem_exec_latency@bsd-preemption-queued
+igt@gem_exec_latency@render-live-dispatch
+igt@gem_exec_latency@render-live-dispatch-queued
+igt@gem_exec_latency@render-preemption-queued
+igt@gem_exec_latency@vebox-live-dispatch
+igt@gem_exec_latency@vebox-live-dispatch-queued
+igt@gem_exec_latency@vebox-preemption-queued
+igt@gem_exec_schedule@semaphore-power
+igt@gem_exec_schedule@semaphore-user

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_2338/
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[igt-dev] ✓ Fi.CI.IGT: success for series starting with [i-g-t,01/13] i915/gem_mocs_settings: Allow hangs around reset tests

[Patchwork]

== Series Details ==

Series: series starting with [i-g-t,01/13] i915/gem_mocs_settings: Allow hangs around reset tests
URL   : https://patchwork.freedesktop.org/series/56165/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_5534_full -> IGTPW_2338_full
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  External URL: https://patchwork.freedesktop.org/api/1.0/series/56165/revisions/1/mbox/

Known issues
------------

  Here are the changes found in IGTPW_2338_full that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@kms_busy@extended-modeset-hang-newfb-render-a:
    - shard-snb:          NOTRUN -> DMESG-WARN [fdo#107956]

  * igt@kms_color@pipe-a-legacy-gamma:
    - shard-apl:          PASS -> FAIL [fdo#104782] / [fdo#108145]

  * igt@kms_cursor_crc@cursor-128x128-suspend:
    - shard-glk:          PASS -> FAIL [fdo#103232] +4

  * igt@kms_cursor_crc@cursor-64x21-random:
    - shard-apl:          PASS -> FAIL [fdo#103232] +5
    - shard-kbl:          PASS -> FAIL [fdo#103232] +2

  * igt@kms_cursor_crc@cursor-64x64-suspend:
    - shard-apl:          PASS -> FAIL [fdo#103191] / [fdo#103232]

  * igt@kms_draw_crc@draw-method-rgb565-mmap-gtt-ytiled:
    - shard-glk:          PASS -> FAIL [fdo#103184]

  * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-mmap-gtt:
    - shard-apl:          PASS -> FAIL [fdo#103167] +2

  * igt@kms_frontbuffer_tracking@fbc-1p-rte:
    - shard-glk:          PASS -> FAIL [fdo#103167] / [fdo#105682]

  * igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-draw-mmap-cpu:
    - shard-glk:          PASS -> FAIL [fdo#103167] +12

  * igt@kms_plane@pixel-format-pipe-a-planes-source-clamping:
    - shard-glk:          PASS -> FAIL [fdo#108948]

  * igt@kms_plane_multiple@atomic-pipe-b-tiling-none:
    - shard-glk:          PASS -> FAIL [fdo#103166] +8

  * igt@kms_plane_multiple@atomic-pipe-c-tiling-yf:
    - shard-apl:          PASS -> FAIL [fdo#103166] +1
    - shard-kbl:          PASS -> FAIL [fdo#103166] +1

  
#### Possible fixes ####

  * igt@kms_ccs@pipe-a-crc-sprite-planes-basic:
    - shard-kbl:          FAIL [fdo#107725] / [fdo#108145] -> PASS

  * igt@kms_cursor_crc@cursor-256x256-onscreen:
    - shard-kbl:          FAIL [fdo#103232] -> PASS

  * igt@kms_cursor_crc@cursor-256x256-suspend:
    - shard-apl:          FAIL [fdo#103191] / [fdo#103232] -> PASS

  * igt@kms_cursor_crc@cursor-256x85-onscreen:
    - shard-apl:          FAIL [fdo#103232] -> PASS +3

  * igt@kms_cursor_crc@cursor-64x64-sliding:
    - shard-glk:          FAIL [fdo#103232] -> PASS

  * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-onoff:
    - shard-apl:          FAIL [fdo#103167] -> PASS +1
    - shard-kbl:          FAIL [fdo#103167] -> PASS

  * igt@kms_frontbuffer_tracking@fbc-2p-primscrn-cur-indfb-draw-mmap-wc:
    - shard-glk:          FAIL [fdo#103167] -> PASS

  * igt@kms_plane@pixel-format-pipe-a-planes:
    - shard-apl:          FAIL [fdo#103166] -> PASS +1

  * igt@kms_plane_alpha_blend@pipe-b-alpha-opaque-fb:
    - shard-glk:          FAIL [fdo#108145] -> PASS +1

  * igt@kms_plane_multiple@atomic-pipe-a-tiling-y:
    - shard-glk:          FAIL [fdo#103166] -> PASS +1

  * igt@kms_setmode@basic:
    - shard-hsw:          FAIL [fdo#99912] -> PASS

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#103166]: https://bugs.freedesktop.org/show_bug.cgi?id=103166
  [fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167
  [fdo#103184]: https://bugs.freedesktop.org/show_bug.cgi?id=103184
  [fdo#103191]: https://bugs.freedesktop.org/show_bug.cgi?id=103191
  [fdo#103232]: https://bugs.freedesktop.org/show_bug.cgi?id=103232
  [fdo#104782]: https://bugs.freedesktop.org/show_bug.cgi?id=104782
  [fdo#105682]: https://bugs.freedesktop.org/show_bug.cgi?id=105682
  [fdo#107725]: https://bugs.freedesktop.org/show_bug.cgi?id=107725
  [fdo#107956]: https://bugs.freedesktop.org/show_bug.cgi?id=107956
  [fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145
  [fdo#108948]: https://bugs.freedesktop.org/show_bug.cgi?id=108948
  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [fdo#109278]: https://bugs.freedesktop.org/show_bug.cgi?id=109278
  [fdo#99912]: https://bugs.freedesktop.org/show_bug.cgi?id=99912


Participating hosts (7 -> 5)
------------------------------

  Missing    (2): shard-skl shard-iclb 


Build changes
-------------

    * IGT: IGT_4804 -> IGTPW_2338
    * Piglit: piglit_4509 -> None

  CI_DRM_5534: e13a2ff1c977caccd4533c955a40eb8e751b5d2d @ git://anongit.freedesktop.org/gfx-ci/linux
  IGTPW_2338: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_2338/
  IGT_4804: 0b9ac934a6aad9ed5c1fdfd48d2b0faa10bfbbc4 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_2338/
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